Anti-countercurrent communication architecture of inverter system

Abstract

The invention discloses an inverter system anti-countercurrent communication architecture. The architecture comprises a communication network, and a three-phase ammeter, an anti-countercurrent controller and a plurality of inverters which are in communication connection with the communication network. The detection module is used for detecting electric quantity information of a power grid side of the inverter system; the anti-countercurrent controller is suitable for receiving electric quantity information detected by the three-phase electric meter; the anti-countercurrent controller is suitable for selecting part of inverters as main inverters and sending an anti-countercurrent instruction; the main inverter is suitable for receiving the anti-countercurrent instruction and forwarding the anti-countercurrent instruction to the other inverters. The beneficial effects of the application are that the main inverter is arranged in the plurality of inverters and communicates with the anti-reflux controller through the communication bus, and the other inverters communicate with the main inverter, so that information interference when the anti-reflux controller communicates with all inverters can be avoided; therefore, the accuracy of anti-reflux control can be effectively improved.

Description

Technical Field

[0001] The present application relates to the field of renewable energy power generation, and in particular to an anti-backflow communication architecture for an inverter system. Background Art

[0002] In a photovoltaic system, when the power of photovoltaic power generation is greater than the power of the local load, if the load cannot fully absorb the power generated by the photovoltaic system, the excess power will flow to the grid, forming a reverse flow. The core principle of the anti-reverse flow control technology is to adjust the output power of the photovoltaic system in time when the reverse flow is detected to ensure that the power is only supplied to the local load.

[0003] The anti-backflow system usually installs current mutual inductance equipment or electric meters on the grid side to monitor the real-time power, current size and direction on the grid side. When a backflow is detected, the anti-backflow system will send a power reduction signal to the inverter through the anti-backflow controller. The inverter will dynamically adjust its output power according to the received signal until the reverse output current is zero, thereby realizing the anti-backflow function. Although the anti-backflow controller plays a key role in maintaining power balance, the existing architecture design and information transmission mechanism cannot be well adapted to the complex situation of three-phase load imbalance. Therefore, further research and development of anti-backflow communication mechanisms that can be used in three-phase load imbalance scenarios are of great significance to improving the overall performance and stability of photovoltaic systems. Summary of the invention

[0004] One of the objectives of the present application is to provide an inverter system backflow prevention communication architecture that can solve at least one of the defects in the above-mentioned background technology.

[0005] In order to achieve at least one of the above-mentioned purposes, the technical solution adopted in the present application is: an inverter system anti-backflow communication architecture, including a communication network and a detection module, an anti-backflow controller and multiple inverters that are communicatively connected to the communication network; the detection module is used to detect the power information on the grid side of the inverter system; the anti-backflow controller is suitable for receiving the power information detected by the detection module; the anti-backflow controller is suitable for selecting some of the inverters as main inverters and sending anti-backflow instructions; the main inverter is suitable for forwarding the anti-backflow instructions to the remaining inverters.

[0006] Preferably, the communication network adopts a communication bus, and the communication bus has two lines, namely a first communication line and a second communication line; the anti-backflow controller is external to the inverter, and the anti-backflow controller is communicated with the detection module and the main inverter through the first communication line, and the main inverter is communicated with the remaining inverters through the second communication line.

[0007] Preferably, the inverters all include an ARM processor and a DSP processor; the main inverter is connected to the first communication line through the ARM processor or the DSP processor to receive the anti-backflow instruction; the main inverter is connected to the second communication line through the DSP processor to forward the anti-backflow instruction, and the remaining inverters are all connected to the second communication line through the DSP processor to receive the anti-backflow instruction forwarded by the main inverter.

[0008] Preferably, the inverters all include an ARM processor and a DSP processor; the main inverter is connected to the first communication line and the second communication line respectively through the ARM processor to receive and forward the anti-backflow instruction; the remaining inverters are all connected to the second communication line through the DSP processor, and then receive the anti-backflow instruction forwarded by the main inverter.

[0009] Preferably, the communication network adopts a communication bus, and there is one communication bus; the inverters all include an ARM processor and a DSP processor; the main inverter is connected to the communication bus through the ARM processor to receive the anti-backflow instruction issued by the anti-backflow controller, and the main inverter is connected to the communication bus through the DSP processor to forward the anti-backflow instruction; the remaining inverters are all connected to the communication bus through the DSP processor, and then receive the anti-backflow instruction forwarded by the main inverter; wherein the anti-backflow instruction issued by the anti-backflow controller and the anti-backflow instruction forwarded by the main inverter adopt different communication timing and / or communication protocols.

[0010] Preferably, the communication network adopts a communication bus, and there is one communication bus; the inverters all include an ARM processor and a DSP processor; all the inverters are connected to the communication bus through the ARM processor or the DSP processor; wherein the anti-backflow instruction issued by the anti-backflow controller and the anti-backflow instruction forwarded by the main inverter use different communication timing and / or communication protocols.

[0011] Preferably, the communication network adopts a communication bus, and there is one communication bus; the inverters all include an ARM processor and a DSP processor; the anti-backflow controller is built into the ARM processor of the main inverter; the main inverter is connected to the communication bus through the ARM processor and the DSP processor, and the ARM processor is used to receive the power information sent by the detection module; the DSP processor is used to forward the anti-backflow instruction generated by the anti-backflow controller; the remaining inverters are all connected to the communication bus through the DSP processor, and then receive the anti-backflow instruction forwarded by the main inverter.

[0012] Preferably, the communication network adopts a communication bus, and there is one communication bus; the inverters all include an ARM processor and a DSP processor; the anti-backflow controller is built into the ARM processor of the main inverter; all the inverters are connected to the communication bus through the ARM processor or the DSP processor.

[0013] Preferably, the communication network adopts a communication bus, and there is one communication bus; the inverters all include an ARM processor and a DSP processor; the anti-backflow controller is built into the DSP processor of the main inverter; the main inverter is connected to the communication bus through the ARM processor and the DSP processor, the ARM processor is used to receive the power information detected by the detection module and send it to the DSP processor, and the DSP processor is suitable for forwarding the anti-backflow instruction generated by the anti-backflow controller to the communication bus; the remaining inverters are all connected to the communication bus through the DSP processor, and then receive the anti-backflow instruction forwarded by the main inverter.

[0014] Preferably, the communication network adopts a communication bus, and there is one communication bus; the inverters all include an ARM processor and a DSP processor; the anti-backflow controller is built into the DSP processor of the main inverter; all the inverters are connected to the communication bus through the ARM processor or the DSP processor.

[0015] Compared with the prior art, the beneficial effects of this application are:

[0016] By setting a main inverter among multiple inverters to communicate with the anti-backflow controller through a communication bus, and the remaining inverters communicate with the main inverter, information interference when the anti-backflow controller communicates with all inverters can be avoided, thereby effectively improving the accuracy of anti-backflow control. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1This is a schematic diagram of the overall architecture of one of the embodiments of the present application.

[0018] Figure 2 For this application Figure 1 A schematic diagram of Example 1 of the embodiment shown in the figure, which uses dual communication buses for communication.

[0019] Figure 3 For this application Figure 1 A schematic diagram of Example 2 of the embodiment shown in the figure, which uses dual communication buses for communication.

[0020] Figure 4 For this application Figure 1 A schematic diagram of Example 3 of using dual communication buses for communication in the illustrated embodiment.

[0021] Figure 5 For this application Figure 1 A schematic diagram of Example 1 of the embodiment shown in the figure, which uses a single communication bus for communication.

[0022] Figure 6 For this application Figure 1 A schematic diagram of Example 2 of the embodiment shown in the figure, which uses a single communication bus for communication.

[0023] Figure 7 For this application Figure 1 A schematic diagram of Example 3 of the embodiment shown in the figure, which uses a single communication bus for communication.

[0024] Figure 8 This is a schematic diagram of the overall architecture of another embodiment of the present application.

[0025] Fig. 9 For this application Figure 8 The schematic diagram of Example 1 in which the anti-backflow controller in the illustrated embodiment is built into an ARM processor for communication.

[0026] Fig.10 For this application Figure 8 A schematic diagram of Example 2 in which the anti-backflow controller in the illustrated embodiment is built into an ARM processor for communication.

[0027] Fig.11 For this application Figure 8 A schematic diagram of Example 3 in which the anti-backflow controller in the illustrated embodiment is built into an ARM processor for communication.

[0028] Fig.12 For this application Figure 8 A schematic diagram of Example 1 in which the anti-backflow controller in the illustrated embodiment is built into a DSP processor for communication.

[0029] Fig.13 For this application Figure 8A schematic diagram of Example 2 in which the anti-backflow controller in the illustrated embodiment is built into a DSP processor for communication.

[0030] Fig.14 For this application Figure 8 A schematic diagram of Example 3 in which the anti-backflow controller in the illustrated embodiment is built into a DSP processor for communication.

[0031] In the figure: a power grid 200, a load 300, an anti-backflow controller 400, and a three-phase electric meter 500. DETAILED DESCRIPTION

[0032] Below, the present application is further described in conjunction with specific implementation methods. It should be noted that in the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms should not be understood as necessarily being directed to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification.

[0033] In the description of the present application, it should be noted that directional words, such as the terms "center", "lateral", "longitudinal", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", etc., indicating directions and positional relationships are based on the directions or positional relationships shown in the accompanying drawings, which are only for the convenience of narrating the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and cannot be understood as limiting the specific scope of protection of the present application.

[0034] It should be noted that the terms "first", "second", etc. in the description and claims of the present application are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0035] In this application, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be connected, detachably connected, or integrated; it can be mechanically connected or electrically connected; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0036] In the present application, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0037] The terms "including" and "having" and any variations thereof in the specification and claims of the present application are intended to cover non-exclusive inclusions. For example, a process, method, system, product or apparatus comprising a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to these processes, methods, products or apparatuses.

[0038] One of the preferred embodiments of the present application is as follows: Figure 1 and Figure 8As shown, an anti-backflow communication architecture for an inverter system includes a communication network and a detection module, an anti-backflow controller 400, and a plurality of inverters that are communicatively connected to the communication network. The detection module is used to detect the power information on the AC side of the inverter system; the anti-backflow controller 400 can receive the power information detected by the detection module, and then analyze whether a backflow occurs in the inverter system according to the received power information. If a backflow occurs in the inverter system, the anti-backflow controller 400 will generate an anti-backflow instruction. When sending an anti-backflow instruction, the anti-backflow controller 400 can select some inverters as the main inverter and send an anti-backflow instruction; after the main inverter receives the anti-backflow instruction and enters the anti-backflow mode, it can also forward the anti-backflow instruction to the remaining inverters, so that the inverters of the entire inverter system are all in the anti-backflow mode. Compared with the traditional anti-backflow controller 400 that performs anti-backflow control on all inverters at the same time, this embodiment only needs to communicate with the main inverter through the anti-backflow controller 400, and the issuance of anti-backflow instructions can be completed through communication interaction between inverters. In this way, information interference when the anti-backflow controller 400 communicates with all inverters can be avoided, thereby effectively improving the accuracy of anti-backflow control.

[0039] It is understandable that the specific structure and working principle of the detection module and the anti-backflow controller 400 are well-known technologies to those skilled in the art, so they will not be elaborated in detail here. The detection module is installed on the AC side of the inverter system to detect the amount of electricity flowing from the inverter system to the power grid 200, and then send it to the anti-backflow controller 400. A load 300 is also connected between the AC side of the inverter system and the power grid 200; when there is a load imbalance, that is, when there is a difference fluctuation between the three-phase load current, this may cause a backflow phenomenon in one or more phases of the inverter system, which makes the electricity data detected by the detection module more complicated, and then the anti-backflow controller 400 will generate instructions for anti-backflow control of some phases in the inverter.

[0040] When the traditional anti-backflow control method faces a load imbalance scenario, the anti-backflow controller 400 communicates with all inverters. At this time, the anti-backflow controller 400 needs to issue corresponding anti-backflow instructions to all inverters at the same time. Since the inverter and the anti-backflow control 400 not only need to interact with the anti-backflow instruction, but also need to feedback the inverter status, etc., this makes the communication data volume between the inverter and the anti-backflow control 400 huge, which in turn causes interference between some data, thereby affecting the correct issuance of the anti-backflow instruction. In this embodiment, some inverters are selected as the main inverter to communicate and interact with the anti-backflow controller 400, and the inverters also communicate with each other; thus, the anti-backflow control 400 only needs to issue the anti-backflow instruction to the main inverter, and the subsequent issuance of all anti-backflow instructions can be completed only through communication between inverters.

[0041] More specifically, since the working modes of all inverters in the inverter system are consistent when performing anti-backflow control, the working status of all inverters can be represented by the working status of the main inverter, so that the working status of all inverters can be obtained through the information interaction between the main inverter and the anti-backflow controller 400. Of course, if some inverters have abnormal working status, the abnormal information can also be sent to the main inverter through the interaction between the inverters, and then feedback is performed through the communication between the main inverter and the anti-backflow controller 400. In this way, the amount of information interaction of the anti-backflow controller 400 can be effectively reduced, and at the same time, through the step-by-step forwarding of the anti-backflow instruction, the interference of the issuance of the anti-backflow instruction can be reduced or avoided, thereby effectively improving the anti-backflow control accuracy of the anti-backflow controller 400.

[0042] It should be known that the inverter system generally includes multiple inverters, and the multiple inverters can be marked as DC / AC#1, DC / AC#2, ..., DC / AC#N respectively. The number of inverters used as the main inverter can be selected according to actual needs. For example, 1 or 2 inverters can be selected as the main inverter. For the convenience of understanding, the subsequent content will be described in detail using 1 inverter as the main inverter as an example. There are many specific types of communication networks, such as communication buses, Ethernet, and wireless communications, which can be selected according to actual needs; for the convenience of understanding, in this embodiment, a communication bus, such as an RS485 bus, is preferably used for the communication network. The power information detected by the detection module includes parameters such as the voltage and current of the power grid. There are many specific types of detection modules. A common detection module can use a three-phase meter 500.

[0043] In the embodiments of the present application, there are multiple architectural structures that can meet the above-mentioned communication requirements, which can be mainly divided into two structural modes: the anti-backflow controller 400 is external and built-in in the inverter; for the sake of easy understanding, the following will provide detailed descriptions through two embodiments.

[0044] Embodiment 1:

[0045] like Figure 1 As shown, the anti-backflow controller 400 is externally placed in the inverter system, the three-phase power grid 100 is connected to the anti-backflow controller 400 through a communication bus, the anti-backflow controller 400 is connected to the inverter through a communication bus, and the inverters are also connected to each other through a communication bus. The communication between the inverter and the anti-backflow controller 400 and between the inverters can be transmitted using the same communication bus or using independent communication buses. Based on the different number of communication buses, the adopted architecture is also different, and the following will explain these two situations separately.

[0046] Scenario 1: For the case of using two communication buses.

[0047] like Figures 2 to 4 As shown, the two communication buses are the first communication line and the second communication line respectively; the anti-backflow controller 400 is connected to the three-phase meter 500 and the main inverter through the first communication line, and the main inverter is connected to the other inverters through the second communication line. When performing anti-backflow control, the three-phase meter 500 can send the detected power information to the anti-backflow controller 400 through the first communication line. When the anti-backflow controller 400 determines that a backflow occurs, it can send the generated anti-backflow instruction to the main inverter through the first communication line. After receiving the anti-backflow instruction, the main inverter can forward it to the other inverters through the second communication line.

[0048] It is understandable that the processor of the inverter includes an ARM processor and a DSP processor. The ARM processor is mainly used for information exchange with the host computer. The DSP processor can mainly receive instructions issued by the ARM processor to control the power devices of the inverter, and can also feedback the working status of the power devices of the inverter to the ARM processor. When interacting with anti-backflow control, both the ARM processor and the DSP processor can receive anti-backflow instructions. There are many specific structures based on the communication architecture of the ARM processor and the DSP processor. The following will be explained in detail through three specific examples. For easy understanding, the subsequent content will be described by taking inverter DC / AC#1 as the main inverter as an example.

[0049] Example 1: Figure 2As shown, the main inverter is connected to the first communication line through the ARM processor to receive the anti-backflow instruction output by the anti-backflow controller 400. After receiving the anti-backflow instruction, the main inverter can send it to the DSP processor to control the main inverter to enter the anti-backflow mode. At the same time, the main inverter is also connected to the second communication line through the DSP processor to forward the anti-backflow instruction. The remaining inverters can all be connected to the second communication line through the DSP processor to receive the anti-backflow control instruction forwarded by the main inverter; the remaining inverters can control the inverter to enter the anti-backflow mode after receiving the anti-backflow control instruction through the DSP processor.

[0050] Example 2: If Figure 3 As shown, the main inverter is connected to the first communication line through the ARM processor to receive the anti-backflow instruction output by the anti-backflow controller 400. After receiving the anti-backflow instruction, the main inverter can send it to the DSP processor to control the main inverter to enter the anti-backflow mode. At the same time, the main inverter is also connected to the second communication line through the ARM processor to forward the anti-backflow instruction. The remaining inverters can all be connected to the second communication line through the ARM processor to receive the anti-backflow control instruction forwarded by the main inverter; after receiving the anti-backflow control instruction through the ARM processor, the remaining inverters can send it to their respective DSP processors, so that the inverters are controlled to enter the anti-backflow mode through the DSP processor.

[0051] Example 3: Figure 4 As shown, the main inverter is connected to the first communication line through the DSP processor to receive the anti-backflow instruction output by the anti-backflow controller 400 and control the main inverter to enter the anti-backflow mode. At the same time, the main inverter is also connected to the second communication line through the DSP processor to forward the anti-backflow instruction. The remaining inverters can be connected to the second communication line through the DSP processor to receive the anti-backflow control instruction forwarded by the main inverter; after receiving the anti-backflow control instruction through the DSP processor, the remaining inverters can control the inverter to enter the anti-backflow mode.

[0052] It is understandable that, for example one in the above scenario one, different processors and different communication lines are used to connect the main inverter and the anti-backflow controller 400, and the main inverter and the remaining inverters, respectively. This method ensures that the communication between the anti-backflow controller 400 and the inverter and between the inverters does not interfere with each other, thereby improving the stability and reliability of communication. Of course, the remaining inverters can also be connected to the second communication line through the ARM processor, but considering that the remaining inverters need to send the anti-backflow instruction to the DSP processor after receiving it through the ARM processor, this will delay the communication time of the anti-backflow instruction, thereby causing a delay in the anti-backflow control; therefore, in the above example one, it is preferred that the DSP processor be used to connect the second communication line for the remaining inverters.

[0053] For Example 2 in Scenario 1 above, unlike Example 1 above, the communication between inverters also uses the ARM processor for information exchange. This method reduces the workload of the DSP processor, but it is necessary to pay attention to the communication timing between the ARM processor of the main inverter when processing different information to avoid data conflicts. Of course, the remaining inverters can also be connected to the second communication line through the DSP processor, but considering that the communication protocol between the ARM processor and the DSP processor may be different, it is necessary to perform protocol conversion of the command signal, which may reduce the communication efficiency and cause delays in the anti-backflow control. Therefore, in Example 2 above, it is preferred to use the ARM processor to connect the second communication line for the remaining inverters.

[0054] For example three in the above scenario one, the main inverter and the anti-backflow controller 400, as well as the main inverter and the remaining inverters, are connected using DSP processors and different communication lines, which can effectively improve the transmission efficiency of the anti-backflow instructions; however, the DSP processor of the main inverter may be heavily burdened at this time, and high-load operation in communication may increase system power consumption. Of course, the remaining inverters are connected to the second communication line through an ARM processor, which not only requires the conversion of the communication protocol, but also requires the issuance of anti-backflow instructions, which will aggravate the delay of anti-backflow control; therefore, in the above example three, it is preferred that the DSP processor be used to connect the second communication line for the remaining inverters.

[0055] The three examples of the above scenario 1 can all meet the requirements of this embodiment, and technicians in this field can choose them according to actual needs.

[0056] Scenario 2: When using a single communication bus.

[0057] like Figures 5 to 7 As shown, when performing anti-backflow control, the three-phase electric meter 500 can send the detected electric quantity information to the anti-backflow controller 400 through the communication bus. When the anti-backflow controller 400 determines that a backflow occurs, it can send the generated anti-backflow instruction to the main inverter through the communication bus. After receiving the anti-backflow instruction, the main inverter can forward it to the other inverters through the communication bus. Since the main inverter and the anti-backflow controller 400 and the main inverter and the other inverters are connected by the same communication bus, different communication timings and / or communication protocols need to be used for the anti-backflow instruction issued by the anti-backflow controller 400 and the anti-backflow instruction forwarded by the main inverter to avoid data conflicts and losses.

[0058] It is understandable that there are various structures of the specific communication architecture based on the ARM processor and the DSP processor included in the inverter, which will be described in detail below through three specific examples.

[0059] Example 1: Figure 5 As shown, the main inverter is connected to the communication bus through the ARM processor to receive the anti-backflow instruction issued by the anti-backflow controller 400; after receiving the anti-backflow instruction, the main inverter can send it to the DSP processor to control the main inverter to enter the anti-backflow mode. At the same time, the main inverter is also connected to the communication bus through the DSP processor to forward the anti-backflow instruction. The remaining inverters can all be connected to the communication bus through the DSP processor to receive the anti-backflow control instruction forwarded by the main inverter; after receiving the anti-backflow control instruction through the DSP processor, the remaining inverters can control the inverter to enter the anti-backflow mode.

[0060] Example 2: If Figure 6 As shown, all inverters are connected to the communication bus through the ARM processor. At this time, the main inverter can receive the anti-backflow instruction issued by the anti-backflow controller 400 and send it to its own DSP processor to control the main inverter to enter the anti-backflow mode. At the same time, the main inverter also forwards the anti-backflow instruction to the communication bus through the ARM processor. The remaining inverters can receive the anti-backflow control instruction forwarded by the main inverter through the ARM processor; after receiving the anti-backflow control instruction through the ARM processor, the remaining inverters send it to their respective DSP processors to control the inverter to enter the anti-backflow mode.

[0061] Example 3: Figure 7 As shown, all inverters are connected to the communication bus through the DSP processor. At this time, the main inverter can receive the anti-backflow instruction issued by the anti-backflow controller 400 and directly control the main inverter to enter the anti-backflow mode. At the same time, the main inverter also forwards the anti-backflow instruction to the communication bus through the DSP processor. The remaining inverters can receive the anti-backflow control instruction forwarded by the main inverter through the DSP processor and directly control themselves to enter the anti-backflow mode.

[0062] It is understandable that the three examples corresponding to the above scenario 2 can all meet the needs of this application, and can be selected according to the actual needs of technicians in this field. Since all information interaction processes are implemented through a single communication bus, the communication timing and / or communication protocol used by the anti-backflow instruction issued by the anti-backflow controller 400 and the anti-backflow instruction forwarded by the main inverter need to be strictly designed and managed.

[0063] Embodiment 2:

[0064] Compared with the first embodiment, the difference of this embodiment is that: Figure 8As shown, the anti-backflow controller 400 is built into the inverter. Specifically, the inverter is built with an anti-backflow function module to form the required anti-backflow controller 400; as can be seen from the above content, the main inverter is used to receive and forward the anti-backflow instruction, so the anti-backflow function module can be integrated into the main inverter, thereby reducing the communication delay generated when the anti-backflow controller 400 is external.

[0065] Based on the processor architecture of the inverter, there are two main ways to integrate the backflow prevention controller 400. One is that the backflow prevention controller 400 is integrated into the ARM processor, and the other is that the backflow prevention controller 400 is integrated into the DSP processor. For ease of understanding, the communication architectures under the two integration methods are described in detail below. Since the communication method between the main inverter 400 and the backflow prevention controller 400 is internal communication, in this embodiment, only a single communication bus is needed to realize the communication between the inverters.

[0066] 1. For the scenario where the anti-backflow controller 400 is built into the ARM processor of the main inverter; there are many specific communication methods between inverters based on the processor architecture. For easy understanding, the following will be explained in detail through three specific examples.

[0067] Example 1: Fig. 9 As shown, the main inverter is connected to the communication bus through the ARM processor, so that it can receive the power information sent by the three-phase meter 500. At this time, the built-in anti-backflow controller 400 can generate an anti-backflow instruction based on the received power information and send it to the DSP processor to control the main inverter to enter the anti-backflow mode. At the same time, the main inverter is also connected to the communication bus through the DSP processor, so as to forward the anti-backflow instruction to the communication bus. The remaining inverters are all connected to the communication bus through the DSP processor, and then receive the anti-backflow instruction forwarded by the main inverter and control themselves to enter the anti-backflow mode.

[0068] Example 2: If Fig.10 As shown, all inverters are connected to the communication bus through the ARM processor. At this time, the main inverter receives the power information sent by the detection module through the ARM processor, and then generates an anti-backflow instruction through the built-in anti-backflow controller 400 and sends it to the DSP processor to control the main inverter to enter the anti-backflow mode. At the same time, the main inverter also forwards the anti-backflow instruction to the communication bus through the ARM processor, so that the remaining inverters receive the anti-backflow instruction forwarded by the main inverter through the ARM processor and send it to their respective DSP processors, so that they can control themselves to enter the anti-backflow mode.

[0069] Example 3: Fig.11As shown, all inverters are connected to the communication bus through the DSP processor. At this time, the main inverter receives the power information sent by the detection module through the DSP processor and uploads it to its own ARM processor, and then generates an anti-backflow instruction through the built-in anti-backflow controller 400 and sends it to the DSP processor to control the main inverter to enter the anti-backflow mode. At the same time, the main inverter also forwards the anti-backflow instruction to the communication bus through the DSP processor, so that the remaining inverters receive the anti-backflow instruction forwarded by the main inverter through the DSP processor to control themselves to enter the anti-backflow mode.

[0070] It is understandable that, in the scenario where the anti-backflow controller 400 is built into the ARM processor of the main inverter, in the above-mentioned example one, the ARM processor and the DSP processor of the main inverter can work together to make data processing more efficient. In the above-mentioned example two, the ARM processor can easily integrate various communication protocols and peripherals to improve the scalability and compatibility of the system. For the above-mentioned example three, the main inverter also avoids the high-load operation of the DSP processor through the collaborative work of the DSP processor and the ARM processor. The above three examples can all meet the needs of this application, and those skilled in the art can make their own choices according to actual needs.

[0071] 2. For the scenario where the anti-backflow controller 400 is built into the DSP processor of the main inverter; there are many specific communication methods between inverters based on the processor architecture. For easy understanding, the following will be explained in detail through three specific examples.

[0072] Example 1: Fig.12 As shown, the main inverter is connected to the communication bus through the ARM processor, so that it can receive the power information sent by the three-phase meter 500 and send it to the DSP processor. At this time, the DSP processor controls the main inverter to enter the anti-backflow mode according to the anti-backflow instruction generated by the built-in anti-backflow controller 400. At the same time, the main inverter is also connected to the communication bus through the DSP processor, so as to forward the anti-backflow instruction to the communication bus. The remaining inverters are all connected to the communication bus through the DSP processor, and then receive the anti-backflow instruction forwarded by the main inverter and control themselves to enter the anti-backflow mode.

[0073] Example 2: If Fig.13As shown, all inverters are connected to the communication bus through the ARM processor. At this time, the main inverter receives the power information sent by the detection module through the ARM processor and sends it to the DSP processor, and then the DSP processor generates an anti-backflow instruction through the built-in anti-backflow controller 400 to control the main inverter to enter the anti-backflow mode. At the same time, the main inverter also uploads the anti-backflow instruction to the ARM processor through the DSP processor, so that the ARM processor forwards the anti-backflow instruction to the communication bus, and then the remaining inverters receive the anti-backflow instruction forwarded by the main inverter through the ARM processor and send it to their respective DSP processors, so that they can control themselves to enter the anti-backflow mode.

[0074] Example 3: Fig.14 As shown, all inverters are connected to the communication bus through the DSP processor. At this time, the main inverter receives the power information sent by the detection module through the DSP processor, and then generates an anti-backflow instruction through the built-in anti-backflow controller 400 to control the main inverter to enter the anti-backflow mode. At the same time, the main inverter also forwards the anti-backflow instruction to the communication bus through the DSP processor, so that the remaining inverters receive the anti-backflow instruction forwarded by the main inverter through the DSP processor to control themselves to enter the anti-backflow mode.

[0075] The above describes the basic principles, main features and advantages of the present application. Those skilled in the art should understand that the present application is not limited by the above embodiments, and the above embodiments and the specification only describe the principles of the present application. The present application may have various changes and improvements without departing from the spirit and scope of the present application, and these changes and improvements fall within the scope of the present application for which protection is sought. The scope of protection claimed by the present application is defined by the attached claims and their equivalents.

Claims

1. An inverter system anti-backflow communication architecture, characterized in that: It includes a communication network and a detection module, a backflow prevention controller and a plurality of inverters that are communicatively connected to the communication network; The detection module is used to detect the power information on the grid side of the inverter system; The anti-backflow controller is suitable for receiving the power information detected by the detection module; The anti-backflow controller is adapted to select part of the inverters as main inverters and send an anti-backflow instruction; The master inverter is adapted to receive the anti-backflow instruction and forward it to the remaining inverters.

2. The inverter system anti-backflow communication architecture according to claim 1, characterized in that: The communication network adopts a communication bus; the communication bus has two, namely a first communication line and a second communication line; The anti-backflow controller is externally disposed on the inverter, and the anti-backflow controller is communicatively connected with the detection module and the main inverter via the first communication line, and the main inverter is communicatively connected with the remaining inverters via the second communication line.

3. The inverter system anti-backflow communication architecture according to claim 2, characterized in that: The inverters all include an ARM processor and a DSP processor; The main inverter is connected to the first communication line through the ARM processor or the DSP processor to receive the backflow prevention instruction; The main inverter is connected to the second communication line through the DSP processor to forward the anti-backflow instruction, and the remaining inverters are connected to the second communication line through the DSP processor to receive the anti-backflow instruction forwarded by the main inverter.

4. The inverter system anti-backflow communication architecture according to claim 2, characterized in that: The inverters all include an ARM processor and a DSP processor; The main inverter is connected to the first communication line and the second communication line respectively through the ARM processor to receive and forward the anti-backflow instruction; The remaining inverters are all connected to the second communication line through the DSP processor, and then receive the anti-backflow instruction forwarded by the main inverter.

5. The inverter system anti-backflow communication architecture according to claim 1, characterized in that: The communication network adopts a communication bus, and the communication bus is one; the inverters each include an ARM processor and a DSP processor; The main inverter is connected to the communication bus through the ARM processor to receive the anti-backflow instruction issued by the anti-backflow controller, and the main inverter is connected to the communication bus through the DSP processor to forward the anti-backflow instruction; The remaining inverters are connected to the communication bus through the DSP processor, and then receive the anti-backflow instruction forwarded by the main inverter; The anti-backflow instruction issued by the anti-backflow controller and the anti-backflow instruction forwarded by the main inverter use different communication timings and / or communication protocols.

6. The inverter system anti-backflow communication architecture according to claim 1, characterized in that: The communication network adopts a communication bus, and the communication bus is one; the inverters each include an ARM processor and a DSP processor; All of the inverters are connected to the communication bus via the ARM processor or the DSP processor; The anti-backflow instruction issued by the anti-backflow controller and the anti-backflow instruction forwarded by the main inverter use different communication timings and / or communication protocols.

7. The inverter system anti-backflow communication architecture according to claim 1, characterized in that: The communication network adopts a communication bus, and the communication bus is one; the inverters each include an ARM processor and a DSP processor; The anti-backflow controller is built into the ARM processor of the main inverter; The main inverter is connected to the communication bus through the ARM processor and the DSP processor, the ARM processor is used to receive the power information sent by the detection module; the DSP processor is used to forward the anti-backflow instruction generated by the anti-backflow controller; The remaining inverters are all connected to the communication bus via the DSP processor, and then receive the anti-backflow instruction forwarded by the main inverter.

8. The inverter system anti-backflow communication architecture according to claim 1, characterized in that: The communication network adopts a communication bus, and the communication bus is one; the inverters each include an ARM processor and a DSP processor; The anti-backflow controller is built into the ARM processor of the main inverter; All the inverters are connected to the communication bus via the ARM processor or the DSP processor.

9. The inverter system anti-backflow communication architecture according to claim 1, characterized in that: The communication network adopts a communication bus, and the communication bus is one; the inverters each include an ARM processor and a DSP processor; The anti-backflow controller is built into the DSP processor of the main inverter; The main inverter is connected to the communication bus via the ARM processor and the DSP processor, the ARM processor is used to receive the power information detected by the detection module and send it to the DSP processor, and the DSP processor is suitable for forwarding the anti-backflow instruction generated by the anti-backflow controller to the communication bus; The remaining inverters are all connected to the communication bus via the DSP processor, and then receive the anti-backflow instruction forwarded by the main inverter.

10. The inverter system anti-backflow communication architecture according to claim 1, characterized in that: The communication network adopts a communication bus, and the communication bus is one; the inverters each include an ARM processor and a DSP processor; The anti-backflow controller is built into the DSP processor of the main inverter; All the inverters are connected to the communication bus via the ARM processor or the DSP processor.

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