A device and method for reducing state maximum likelihood sequence detection

Through the combination of two-stage forward equalizer and channel estimator, the problem of high complexity and performance degradation of the maximum likelihood detector in the prior art is solved, and the area, power consumption and performance optimization is achieved.

CN119814050BActive Publication Date: 2025-06-24仁芯致远(杭州)半导体科技有限公司 +1
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Patent Information

Application Number
CN202510302747.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-03-14
Publication Date
2025-06-24
Estimated Expiration
2045-03-14

AI Technical Summary

Technical Problem

The existing reduced state maximum likelihood sequence detectors have reduced complexity while reducing complexity, especially the phenomenon of code error transmission affects the performance of subsequent forward error correction codes.

Method used

The two-stage forward equalizer structure is adopted, the first forward equalizer balances the interference between codes, and the second forward equalizer equalizes the first coefficient, and adaptively updates the channel parameters to reduce the calculation complexity.

Benefits of technology

It effectively reduces the area and power consumption of the maximum likelihood sequence detector, while ensuring performance, avoiding the phenomenon of error code transmission, and improving the performance of forward error correction code.

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Abstract

The present invention relates to the field of communication technologies, and particularly to a reduced-state maximum likelihood sequence detection device and method. The device includes a first forward equalizer, a second forward equalizer, a decision maker, and a reduced-state maximum likelihood sequence detector. The output end of the first forward equalizer is connected to the input end of the reduced-state maximum likelihood sequence detector, the output end of the second forward equalizer is connected to the decision maker, and the output end of the decision maker is connected to the input end of the reduced-state maximum likelihood sequence detector. The first forward equalizer is configured to perform equalization processing on the output signal of the analog-to-digital converter to equalize the inter-symbol interference other than h1, and the second forward equalizer is configured to equalize h1. The reduced-state maximum likelihood sequence detector is configured to reduce the state of each moment of the n-level modulator PAMn to three states according to the decision result of the decision maker and perform maximum likelihood sequence detection. The present invention can reduce the processing complexity and simultaneously ensure the MLSD performance.
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Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and in particular, to a reduced-state maximum likelihood sequence detection method and apparatus. Background Art

[0002] With the continuous increase in the rate of serdes (Serializer / Deserializer), the applications of PAM4, PAM8, etc. are becoming more and more widespread. In these PAMn (n is 4 / 8 / 16, etc.) applications, the MLSD (Maximum Likelihood Sequence Detector) is a relatively critical module, and its implementation complexity is relatively high, resulting in a large area and high power consumption. In these applications, the complexity of the MLSD mainly comes from the number of state branches. The full-state MLSD has the best performance but also the highest complexity. Therefore, some scholars have proposed a reduced-state MLSD.

[0003] However, although some improved reduced-state MLSDs have achieved a certain reduction in complexity, their performance has also decreased significantly. For example, the decision feedback equalizer DFE is usually used in the application circuit of the reduced-state MLSD, and the DFE will cause the error code transmission phenomenon, which affects the subsequent FEC (Forward Error Correction Code) performance. Summary of the Invention

[0004] In view of this, the present invention provides a reduced-state maximum likelihood sequence detection apparatus and method, which can reduce the area and power consumption of the MLSD while ensuring the performance of the MLSD.

[0005] To achieve the foregoing objectives, the present invention provides the following technical solutions:

[0006] A reduced-state maximum likelihood sequence detection apparatus includes a first forward equalizer, a second forward equalizer, a decision maker, and a reduced-state maximum likelihood sequence detector. The output end of the first forward equalizer is connected to the input end of the reduced-state maximum likelihood sequence detector, the output end of the second forward equalizer is connected to the decision maker, and the output end of the decision maker is connected to the input end of the reduced-state maximum likelihood sequence detector;

[0007] The first forward equalizer is configured to perform equalization processing on the output signal of the analog-to-digital converter to equalize the inter-symbol interference other than the first coefficient, and the second forward equalizer is configured to equalize the first coefficient;

[0008] The reduced-state maximum likelihood sequence detector is configured to reduce the state of each moment of the n-level modulator PAMn to 3 states according to the decision result of the decision maker, and perform maximum likelihood sequence detection.

[0009] In a more optimized solution, it further includes a channel estimator. The output ends of the first forward equalizer and the decision device are respectively also connected to the input end of the channel estimator, and the output end of the channel estimator is connected to the input end of the reduced state maximum likelihood sequence detector. The channel estimator is used to adaptively update the first coefficient.

[0010] In the above solution, it further includes that the channel estimator is used to adaptively update the first coefficient, so that the channel parameters change following the channel environment, improving the effect. Moreover, by using the decision result of the second FFE and the output of the first FFE, only the first coefficient and the second coefficient need to be calculated, so the calculation of channel parameters is less and the complexity is lower.

[0011] In an implementable solution, the channel estimator includes a filter composed of two multipliers, two adders and an adaptive module. The output ends of the two multipliers are connected to the input end of one adder, the output end of this adder is connected to the input end of the other adder, and the output end of the other adder is connected to the input end of the adaptive module;

[0012] The decision result is multiplied by the second coefficient through one multiplier, and after being delayed by one time instant, the decision result is multiplied by the first coefficient through another multiplier. After the results of the two multiplications are accumulated through an adder, the result is subtracted from the result output by the first forward equalizer to obtain an error signal. The error signal and the decision result pass through the adaptive module to obtain the updated first coefficient.

[0013] After the adaptive module obtains the decision result and the error signal at time k, it first calculates the values of the first coefficient and the second coefficient at time k, h0(k)=h0(k - 1)+u*err*d k , h1(k)=h1(k - 1)+u*err*d k-1 , where h0(k) is the value of the second coefficient at time k, h0(k - 1) is the value of the second coefficient at time k - 1, u is the update factor, err is the error signal, d k is the decision result at time k, d k-1 is the decision result at time k - 1, h1(k) is the value of the first coefficient at time k, and h1(k - 1) is the value of the first coefficient at time k - 1; then the first coefficient and the second coefficient in the filter are updated with the calculated first coefficient and second coefficient.

[0014] In an implementable solution, the reduced state MLSD includes a state search module and a Viterbi decoding module. The output end of the state search module is connected to the input end of the Viterbi decoding module. The output of the state search module, the result output by the first forward equalizer, and the first coefficient are jointly used as the input of the Viterbi decoding module. The Viterbi decoding module outputs a detection result. The state search module reduces the state at each time instant from n to 3 according to the decision result of the decision device.

[0015] A method for reducing state maximum likelihood sequence detection, comprising the following steps:

[0016] Arrange a first forward equalizer to equalize the output signal of the analog-to-digital converter, equalize the inter-symbol interference other than the first coefficient, and arrange a second forward equalizer to equalize the first coefficient;

[0017] Make a decision on the result output by the second forward equalizer and output the decision result;

[0018] Reduce the state of each moment of the n-level modulator PAMn to 3 states according to the decision result, and perform maximum likelihood sequence detection based on the result output by the first forward equalizer.

[0019] It further includes the step: adaptively update the first coefficient according to the decision result and the result output by the first forward equalizer;

[0020] The process of performing maximum likelihood sequence detection based on the result output by the first forward equalizer includes: performing maximum likelihood sequence detection based on the result output by the first forward equalizer and the updated first coefficient.

[0021] The process of adaptively updating the first coefficient according to the decision result and the result output by the first forward equalizer includes:

[0022] Multiply the decision result after delaying it by one moment by the first coefficient, multiply the decision result by the second coefficient, and then accumulate the two multiplied results;

[0023] Subtract the accumulated result from the result output by the first forward equalizer to obtain an error signal;

[0024] Adaptively update the first coefficient according to the error signal and the decision result.

[0025] The process of adaptively updating the first coefficient according to the error signal and the decision result includes:

[0026] First calculate the values of the first coefficient and the second coefficient at time k, h0(k)=h0(k - 1)+u*err*d k , h1(k)=h1(k - 1)+u*err*d k-1 , h0(k) is the value of the second coefficient at time k, h0(k - 1) is the value of the second coefficient at time k - 1, u is the update factor, err is the error signal, d k is the decision result at time k, d k-1 is the decision result at time k - 1, h1(k) is the value of the first coefficient at time k, h1(k - 1) is the value of the first coefficient at time k - 1;

[0027] Then update the first coefficient and the second coefficient with the values of the calculated first coefficient and second coefficient.

[0028] Reduce the state of the n-level modulator PAMn at each moment to 3 states according to the judgment result, including: using the judgment result and its two adjacent states as the states of MLSD, so as to reduce the state from n to 3.

[0029] The process of performing maximum likelihood sequence detection based on the result output by the first forward equalizer includes:

[0030] Calculate the branch metric BM: BM i,j =(y k -L(S k,j )-L(S k-1,i )*h1) 2 i∈{0 1 2}, j∈{0 1 2}, L(S k-1,i ) is the i-th possibility of the judgment result at the k-1 moment, L(S k,j ) is the j-th possibility of the judgment result at the k moment, for each j at the k moment, there are 3 i's corresponding to the k-1 moment, i = 0, 1, 2; j = 0, 1, 2;

[0031] Calculate the path metric PM and select the surviving path: The cumulative BM corresponding to each i at the k-1 moment is PM. Find the smallest path among the 3 i's, and select this smallest path as the PM for each j at the k moment. , PM is calculated from k-L to the k moment, L is the traceback length. Finally, obtain the 3 PMs at the k moment, and select the one with the smallest value among the 3 PMs as the surviving path. The surviving path contains the states retained among the 3 states from k-L to the k moment;

[0032] Traceback decoding: Trace back according to the surviving path to find the corresponding state of the surviving path. The state is one of the 3 states at each moment, complete the decoding, and obtain the maximum likelihood sequence.

[0033] Compared with the prior art, the present invention uses two forward equalizers for equalization processing, and the second forward equalizer and the decision maker are used to judge the signal, so that error code transmission will not occur, thus ensuring the performance of MLSD; by implementing reduced-state MLSD, the number of states is reduced from n to 3, thus greatly reducing the complexity. Therefore, the present invention has advantages in power consumption, area, and performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] With reference to the accompanying drawings, the disclosure of the present invention will become more apparent. It should be understood that these drawings are only for illustrative purposes and are not intended to limit the scope of protection of the present invention. In the figures:

[0035] Figure 1It is a schematic diagram of the composition structure of the reduced-state maximum likelihood sequence detection device in the embodiment.

[0036] Figure 2 It is a schematic diagram of the PAM4 signal after the second FFE equalization.

[0037] Figure 3 It is a schematic diagram of the structure of the channel estimator in the embodiment.

[0038] Figure 4 It is a flowchart of the adaptive algorithm in the embodiment.

[0039] Figure 5 It is a schematic diagram of the branch path of the traditional PAM4.

[0040] Figure 6 It is a schematic diagram of the branch path of the PAM4 in this embodiment.

[0041] Figure 7 It is a schematic diagram of the composition of the reduced-state MLSD in the embodiment.

[0042] Figure 8 It is a flowchart of the reduced-state maximum likelihood sequence detection method in the embodiment. Detailed implementation manners

[0043] Referring to the accompanying drawings and specific embodiments, the structure, composition, features, advantages, etc. of the in-vehicle high-speed transmission circuit, serializer / deserializer including the same, and its usage method of the present invention will be described by way of example below. However, all descriptions should not form any limitation to the present invention.

[0044] Please refer to Figure 1 , a reduced-state maximum likelihood sequence detection device provided in this embodiment includes an analog-to-digital converter, a first forward equalizer, a second forward equalizer, a decision maker, a channel estimator, and a reduced-state maximum likelihood sequence detector. For the sake of simplicity in description and based on the general description method in the industry, the analog-to-digital converter is described as ADC, the first forward equalizer is described as the first FFE, the second forward equalizer is described as the second FFE, and the reduced-state maximum likelihood sequence detector is described as the reduced-state MLSD.

[0045] It can be referred to Figure 1 , the output end of the ADC is respectively connected to the input ends of the first FFE and the second FFE, the output end of the first FFE is respectively connected to the input ends of the channel estimator and the reduced-state MLSD, the output end of the second FFE is connected to the input end of the decision maker, the output end of the decision maker is respectively connected to the input ends of the channel estimator and the reduced-state MLSD, and the output end of the channel estimator is connected to the input end of the reduced-state MLSD.

[0046] As Figure 1As shown, r(t) is the input signal, and the signal at time k after passing through the ADC is x k . x k After passing through the first FFE, it becomes y k , x k After passing through the second FFE, it becomes s k , s k After passing through the decision device, it is decided as d k . The channel estimator uses x k and d k to obtain the updated channel parameter h1. h1 represents the first backward ISI (intersymbol interference) value of the signal pulse response. h1, d k , y k enter the minus-state MLSD to obtain the final output d of the system m .

[0047] The first FFE in this article is an FFE containing multiple tap coefficients, and the second FFE is an FFE containing a small number of tap coefficients, that is, the number of tap coefficients of the first FFE is greater than the number of tap coefficients of the second FFE

[0048] The tap coefficients of the first FFE are numerous enough to cover as much as possible the ISI and reflections other than the first coefficient h1, and unbalance the first coefficient h1, that is, set the coefficient corresponding to h1 to 0. After passing through this first FFE, there is basically no ISI. The expression for the equalization principle of the first FFE is , is the FFE tap coefficient, N is the number of backward taps, M is the number of forward taps indicates not including the first backward tap

[0049] The tap coefficients of the second FFE do not need to be too many, only need to cover the ISI at the main positions to equalize h1. After passing through the second FFE, there is a small amount of residual ISI in the signal. Although the residual ISI may cause the decision device to make an incorrect judgment, this error can be solved by the minus-state MLSD. The expression for the equalization principle of the second FFE is , is the FFE tap coefficient, B is the number of backward taps, A is the number of forward taps

[0050] The function of the decision device is to decide the equalized signal with residual ISI and noise into a signal without ISI and noise. For example, the PAMn signal is decided into d k is [0 1…n - 1]. For example Figure 2 as shown, the points in the figure represent s k , which are a series of PAM4 signals. Due to the influence of noise and ISI, etc., the signal will fluctuate around the expected values {vp0, vp1, vp2, vp3}. The three dashed lines represent the decision levels {vth0 vth1 vth2}, and the four solid lines represent dk {0, 1, 2, 3}, s k It will be judged as 3 only when it is greater than vth2, s k When it is greater than vth1 and less than vth2, it is judged as 2, s k When it is greater than vth0 and less than vth1, it is judged as 1, s k When it is less than vth0, it is judged as 0. Due to the influence of noise, judgment errors will occur, but after the second FFE equalization, the error rate will not be very high.

[0051] Please refer to Figure 3 , the channel estimator includes a filter composed of two multipliers, two adders and an adaptive module, d k It is multiplied by h0 through a multiplier, d k After passing through the delay module D and being delayed by one moment to become d k-1 Then, it is multiplied by h1 through another multiplier, and the results of the two multiplications are added together through an adder to obtain y k’ , that is, dk is filtered by [h0 h1] to obtain y k’ , y k’ = d k * h0 + d k-1 * h1. y k’ After passing through another adder and subtracting from y k to obtain the error signal err, that is, the filtered signal y k’ subtracting y k is the error signal, err = y k’ - y k . err and d k pass through the adaptive module to obtain the channel parameters.

[0052] The adaptive module executes an adaptive algorithm, and the flow of the adaptive algorithm is as Figure 4 shown. After obtaining d k and err at time k, calculate the values of h1 and h0 at time k, h0(k) = h0(k - 1) + u * err * d k , h1(k) = h1(k - 1) + u * err * d k-1 , and update h1 and h0 in the filter with the calculated h1 and h0.

[0053] u is the update factor, and the adaptive algorithm updates the parameter values at each moment, that is, continuous adaptation. Affected by temperature, etc., the channel parameters will change. In this embodiment, the adaptive algorithm can update h1 at any time to follow the change of the channel, thereby ensuring the MLSD calculation performance. Moreover, by using the judgment of the second FFE and the output of the first FFE, only two channel parameters, h0 and h1, need to be calculated, so the calculation of the channel parameters is less and the complexity is lower.

[0054] MLSD is to calculate, given Y = {y0, y1, …, yn}, with the goal of finding a set d = {d0, d1, d2, …, dn} such that Pr{Y|d} is maximized, i.e., maximum likelihood. Pr represents probability, and d is the output maximum likelihood sequence. The maximum likelihood sequence method is the commonly used Viterbi decoding method.

[0055] Please refer to Figure 7 , the reduced-state MLSD includes a state search module and a Viterbi decoding module. The output end of the state search module is connected to the input end of the Viterbi decoding module. The output of the state search module and y k , h1 together serve as the input of the Viterbi decoding module, and the Viterbi decoding module outputs dm.

[0056] The state search module is to achieve a reduction in the states of MLSD. The implementation of MLSD first requires knowing the states at each moment, and the number of states is the key to determining the complexity of MLSD. For PAMn, this method reduces the states at each moment from n to 3. For example Figure 5 as shown, the traditional pam4 has 4 states, Figure 6 which are reduced to 3 states in this solution. The state selection of this method combines with a decision maker. If an error occurs after decision, then the correct signal is most likely an adjacent symbol, i.e., d k and its two adjacent symbols are used as states. As shown in Tables 1 and 2 below, based on d k the other two states are obtained. The other two states are the adjacent symbols of d k . If d k is the outermost symbol, then it is one adjacent symbol, and da k and db k are the same. For example, if the decision result d k at time k is 0, and a decision error occurs due to noise, the correct decision should be 1. If the decision result d k at time k is 1, and a decision error occurs due to noise such as ISI, the correct decision should be 0 or 2.

[0057] Table 1: PAM4 MLSD Reduced-State Corresponding State Table

[0058] <![CDATA[d k > <![CDATA[da k > <![CDATA[db k > 0 1 1 1 0 2 2 1 3 3 1 1

[0059] Table 2: PAM8 MLSD Reduced-State Corresponding State Table

[0060] <![CDATA[d k > <![CDATA[da k > <![CDATA[db k > 0 1 1 1 0 2 2 1 3 3 2 4 4 3 5 5 4 6 6 5 7 7 6 6

[0061] After obtaining the states, enter Viterbi decoding. As Figure 8As shown, Viterbi decoding first performs BM (branch metric) calculation, then PM (path metric) calculation and survivor path selection, and finally traceback decoding.

[0062] The BM (branch metric) calculation process is as follows: At time k-1, s k-1 has 3 possibilities, = {0 1 2}, {S k-1,0 S k-1,1 S k-1,2}} respectively represent {d k-1 da k-1 db k-1}}. Similarly, at time k, s k also has 3 possibilities, S k-1,i = {0 1 2}, {S k,0 S k,1 S k,2}} respectively represent {d k da k db k}}. There are a total of 9 paths from time k-1 to time k, as Figure 6 shown. The 9 BM (branch metric) calculations are as follows in Equation (1):

[0063] BM i,j = (y k - L(S k,j ) - L(S k-1,i ) * h1) 2 i ∈ {0 1 2}, j ∈ {0 1 2} (1)

[0064] L(S k-1,i ) is the i-th possibility of s at time k-1. For each j at time k, it corresponds to 3 i's at time k-1. k-1

[0065] PM (path metric) calculation and survivor path selection. The cumulative BM corresponding to each i at time k-1 is PM. It is necessary to find the path with the smallest value among the 3 i's and select this smallest path as the PM for each j at time k (2)

[0066] PM is calculated from k-L to time k, where L is the traceback length. Finally, 3 PMs at time k are obtained, and the one with the smallest value among the 3 PMs is selected as the survivor path. The survivor path contains the states retained among the 3 states from k-L to k.

[0067] Traceback decoding is based on the survivor path for traceback to find the state corresponding to the survivor path. The state is one of {d k da k db k}} at each time. Among {d kda k db k} are all temporarily stored, and one is selected from the stored {d k da k db k} for output to complete decoding and obtain the maximum likelihood sequence.

[0068] For the traditional method PAMn, the BM to be calculated is n^2. For this method, the BM to be calculated is 9. In applications where n is greater than or equal to 4, this method greatly reduces the computational complexity, bringing advantages in power consumption and area. Some other improved methods reduce the BM to 4. Although the BM is significantly reduced, there is a phenomenon of error propagation, and some possible states will be missed, resulting in a reduction in cost performance. This method does not have the phenomenon of error propagation and ensures the MLSD performance while reducing the states.

[0069] As Figure 8 shown, based on the same inventive concept, in this embodiment, a reduced-state maximum likelihood sequence detection method is also provided, including the following steps:

[0070] Arrange a first forward equalizer to equalize the output signal of the analog-to-digital converter, equalize the inter-symbol interference other than the first coefficient, and arrange a second forward equalizer to equalize the first coefficient;

[0071] Make a decision on the result output by the second forward equalizer and output the decision result;

[0072] Reduce the state of the n-level modulator PAMn at each moment to 3 states according to the decision result, and perform maximum likelihood sequence detection based on the result output by the first forward equalizer.

[0073] In a more optimized solution, the above method may further include the step: adaptively update the first coefficient according to the decision result and the result output by the first forward equalizer. At this time, the maximum likelihood sequence detection is performed based on the result output by the first forward equalizer and the updated first coefficient.

[0074] For the specific implementation manners of the above steps, reference may be made to the foregoing content, and details are not described herein again.

[0075] The above embodiments are only specific implementation manners of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of various equivalent modifications, substitutions, and improvements, etc. These modifications, substitutions, and improvements should all be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. A state-reduced maximum likelihood sequence detection device, characterized in that: The invention comprises a first forward equalizer, a second forward equalizer, a decision device and a state-reduced maximum likelihood sequence detector, wherein the output end of the first forward equalizer is connected to the input end of the state-reduced maximum likelihood sequence detector, the output end of the second forward equalizer is connected to the decision device, and the output end of the decision device is connected to the input end of the state-reduced maximum likelihood sequence detector; The first forward equalizer is used to perform equalization processing on the output signal of the analog-to-digital converter to equalize the inter-symbol interference outside the first coefficient, and the second forward equalizer is used to equalize the first coefficient; The state-reduced maximum likelihood sequence detector is used to reduce the state of the n-level modulator PAMn at each moment to three states according to the decision result of the decider, and perform maximum likelihood sequence detection; the state-reduced maximum likelihood sequence detector includes a state search module and a Viterbi decoding module, the output end of the state search module is connected to the input end of the Viterbi decoding module, the output of the state search module and the result of the first forward equalizer output and the first coefficient are used as the input of the Viterbi decoding module, the Viterbi decoding module outputs the detection result, and the state search module reduces the state at each moment from n to 3 according to the decision result of the decider.

2. The state-reduced maximum likelihood sequence detection device according to claim 1, characterized in that: It also includes a channel estimator, wherein the output end of the first forward equalizer and the output end of the decision device are respectively connected to the input end of the channel estimator, the output end of the channel estimator is connected to the input end of the reduced state maximum likelihood sequence detector, and the channel estimator is used to adaptively update the first coefficient.

3. The state-reduced maximum likelihood sequence detection device according to claim 2, characterized in that: The channel estimator comprises a filter composed of two multipliers, two adders and an adaptive module, the output ends of the two multipliers are connected to the input end of one adder, the output end of the adder is connected to the input end of another adder, and the output end of the other adder is connected to the input end of the adaptive module; The decision result is multiplied by the second coefficient through a multiplier, and the decision result is delayed for a time and then multiplied by the first coefficient through another multiplier. The two multiplied results are added through an adder and then subtracted from the result output by the first forward equalizer to obtain an error signal. The error signal and the decision result are passed through an adaptive module to obtain an updated first coefficient.

4. The state-reduced maximum likelihood sequence detection device according to claim 3, characterized in that: After the adaptive module obtains the decision result and error signal at time k, it first calculates the values ​​of the first coefficient and the second coefficient at time k, h0(k)=h0(k-1)+u*err*d k ,h1(k)=h1(k-1)+u*err*d k-1 , h0(k) is the value of the second coefficient at time k, h0(k-1) is the value of the second coefficient at time k-1, u is the update factor, err is the error signal, d k is the decision result at time k, d k-1 is the decision result at time k-1, h1(k) is the value of the first coefficient at time k, and h1(k-1) is the value of the first coefficient at time k-1; then the first coefficient and the second coefficient in the filter are updated using the calculated first coefficient and the second coefficient.

5. A state-reduced maximum likelihood sequence detection method, The method is implemented according to the device of claim 1, characterized in that it includes the following steps: Arranging a first forward equalizer to perform equalization processing on the output signal of the analog-to-digital converter to equalize the inter-symbol interference outside the first coefficient, and arranging a second forward equalizer to equalize the first coefficient; Making a decision on the result output by the second forward equalizer, and outputting the decision result; The decision result and its two adjacent states are used as the states of MLSD to reduce the state of the n-level modulator PAMn at each moment to three states, and perform maximum likelihood sequence detection based on the result output by the first forward equalizer.

6. The state-reduced maximum likelihood sequence detection method according to claim 5, characterized in that: It also includes the steps of: adaptively updating the first coefficient according to the decision result and the result output by the first forward equalizer; The process of performing maximum likelihood sequence detection based on the result output by the first forward equalizer includes: performing maximum likelihood sequence detection based on the result output by the first forward equalizer and the updated first coefficient.

7. The state-reduced maximum likelihood sequence detection method according to claim 6, characterized in that: The process of adaptively updating the first coefficient according to the decision result and the result output by the first forward equalizer includes: Delaying the decision result by one time and multiplying the result by the first coefficient, multiplying the decision result by the second coefficient, and then accumulating the two multiplied results; Subtracting the accumulated result from the result output by the first forward equalizer to obtain an error signal; The first coefficient is adaptively updated according to the error signal and the decision result.

8. The state-reduced maximum likelihood sequence detection method according to claim 7, characterized in that: The process of adaptively updating the first coefficient according to the error signal and the decision result includes: First calculate the values ​​of the first coefficient and the second coefficient at time k, h0(k)=h0(k-1)+u*err*d k ,h1(k)=h1(k-1)+u*err*d k-1 , h0(k) is the value of the second coefficient at time k, h0(k-1) is the value of the second coefficient at time k-1, u is the update factor, err is the error signal, d k is the decision result at time k, d k-1 is the decision result at time k-1, h1(k) is the value of the first coefficient at time k, and h1(k-1) is the value of the first coefficient at time k-1; The first coefficient and the second coefficient are then updated using the calculated values ​​of the first coefficient and the second coefficient.

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