Method and apparatus for decomposing data by bit width

By decomposing data by bit width and utilizing mask words and shift operations, the problems of high computational complexity and waste of hardware resources in fully homomorphic encryption are solved, achieving efficient noise control and resource utilization, and improving the performance of computing devices.

CN119814268BActive Publication Date: 2025-11-04ZHEJIANG ANT MISUAN TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202411845324.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-13
Publication Date
2025-11-04
Estimated Expiration
2044-12-13

AI Technical Summary

Technical Problem

Existing technologies suffer from high computational complexity when processing large-scale data, which limits the performance of computing devices. This is especially true in fully homomorphic encryption, where noise control is difficult and hardware resources are wasted.

Method used

By decomposing data by bit width, the value to be decomposed is iteratively decomposed into the target value under the target bit width. By using mask words and shift operations, combined with bitwise AND logic operations, the target result is obtained directly, avoiding intermediate transit instructions and cache pressure, and making full use of hardware resources.

Benefits of technology

It reduces computational complexity, improves processing efficiency, reduces the difficulty of noise control, optimizes hardware resource utilization, and improves the performance of computing devices.

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Abstract

The technical concept of decomposing data according to bit width provided by the embodiments of the present specification is that the bit width decomposition instruction is decomposed into a plurality of decomposition processes of decomposition periods through a shift operation, the number of decomposition periods is determined by the bit width to be decomposed and the target bit width, the lowest bit of the remaining bits to be decomposed of the bits to be decomposed is aligned with the lowest bit of the storage unit, and the target value is obtained by combining the bitwise AND operation with the mask word. The technical scheme is beneficial to fully utilize the hardware storage resources and improve the processing efficiency.
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Description

TECHNICAL FIELD

[0001] One or more embodiments of the present specification relate to the field of computer technology, and in particular, to a method and apparatus for decomposing data by bit width. BACKGROUND

[0002] Modern public key cryptography is one of the important technologies in the field of information security, which is a kind of cryptography technology based on mathematics and computer science, aiming to ensure secure communication or secure exchange of data between different business parties. Public key cryptography greatly improves the security of information transmission, but its security depends on the difficulty of mathematical algorithms.

[0003] For example, with fully homomorphic encryption (FHE), arbitrary multiple addition and multiplication operations can be performed in an encrypted state, and the same result as the plaintext data can be obtained. This means that complex calculations can be performed on encrypted data without decrypting the data. FHE is a higher level of homomorphic encryption, providing the most computing power, but it also has higher computational complexity and computational intensity. For example, complex multiplication operations involving more polynomials (such as 128-point polynomials).

[0004] Some algorithms adopted for information security have high computational complexity, which poses a huge challenge to the performance of computing devices when dealing with large-scale data. Therefore, how to reduce computational complexity is an important technical problem in terms of saving hardware resources, improving computational efficiency, noise control, and the like. SUMMARY

[0005] One or more embodiments of the present specification describe a method and apparatus for decomposing data by bit width to solve one or more problems mentioned in the background.

[0006] According to a first aspect, a method for decomposing data by bit width is provided, for decomposing each group of to-be-decomposed bits in a to-be-decomposed value into a weighted form of a plurality of target values under a target bit width, in a bit width decomposition process, a plurality of decomposition periods are iterated, and each target value corresponding to each to-be-decomposed bit is determined in turn from a starting bit to an ending bit of the to-be-decomposed value; in a single decomposition period, the method comprises: right shifting a current decomposition value corresponding to the to-be-decomposed value by a first number of bit positions, so that a lowest bit of a current to-be-decomposed bit in the to-be-decomposed value is aligned with a lowest bit of a storage unit, to obtain a first intermediate result, the lowest bit of the current to-be-decomposed bit being a lowest bit of a remaining to-be-decomposed bit of a rightmost group of to-be-decomposed bits; and obtaining each target value corresponding to each group of to-be-decomposed bits by performing a bitwise AND operation on a mask word and the first intermediate result, the mask word having the same bit width as the to-be-decomposed value and comprising each target bit group, a single target bit group corresponding to a single group of to-be-decomposed bits, and having a value of 1 at a low bit position consistent with the target bit width and a value of 0 at other bit positions.

[0007] In an optional embodiment, when the current decomposition period is a first decomposition period for the to-be-decomposed value, the current decomposition value is the to-be-decomposed value, and the first number is determined by a difference between a starting bit of a rightmost group of to-be-decomposed bits and a lowest bit of a storage unit; when the current decomposition period is a non-first decomposition period for the to-be-decomposed value, the current decomposition value is an intermediate result of a previous decomposition period, and the first number is consistent with the target bit width.

[0008] In an optional embodiment, a bit width of a single group of to-be-decomposed bits is a first bit width, and each decomposition period corresponds to an offset identifier; in the single decomposition period, the method further comprises: detecting whether the offset identifier is greater than 0; when the offset identifier is not greater than 0, determining that the current decomposition period is a first decomposition period for the to-be-decomposed value, and updating the offset identifier to a difference between the first bit width and the target bit width; and when the offset identifier is greater than 0, determining that the current decomposition period is a non-first decomposition period for the to-be-decomposed value, and updating the offset identifier to a difference between a current value of the offset identifier and the target bit width.

[0009] In an optional embodiment, the right shifting of the current decomposition value by the first number of bit positions comprises: keeping data before a highest bit of a leftmost group of to-be-decomposed bits in the to-be-decomposed value unchanged, and performing a right shifting operation on other bit positions; or performing a circular shifting operation on the current decomposition value; or removing a first number of bit values at a lowest position of the current decomposition value, and supplementing 0 to a first number of bit positions at a highest position.

[0010] According to a second aspect, there is provided an apparatus for bit-width decomposition of data, configured to decompose each group of to-be-decomposed bits in a to-be-decomposed value into a weighted form of a plurality of target values with a target bit-width, the apparatus comprising: a shift unit, a determination unit; in a bit-width decomposition process, through a plurality of decomposition periods of iteration, each target value corresponding to each to-be-decomposed bit is determined in turn from a starting bit of a lowest bit to an ending bit of a highest bit; in a single decomposition period:

[0011] The shift unit is configured to right-shift a current decomposition value corresponding to the to-be-decomposed value by a first number of bit positions, so that a lowest bit of a current to-be-decomposed bit in the to-be-decomposed value is aligned with a lowest bit of the storage unit, to obtain a first intermediate result, the lowest bit of the current to-be-decomposed bit being a lowest bit of a remaining to-be-decomposed bit of a rightmost group of to-be-decomposed bits;

[0012] The determination unit is configured to obtain each target value corresponding to each group of to-be-decomposed bits by performing a bitwise AND operation on a mask word and the first intermediate result, the mask word having a bit-width consistent with that of the to-be-decomposed value and comprising a plurality of target bit groups, a single target bit group corresponding to a single group of to-be-decomposed bits, and having a value of 1 on a low bit consistent with the target bit-width and a value of 0 on other bits.

[0013] In an optional embodiment, a bit-width of a single group of to-be-decomposed bits is a first bit-width, the shift unit further comprises a shift rhythm control sub-unit configured to describe a decomposition progress for the to-be-decomposed value by means of an offset identifier; each decomposition period corresponds to a shift rhythm control sub-unit; in the single decomposition period, the shift unit is further configured to: detect whether the offset identifier is greater than 0; in the case of not greater than 0, determine that the current decomposition period is a first decomposition period for the to-be-decomposed value, and update the offset identifier to a difference between the first bit-width and the target bit-width by means of the shift rhythm control sub-unit; in the case of greater than 0, determine that the current decomposition period is a non-first decomposition period for the to-be-decomposed value, and update the offset identifier to a difference between its current value and the target bit-width by means of the shift rhythm control sub-unit.

[0014] In a further optional embodiment, the shift unit further comprises a shift position control sub-unit configured to: in the case that the current decomposition period is the first decomposition period for the to-be-decomposed value, determine that the current decomposition value is the to-be-decomposed value, and the first number is a difference between a starting bit of a rightmost group of to-be-decomposed bits and the lowest bit of the storage unit; in the case that the current decomposition period is the non-first decomposition period for the to-be-decomposed value, determine that the current decomposition value is an intermediate result of a previous decomposition period, and the first number is consistent with the target bit-width.

[0015] According to a third aspect, a computer readable storage medium is provided, having stored thereon a computer program which, when executed in a computer, causes the computer to perform the method according to the first aspect.

[0016] According to a fourth aspect, a computing device is provided, comprising a memory and a processor, wherein the memory stores executable code, and the processor executes the executable code to implement the method according to the first aspect.

[0017] By the method and device provided by the embodiments of the present specification, the bit width decomposition instruction is decomposed into a plurality of decomposition period decomposition instructions through a shift operation, the number of decomposition periods is determined by the bit width to be decomposed and the target bit width, the lowest bit of the remaining to-be-decomposed bits of the to-be-decomposed bits is aligned with the lowest bit of the storage unit, and the target value is obtained through the bitwise AND operation with the mask word. On the one hand, the target result can be directly obtained without intermediate transition instructions, that is, without intermediate caching, on the other hand, according to the actual business, the bit width decomposition can be performed on a single group of to-be-decomposed bits at a time, or the bit width decomposition can be performed on a plurality of groups of to-be-decomposed bits at a time, which is beneficial to fully utilize the hardware storage resources, avoid resource waste, and improve processing efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0019] Figure 1 A flowchart of bit width decomposition data showing a specific example of conventional technology;

[0020] Figure 2 A principle diagram of bit width decomposition data showing another specific example of conventional technology;

[0021] Figure 3 A flowchart of bit width decomposition data according to an embodiment of the present specification;

[0022] Figure 4 A schematic diagram showing the positional relationship between the to-be-decomposed value and the to-be-decomposed bits, and the storage unit in the present specification;

[0023] Figure 5 A flowchart of bit width decomposition of a single group of to-be-decomposed bits according to a specific example of the present specification;

[0024] Figure 6Fig. 1 shows a flow diagram of a method for simultaneously decomposing a plurality of groups of bits according to one embodiment of the present specification;

[0025] Figure 7 Fig. 2 shows a schematic block diagram of an apparatus for decomposing data according to one embodiment of the present specification;

[0026] Figure 8 Fig. 3 shows a schematic block diagram of an apparatus for decomposing data according to one more specific embodiment of the present specification;

[0027] Figure 9 Fig. 4 shows a schematic diagram of an arrangement of an array of decomposing computing units according to the technical architecture of the present specification. DETAILED DESCRIPTION

[0028] The technical solutions provided in the present specification will be described below with reference to the accompanying drawings.

[0029] In some data processing services (such as polynomial decomposition under homomorphic encryption described in the background), in order to reduce the computational complexity, the conventional technology can adopt the way of decomposing bit width to process data. Bit width usually refers to the number of binary bits processed or transmitted at a time by a digital circuit (such as a processor, a memory, etc.). The decomposing bit width operation can be to decompose a value occupying a larger number of bits into a value occupying a smaller number of bits, such as a 64-bit value, which is decomposed into 32 2-bit values respectively multiplied by the corresponding power of 2 and then added. The corresponding power of 2 can be regarded as a weight, and the product of a number and the power of 2 can be realized by a shift operation. Decomposing bit width can reduce computational complexity and reduce noise. The purpose and effect of bit width decomposition will be introduced below through a more specific application example.

[0030] In FHE, key switching (KeySwitch) can be involved, which is generally used for relinearization and rotation of ciphertext in FHE schemes. In a RLWE-based cryptographic scheme, for example, the encryption / decryption logic C0+C1*S=M+E with better mathematical properties can be used, which has the following method: party A uses a new key S new to encrypt the old key S old , generating the ciphertext of the old key (C0', C1'), that is, Then party A transmits this ciphertext to party B, and party B performs an update operation on all original ciphertext data (C0, C1). Thus, in the formula relationship, there is:

[0031]

[0032] After the update as above, the ciphertext data becomes the ciphertext encrypted by S old without decryption, which becomes the ciphertext encrypted by S new . Among them, EM This refers to noise introduced during the computation process. The noise level is usually positively correlated with the number of bits in the data. Ciphertext strings are typically long, such as 64 bits. Therefore, during the key switching process described above, the noise may become unacceptable (too much noise makes it impossible to decrypt the plaintext from the ciphertext), leading to decryption failure; therefore, noise control is necessary. One approach to reducing noise is bit-width decomposition.

[0033] Specifically, in the polynomial computation (especially multiplication) of key permutation, a polynomial H with a large number of bits (such as 64 bits, 128 bits, etc.) is decomposed into a series of "small polynomials" H0, H1, H2...H w "and a series of "constant vectors" (i.e., 1, 2) 1 ,2 2 , ..., 2 w The inner product of (which can be achieved through shifting) is then incorporated into the "key encryption process," thereby reducing the noise amplification factor from a "large number" (such as H·E) to a "large number." M ), which became some "decimals" (such as H). i ·E i Assume the primitive polynomial is a large integer on the interval [0, Q-1] (assuming Q is 2). 64 (A single value is represented by 64 bits), E i The original noise level is Q, and the coefficient H is... i Since it is taken from {0, 1}, the overall noise level is only about log2Q times that of the original noise Q, which is much lower than Q, thus playing a role in suppressing noise.

[0034] Issues to consider during bit-width decomposition include: target bit width (as mentioned above H). i The bit width), the original bit width of the bit to be decomposed (such as the bit width of H mentioned above), the control of the start bit and stop bit of decomposition, etc.

[0035] Therefore, the methods adopted in conventional technologies include:

[0036] (1) As Figure 1 The cutoff method shown

[0037] Input the value to be decomposed, and calculate the number of cyclic shift operations based on the original bit width and the target bit width. Figure 1 The process involves 100 / 4-1=24 truncations, meaning each execution can truncate the original value once. The decomposition process includes the following loop: truncation → intermediate result buffer → right shift to target bit width → truncation → target result buffer...

[0038] In this scheme, if the number of points in the polynomial is very large, such as 2... 16So the original data, target result and intermediate result need to cache 2 16 26 points (bit width of each point is 100 bits). The target data bit width obtained by intercepting is not necessarily a standard data type (such as integer int, floating point float, etc.), and often needs to be converted (and the original data bit width is inconsistent, and the high bits of the target result need to be padded with zeros). In the hardware manufacturing process, for custom circuits, the circuit needs to be customized according to the maximum bit width (such as 100 bits). In the case of decomposition of bit width less than the specification, it may cause waste of hardware computing resources. And, each decomposition needs to be calculated sequentially, and the number of loop shifts = original bit width / target bit width, such as 100 / 4.

[0039] (2) The instruction decomposition method shown in Figure 2

[0040] The original bit width decomposition instruction is decomposed, that is, the original large bit width polynomial is first decomposed into an intermediate bit width intermediate value, and then the intermediate bit width intermediate value is decomposed into the final target bit width value one by one. As shown in Figure 2 Among them, the first decomposition instruction can decompose the 64-bit original bit width value to obtain a 16-bit intermediate bit width value, and then the second instruction is used to decompose the 16-bit intermediate bit width value into a 4-bit target bit width value. In this way, after the first instruction is executed, the intermediate bit width value and the corresponding 4-bit target bit width value corresponding to the cache can be released, thereby reducing the cache pressure. However, this method increases the number of instructions, and the intermediate result still occupies the cache space.

[0041] Therefore, the present specification provides a bit width decomposition technical solution, which considers solving the following problems: the bit width of the to-be-decomposed bit is large (such as 256 bits), the target bit width is small (such as 2 bits, 1 bit), and in the extreme case, hundreds of times of traversal judgment need to be performed, and the execution efficiency is low; using a transition instruction for decomposition, in order to cache the hundreds of small bit width polynomials generated after the original large bit width polynomial is decomposed, a large amount of cache needs to be consumed; and the like.

[0042] ​Under the technical concept of the present specification, the starting bit of the to-be-decomposed bit, the total bit width of the to-be-decomposed bit, and the target bit width are determined first. According to the target bit width, a mask word taking relevant bits as target values can be determined, for example, when the target bit width is 8, the mask word can include 8 bits with a value of 1 (represented as FF in hexadecimal, that is, 11111111 in binary), and according to the total bit width, the high bits of the mask word can be supplemented with 0. According to the starting bit, the rightmost bit of a group of to-be-decomposed bits can be moved to the lowest bit (such as the 0th bit) of the storage unit (such as a register). Initially, the number of moved bits (denoted as first data) can be the difference between the starting bit and the lowest bit of the storage unit. The value after moving can be taken as intermediate data, and a bitwise AND logical operation is performed between the intermediate data and the mask word, so that the target bit width of the bit value starting from the lowest bit of the to-be-decomposed bit can be taken as the decomposed decimal, denoted as target value. In this way, the to-be-decomposed value is continuously shifted, and the number of moved bits (first data) in the subsequent period is the target bit width. Then, the corresponding bits are taken through the mask word based on the bitwise AND logical operation, so that the target bit width of the bit can be decomposed from the to-be-decomposed bit as the target value in each period, until each bit in the to-be-decomposed bit is decomposed.

[0043] The method for decomposing data by bit width under the technical concept of the present specification can perform a bitwise AND logical operation between the mask word and the intermediate result of shifting, only one decomposition instruction is required, and the mask word can be used to expand the synchronous decomposition of multiple groups of to-be-decomposed bits. The method is less limited by the bit width of the to-be-decomposed bit, and can fully utilize various specifications of storage circuits on hardware, thereby effectively utilizing hardware resources and improving resource utilization and business processing efficiency.

[0044] The technical concept of the present specification will be described in detail below with reference to the accompanying drawings.

[0045] Figure 3 A flow of decomposing data by bit width according to one embodiment of the present specification is shown. The execution subject of the flow can be any computer, device, or server with certain computing capability.

[0046] It can be understood that in actual business, the to-be-decomposed value (refer to Figure 4 As shown, the to-be-decomposed value can be a single business data or a value obtained by connecting multiple continuous business data together and displaying in the current storage unit. For example, in the polynomial transformation (such as NTT transformation of a vector) of homomorphic encryption, one instruction can process multiple polynomials at the same time, a single polynomial can be a multi-point polynomial, and the data (such as the coefficients of each term) corresponding to multiple points (such as multiple terms of the polynomial) of the polynomial are connected together. The to-be-decomposed bit can be a continuous multiple bit (such as the 2nd point of the polynomial) that needs to be decomposed at present. A single to-be-decomposed value can include multiple groups of to-be-decomposed bits. A group of to-be-decomposed bits can be as shown in Figure 4 the starting bit of the to-be-decomposed bit, the total bit width of the to-be-decomposed bit, and the target bit width are determined first. According to the target bit width, a mask word taking relevant bits as target values can be determined, for example, when the target bit width is 8, the mask word can include 8 bits with a value of 1 (represented as FF in hexadecimal, that is, 11111111 in binary), and according to the total bit width, the high bits of the mask word can be supplemented with 0. According to the starting bit, the rightmost bit of a group of to-be-decomposed bits can be moved to the lowest bit (such as the 0th bit) of the storage unit (such as a register). Initially, the number of moved bits (denoted as first data) can be the difference between the starting bit and the lowest bit of the storage unit. The value after moving can be taken as intermediate data, and a bitwise AND logical operation is performed between the intermediate data and the mask word, so that the target bit width of the bit value starting from the lowest bit of the to-be-decomposed bit can be taken as the decomposed decimal, denoted as target value. In this way, the to-be-decomposed value is continuously shifted, and the number of moved bits (first data) in the subsequent period is the target bit width. Then, the corresponding bits are taken through the mask word based on the bitwise AND logical operation, so that the target bit width of the bit can be decomposed from the to-be-decomposed bit as the target value in each period, until each bit in the to-be-decomposed bit is decomposed.Figure 4 The starting bit (16th bit) to the ending bit (79th bit) are shown.

[0047] According to the technical concept of the bit-width decomposition data provided by the embodiments of the present disclosure, for a single to-be-decomposed value, after obtaining the bit positions of each group of to-be-decomposed bits (for example, described by the starting bit S and the ending bit E) and the target bit width (for example, represented by d), the bit-width decomposition can be iterated for multiple periods. In a single period, the lowest bit of the to-be-decomposed bit can be aligned with a predetermined position (for example, the 0th bit in the mask word, which can be denoted as the lowest bit q), and then the bits consistent with the target bit width are taken as the target value by using the mask word. The to-be-decomposed bit can be a plurality of bits in the to-be-decomposed value. Figure 4

[0048] Figure 4 In a specific example of the bit-width decomposition data, the lowest bit of the to-be-decomposed value is the 0th bit, the to-be-decomposed value includes a group of to-be-decomposed bits, the starting bit S of the group of to-be-decomposed bits is the 16th bit, the ending bit E of the to-be-decomposed bit is the 79th bit, and the bit number of the to-be-decomposed bit is the bit width thereof. The target bit width can be pre-set according to business requirements, for example, 2, 8, and the like.

[0049] As shown in FIG. 3, in a single decomposition period, the bit-width decomposition data process can sequentially determine the corresponding target values for each group of to-be-decomposed bits from the starting bit of the lowest bit to the ending bit of the highest bit, including the following steps: step 301, right shifting the current decomposition value corresponding to the to-be-decomposed value by a first number of bit positions, so that the lowest bit of the current to-be-decomposed bit in the to-be-decomposed value is aligned with the lowest bit of the storage unit, thereby obtaining a first intermediate result, and the lowest bit of the current to-be-decomposed bit is the lowest bit of the remaining to-be-decomposed bit of the rightmost group of to-be-decomposed bits; step 302, obtaining each target value corresponding to each group of to-be-decomposed bits by performing a bit-by-bit AND operation on the mask word and the first intermediate result, the mask word is consistent with the bit width of the to-be-decomposed value, and includes each target bit group, a single target bit group corresponds to a single group of to-be-decomposed bits, and the value of the low bit consistent with the target bit width is 1, and the values of the other bits are 0. Figure 3 First, in step 301, the current decomposition value corresponding to the to-be-decomposed value is right shifted by a first number of bit positions to obtain a first intermediate result.

[0050] The current decomposition value corresponding to the to-be-decomposed value is the initial processing object of the current decomposition period. Generally, in the case that the current decomposition period is the first decomposition period for the to-be-decomposed value, the current decomposition value can be the initial to-be-decomposed value, and in the case that the current decomposition period is a non-first decomposition period for the to-be-decomposed value, the current decomposition value can be the intermediate result of the previous decomposition period.

[0051] ​​

[0052] In order to avoid insufficient storage unit length, the to-be-decomposed value can be right shifted, so that the lowest bit of the to-be-decomposed bit is aligned with the lowest bit of the storage unit (such as a register). For example, the 16th bit in the to-be-decomposed value is aligned with the 0th bit. Therefore, the current decomposition value can be right shifted, and the number of bits right shifted is referred to as the first number, which can also be referred to as the number of offset bits. In the first decomposition period of the to-be-decomposed value, the first number can be determined according to the relative position of the starting bit S of the rightmost group of to-be-decomposed bits and the lowest bit q of the storage unit, such as S-q. Assuming that the lowest bit is the 0th bit, q=0, the first number is S. Since the bit width of the to-be-decomposed value decomposed in a single decomposition period is the target bit width d, in other decomposition periods of the to-be-decomposed value, the first number can be consistent with the target bit width d. Figure 4

[0053] In an embodiment, in each decomposition period, an identifier describing the decomposition progress, referred to as the offset identifier diff, can be used to determine the value of the offset identifier according to known information, and the number of bits moved, i.e., the first number, can be determined according to the value of the offset identifier. For example, at the beginning, the value of the offset identifier is the initial value 0. In a single decomposition period, it can be first detected whether the value of the offset identifier is greater than 0. If the offset identifier is not greater than 0, it is determined that the current decomposition period is the first decomposition period of the to-be-decomposed value, and the first bit width is updated to the difference between the target bit width and the first bit width. Here, the first bit width is the bit number of a single group of to-be-decomposed bits. At this time, the first number can be the difference between the starting bit S and the lowest bit q. If the offset identifier is greater than 0, it is determined that the current decomposition period is a non-first decomposition period of the to-be-decomposed value, and the offset identifier can be updated to the difference between its current value and the target bit width d. At this time, the first number is the target bit width d. Until the offset identifier is less than or equal to 0, the decomposition of the to-be-decomposed value ends. It is worth noting that in the case where the first bit width cannot be divided by the target bit width d, the offset identifier is less than 0 when the decomposition of the to-be-decomposed value ends. Alternatively, the offset identifier can be inherited between consecutive to-be-decomposed values, so that in the first decomposition period of the to-be-decomposed value, the offset identifier can be equal to 0 or less than 0.

[0054] Referring to FIG. 1, Figure 4 As shown in FIG. 1, in the first bit width decomposition period, the to-be-decomposed value can be right shifted by 16 (the first number) bit positions, and the lowest bit (the 16th bit) of the to-be-decomposed bit in the to-be-decomposed value corresponds to the lowest bit of the storage unit (such as a register). In the right shifting process, a cyclic shift can be used, and the bit values shifted to the right can be arranged in sequence to the left. Alternatively, a right discarding shift can be used, and the bit values shifted to the right can be discarded. The present application does not make any limitation.

[0055] ​In one embodiment, during the shifting process, the bit value of the higher-order bit (e.g., the bit value to be decomposed) can be shifted to the higher-order bit value (e.g., the bit value of the higher-order bit value) than the bit value to be decomposed. Figure 4 Several bits (79 bits higher than the lower 79 bits) remain unchanged. This is to avoid mistakenly decomposing higher-order bits into the current bit to be decomposed when the remaining amount of the bit to be decomposed is insufficient for the target bit during the last decomposition process.

[0056] In this specification, the data after the current shift operation is performed is recorded as the first intermediate result. In an optional embodiment, the first intermediate result may have the same format as the data value to be decomposed and be stored in the same storage area.

[0057] It is worth noting that when the current value to be decomposed contains a set of bits to be decomposed, the least significant bit of the above set of bits to be decomposed is the least significant bit of that set of bits to be decomposed. When the current value to be decomposed contains multiple sets of bits to be decomposed, the least significant bit of the above set of bits to be decomposed is the least significant bit of the rightmost set of bits to be decomposed.

[0058] Next, in step 302, a bitwise AND operation is performed between the mask word and the first intermediate result to obtain the target values ​​corresponding to each group of bits to be decomposed.

[0059] It can be understood that the function of a mask word is to extract a number of bits with the same target bit width from the first intermediate result after shifting, thus obtaining the target value. In this way, the mask word can be generated based on the target bit width. The length of the mask word can be consistent with the bit width of the original data (such as the value to be decomposed) stored in the memory cell, so that each bit of a single data item is applied in subsequent operations. For example, as... Figure 4 The mask word is 64 bits. It can be divided into target bit groups, with each target bit group corresponding to a single group of bits to be decomposed. Optionally, the bit width of a single target bit group can be the same as the initial bit width of the corresponding bit to be decomposed. The interval between target bit groups is consistent with the interval between corresponding groups of bits to be decomposed. For example, if the least significant bits of two groups of bits to be decomposed differ by 32 bits, the least significant bits of the two target bit groups can also differ by 32 bits. Furthermore, the least significant bit of the rightmost target bit group is consistent with the least significant bit of the storage unit. A single target bit group of the mask word includes the lower-order target bits, with the target bit width matching the target bit width and a value of 1. Non-target bits have values ​​of 0. For example, if the width of the original data storage unit is 128, the mask word width can be 128. If the target data stored in the cache unit has a bit width of 32, the mask word can contain 4 target bit groups, and the hexadecimal representation of a single target bit group can be 0000 00FF. If the mask word also includes bits outside the target bit groups, the values ​​of these bits can all be set to 0.

[0060] Thus, in the case of performing the bitwise AND operation between the mask word and the first intermediate result, since the bits with value 0 in the mask word and the corresponding bits in the result of the bitwise AND operation between the first intermediate result have value 0, the target bits have the same value as the low bits of the first intermediate result, i.e., the target value under the target bit width is obtained by decomposition.

[0061] In this way, through the iterative decomposition in multiple decomposition periods, the groups of to-be-decomposed bits can be completely decomposed into target values under the target bit width. In this technical concept, multiple groups of to-be-decomposed bits can be decomposed at the same time, and multiple target values can be obtained in one decomposition period. The target values obtained in the same decomposition period can be recorded as a group of target values. In this way, the utilization efficiency of hardware resources can be improved, and the bit width decomposition speed can be accelerated.

[0062] In order to make the technical concept of the present specification more clear, the following describes the bit width decomposition process through two embodiments shown in Figure 5 , Figure 6 .

[0063] As shown in Figure 5 , it is a bit width decomposition schematic diagram of a to-be-decomposed value containing a single group of to-be-decomposed bits. As shown in Figure 5 , first, the starting bit S=8, the ending bit E=39, the total bit width L1 (in the example, 16 hexadecimal, and a single bit corresponds to a bit width of 4 bits)=E-S+1=32, the lowest bit q=0, and the target bit width d=8 of the to-be-decomposed bits (such as cdeffedc ba98 7654) in the current single group of to-be-decomposed values (such as 89ab cdef fedc ba98 7654 3210) are determined.

[0064] In each decomposition period, the remaining to-be-decomposed bits in the to-be-decomposed bits need to be aligned with the lowest bit, i.e., the current decomposition value corresponding to the to-be-decomposed value needs to be aligned with the lowest bit, and a right shift operation is needed. The number of bits shifted to the right in a single decomposition period is recorded as a first number shift. In the initial period, the first number shift is the difference between the starting bit S of the to-be-decomposed bits and the lowest bit q. In the subsequent decomposition period, the first number shift is consistent with the target bit width.

[0065] In one embodiment, the offset identifier diff can be changed with the remaining bit width of the bit to be decomposed, such as being initially set as 0 and then being consistent with the remaining bit width in the subsequent period. The offset identifier diff can have an initial value of 0 for each bit to be decomposed, or can be inherited and continued in the continuous bit to be decomposed. In the case that the total bit width of the bit to be decomposed cannot be divided by the target bit width, the offset identifier diff is less than 0 when a group of bits to be decomposed is decomposed. Thus, whether the first decomposition period of the current bit to be decomposed is determined by judging whether the offset identifier diff is greater than 0. In the case that the offset identifier diff is less than or equal to 0, it is the first decomposition period of the current bit to be decomposed, the first number shift = S - q, and in the subsequent period, the first number shift = d. In one example, the offset identifier diff can be updated as L1 - d in the first decomposition period, and the offset identifier diff can be updated as diff - d in each of the subsequent decomposition periods.

[0066] Figure 5In the example, E=79, S=16, q=0, then total bit width L1=E-S+1=64, d is 8, the first decomposition period, offset identifier diff=0, then diff is updated to L1-d=56, the first number shift=S-q=16, right shift 16 bits, to get the intermediate result 0000 89abcdef fedcba98 7654. The mask word is generated according to the target bit width d, which is 1 on the lowest d bits, and 0 on the other bits, and the length is consistent with the length of a single value stored in the storage unit, for example, 96 bits, 0000 000000000000 0000 00FF. The target bit group bit width contained therein can be consistent with the corresponding initial bit width 32 of the bit to be decomposed, for example, “0000 00FF”, and the values on the other 64 bits are all 0. Then in the first decomposition period, the intermediate result 0000 89abcdef fedcba98 7654 is subjected to the logical operation of AND with the mask word to obtain a target value 0000 00000000 00000000 0054. The target value 0000 0000 0000 0000 0000 0054 is written into the cache. Since the offset identifier diff>0, continue to shift, and in the subsequent period, the number of bits right shifted is consistent with the target bit width d, which is 8, to obtain the intermediate result 00 0000 89abcdef fedcba98 76, and the offset identifier diff is updated to diff-d=48. The intermediate result 00 0000 89abcdef fedcba98 76 is subjected to the logical operation of AND with the mask word 0000 0000 0000 0000 0000 00FF to obtain a target value 0000 0000 0000 0000 0000 0076. In each decomposition period, the shift and the logical AND operation with the mask word are iterated until the offset identifier diff is less than or equal to 0. Figure 5 In the example, the intermediate result after shifting in the 8th decomposition period is: 00000000 0000 0000 0000 00cd. At this point, the offset identifier diff is equal to 0, and the decomposition bit width process ends, obtaining 8 target values with an effective bit width of 8.

[0067] In practice, one may encounter multiple consecutive values ​​to be decomposed, or multiple evenly distributed sets of bits to be decomposed. For example, in the calculation process corresponding to the polynomial in homomorphic encryption, the number of polynomial points (terms) is multiple. Combined with hardware resources, multiple points can be decomposed simultaneously. For instance, if the length of a single processing unit of the hardware resource is 128 bits, and the buffer length of a single polynomial point is 32 bits, then up to four points of data in the polynomial can be decomposed simultaneously. The data of a single point corresponds to a single set of bits to be decomposed. The data displayed by a single processing unit of the hardware resource can be denoted as the value to be decomposed, that is, a value containing the bits to be decomposed.

[0068] Figure 6 This illustrates an example where the value to be decomposed contains two sets of bits to be decomposed simultaneously. For example... Figure 6 As shown, first, determine the two sets of bits to be decomposed in the current value to be decomposed, "89ab cdef fedc ba98 7654 3210", such as "cdeffedc" and "7654 3210", each 32 bits. The total bit width L1 and L2 of the two sets of bits to be decomposed are both 32, the length of a single value in the buffer is 32, the starting bit S of the rightmost set of bits to be decomposed is equal to the lowest bit q = 0, the stopping bit E of the rightmost set is 31, and the target bit width d = 8.

[0069] When multiple groups of bits are decomposed simultaneously, each decomposition cycle requires aligning the least significant bit (initially its starting bit) of the rightmost group with the least significant bit of the hardware resource as an intermediate result. The number of bits shifted to the right in a single decomposition cycle is denoted as the first quantity, shift. Similar to a single group of bits, the value of shift differs in the first and subsequent decomposition cycles. For the first decomposition cycle of each group of bits, the first quantity shift = Sq; in subsequent cycles, the first quantity shift = d. Figure 6 In the example shown, in the first decomposition cycle, the first quantity shift = 0 - 0 = 0. In one example, the decomposition progress can be controlled using an offset flag. In the first decomposition cycle, the offset flag diff is updated to E - S + 1 - d = L1 - d = 24, and in each subsequent decomposition cycle, the offset flag diff is updated to diff - d.

[0070] Thus, in the first decomposition cycle, the first quantity shift = d, shift right by 0 bits, and the offset identifier diff is updated to the total bit width L1-d. The intermediate results are consistent with the value to be decomposed. The mask word is generated based on the target bit width d, including multiple target bit groups. Each target bit group has 1 in the lowest d bits and 0 in the remaining bits. The bit width of a single target bit group can be consistent with the initial bit width of the corresponding bit to be decomposed, such as 32 bits, 000000FF. Figure 6The mask word in the example includes two target bit groups, 0000 00FF and 0000 00FF. The bit values outside the target bit groups in the mask word are 0. In the first decomposition period, the intermediate result 89ab cdef fedc ba98 7654 3210 is subjected to an AND operation with the mask word, to obtain a set of target values 000000dc (target value 2) and 00000010 (target value 1). The target values are written into the cache. Continue to shift, and in the subsequent period, the number of bits to be right shifted is consistent with the target bit width d, which is 8, to obtain the intermediate result 00 89ab cdef fedc ba98 765432, and the offset identifier diff is updated to diff-d = 16. The intermediate result 00 89ab cdef fedc ba98 765432 is subjected to an AND operation with the mask word 000000FF 000000FF, to obtain a set of target values 000000fe (target value 4) and 00000032 (target value 3). In this way, in each decomposition period, shifting and the AND operation with the mask word are iteratively performed until the offset identifier diff is less than or equal to 0. Figure 6 In the example, the intermediate result after shifting in the fourth decomposition period is 00 000089ab cdef fedc ba98 76. The intermediate result is subjected to an AND operation with the mask word 0000 00FF 0000 00FF, to obtain a set of target values 0000 00cd (target value 8) and 0000 0076 (target value 7). At this point, the offset identifier diff is equal to 0, and the decomposition bit width process ends, to obtain four sets of target values each having a bit width of 8, and each set of target values includes two target values corresponding to each set of to-be-decomposed bits.

[0071] Figure 5 、 Figure 6 The above are only two specific examples. In practice, there can be more bit width decomposition scenarios. For example, on a hardware computing unit with a bit width of 128, three or four sets of 32-bit to-be-decomposed bits can be simultaneously subjected to bit width decomposition, which will not be described herein again.

[0072] To implement the technical concept, the embodiment of the present specification also provides a device for decomposing data by bit width. The device for decomposing data by bit width can be arranged in any computer, device, or server having a certain computing capability, to decompose each set of to-be-decomposed bits in a to-be-decomposed value into a weighted form of a plurality of target values in a target bit width. As shown in FIG. 7, the device 700 for decomposing data by bit width provided by the embodiment of the present specification can include a shifting unit 701 and a determination unit 702. Figure 7

[0073] ​In the bit-width decomposition process, after several decomposition periods of iteration, the target values corresponding to each group of bits to be decomposed are determined from the start bit to the end bit of each group of bits to be decomposed; in a single decomposition period:

[0074] The shift unit 701 is configured to right-shift the current decomposition value corresponding to the above-mentioned to-be-decomposed value by the first number of bits, so that the lowest bit to be decomposed in the above-mentioned to-be-decomposed value is aligned with the lowest bit of the storage unit, and a first intermediate result is obtained, and the lowest bit to be decomposed is the lowest bit of the remaining bits to be decomposed in the rightmost group of bits to be decomposed;

[0075] The determination unit 702 is configured to obtain each target value corresponding to each group of bits to be decomposed by performing a bitwise AND operation between the mask word and the first intermediate result, the mask word has the same bit width as the to-be-decomposed value, and includes each target bit group, a single target bit group corresponds to a single group of bits to be decomposed, and the value of the low bit corresponding to the target bit width is 1, and the values of the other bits are 0.

[0076] In one embodiment, the bit width of a single group of bits to be decomposed is the first bit width, and the shift unit 701 can further include a shift rhythm control subunit configured to describe the decomposition progress of the above-mentioned to-be-decomposed value through the offset identifier;

[0077] Each decomposition period corresponds to; in a single decomposition period, the shift unit 701 can be further configured to:

[0078] Detect whether the above-mentioned offset identifier is greater than 0;

[0079] In the case of not greater than 0, it is determined that the current decomposition period is the first decomposition period for the above-mentioned to-be-decomposed value, and the above-mentioned offset identifier is updated to the difference between the first bit width and the target bit width through the shift rhythm control subunit;

[0080] In the case of greater than 0, it is determined that the current decomposition period is a non-first decomposition period for the above-mentioned to-be-decomposed value, and the above-mentioned offset identifier is updated to the difference between its current value and the target bit width through the shift rhythm control subunit.

[0081] In one embodiment, the shift unit 701 can further include a shift position control subunit configured to:

[0082] In the case that the current decomposition period is the first decomposition period for the above-mentioned to-be-decomposed value, the above-mentioned current decomposition value is determined to be the above-mentioned to-be-decomposed value, and the first number is the difference between the start bit of the rightmost group of bits to be decomposed and the lowest bit of the storage unit;

[0083] In a case that the current decomposition period is not the first decomposition period for the to-be-decomposed value, the current decomposition value is determined as an intermediate result of a previous decomposition period, and the first quantity is consistent with the target bit width.

[0084] It is worth noting that, Figure 7 The apparatus 700 shown in the figure is used to implement the method embodiment shown in the figure, Figure 3 The method flow described corresponds to, Figure 3 The corresponding description in the method embodiment shown is also applicable to the apparatus 700, and will not be repeated here.

[0085] Figure 8 A more specific example of an apparatus for decomposing data by bit width in the embodiments of the present specification is shown, which is apparatus 800. As shown in the figure, Figure 8 The apparatus 800 at least includes a shift unit 801, a determination unit 802, and can further include an intermediate result caching unit, a mask word generating unit. The apparatus 800 or the device in which it is located can also include a to-be-decomposed value caching unit, a target value caching unit.

[0086] Further, the shift unit 801 can include a shift rhythm control subunit, a shift position control subunit, a to-be-decomposed value acquisition subunit, a shift operation subunit, etc. The to-be-decomposed value acquisition subunit is used to acquire the current decomposition value of the to-be-decomposed number. The shift rhythm control subunit is used to determine whether it is the first decomposition period by detecting the current value of the shift identifier, and can update the value of the shift identifier. The shift position control subunit can determine the number of bits of the shift according to the detection result of the shift rhythm control subunit on the current value of the shift identifier, such as the first quantity in the foregoing. The shift operation subunit can perform a shift operation on the current decomposition value acquired by the to-be-decomposed value acquisition subunit by the number of bits of the shift determined by the shift position control subunit. The intermediate result obtained by the shift operation can be cached by the intermediate result caching unit.

[0087] On the other hand, the determination unit 802 can include an AND logic operation subunit, which is used to perform an AND logic operation on the intermediate result obtained by the shift operation subunit and the mask word. The mask word can be determined by the mask word production unit according to the storage unit (such as the to-be-decomposed value caching unit, the target value caching unit, etc.) and is suitable for the current to-be-decomposed bit.

[0088] In view of the above process, the technical concept of decomposing data by bit width provided by the embodiments of the present specification is to decompose the bit width decomposition instruction into a plurality of decomposition period decomposition instructions through a shift operation, and the number of decomposition periods is determined by the bit width to be decomposed and the target bit width. The lowest bit of the remaining to-be-decomposed bits of the to-be-decomposed bits is aligned with the lowest bit of the storage unit, and the target value is obtained by combining the bitwise AND operation with the mask word. This technical solution can directly obtain the target result, without the need for intermediate transition instructions, that is, without the need for intermediate caching. On the other hand, according to the actual business, the bit width decomposition can be performed on a single group of to-be-decomposed bits at a time, or the bit width decomposition can be performed on multiple groups of to-be-decomposed bits at a time, which is beneficial to fully utilize the hardware storage resources, avoid resource waste, and improve processing efficiency.

[0089] In addition, the computing architecture mentioned in the technical solutions provided by the present specification can be run on a processor type including but not limited to the following: a programmable gate array (FPGA), a CPU, a GPU, or an application-specific integrated circuit (ASIC). The computing architecture mentioned in the technical solutions provided by the present specification can exist as an independent computing unit, and a plurality of decomposition computing units are combined to form a computing array, as shown in Figure 9 A single decomposition computing unit is used to execute the process of decomposing data by bit width in the embodiments of the present specification, thereby realizing parallel processing of all points in the same polynomial and further improving processing performance.

[0090] According to another aspect, embodiments also provide a computer-readable storage medium having stored thereon a computer program which, when executed in a computer, causes the computer to carry out the method described in conjunction with Figure 3 and the like.

[0091] According to another aspect, embodiments also provide a computer-readable storage medium having stored thereon a computer program which, when executed in a computer, causes the computer to carry out the method described in conjunction with Figure 3 and the like.

[0092] Those skilled in the art should be aware that in one or more examples described above, the functions described in the embodiments of the present specification can be implemented in hardware, software, firmware, or any combination thereof. When implemented in software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or codes on a computer-readable medium.

[0093] The specific embodiments described above are intended to be illustrative of the technical concept of the present specification, and are not used to limit the purpose, technical scheme and beneficial effects of the technical concept of the present specification. It should be understood that the above description is only a specific embodiment of the technical concept of the present specification, and is not used to limit the protection scope of the technical concept of the present specification. Any modification, equivalent replacement, improvement, etc. made on the basis of the technical scheme of the present specification should be included in the protection scope of the technical concept of the present specification.

Claims

1. A method for bit-width decomposition of data, for decomposing each group of to-be-decomposed bits in a to-be-decomposed value into a weighted form of a plurality of target values at a target bit width, in the bit-width decomposition process, a plurality of decomposition periods are iterated, and each target value is determined for each group of to-be-decomposed bits from a start bit of the lowest bit to an end bit of the highest bit in turn. In a single decomposition period, the method comprises: right shifting the current decomposition value corresponding to the to-be-decomposed value by a first number of bit positions, so that the lowest bit of the current to-be-decomposed bit in the to-be-decomposed value is aligned with the lowest bit of the storage unit, thereby obtaining a first intermediate result, the lowest bit of the current to-be-decomposed bit being the lowest bit of the remaining to-be-decomposed bits of the rightmost group of to-be-decomposed bits; obtaining each target value corresponding to each group of to-be-decomposed bits by performing a bitwise AND operation on a mask word and the first intermediate result, the mask word having the same bit width as the to-be-decomposed value and comprising each target bit group, a single target bit group corresponding to a single group of to-be-decomposed bits, and having a value of 1 on the low bit positions consistent with the target bit width and a value of 0 on the other bit positions.

2. The method of claim 1, wherein: in a case where the current decomposition period is the first decomposition period for the to-be-decomposed value, the current decomposition value is the to-be-decomposed value, and the first number is determined by the difference between the starting bit of the rightmost group of to-be-decomposed bits and the lowest bit of the storage unit; in a case where the current decomposition period is a non-first decomposition period for the to-be-decomposed value, the current decomposition value is the intermediate result of the previous decomposition period, and the first number is consistent with the target bit width.

3. The method of claim 1, wherein, The bit width of a single group of to-be-decomposed bits is a first bit width, and each decomposition period corresponds to a shift identifier; In the single decomposition period, the method further comprises: detecting whether the shift identifier is greater than 0; in a case where the shift identifier is not greater than 0, determining that the current decomposition period is the first decomposition period for the to-be-decomposed value, and updating the shift identifier to the difference between the first bit width and the target bit width; in a case where the shift identifier is greater than 0, determining that the current decomposition period is a non-first decomposition period for the to-be-decomposed value, and updating the shift identifier to the difference between its current value and the target bit width.

4. The method of claim 1, wherein, The right shifting of the current decomposition value corresponding to the to-be-decomposed value by the first number of bit positions comprises: keeping the data before the highest bit of the leftmost group of to-be-decomposed bits in the to-be-decomposed value unchanged and performing a right shifting operation on the other bit positions; or, performing a cyclic shift on the current decomposition value; or, removing the lowest first number of bit values of the current decomposition value and supplementing 0 to the highest first number of bits.

5. An apparatus for decomposing data by bit width, for decomposing each group of bits to be decomposed in a value to be decomposed into a weighted form of a number of target values at a target bit width, the apparatus comprising: a shifting unit and a determining unit; In the bit width decomposition process, after a plurality of decomposition periods of iteration, each target value corresponding to each to-be-decomposed bit is determined from the starting bit of the lowest bit to the ending bit of the highest bit; in a single decomposition period: the shifting unit is configured to right shift the current decomposition value corresponding to the to-be-decomposed value by a first number of bit positions, so that the lowest bit of the current to-be-decomposed bit in the to-be-decomposed value is aligned with the lowest bit of the storage unit, thereby obtaining a first intermediate result, the lowest bit of the current to-be-decomposed bit being the lowest bit of the remaining to-be-decomposed bits of the rightmost group of to-be-decomposed bits; The determining unit is configured to obtain each target value corresponding to each group of to-be-decomposed bits by performing a bitwise AND operation on a mask word and the first intermediate result, the mask word being consistent with the to-be-decomposed value in bit width and including each target bit group, a single target bit group corresponding to a single group of to-be-decomposed bits and being 1 in low bit positions consistent with the target bit width and 0 in other bit positions.

6. The apparatus of claim 5, wherein, The bit width of a single group of to-be-decomposed bits is the first bit width, and the shift unit further includes a shift rhythm control subunit configured to describe a decomposition progress for the to-be-decomposed value by means of an offset identifier. Each decomposition period corresponds to that, in the single decomposition period, the shift unit is further configured to: detect whether the offset identifier is greater than 0; in the case of not greater than 0, determine that the current decomposition period is the first decomposition period for the to-be-decomposed value, and update the offset identifier to a difference between the first bit width and the target bit width by means of the shift rhythm control subunit; in the case of greater than 0, determine that the current decomposition period is a non-first decomposition period for the to-be-decomposed value, and update the offset identifier to a difference between its current value and the target bit width by means of the shift rhythm control subunit.

7. The apparatus of claim 5 or 6, wherein, The shift unit further includes a shift position control subunit configured to: in the case of the current decomposition period being the first decomposition period for the to-be-decomposed value, determine that the current decomposition value is the to-be-decomposed value, and the first quantity is a difference between a starting bit of the rightmost group of to-be-decomposed bits and the lowest bit of the storage unit; in the case of the current decomposition period being a non-first decomposition period for the to-be-decomposed value, determine that the current decomposition value is an intermediate result of a previous decomposition period, and the first quantity is consistent with the target bit width. 8.A computer readable storage medium having stored thereon a computer program which, when executed in a computer, causes the computer to perform the method of any one of claims 1-4.

9. A computing device comprising a memory and a processor, wherein, The memory stores executable code, and the processor implements the method of any one of claims 1-4 when executing the executable code.

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