Double-shielding groove Schottky diode device and preparation method thereof
By setting up a built-in P+ ring in the lightly doped N-type epitaxial layer of the trench Schottky diode, the dual shielding effect is achieved, solving the problem of large reverse leakage current of the device and improving its performance in high-voltage applications.
Patent Information
- Application Number
- CN202411969885.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-30
- Publication Date
- 2025-04-11
AI Technical Summary
The trench Schottky diode has a large leakage current in the reverse blocking state, limiting its application range in high voltage applications.
A built-in P+ ring is provided in the lightly doped N-type epitaxial layer, formed by ion implantation, and impurities are diffused laterally through heat diffusion to achieve a double shielding effect.
It effectively reduces the surface electric field when the device is reversed, significantly improves the leakage current problem, and tries to avoid increasing the on-voltage drop.
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Figure CN119815846A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of power semiconductor devices, and in particular to a double-shielded trench Schottky diode device and a preparation method thereof. Background Art
[0002] Schottky Barrier Diode (SBD) is a diode that forms a metal-semiconductor junction through the contact between metal and semiconductor. Its name comes from the inventor Dr. Schottky. Unlike traditional PN junction diodes, Schottky diodes do not rely on the contact between P-type semiconductors and N-type semiconductors to form a junction, but use the contact between metal and semiconductor to generate a potential barrier. This makes Schottky diodes have fast switching speeds and low turn-on voltages, and are widely used in switching power supplies and other equipment that requires high-speed power switching.
[0003] Based on the traditional planar Schottky diode, the trench gate Schottky diode (TMBS) adds a polysilicon-filled trench to the anode structure. The trench structure can effectively generate a lateral electric field in the reverse blocking state, suppressing the phenomenon of Schottky surface barrier reduction, thereby reducing the leakage current of the device. At the same time, due to the regulation of the trench electric field, the voltage resistance of the TMBS diode is improved, and the on-state voltage drop of the device can be effectively reduced when it is turned on, thereby expanding the application range of Schottky diodes in high-voltage applications.
[0004] Trench Schottky diodes (TMBS) have excellent performance in many high-voltage applications, but they also have certain defects, especially in terms of leakage current. Although the trench structure can effectively suppress the surface barrier lowering effect and improve the device's withstand voltage and on-state voltage drop, its leakage current problem remains a prominent challenge.
[0005] In the reverse blocking state, the leakage current of trench Schottky diodes is more significant than that of traditional Schottky diodes. Although the trench design improves the suppression of leakage current to a certain extent, the leakage current is still large due to the characteristics of the Schottky barrier itself and the defects on the device surface. This is because under high voltage conditions, the uneven distribution of the electric field in the trench area may lead to local breakdown or the formation of leakage paths, which in turn leads to increased leakage current.
[0006] Although trench Schottky diodes have made progress in improving withstand voltage and reducing conduction voltage drop, leakage current is still a key limiting factor in their application, and further optimization measures need to be taken during device design and manufacturing. In order to reduce the leakage current of trench Schottky diodes while not significantly affecting the forward voltage drop of trench gate Schottky diodes, the present invention proposes a double shielded trench Schottky diode and a preparation method thereof. Summary of the invention
[0007] To solve the above technical problems, the present invention provides a double shielded trench Schottky diode and a method for preparing the same. By setting a built-in P+ ring in the lightly doped N-type epitaxial layer, the device surface electric field is further reduced, which can effectively improve the device leakage current problem.
[0008] The specific technical solutions include the following:
[0009] In a first aspect, a double-shielded trench Schottky diode device is provided, comprising a heavily doped N-type substrate layer, a lightly doped N-type epitaxial layer is deposited on the upper side of the heavily doped N-type substrate layer, a trench structure is provided on the upper part of the lightly doped N-type epitaxial layer, and a heavily doped polysilicon layer is provided in the trench structure; further comprising a metal anode, the metal anode contacts the lightly doped N-type epitaxial layer to form a Schottky barrier contact region, and the metal anode is connected to the heavily doped polysilicon layer; a gate oxide layer is provided between the lightly doped N-type epitaxial layer and the heavily doped polysilicon layer, and a built-in P+ ring is provided in the lightly doped N-type epitaxial layer.
[0010] Furthermore, the built-in P+ ring is formed by ion implantation, and the element implanted by the ions is one of boron, aluminum, arsenic and phosphorus.
[0011] Among them, the built-in P+ ring proposed in the present invention can form a shielding effect with a large depth by performing multiple etching and multiple ion implantation heating and diffusion processes.
[0012] Furthermore, the ion implantation dose is 1e11-1e17cm -2 .
[0013] Among them, the built-in P+ ring proposed in the present invention needs to diffuse impurities laterally through thermal diffusion to achieve a shielding effect. The longer the length of the lateral diffusion, the stronger the shielding effect, while the device conduction voltage drop will also increase. A compromise needs to be considered, and the built-in P+ ring cannot be connected to completely shield the barrier (Schottky barrier contact area).
[0014] Furthermore, the material of the metal anode is selected from one of titanium, nickel, vanadium and platinum.
[0015] Among them, the metal anodes proposed in the present invention have different work functions of different metals, so the barrier heights of the Schottky barrier diodes formed are different.
[0016] In a second aspect, a method for preparing a double shielded trench Schottky diode device as described in the first aspect is provided, comprising the following steps:
[0017] (1) firstly depositing a lightly doped N-type epitaxial layer on the upper side of a heavily doped N-type substrate layer, and then depositing an oxide layer on the lightly doped N-type epitaxial layer as a barrier layer for trench silicon etching to form a semiconductor;
[0018] (2) performing a first photolithography on the semiconductor surface, first etching the oxide layer, then etching the lightly doped N-type epitaxial layer, and then performing a first trench etching to form a trench structure;
[0019] (3) ion implantation into the lightly doped N-type epitaxial layer followed by thermal diffusion to form a built-in P+ ring;
[0020] (4) performing a second trench etching on the trench structure;
[0021] (5) performing gate oxidation on the trench structure after the second trench etching to form a gate oxide layer, performing polysilicon filling and reverse etching to form a heavily doped polysilicon layer, and filling the trench structure with the heavily doped polysilicon layer;
[0022] (6) depositing a BPSG oxide layer (BPSG oxide layer: borophosphosilicate glass oxide layer) on the oxide layer, and finally etching contact holes, sputtering barrier metal, and forming a metal anode. The metal anode contacts the lightly doped N-type epitaxial layer to form a Schottky barrier contact region, thereby obtaining a double shielded trench Schottky diode device.
[0023] Furthermore, in step (3), the depth of the built-in P+ ring is 0.3-3 μm.
[0024] Furthermore, in step (3), the depth of the built-in P+ ring is 0.5-2 μm.
[0025] Among them, the depth of the built-in P+ ring proposed by the present invention is determined by the first trench etching. The closer it is to the upper surface, the stronger the shielding effect, but at the same time it will increase the device conduction voltage drop.
[0026] Furthermore, in step (1), the deposition thickness of the oxide layer is 2000A-8000A.
[0027] Furthermore, in step (4), the etching depth of the second trench etching is 1-5 μm.
[0028] Furthermore, in step (6), the BPSG oxide layer is deposited to a thickness of 2000A-8000A.
[0029] The beneficial effects of the present invention are:
[0030] The present invention provides a double-shielded trench Schottky diode device and a preparation method thereof, wherein a built-in P+ ring is set in a lightly doped N-type epitaxial layer. When the device is reversely turned off, in addition to the electric field shielding brought by the trench structure itself which reduces the surface electric field effect, the built-in P+ ring is in the reverse direction of the device, the P+ region is partially depleted, and the electric field generated by the negative charges in the depleted region can significantly reduce the surface electric field. This structure is similar to a terminal field limiting ring. It is precisely because of the double shielding effect of the trench shielding and the P+ ring that the surface electric field of the device is greatly reduced when it is reversed, effectively improving the problem of reverse leakage current of the device. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying any creative work.
[0032] Figure 1 1 is a schematic structural diagram of a double shielded trench Schottky diode device according to Embodiment 1 of the present invention;
[0033] Figure 2 is a flow chart of preparing a double shielded trench Schottky diode device according to Embodiment 1 of the present invention;
[0034] Figure 3 is a flow chart of preparing a double shielded trench Schottky diode device according to Embodiment 1 of the present invention;
[0035] Figure 4 is a flow chart of preparing a double shielded trench Schottky diode device according to Embodiment 1 of the present invention;
[0036] Figure 5 is a flow chart of preparing a double shielded trench Schottky diode device according to Embodiment 1 of the present invention;
[0037] Figure 6 is a flow chart of preparing a double shielded trench Schottky diode device according to Embodiment 1 of the present invention;
[0038] Figure 7 is a flow chart of preparing a double shielded trench Schottky diode device according to Embodiment 2 of the present invention;
[0039] Figure 8 Schematic diagram of the structure of a conventional trench gate Schottky diode in Comparative Example 1 of the present invention;
[0040] Description of the symbols in the figure:
[0041] 101 - heavily doped N-type substrate layer; 102 - lightly doped N-type epitaxial layer; 103 - heavily doped polysilicon layer; 104 - built-in P+ ring; 201 - gate oxide layer; 202 - oxide layer; 301 - metal anode. DETAILED DESCRIPTION
[0042] The technical solutions in the embodiments of the present invention are described clearly and completely below. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0043] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.
[0044] It should also be understood that the terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the specification of the present invention and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.
[0045] It should be further understood that the term "and / or" used in the present description and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.
[0046] In order to more fully understand the technical content of the present invention, the technical solution of the present invention is further introduced and illustrated in conjunction with specific embodiments below.
[0047] Example 1
[0048] Figure 1It is a schematic diagram of the structure of a double-shielded trench Schottky diode device according to Embodiment 1 of the present invention. A double-shielded trench Schottky diode device comprises a heavily doped N-type substrate layer 101, a lightly doped N-type epitaxial layer 102 is deposited on the upper side of the heavily doped N-type substrate layer 101, a trench structure is provided on the upper part of the lightly doped N-type epitaxial layer 102, and a heavily doped polysilicon layer 103 is provided in the trench structure; it also comprises a metal anode 301, the metal anode 301 contacts the lightly doped N-type epitaxial layer 102 to form a Schottky barrier contact region, and the metal anode 301 is connected to the heavily doped polysilicon layer 103; a gate oxide layer 201 is provided between the lightly doped N-type epitaxial layer 102 and the heavily doped polysilicon layer 103, and a built-in P+ ring 104 is provided in the lightly doped N-type epitaxial layer 102.
[0049] The built-in P+ ring 104 is formed by ion implantation, wherein the element of the ion implantation is one of boron, aluminum, arsenic, and phosphorus, and the dose of the ion implantation is 1e11-1e17cm -2 In this embodiment, the element implanted by ionization is boron, and the dose of ion implantation is 1e11cm -2 The material of the metal anode 301 is selected from titanium, nickel, vanadium and platinum. In this embodiment, the material of the metal anode 301 is titanium.
[0050] Figure 2-Figure 6 The preparation process of the double shielded trench Schottky diode device of the embodiment 1 of the present invention is as follows. The preparation method of the double shielded trench Schottky diode device comprises the following steps:
[0051] (1) First, a lightly doped N-type epitaxial layer 102 is deposited on the upper side of the heavily doped N-type substrate layer 101, and then an oxide layer 202 is deposited on the lightly doped N-type epitaxial layer 102 as a barrier layer for trench silicon etching to form a semiconductor; the deposition thickness of the oxide layer 202 is 5000 Å;
[0052] (2) Then, a first photolithography is performed on the surface of the semiconductor, the oxide layer 202 is first etched, and then the lightly doped N-type epitaxial layer 102 is etched, followed by a first trench etching to form a trench structure; (3) Ion implantation is performed on the lightly doped N-type epitaxial layer 102, and then thermal diffusion is performed to form a built-in P+ ring 104; the depth of the built-in P+ ring is 1 μm; wherein, the depth of the built-in P+ ring 104 proposed in the present invention is determined by the first trench etching, and the closer it is to the upper surface, the stronger the shielding effect, but at the same time it will increase the device conduction voltage drop;
[0053] (4) performing a second trench etching on the trench structure, and the etching depth of the second trench etching is 3 μm;
[0054] (5) performing gate oxidation on the trench structure after the second trench etching to form a gate oxide layer 201, performing polysilicon filling and reverse etching to form a heavily doped polysilicon layer 103, and filling the trench structure with the heavily doped polysilicon layer 103;
[0055] (6) BPSG oxide layer is deposited on the oxide layer 202, and the deposition thickness of the BPSG oxide layer is 5000A. Finally, contact hole etching is performed and barrier metal is sputtered to form a metal anode 301. The metal anode 301 contacts the lightly doped N-type epitaxial layer 102 to form a Schottky barrier contact region, thereby obtaining a double shielded trench Schottky diode device.
[0056] The double-shielded trench Schottky diode device of Example 1 is provided with a built-in P+ ring 104 in the lightly doped N-type epitaxial layer 102. When the device is reversely turned off, in addition to the electric field shielding brought by the trench structure itself which reduces the surface electric field effect, the built-in P+ ring 104 is in the reverse direction of the device, the P+ region is partially depleted, and the electric field generated by the negative charge in the depletion region can significantly reduce the surface electric field. This structure is similar to a terminal field limiting ring. It is precisely because of the double shielding effect of the trench shield and the P+ ring that the surface electric field of the device is greatly reduced when it is reversed, effectively improving the problem of reverse leakage current of the device.
[0057] Example 2
[0058] Figure 7 It is a schematic diagram of the structure of the double shielded trench Schottky diode device of Example 2 of the present invention. The difference between Example 2 and Example 1 is that the double shielded trench Schottky diode device of Example 2 is formed by a plurality of cells connected in parallel, and the cells all include a heavily doped N-type substrate layer 101, a lightly doped N-type epitaxial layer 102 is deposited on the upper side of the heavily doped N-type substrate layer 101, a trench structure is provided on the upper part of the lightly doped N-type epitaxial layer 102, and a heavily doped polysilicon layer 103 is provided in the trench structure; it also includes a metal anode 301, the metal anode 301 contacts the lightly doped N-type epitaxial layer 102 to form a Schottky barrier contact area, and the metal anode 301 is connected to the heavily doped polysilicon layer 103; a gate oxide layer 201 is provided between the lightly doped N-type epitaxial layer 102 and the heavily doped polysilicon layer 103, and a built-in P+ ring 104 is provided in the lightly doped N-type epitaxial layer 102.
[0059] The spacing between the built-in P+ rings 104 of adjacent cells is 0.3-1 μm. In this embodiment, the number of cells is 2, and the spacing between the built-in P+ rings 104 of adjacent cells is 0.5 μm.
[0060] Among them, the built-in P+ ring 104 proposed by the present invention needs to diffuse impurities laterally through thermal diffusion to achieve a shielding effect. The longer the length of the lateral diffusion, the stronger the shielding effect, while the device conduction voltage drop will also increase, which needs to be considered as a compromise. The built-in P+ rings cannot be connected to completely shield the barrier (Schottky barrier contact area), and the general spacing is 0.3-1um.
[0061] Comparative Example 1
[0062] The schematic diagram of the structure of the conventional trench gate Schottky diode of Comparative Example 1 of the present invention is as follows Figure 8 As shown. Comparative Example 1 is a traditional trench gate Schottky diode, which is a cellular structure, the upper metal anode 301 and the lightly doped N-type epitaxial layer 102 form a Schottky barrier contact, this part is the active area, that is, the device forward conduction current flow area; the upper metal anode 301, the heavily doped polysilicon layer 103, the gate oxide layer 201 and the lightly doped N-type epitaxial layer 102 form a MOS capacitor structure, wherein the metal anode 301 and the heavily doped polysilicon layer 103 are in ohmic contact, and the thickness of the gate oxide layer 201 is 0.5μm, which is determined by the TMBS voltage and the device leakage current. This part of the structure plays a shielding role, reduces the reverse leakage of the device and improves the reverse withstand voltage of the device. The trench gate Schottky diode of Comparative Example 1 has certain defects in leakage current.
[0063] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed by the present invention, and these modifications or replacements should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be based on the protection scope of the claims.
Claims
1. A double shielded trench Schottky diode device, characterized in that: It includes a heavily doped N-type substrate layer, a lightly doped N-type epitaxial layer is deposited on the upper side of the heavily doped N-type substrate layer, a groove structure is provided on the upper part of the lightly doped N-type epitaxial layer, and a heavily doped polysilicon layer is provided in the groove structure; it also includes a metal anode, the metal anode contacts the lightly doped N-type epitaxial layer to form a Schottky barrier contact area, and the metal anode is connected to the heavily doped polysilicon layer; a gate oxide layer is provided between the lightly doped N-type epitaxial layer and the heavily doped polysilicon layer, and a built-in P+ ring is provided in the lightly doped N-type epitaxial layer.
2. The dual shielded trench Schottky diode device according to claim 1, characterized in that: The built-in P+ ring is formed by ion implantation, and the element implanted by the ions is one of boron, aluminum, arsenic and phosphorus.
3. The dual shielded trench Schottky diode device according to claim 2, characterized in that: The ion implantation dose is 1e11-1e17cm -2 .
4. The dual shielded trench Schottky diode device according to claim 3, characterized in that: The material of the metal anode is selected from titanium, nickel, vanadium and platinum.
5. The method for preparing a double shielded trench Schottky diode device according to any one of claims 1 to 4, characterized in that: The following steps are involved: (1) firstly depositing a lightly doped N-type epitaxial layer on the upper side of a heavily doped N-type substrate layer, and then depositing an oxide layer on the lightly doped N-type epitaxial layer as a barrier layer for trench silicon etching to form a semiconductor; (2) performing a first photolithography on the semiconductor surface, first etching the oxide layer, then etching the lightly doped N-type epitaxial layer, and then performing a first trench etching to form a trench structure; (3) ion implantation into the lightly doped N-type epitaxial layer followed by thermal diffusion to form a built-in P+ ring; (4) performing a second trench etching on the trench structure; (5) performing gate oxidation on the trench structure after the second trench etching to form a gate oxide layer, performing polysilicon filling and reverse etching to form a heavily doped polysilicon layer, and filling the trench structure with the heavily doped polysilicon layer; (6) depositing a BPSG oxide layer on the oxide layer, and finally etching contact holes, sputtering barrier metal, and forming a metal anode. The metal anode contacts the lightly doped N-type epitaxial layer to form a Schottky barrier contact region, thereby obtaining a double shielded trench Schottky diode device.
6. The method for preparing a double shielded trench Schottky diode device according to claim 5, characterized in that: In step (3), the depth of the built-in P+ ring is 0.3-3 μm.
7. The method for preparing a double shielded trench Schottky diode device according to claim 6, characterized in that: In step (3), the depth of the built-in P+ ring is 0.5-2 μm.
8. The method for preparing a double shielded trench Schottky diode device according to claim 7, characterized in that: In step (1), the deposition thickness of the oxide layer is 2000A-8000A.
9. The method for preparing a double shielded trench Schottky diode device according to claim 8, characterized in that: In step (4), the etching depth of the second trench etching is 1-5 μm.
10. The method for preparing a double shielded trench Schottky diode device according to claim 9, characterized in that: In step (6), the BPSG oxide layer is deposited to a thickness of 2000A-8000A.