Image sensing device

Abstract

An image sensing apparatus includes: a plurality of pixel blocks arranged in a first direction and a second direction perpendicular to the first direction, each pixel block including a microlens and a plurality of adjacent unit pixels receiving incident light via the microlens, and each unit pixel configured to generate an electrical signal in response to the incident light received therein; an outer pixel isolation structure disposed between adjacent pixel blocks of the plurality of pixel blocks to isolate the adjacent pixel blocks from each other; and an inner pixel isolation structure disposed between adjacent ones of the unit pixels within each pixel block to isolate the adjacent unit pixels from each other. The inner pixel isolation structure includes a first pixel isolation structure having a different structure from the outer pixel isolation structure.

Description

Technical Field

[0001] Technologies and implementations disclosed in this patent document generally relate to image sensing devices. Background Art

[0002] Image sensors are devices that use the properties of semiconductors in response to light to capture images. With the recent development of the computer and communications industries, the demand for high-quality, high-performance image sensors has been increasing in various electronic devices such as smartphones, digital cameras, game consoles, the Internet of Things (IoT), robots, surveillance cameras, medical micro cameras, etc.

[0003] Image sensing devices can be roughly classified into image sensing devices based on charge coupled devices (CCDs) and image sensing devices based on complementary metal oxide semiconductors (CMOSs). Recently, image sensing devices based on CMOSs ​​have been widely used due to the advantage of being able to integrate analog circuits and digital control circuits into a single integrated circuit (IC). Summary of the invention

[0004] Various embodiments of the disclosed technology are directed to an image sensing device including a pixel isolation structure to isolate photoelectric conversion elements of unit pixels from each other, thereby increasing the use efficiency (quantum efficiency) of incident light.

[0005] According to an embodiment of the disclosed technology, an image sensing device may include: a plurality of pixel blocks arranged in a first direction and a second direction perpendicular to the first direction, each pixel block including a microlens and a plurality of adjacent unit pixels receiving incident light via the microlens, and each unit pixel is configured to generate an electrical signal in response to the incident light received therein; an outer pixel isolation structure disposed between adjacent pixel blocks in the plurality of pixel blocks to isolate the adjacent pixel blocks from each other; and an inner pixel isolation structure disposed between adjacent unit pixels in the unit pixels within each pixel block to isolate the adjacent unit pixels from each other. The inner pixel isolation structure may include a first pixel isolation structure having a structure different from the outer pixel isolation structure.

[0006] According to another embodiment of the disclosed technology, an image sensing device may include: a plurality of unit pixels including the same color filter for filtering incident light to be detected by the unit pixel and configured to share a microlens that guides the incident light into the unit pixel, each of the plurality of unit pixels including a photoelectric conversion element configured to convert the received incident light into an electrical signal representing the light received at the unit pixel; and a pixel isolation structure disposed between the photoelectric conversion elements of the plurality of unit pixels. The pixel isolation structure may include: a first pixel isolation structure disposed to overlap with a central portion of the microlens; and a second pixel isolation structure disposed to overlap with an edge portion of the microlens and configured to have a structure different from the first pixel isolation structure.

[0007] It is to be understood that both the foregoing general description and the following detailed description of the disclosed technology are exemplary and explanatory and are intended to provide further explanation of the disclosure as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The above and other features and advantageous aspects of the disclosed technology will become apparent with reference to the following detailed description when considered in conjunction with the accompanying drawings.

[0009] Figure 1 is a block diagram illustrating an example of an image sensing device based on some implementations of the disclosed technology.

[0010] Figure 2 Some examples of implementations based on the disclosed technology Figure 1 Schematic diagram of an example of a two-dimensional representation of a set of pixel blocks in a pixel area shown.

[0011] Figure 3 Some examples of implementations based on the disclosed technology Figure 2 An enlarged plan view of an example of a pixel isolation structure of area "A" is shown.

[0012] Figure 4A is an example of some implementations based on the disclosed technology. Figure 2 A cross-sectional view of an example of a pixel block taken along line X1 - X1 ′ is shown.

[0013] Figure 4B is an example of some implementations based on the disclosed technology. Figure 2 A cross-sectional view of an example of a pixel block taken along line X2 - X2 ′ is shown.

[0014] Figure 4C is an example of some implementations based on the disclosed technology. Figure 2 A cross-sectional view of an example of a pixel block taken along line X3 - X3 ′ is shown.

[0015] Figure 5 is a schematic diagram illustrating an example of a 2-dimensional representation of a set of pixel blocks based on some implementations of the disclosed technology.

[0016] Figure 6 Some examples of implementations based on the disclosed technology Figure 5 An enlarged plan view of an example of a pixel isolation structure of region “B” is shown.

[0017] 7A to 7E is a schematic diagram illustrating an example of a two-dimensional representation of an inter-pixel isolation structure based on some implementations of the disclosed technology. DETAILED DESCRIPTION

[0018] This patent document provides implementations and examples of image sensing devices that can be used to substantially solve one or more technical or engineering problems and alleviate limitations or disadvantages encountered in some other image sensing devices. The disclosed technology can be implemented in some embodiments to provide an image sensing device that can increase the efficiency (quantum efficiency) of using incident light by providing a pixel isolation structure specially designed to isolate the photoelectric conversion elements of a unit pixel from each other.

[0019] Reference will now be made in detail to certain embodiments, examples of which are illustrated in the accompanying drawings. As much as possible, the same reference numerals will be used throughout the drawings to refer to the same or similar components. In the following description, detailed descriptions of related known configurations or functions incorporated herein will be omitted to avoid obscuring the subject matter.

[0020] In the following, various embodiments will be described with reference to the accompanying drawings. However, it should be understood that the disclosed technology is not limited to a specific embodiment, but includes various modifications, equivalents and / or substitutions of the embodiments. The embodiments of the disclosed technology can provide various effects that can be directly or indirectly recognized by the disclosed technology.

[0021] Figure 1 is a block diagram illustrating an example of an image sensing device based on some implementations of the disclosed technology.

[0022] Reference Figure 1 , the image sensing device may include a pixel region 100, a row driver 200, a correlated double sampler (CDS) 300, an analog-to-digital converter (ADC) 400, an output buffer 500, a column driver 600, and a timing controller 700. The present invention is discussed only by way of example. Figure 1 The components of the image sensing device shown, and this patent document covers many other changes, substitutions, variations, replacements and modifications. In this patent document, the word "pixel" may be used to indicate an image sensing pixel configured to detect incident light to generate an electrical signal carrying an image in the incident light.

[0023] The pixel area 100 may include a plurality of pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) arranged continuously in rows and columns. The pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) may be arranged adjacent to each other in a (2×2) matrix structure of a Bayer pattern. Each of the pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) may include a structure in which a plurality of unit pixels having the same color are arranged adjacent to each other in an (N×N) matrix (where N is a natural number of 2 or greater). Each unit pixel may include a photoelectric conversion element (e.g., a photodiode PD) for photoelectrically converting incident light to generate an electrical signal (i.e., a pixel signal). A microlens may be formed in each pixel block (PB_R, PB_Gr, PB_Gb, PB_B). The structures of these pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) will be described in more detail later.

[0024] The pixel area 100 may receive a driving signal (eg, a row selection signal, a reset signal, a transmission (or transfer) signal, etc.) from the row driver 200. Upon receiving the driving signal, the unit pixel may be activated to perform operations corresponding to the row selection signal, the reset signal, and the transfer signal.

[0025] The row driver 200 may activate the pixel region 100 based on a control signal provided by a controller circuit such as a timing controller 700 to perform certain operations on the unit pixels in the corresponding row. In some implementations, the row driver 200 may select one or more pixel groups arranged in one or more rows of the pixel region 100. The row driver 200 may generate a row selection signal to select one or more rows from a plurality of rows. The row driver 200 may sequentially enable a reset signal and a transfer signal for the unit pixels arranged in the selected row. The pixel signal generated by the unit pixels arranged in the selected row may be output to a correlated double sampler (CDS) 300.

[0026] The correlated double sampler (CDS) 300 can use correlated double sampling to remove the undesired offset value of the unit pixel. In one example, the correlated double sampler (CDS) 300 can remove the undesired offset value of the unit pixel by comparing the output voltage of the pixel signal (of the unit pixel) obtained before and after the photocharge generated by the incident light is accumulated in the sensing node (i.e., the floating diffusion (FD) node). As a result, the CDS 300 can obtain the pixel signal generated only by the incident light without causing noise. In some implementations, upon receiving the clock signal from the timing controller 700, the CDS 300 can sequentially sample and maintain the voltage levels of the reference signal and the pixel signal provided to each of the multiple column lines from the pixel area 100. That is, the CDS 300 can sample and maintain the voltage levels of the reference signal and the pixel signal corresponding to each column of the pixel area 100. In some implementations, the CDS 300 may transmit the reference signal and the pixel signal of each column as a correlated double sampling (CDS) signal to the ADC 400 based on a control signal from the timing controller 700 .

[0027] The ADC 400 is used to convert the analog CDS signal received from the CDS 300 into a digital signal. In some implementations, the ADC 400 may be implemented as a ramp comparison type ADC. The analog-to-digital converter (ADC) 400 may compare the ramp signal received from the timing controller 700 with the CDS signal received from the CDS 300, and thus may output a comparison signal indicating a comparison result between the ramp signal and the CDS signal. The analog-to-digital converter (ADC) 400 may count the level transition time of the comparison signal in response to the ramp signal received from the timing controller 700, and may output a count value indicating the counted level transition time to the output buffer 500.

[0028] The output buffer 500 may temporarily store the column-based image data provided from the ADC 400 based on the control signal of the timing controller 700. The image data received from the ADC 400 may be temporarily stored in the output buffer 500 based on the control signal of the timing controller 700. The output buffer 500 may provide an interface to compensate for a data rate difference or a transmission rate difference between the image sensing device and other devices.

[0029] The column driver 600 may select a column of the output buffer 500 upon receiving a control signal from the timing controller 700, and sequentially output image data temporarily stored in the selected column of the output buffer 500. In some implementations, upon receiving an address signal from the timing controller 700, the column driver 600 may generate a column selection signal based on the address signal, may select a column of the output buffer 500 using the column selection signal, and may control the image data received from the selected column of the output buffer 500 to be output as an output signal.

[0030] The timing controller 700 may generate signals for controlling the operation of the row driver 200, the ADC 400, the output buffer 500, and the column driver 600. The timing controller 700 may provide the row driver 200, the column driver 600, the ADC 400, and the output buffer 500 with clock signals required for the operation of the corresponding components of the image sensing device, control signals for timing control, and address signals for selecting rows or columns. In some implementations, the timing controller 700 may include a logic control circuit, a phase-locked loop (PLL) circuit, a timing control circuit, a communication interface circuit, and others.

[0031] Figure 2 is an example of an implementation of some implementations based on the disclosed technology with a disclosed pixel isolation structure Figure 1 A schematic diagram of an example of a two-dimensional representation of a group of pixel blocks in a pixel area 100 is shown. Figure 3 Some examples of implementations based on the disclosed technology Figure 2 An enlarged plan view of an example of a pixel isolation structure of area "A" is shown.

[0032] Reference Figure 2 and Figure 3 , the pixel area 100 may include a plurality of pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) continuously arranged along the row direction and the column direction.

[0033] Each pixel block (PB_R, PB_Gr, PB_Gb, PB_B) may include a plurality of unit pixels having the same color and arranged adjacent to each other in an (N×N) array (where N is a natural number of 2 or more). Each pixel block (PB_R, PB_Gr, PB_Gb, PB_B) may include a microlens 144 .

[0034] For example, a pixel block (PB_R) may include four unit pixels (PX_R), and each of the four unit pixels (PX_R) may include a red color filter. Here, the four unit pixels (PX_R) may be arranged adjacent to each other in a (2×2) matrix, and may share one microlens 144. A pixel block (PB_Gr) may include four unit pixels (PX_Gr), and each of the four unit pixels (PX_Gr) may include a green color filter. Here, the four unit pixels (PX_Gr) may be arranged adjacent to each other in a (2×2) matrix, and may share one microlens 144. A sub-pixel block (PB_Gb) may include four unit pixels (PX_Gb), and each of the four unit pixels (PX_Gb) may include a green color filter. Here, the four unit pixels (PX_Gb) may be arranged adjacent to each other in a (2×2) matrix, and may share one microlens 144. The sub-pixel block (PB_B) may include four unit pixels (PX_B), and each of the four unit pixels (PX_B) may include a blue color filter. Here, the four unit pixels (PX_B) may be arranged adjacent to each other in a (2×2) matrix and may share one microlens 144. These pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) may be arranged in a Bayer pattern.

[0035] Each unit pixel (PX_R, PX_Gr, PX_Gb, PX_B) may include a photoelectric conversion element within the substrate, and adjacent photoelectric conversion elements may be physically isolated from each other by a pixel isolation structure. In some implementations, the term "photoelectric conversion element" may be used to indicate any component that can convert incident light into an electrical signal, such as a photodiode. The pixel isolation structure may be built into the pixel region 100, and may be supported by or formed in the substrate to include (1) an outer pixel isolation structure (DTI_O) that is outside each pixel block and separates adjacent pixel blocks, and (2) an inner pixel isolation structure (DTI_I) that is located within the pixel block at the boundary of two adjacent unit pixels within the pixel block. The outer pixel isolation structure (DTI_O) and the inner pixel isolation structure (DTI_I) may include a front deep trench isolation (FDTI) or a rear deep trench isolation (BDTI) structure. For example, the outer pixel isolation structure (DTI_O) and the inner pixel isolation structure (DTI_I) may include an FDTI or BDTI structure formed to penetrate the substrate.

[0036] exist Figure 2In the illustrated implementation example, the outer pixel isolation structure (DTI_O) of the pixel isolation structure in the pixel area 100 may be disposed between adjacent pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B), and may be formed to surround each pixel block (PB_R, PB_Gr, PB_Gb, PB_B). The outer pixel isolation structure (DTI_O) may include a conductive material 116a and an insulating material 116b. For example, the outer pixel isolation structure (DTI_O) may include an insulating material 116b formed at the sidewall of a pixel isolation trench formed by etching a substrate, and a conductive material 116a disposed between the insulating material 116b to gap-fill the pixel isolation trench. The conductive material 116a may include doped (e.g., ion-implanted) polysilicon or a metal material. The insulating material 116b may include a material having a lower light absorption rate than the conductive material 116a. For example, the insulating material 116b may include an oxide layer.

[0037] An intra-pixel isolation structure (DTI_I) may be located within each pixel block (PB_R, PB_Gr, PB_Gb, PB_B) and may be disposed between adjacent unit pixels (PX_R, PX_Gr, PX_Gb, PX_B) to provide some isolation between adjacent unit pixels. Figure 2 In the specific example shown, the inner pixel isolation structure (DTI_I) may include a first pixel isolation structure (DTI1) near the center of each pixel block and a second pixel isolation structure (DTI2) connected to the outer pixel isolation structure (DTI_O).

[0038] The first pixel isolation structure (DTI1) may be disposed in a partial region between adjacent unit pixels (PX_R, PX_Gr, PX_Gb, and PX_B) within each pixel block (PB_R, PB_Gr, PB_Gb, PB_B). For example, the first pixel isolation structure (DTI1) may be disposed to overlap a central portion of a microlens 144 within each pixel block (PB_R, PB_Gr, PB_Gb, PB_B). The central portion of the microlens 144 may include an area located within a predetermined distance from a central point of the microlens 144.

[0039] The first pixel isolation structure (DTI1) may be connected to the second pixel isolation structure (DTI2) and may extend from each second pixel isolation structure (DTI2) to the center of each of the pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B). For example, the first pixel isolation structure (DTI1) disposed between the second pixel isolation structures (DTI2) may be formed in a cross shape including (1) a portion extending in a line shape in a first direction (e.g., an X-axis direction) and (2) a portion extending in a line shape in a second direction (e.g., a Y-axis direction) arranged to intersect each other at the center of each of the pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B).

[0040] The first pixel isolation structure (DTI1) may be formed to have a smaller width (e.g., a shorter length in the minor axis direction) than each second pixel isolation structure (DTI2). For example, the width (W) of the first pixel isolation structure (DTI1) may be less than or equal to twice the thickness of the insulating material 116b of the second pixel isolation structure (DTI2).

[0041] The first pixel isolation structure (DTI1) may include an insulating material 116b. For example, the first pixel isolation structure (DTI1) may include a structure in which a pixel isolation trench formed by etching a substrate is gap-filled with an insulating material 116b without a conductive material 116a.

[0042] The second pixel isolation structure (DTI2) may be disposed in some areas between adjacent unit pixels (PX_R, PX_Gr, PX_Gb, PX_B) within each pixel block (PB_R, PB_Gr, PB_Gb, PB_B). For example, the second pixel isolation structure (DTI2) may be disposed in an area overlapping an edge portion of the microlens 144 within each pixel block (PB_R, PB_Gr, PB_Gb, PB_B). The edge portion of the microlens 144 may refer to an area located outside a central portion of the microlens 144.

[0043] Both ends of each second pixel isolation structure (DTI2) may be connected to the outer pixel isolation structure (DTI_O) and the first pixel isolation structure (DTI1). For example, the second pixel isolation structure (DTI2) may be formed in a line shape extending from the outer pixel isolation structure (DTI_O) to the first pixel isolation structure (DTI1). The second pixel isolation structure (DTI2) may have the same width as the outer pixel isolation structure (DTI_O).

[0044] Each second pixel isolation structure (DTI2) may include a conductive material 116a and an insulating material 116b. For example, the second pixel isolation structure (DTI2) may include the same structure as the outer pixel isolation structure (DTI_O).

[0045] The first pixel isolation structure (DTI1) may be formed when the insulating material 116b of the outer pixel isolation structure (DTI_O) and the insulating material 116b of the second pixel isolation structure (DTI2) are formed. For example, when a trench for forming the first pixel isolation structure (DTI1) (hereinafter referred to as a "first pixel isolation trench") and a trench for forming the second pixel isolation structure (DTI2) (hereinafter referred to as a "second pixel isolation trench") are formed, the width of the first pixel isolation trench may be less than or equal to twice the thickness of the insulating material 116b to be formed in each second pixel isolation structure (DTI2). Therefore, when an insulating layer forming process is performed on the sidewalls of the first pixel isolation trench and the second pixel isolation trench, the first pixel isolation trench may be gap-filled with the insulating material 116b, while the insulating material 116b is formed only at the sidewalls of the second pixel isolation trench.

[0046] For example, the insulating material 116b may be formed by oxidizing the sidewalls of the first pixel isolation trench and the second pixel isolation trench through a thermal treatment process. Alternatively, the insulating material 116b may be formed at the sidewalls of the first pixel isolation trench and the second pixel isolation trench through a deposition process.

[0047] When each second pixel isolation trench is gap-filled with a conductive material 116a while the first pixel isolation trench gap is filled with an insulating material 116b, the conductive material 116a may be included in the second pixel isolation structure (DTI2) but not in the first pixel isolation structure (DTI1), as shown in FIG. Figure 3 The outer pixel isolation structure (DTI_O) may be formed in the same manner as the second pixel isolation structure (DTI2).

[0048] In an image sensing device including a groove structure (such as DTI) formed by etching a substrate, in order to control dark noise that may appear at the interface of the groove, a conductive material may be formed in the groove and a negative voltage may be applied to the corresponding conductive material. However, in an embodiment of the disclosed technology, in a structure in which a plurality of unit pixels (PX_R, PX_Gr, PX_Gb, PX_B) of each of the pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) share one microlens, a large amount of incident light received through the microlens 144 may be concentrated in a central portion of the pixel block (PB_R, PB_Gr, PB_Gb, PB_B). In some implementations, in a structure in which a plurality of unit pixels (PX_R) of a pixel block (PB_R) share one microlens, a large amount of incident light received through the microlens 144 may be concentrated in a central portion of the pixel block (PB_R). In a structure in which a plurality of unit pixels (PX_Gr) of a pixel block (PB_Gr) share one microlens, a large amount of incident light received through the microlens 144 may be concentrated in the central portion of the pixel block (PB_Gr). In a structure in which a plurality of unit pixels (PX_Gb) of a pixel block (PB_Gb) share one microlens, a large amount of incident light received through the microlens 144 may be concentrated in the central portion of the pixel block (PB_Gb). In a structure in which a plurality of unit pixels (PX_B) of a pixel block (PB_B) share one microlens, a large amount of incident light received through the microlens 144 may be concentrated in the central portion of the pixel block (PB_B).

[0049] Therefore, when the pixel isolation structure in the central portion of each pixel block (PB_R, PB_Gr, PB_Gb, PB_B) contains a conductive material, the conductive material absorbs incident light well. As a result, a large amount of incident light may be absorbed into the conductive material without being converted into photocharges (electrons), which deteriorates the use efficiency (quantum efficiency) of the incident light.

[0050] In some implementations of the disclosed technology, a conductive material for controlling dark noise may be included in a pixel isolation structure formed in an area where incident light is not concentrated, and the conductive material may not be formed in a pixel isolation structure formed in an area where incident light is concentrated, thereby increasing the quantum efficiency of the image sensing device.

[0051] Figure 4A is an example of some implementations based on the disclosed technology. Figure 2 A cross-sectional view of an example of a pixel block taken along line X1 - X1 ′ is shown. Figure 4B is an example of some implementations based on the disclosed technology. Figure 2 A cross-sectional view of an example of a pixel block taken along line X2 - X2 ′ is shown. Figure 4C is an example of some implementations based on the disclosed technology. Figure 2 A cross-sectional view of an example of a pixel block taken along line X3 - X3 ′ is shown.

[0052] In some implementations, multiple pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) have the same structure except for the color filters. Therefore, the structure of the pixel blocks (PB_R, PB_Gr, PB_B) can have the same structure as the pixel block (PB_Gb) discussed below.

[0053] Reference FIG. 4A to FIG. 4C , the pixel region 100 may include a substrate layer 110 , a grid structure 120 , a color filter layer 130 , and a lens layer 140 .

[0054] The substrate layer 110 may include a substrate 112, a photoelectric conversion element 114, and a pixel isolation structure (DTI_O, DTI_I). The substrate layer 110 may include a first surface (e.g., a rear surface) and a second surface (e.g., a front surface) facing or opposite to the first surface. In some implementations, light is incident on the first surface, and the grid structure 120, the color filter layer 130, and the lens layer 140 may be formed above the first surface. A pixel transistor (not shown) may be used to read out the photocharge generated by the photoelectric conversion element 114 of the corresponding unit pixel, and may be formed in each unit pixel region of the second surface.

[0055] The substrate 112 may include a semiconductor substrate including single crystal silicon. The substrate 112 may include P-type impurities.

[0056] The photoelectric conversion elements 114 may be formed in the substrate 112 to correspond to the unit pixels, respectively. The photoelectric conversion elements 114 may photoelectrically convert light incident through the lens layer 140 and the color filter layer 130 to generate photocharges. The photoelectric conversion elements 114 may include N-type impurities.

[0057] The pixel isolation structure (DTI_O, DTI_I) may be disposed between adjacent photoelectric conversion elements 114 within the substrate 112 to isolate the photoelectric conversion elements 114 from each other. The pixel isolation structure (DTI_O, DTI_I) may include an outer pixel isolation structure (DTI_O) located outside each of the pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) and an inner pixel isolation structure (DTI_I) located inside each of the pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B). The inner pixel isolation structure (DTI_I) may include a first pixel isolation structure (DTI1) and a second pixel isolation structure (DTI2). The pixel isolation structure (DTI_O, DTI_I) may include an FDTI or BDTI structure that penetrates the substrate 112.

[0058] The outer pixel isolation structure (DTI_O) can be formed between the photoelectric conversion elements 114 of adjacent pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) within the substrate 112, and the inner pixel isolation structure (DTI_I) can be formed between adjacent photoelectric conversion elements 114 within each pixel block (PB_R, PB_Gr, PB_Gb, PB_B).

[0059] The outer pixel isolation structure (DTI_O) and the second pixel isolation structure (DTI2) may include the same structure. For example, the outer pixel isolation structure (DTI_O) and the second pixel isolation structure (DTI2) may include an insulating material 116b formed at the sidewall of the pixel isolation trench, and a conductive material 116a formed between the insulating material 116b to gap-fill the pixel isolation trench.

[0060] In the inner pixel isolation structure (DTI_I), the first pixel isolation structure (DTI1) can be set between the photoelectric conversion elements 114 to overlap with the central portion of the microlens 144, and the second pixel isolation structure (DTI2) can be set between the photoelectric conversion elements 114 to overlap with the edge portion of the microlens 144.

[0061] The first pixel isolation structure (DTI1) may be formed to have a smaller width than the second pixel isolation structure (DTI2). The first pixel isolation structure (DTI1) may have a structure (e.g., a trench) gap-filled with an insulating material 116b in the absence of a conductive material 116a. The first pixel isolation structure (DTI1) may be formed when the insulating material 116b of the outer pixel isolation structure (DTI_O) and the insulating material 116b of the second pixel isolation structure (DTI2) are formed.

[0062] The grid structure 120 may be formed between the color filters on the first surface of the substrate 112 to prevent crosstalk between the color filters. For example, the grid structure 120 may be formed between the color filters of adjacent pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) without being formed in each pixel block (PB_R, PB_Gr, PB_Gb, PB_B). The grid structure 120 may include a metal (e.g., tungsten).

[0063] The color filter layer 130 may include a color filter that filters visible light from light incident through the lens layer 140. FIG. 4A to FIG. 4COnly one color filter is shown, but the color filter layer 130 may also include a red color filter formed in the pixel block (PB_R) and transmitting red visible light having a first wavelength band, a green color filter formed in the pixel block (PB_Gr, PB_Gb) to transmit green visible light having a second wavelength band shorter than the first wavelength band, and a blue color filter formed in the pixel block (PB_B) to transmit blue visible light having a third wavelength band shorter than the second wavelength band. The color filters may be disposed between the grid structures 120. One color filter shared by four unit pixels may be formed in each pixel block (PB_R, PB_Gr, PB_Gb, PB_B).

[0064] The lens layer 140 may include an overcoat 142 and a plurality of microlenses 144. The overcoat 142 may be formed over the color filter layer 130. The overcoat 142 may be used as a planarization layer to flatten an uneven surface (e.g., a surface with steps) caused by the color filter layer 130. The microlenses 144 may be formed over the overcoat 142, may converge incident light, and may transmit the converged light to the substrate layer 110. Each microlens 144 may be formed for each pixel block (PB_R, PB_Gr, PB_Gb, PB_B). The overcoat 142 and the microlenses 144 may be formed of the same material.

[0065] Figure 5 is a schematic diagram illustrating an example of a 2-dimensional representation of a set of pixel blocks based on some implementations of the disclosed technology. Figure 6 Some examples of implementations based on the disclosed technology Figure 5 An enlarged plan view of an example of a pixel isolation structure of region “B” is shown.

[0066] Reference Figure 5 In the embodiment of the disclosed technology, in addition to the first pixel isolation structure formed in the central portion of each pixel block (PB_R, PB_Gr, PB_Gb, PB_B), the pixel block can be Figure 2 and Figure 3 The examples shown have the same structure.

[0067] Reference Figure 5 and Figure 6 The pixel isolation structure (DTI_O, DTI_I′) may include an outer pixel isolation structure (DTI_O) and an inner pixel isolation structure (DTI_I′). The inner pixel isolation structure (DTI_I′) may include a first pixel isolation structure (DTI1′) and a second pixel isolation structure (DTI2).

[0068] The first pixel isolation structure (DTI1′) may include an island-type pixel isolation structure positioned to overlap the central portion of the microlens 144 in each of the pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B). The first pixel isolation structure (DTI1′) may be arranged to be spaced apart from each other by a predetermined distance in a first direction (e.g., X-axis direction) and a second direction (e.g., Y-axis direction) between the second pixel isolation structures (DTI2). Figure 5 The arrangement of three first pixel isolation structures (DTI1′) in each of the first direction and the second direction is shown as an example, but other implementations are also possible. Figure 5 Each 2-D representation of the first pixel isolation structure (DTI1') is shown to have a square shape, but other implementations are possible. For example, the first pixel isolation structure (DTI1') may be formed in a rectangular, diamond, or circular shape.

[0069] Each first pixel isolation structure (DTI1′) may include a structure in which a pixel isolation trench formed to penetrate the substrate is gap-filled with an insulating material 116b in the absence of a conductive material 116a. When the insulating material 116b of the outer pixel isolation structure (DTI_O) and the insulating material 116b of the second pixel isolation structure (DTI2) are formed, the insulating material 116b of the first pixel isolation structure (DTI1′) may be formed. The pixel isolation trench (hereinafter referred to as a “third pixel isolation trench”) in which the first pixel isolation structure (DTI1′) is formed may have a predetermined size, so that when the insulating material 116b of the outer pixel isolation structure (DTI_O) and the insulating material 116b of the second pixel isolation structure (DTI2) are formed, each third pixel isolation trench may be gap-filled with an insulating material 116b of a predetermined size. For example, the length of each third pixel isolation trench in the first direction or the second direction may be less than or equal to twice the thickness of the insulating material 116b to be formed in the second pixel isolation structure (DTI2).

[0070] In an image sensing device including a trench structure (such as DTI) formed by etching a substrate, a passivation region formed by implanting ions (e.g., P-type ions) into a sidewall of the trench may be formed to reduce dark noise that may occur at an interface of the trench. The distance between each first pixel isolation structure (DTI1′) and each second pixel isolation structure (DTI2) adjacent to the first pixel isolation structure (DTI1′) and the distance between first pixel isolation structures (DTI1′) adjacent to each other may be less than or equal to the length of the passivation region into which ions for reducing dark noise are implanted (e.g., Figure 6For example, each first pixel isolation structure (DTI1′) and each second pixel isolation structure (DTI2) may be spaced apart from each other by a predetermined distance, which allows the passivation regions formed at the sidewalls of the third pixel isolation trench and the second pixel isolation trench to be connected to each other by a plasma doping (PLAD) process. Therefore, the unit pixels (PX_R, PX_Gr, PX_Gb, PX_B) may be surrounded by their ion implantation regions (e.g., passivation regions), so that the unit pixels (PX_R, PX_Gr, PX_Gb, PX_B) may be isolated from each other.

[0071] 7A to 7E is a schematic diagram illustrating an example of a two-dimensional representation of an inter-pixel isolation structure based on some implementations of the disclosed technology.

[0072] Reference 7A to 7E The inner pixel isolation structure formed in each of the pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) may be formed in a shape in which a pixel isolation structure including a conductive material and a pixel isolation structure not including a conductive material are combined with each other in various ways. 7A to 7E , only the differences from the above discussion are described. In addition, in the inner pixel isolation structure that does not include a conductive material, for the convenience of description, the pixel isolation structure having a cross shape will be collectively referred to as the "first pixel isolation structure (DTI1)" hereinafter, and for the convenience of description, the pixel isolation structure having an island-type square shape will be collectively referred to as the "first pixel isolation structure (DTI1')" hereinafter. In addition, the inner pixel isolation structure that includes a conductive material will be collectively referred to as the "second pixel isolation structure (DTI2)" hereinafter.

[0073] Reference Fig. 7A , the inner pixel isolation structure may include a first pixel isolation structure (DTI1) and a second pixel isolation structure (DTI2). Figure 2 As shown, the first pixel isolation structure (DTI1) may be formed in a cross shape at the central portion of each of the pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) so as to overlap with the central portion of the microlens 144. The first pixel isolation structure (DTI1) may be formed to be spaced apart from the second pixel isolation structure (DTI2). In some implementations, as described above, the first pixel isolation structure (DTI1) and each second pixel isolation structure (DTI2) may be formed to be spaced apart from each other by a predetermined distance that allows ion implantation regions formed by ions implanted via a PLAD process to contact each other.

[0074] Reference Figure 7B, the inner pixel isolation structure may include only the first pixel isolation structure (DTI1) formed in a cross shape. For example, the first pixel isolation structure (DTI1) may be formed in a cross shape including a portion extending in a line shape in the first direction and a portion extending in a line shape in the second direction arranged to intersect each other at the center of each of the pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B), so that the first pixel isolation structure (DTI1) formed in the cross shape may be formed to overlap not only the central portion of the microlens 144 but also the edge portion of the microlens 144.

[0075] The first pixel isolation structure (DTI1) may be formed to be spaced apart from the outer pixel isolation structure (DTI_O) by a certain distance. In some implementations, as described above, the first pixel isolation structure (DTI1) and the outer pixel isolation structure (DTI_O) may be formed to be spaced apart from each other by a predetermined distance, which allows ion implantation regions formed by ions implanted by the PLAD process to contact each other.

[0076] Reference Figure 7C ,and Figure 7B Unlike the structure of , the inner pixel isolation structure may be formed such that the first pixel isolation structure (DTI1) is connected to the outer pixel isolation structure (DTI_O).

[0077] Reference Fig.7D , the inner pixel isolation structure may include only island-type first pixel isolation structures (DTI1′) spaced apart from each other by a predetermined distance. All first pixel isolation structures (DTI1′) may have the same size. The first pixel isolation structure (DTI1′) and the outer pixel isolation structure (DTI_O) may be formed to be spaced apart from each other by a predetermined distance, which allows ion implantation regions formed by ions implanted by the PLAD process to contact each other.

[0078] Reference Fig. 7E , the inner pixel isolation structure may be formed in a shape in which first pixel isolation structures (DTI1, DTI1') having different structures are combined. Fig. 7E, the inner pixel isolation structure may be formed in a form in which first pixel isolation structures (DTI1, DTI1′) having different structures are combined. For example, in each of the pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B), a cross-shaped first pixel isolation structure (DTI1) may be formed in a region overlapping with a central portion of the microlens 144, and an island-type first pixel isolation structure (DTI1′) may be formed in a region overlapping with an edge portion of the microlens 144. In this case, the first pixel isolation structure (DTI1, DTI1′) and the outer pixel isolation structure (DTI_O) may be formed to be spaced apart from each other by a predetermined distance that allows ion implantation regions formed by ions implanted via a PLAD process to contact each other.

[0079] It is apparent from the above description that an image sensing device based on some implementations of the disclosed technology can increase the efficiency of using incident light by improving the pixel isolation structure.

[0080] Embodiments of the disclosed technology can provide various effects that can be directly or indirectly recognized through the above-mentioned patent documents.

[0081] Although a number of exemplary embodiments have been described, it should be understood that various modifications or enhancements of the disclosed embodiments and other embodiments may be designed based on what is described and / or illustrated in this patent document.

[0082] Priority Claim and Cross-Reference to Related Applications

[0083] This patent document claims priority to and the benefits of Korean Patent Application No. 10-2023-0131701, filed on October 4, 2023, the entire contents of which are incorporated by reference as a part of the disclosure of this patent document.

Claims

1. An image sensing device, comprising: a plurality of pixel blocks arranged in a first direction and in a second direction perpendicular to the first direction, each pixel block including a microlens and a plurality of adjacent unit pixels receiving incident light via the microlens, and each unit pixel being configured to generate an electrical signal in response to incident light received in the unit pixel; an outer pixel isolation structure, the outer pixel isolation structure being disposed between adjacent pixel blocks among the plurality of pixel blocks so as to isolate the adjacent pixel blocks from each other; as well as an inner pixel isolation structure, wherein the inner pixel isolation structure is disposed between adjacent unit pixels among the unit pixels in each pixel block so as to isolate the adjacent unit pixels from each other, The inner pixel isolation structure includes a first pixel isolation structure having a structure different from that of the outer pixel isolation structure.

2. The image sensing device according to claim 1, wherein: The first pixel isolation structure is disposed to overlap a central portion of the microlens.

3. The image sensing device according to claim 2, wherein: The first pixel isolation structure comprises: A cross-shaped structure including a first portion extending in a line shape in the first direction and a second portion extending in a line shape in the second direction, wherein the first portion and the second portion are arranged to cross each other at a central portion of each of the pixel blocks.

4. The image sensing device according to claim 3, wherein: The inner pixel isolation structure further includes: A second pixel isolation structure has the same structure as the outer pixel isolation structure and extends in a line shape between the outer pixel isolation structure and the first pixel isolation structure.

5. The image sensing device according to claim 4, wherein: The second pixel isolation structure is connected to the outer pixel isolation structure and the first pixel isolation structure.

6. The image sensing device according to claim 4, wherein: The second pixel isolation structure is isolated from the first pixel isolation structure and connected to the outer pixel isolation structure.

7. The image sensing device according to claim 4, wherein: Each of the first portion and the second portion extends with a smaller width than the second pixel isolation structure.

8. The image sensing device according to claim 7, wherein: The second pixel isolation structure comprises: an insulating material formed at a sidewall of the pixel isolation trench; and A conductive material is disposed between the insulating materials to fill the pixel isolation trench with a gap, Wherein, each of the first portion and the second portion is formed to have a width less than or equal to twice the thickness of the insulating material.

9. The image sensing device according to claim 3, wherein: The first portion and the second portion extend to a region overlapping an edge portion of the microlens.

10. The image sensing device according to claim 9, wherein: The first portion and the second portion are connected to the outer pixel isolation structure.

11. The image sensing device according to claim 9, wherein: The first portion and the second portion are isolated from the outer pixel isolation structure.

12. The image sensing device according to claim 2, wherein: The first pixel isolation structure comprises: A plurality of island type pixel isolation structures are arranged to be spaced apart from each other by a predetermined distance in the first direction and the second direction.

13. The image sensing device according to claim 12, further comprising: A second pixel isolation structure has the same structure as the outer pixel isolation structure and extends in a line shape between the outer pixel isolation structure and the first pixel isolation structure.

14. The image sensing device according to claim 12, wherein: The plurality of island type pixel isolation structures are arranged to extend to a region overlapping an edge portion of the microlens.

15. The image sensing device according to claim 2, wherein: The first pixel isolation structure comprises: a cross-shaped structure in a region overlapping the central portion of the microlens, wherein the cross-shaped structure includes a first portion extending in a line shape in the first direction and a second portion extending in a line shape in the second direction, the first portion and the second portion crossing each other; and A plurality of island type pixel isolation structures are arranged to be spaced apart from each other by a predetermined distance in a region overlapping an edge portion of the microlens.

16. The image sensing device according to claim 1, wherein: The outer pixel isolation structure includes a structure having a pixel isolation trench gap-filled with an insulating material and a conductive material, and The first pixel isolation structure includes a structure having a pixel isolation trench gap-filled with the insulating material in the absence of the conductive material.

17. The image sensing device according to claim 16, wherein: The conductive material includes at least one of polysilicon or a metal material, and The insulating material includes an oxide layer.

18. An image sensing device, comprising: a plurality of unit pixels, the plurality of unit pixels including the same color filter for filtering incident light to be detected by the unit pixels and sharing a microlens for guiding the incident light into the unit pixels, each of the plurality of unit pixels including a photoelectric conversion element for converting received incident light into an electrical signal representing light received at the unit pixel; as well as a pixel isolation structure, wherein the pixel isolation structure is arranged between the photoelectric conversion elements of the plurality of unit pixels, Wherein, the pixel isolation structure comprises: a first pixel isolation structure, the first pixel isolation structure being arranged to overlap with a central portion of the microlens; and A second pixel isolation structure is disposed to overlap an edge portion of the microlens and has a structure different from that of the first pixel isolation structure.

19. The image sensing device according to claim 18, wherein: The second pixel isolation structure comprises: an insulating material formed at a sidewall of the second pixel isolation trench; and A conductive material, wherein the conductive material is disposed between the insulating materials to fill the second pixel isolation trench with a gap, The first pixel isolation structure includes a structure in which the first pixel isolation trench is gap-filled with the insulating material in the absence of the conductive material.

20. The image sensing device according to claim 19, wherein: The conductive material includes at least one of polysilicon or a metal material, and The insulating material includes an oxide layer.

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