Electronic device, endoscope, and method for manufacturing electronic device

Abstract

An imaging device (1) is provided with: a three-dimensional circuit device (MID) (2) having a first region (A1) in which two conductor patterns (41, 42) are provided on the surface, the two conductor patterns (41, 42) being arranged in parallel at a first interval and having substantially the same width (W40); resist patterns (51, 52), which are a plurality of solder-non-infiltrated parts, which are disposed substantially parallel to each other at a second interval (D50) in the first region (A1) and substantially perpendicular to the two conductor patterns (41, 42), and which have no solder adhered thereto; and an electronic component (60) having two external electrodes (69A, 69B) soldered to each of the two conductor patterns (41, 42) between the plurality of solder non-infiltrated portions, i.e., the resist patterns (51, 52).

Description

Technical Field

[0001] The present invention relates to an electronic device obtained by mounting electronic components on a three-dimensional circuit device, an endoscope having an electronic device obtained by mounting electronic components on a three-dimensional circuit device, and a method for manufacturing an electronic device obtained by mounting electronic components on a three-dimensional circuit device. Background Art

[0002] In recent years, three-dimensional circuit devices, such as molded circuit devices (MID: Molded Interconnect Device), have been used to achieve miniaturization and high functionality of electronic devices.

[0003] Japanese Patent Publication No. 2017-23234 discloses a camera unit of an endoscope using a special-shaped circuit substrate as a three-dimensional circuit device. The camera unit includes an imager, a flat wiring board on which electronic components are mounted, and a special-shaped circuit substrate. A cable is connected to a pad of the special-shaped circuit substrate.

[0004] When a chip-type electronic component is soldered to a pad of a wiring board, a solder resist pattern is provided to cover the periphery of the pad in order to prevent a short circuit between electrodes and outflow of solder.

[0005] International Publication No. 2009 / 090896 discloses an electronic component in which an elongated insulating film (solder resist pattern) is disposed on a conductive pattern formed on a main surface of a flat wiring board.

[0006] The resist pattern is formed by patterning a spin-coated resist or a film resist using a photolithography method. The resist pattern is sometimes formed by screen printing a resist.

[0007] However, it is not easy to provide a resist pattern on the surface of a three-dimensional circuit device. In other words, unlike a flat wiring board, it is difficult to perform spin coating or screen printing on the surface of a three-dimensional circuit device. In addition, it is also difficult to pattern the resist on the surface of a three-dimensional circuit device using photolithography. In addition, it is particularly difficult to provide a resist pattern in a small area. In addition, it is difficult to surface-mount electronic components on such a three-dimensional circuit device.

[0008] Prior art literature

[0009] Patent Literature

[0010] Patent Document 1: Japanese Patent Application Publication No. 2017-23234

[0011] Patent Document 2: International Publication No. 2009 / 090896 Summary of the invention

[0012] Problems to be solved by the invention

[0013] The object of the present invention is to provide an electronic device obtained by mounting an electronic component surface on a three-dimensional circuit device, an endoscope having an electronic device obtained by mounting an electronic component surface on a three-dimensional circuit device, and a method for manufacturing an electronic device obtained by mounting an electronic component surface on a three-dimensional circuit device.

[0014] Disclosure of the Invention

[0015] Means for solving problems

[0016] An electronic device of one embodiment of the present invention comprises: a three-dimensional circuit device, which has a first area, in which two conductor patterns are arranged on the surface, the two conductor patterns are arranged in parallel at a first interval and the widths of the two conductor patterns are approximately the same; and a plurality of solder non-wettable portions to which solder is not attached, which are arranged in the first area approximately parallel at a second interval and approximately perpendicular to the two conductor patterns; and an electronic component, which has two external electrodes, and the two external electrodes are respectively soldered to the two conductor patterns between the plurality of solder non-wettable portions.

[0017] An endoscope of one embodiment of the present invention includes an electronic device, which has: a three-dimensional circuit device, which has a first area, in which two conductor patterns are provided on the surface, the two conductor patterns are arranged in parallel at a first interval and the widths of the two conductor patterns are approximately the same; and a plurality of solder non-wettable portions to which solder is not attached, which are arranged in the first area approximately parallel at a second interval and approximately perpendicular to the two conductor patterns; and an electronic component, which has two external electrodes, and the two external electrodes are respectively soldered to the two conductor patterns between the plurality of solder non-wettable portions.

[0018] A method for manufacturing an electronic device according to one embodiment of the present invention comprises: a three-dimensional circuit device manufacturing step of manufacturing a three-dimensional circuit device having a first area, in which two conductor patterns are provided on a surface, the two conductor patterns are arranged in parallel at a first interval and the widths of the two conductor patterns are substantially the same; a solder non-wettable portion arranging step of arranging a plurality of solder non-wettable portions in the first area, the plurality of solder non-wettable portions are arranged in parallel at a second interval and are arranged substantially perpendicular to the two conductor patterns; and a joining step of respectively soldering two electrodes of a sheet-like electronic component to each of the two conductor patterns between the plurality of solder non-wettable portions.

[0019] Effects of the Invention

[0020] According to an embodiment of the present invention, there can be provided an electronic device obtained by surface-mounting an electronic component on a three-dimensional circuit device, an endoscope having an electronic device obtained by surface-mounting an electronic component on a three-dimensional circuit device, and a method for manufacturing an electronic device obtained by surface-mounting an electronic component on a three-dimensional circuit device. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a perspective view of the electronic device according to the first embodiment.

[0022] Figure 2 It is a perspective view of the electronic device according to the first embodiment.

[0023] Figure 3 It is along Figure 1 Cross-sectional view along line III-III.

[0024] Figure 4 This is a partially enlarged view of the electronic device according to the first embodiment.

[0025] Figure 5 This is a flowchart of the method for manufacturing the electronic device according to the first embodiment.

[0026] Figure 6 It is a partially enlarged view of the MID of the electronic device according to the first embodiment.

[0027] Fig. 7A This is a partially enlarged view for explaining the method for manufacturing the electronic device according to the first embodiment.

[0028] Figure 7B This is a partially enlarged view for explaining the method for manufacturing the electronic device according to the first embodiment.

[0029] Figure 8 This is a partially enlarged view of the electronic device according to the first embodiment.

[0030] Fig. 9 This is a partially enlarged view of an electronic device according to a modified example of the first embodiment.

[0031] Fig.10 This is a partially enlarged view of an electronic device according to a modified example of the first embodiment.

[0032] Fig.11 This is a partially enlarged view of an electronic device according to a modified example of the first embodiment.

[0033] Fig.12 It is a perspective view of an endoscope according to a second embodiment. DETAILED DESCRIPTION

[0034] Hereinafter, embodiments of the present invention will be described using the drawings.

[0035] In addition, the drawings based on the embodiments are schematic. The relationship between the thickness and width of each part, the ratio of the thickness of each part, etc. are different from reality. The drawings also include parts where the relationship and ratio of each other's dimensions are different.

[0036] <First Embodiment>

[0037] Figure 1-Figure 4 The electronic device of this embodiment is an image pickup device 1 having a three-dimensional circuit device 2 as a MID (Molded Interconnect Device), a plurality of resist patterns 50 , chip capacitors 60 ( 61 , 62 ) as electronic components, and a camera unit 10 .

[0038] The three-dimensional circuit device 2 is a three-dimensional (stereoscopic) molded circuit device with wiring on the surface of the injection-molded three-dimensional molded product. By using the three-dimensional circuit device 2, unlike the conventional flat wiring board, the shape has a function, and wiring can be formed on an inclined surface, a vertical surface, a curved surface, and a through hole.

[0039] The three-dimensional circuit device 2 has a complex three-dimensional structure. Specifically, the three-dimensional circuit device 2 has a convex region 3 and an assembly region 4. The convex region 3 forms a cavity H10 which is a hole for accommodating the camera unit 10.

[0040] The gap between the camera unit 10 and the wall surface of the cavity H10 inside the cavity H10 is filled with a sealing resin 20. The camera unit 10 includes an imager 11 and an optical unit 12. The optical unit 12 includes a plurality of lenses, etc. The imager 11 is an image sensor such as a CCD that converts the subject image focused by the optical unit 12 into an electrical signal. The imager 11 has an external electrode 11A that transmits and receives electrical signals.

[0041] The pad 11B on the bottom surface H10SB of the cavity H10 of the three-dimensional circuit device 2 is bonded to the external electrode 11A of the camera unit 10 using, for example, a solder ball 19. The pad 11B is connected to the connection pad of the conductor pattern 40 on the surface 40SA on the opposite side of the bottom surface 10SB via a wiring (not shown). The conductor pattern 40 has, for example, a pad 49 bonded to a signal cable (not shown).

[0042] In order to stabilize the voltage, a bypass capacitor is provided in the camera unit 10. In order to reduce the impedance of the wiring between the camera unit 10 and the camera unit 10 in the camera unit 10 driven at a high frequency, it is preferable to connect a bypass capacitor near the camera unit 10.

[0043] In the camera unit 10, a chip capacitor 60 (61, 62) as a chip electronic component is mounted on the surface 40SA of the three-dimensional circuit device 2. The chip capacitor 60 has two electrodes 69A and 69B. The chip capacitor 61 is 0402 size (length 0.4mm, width 0.2mm). The chip capacitor 62 is 0603 size (length 0.6mm, width 0.3mm).

[0044] In order to prevent the diffusion of solder, two elongated solder resist patterns 50 (hereinafter referred to as "resist patterns 50") are provided, and the solder resist patterns 50 cover the surroundings of the pads of the conductor pattern 40 that is the bonding area with the chip capacitor 60. In other words, the area of ​​the conductor pattern 40 sandwiched between the two resist patterns 50 is the pad as the bonding area.

[0045] Hereinafter, the region where the chip capacitor 61 is mounted is referred to as a first region A1. The region where the chip capacitor 62 is mounted is referred to as a second region A2. Hereinafter, the first region A1 will be described.

[0046] In the first area A1, two conductor patterns 41 and 42 are arranged in parallel at a predetermined first interval. The conductor patterns 41 and 42 have the same width.

[0047] In the first area A1, two resist patterns 50 are arranged in parallel at a predetermined second interval and perpendicular to the two conductor patterns 40. Through the two resist patterns 50, a portion of the conductor patterns 41 and 42 becomes two pads to which the two electrodes 69A and 69B of the chip capacitor 61 are soldered. The electrode 69A is bonded to the pad of the conductor pattern 41. The external electrode 69B is bonded to the pad of the conductor pattern 42.

[0048] Here, the width W40 of the two conductor patterns 41, 42 is the same, but it also includes conductor patterns 41, 42 of approximately the same width with a slight error (for example, 90%-110% of the average value of the two). The two resist patterns 51, 52 are parallel, but it also includes two resist patterns 51, 52 that are approximately parallel but not completely parallel and have a slight error (for example, the crossing angle is less than 10 degrees). The two resist patterns 50 are perpendicular to the two conductor patterns 40, but it also includes not being completely perpendicular (crossing angle 90 degrees) but being approximately perpendicular with a slight error (for example, crossing angle 80 degrees-100 degrees). Each has a small size and is manufactured by fine processing, so errors are prone to occur, so it is as described above in the present invention.

[0049] As described later, the size and interval of two pads for bonding the chip capacitor 61 of a predetermined size need to be within a predetermined range. That is, the two conductor patterns 40 are designed to form two pads for bonding the chip capacitor 61 in the first area A1.

[0050] As already described, it is not easy to arrange a resist pattern on the surface 40SA of the three-dimensional circuit device 2 having a complicated shape. In addition, the surface 40SA of the three-dimensional circuit device 2 is extremely small, less than 100 mm. 2 (For example 3mm×2.5mm).

[0051] However, as described later, the resist pattern 50 is arranged by using a dispenser. Therefore, the resist pattern 50 is, for example, a thin and long bank with a height of 25 μm. "Slim" means, for example, a shape whose length exceeds 5 times the width. The conductor patterns 41 and 42 need not be parallel in the entire range of the first area A1 as long as they are parallel in the area sandwiched by the resist patterns 51 and 52.

[0052] Before configuring the chip capacitor 61, when the solder 69 is arranged on the conductor patterns 41 and 42, the solder 69 is sometimes applied to the resist pattern 50. The solder wettability (the ease of solder fusion) of the resist pattern 50 is poor. Therefore, the solder 69 on the resist pattern 50 is repelled during reflow and moves to the conductor pattern 40. The solder 69 wets and spreads only on the conductor patterns 41 and 42, so that a solder non-wetting area (solder-non-wetting area) to which the solder 69 is not attached is formed in the conductor pattern 40 in the first region. The resist pattern 50 is a solder non-wetting area.

[0053] Solder wettability is measured by the "solder tank balance method" specified in Japanese Industrial Standard Z3198-4, for example. A region with a long zero crossing time (the time until the contact angle reaches 90 degrees after immersion) has poorer solder wettability than a region with a short zero crossing time.

[0054] In the state of the imaging device 1 as a finished product, it cannot be directly confirmed that the resist pattern 50 is disposed using a dispenser.

[0055] The imaging device 1 has high performance because the chip capacitor 60 is disposed on the surface 40SA of the three-dimensional circuit device 2 having short wiring between the three-dimensional circuit device 2 and the camera unit 10 .

[0056] Furthermore, in the imaging device 1, two chip capacitors 61 and 62 of different sizes are mounted on the same surface 40SA. However, as long as the electronic component has two electrodes, it may be, for example, a chip inductor or a chip coil. However, electronic components having more than three electrodes are not mounted in the area A1. More than three types of electronic components having "two electrodes" may also be mounted in the area A1. A plurality of electronic components may also be mounted on the surface of the three-dimensional circuit device 2 other than the area A1.

[0057] <Method for manufacturing electronic device>

[0058] according to Figure 5 The flowchart of FIG. 1 illustrates a method for manufacturing the imaging device 1 .

[0059] <Step S10> Three-dimensional Circuit Device Manufacturing Process

[0060] The molded body is produced by injection molding of injecting MID resin into a mold (not shown) having the shape of the three-dimensional circuit device 2. By irradiating the surface of the molded body with laser, a region having catalytic activity of chemical plating is formed. Furthermore, a wiring (not shown) is formed to connect the pad 11B of the bottom surface H10SB of the cavity H10 to the conductor pattern 40. Thereafter, by performing chemical plating treatment, the molded body becomes a three-dimensional circuit device (three-dimensional circuit device 2) having a plurality of conductor patterns 40 arranged on the surface. The conductor pattern 40 is, for example, provided with a nickel plated film on the copper layer and a gold plated film on the outermost surface.

[0061] like Figure 6 As shown, a plurality of conductor patterns 40 are disposed on the surface 40SA of the three-dimensional circuit device 2. A region where two conductor patterns 41 and 42 of the plurality of conductor patterns 40 have substantially the same width and are disposed in parallel is referred to as a first region A1. Fig. 7A yes Figure 6 The first area A1 shown. Fig. 7A As shown, the conductor patterns 41 and 42 are arranged in parallel with a first distance D40. The conductor patterns 41 and 42 have the same width W40.

[0062] <Step S20> Resist Preparation Process

[0063] like Figure 7B As shown, in the first area A1, two elongated resist patterns 50 (51, 52) are arranged in parallel with a second interval D50 using a dispenser. In this embodiment, the width W50 of the resist pattern 51 is the same as the width W50 of the resist pattern 52, and the length L50 of the resist pattern 51 is the same as the length L50 of the resist pattern 52.

[0064] The length L50 of the resist pattern 50 exceeds the length L60 (0.4 mm in the case of 0402 size) of the mounted chip capacitor 60 .

[0065] Unlike the resist pattern patterned by photolithography, the two resist patterns 50 arranged by the dispenser may have their arrangement start positions (positions of one end of the resist pattern 50) deviate from the desired positions due to the positional accuracy of the dispenser. Considering the positional deviation, the length L50 is preferably greater than 1.2 times the length L60. The upper limit of the length L50 is, for example, less than 3 times the length L60.

[0066] If the resist pattern 50 is frame-shaped, the areas of the two pads may be different if there is a positional shift in the length L60 direction. However, the areas of the two pads formed by the two elongated resist patterns 51 and 52 are substantially the same, and even if there is a positional shift in the length L60 direction of the resist patterns 51 and 52, the areas are the same as if there is no positional shift.

[0067] <Step S30> Sheet Component Bonding Step

[0068] Although not shown in the figure, solder 69 ( 69A, 69B) is placed on the two conductor patterns 41 , 42 between the two resist patterns 51 , 52 using a dispenser.

[0069] like Fig. 9 As shown, the chip capacitor 60 is arranged at a predetermined position in the first area A1.

[0070] For example, the three-dimensional circuit device 2 is heated to a temperature at which the solder melts using a reflow furnace. When the three-dimensional circuit device 2 returns to room temperature, the two electrodes 69A and 69B of the chip capacitor 60 are soldered.

[0071] Although not described, the chip capacitor 62 is also bonded simultaneously with the chip capacitor 61 in the second region A2.

[0072] <Step S40> Camera Unit Bonding Process

[0073] For example, the camera unit 10 is manufactured by cutting a stacked wafer obtained by bonding imager chips to a plurality of optical wafers. Solder balls 19 are provided on each of the plurality of external electrodes 11A of the camera unit 10. Instead of the solder balls 19, solder plating films or solder paste may be provided on the external electrodes 11A.

[0074] The camera unit 10 is accommodated in the cavity H10 of the three-dimensional circuit device 2. Then, the three-dimensional circuit device 2 is heated to a temperature at which the solder ball 19 melts, for example, using a reflow furnace. The solder ball 19 spreads to the pad formed by the resist pattern 50. In other words, the width of the pad to be soldered to the external electrode is the width W40 of the conductor pattern 40, and the length of the pad is the interval D50 between the two resist patterns 50. The pad is roughly rectangular, and its area is (W40×D50).

[0075] When the three-dimensional circuit device 2 returns to room temperature, the external electrode 11A of the camera unit 10 is soldered to the pad 11B of the bottom surface H10SB of the cavity H10, thereby completing the image pickup apparatus 1.

[0076] For stable bonding, in the region A1 where the 0402 size chip capacitor 61 is arranged, the first distance D40 between the conductor patterns 41 and 42 is preferably 0.16 mm to 0.20 mm, and the widths W41 and 42 of the conductor patterns 40 are preferably 0.12 mm to 0.18 mm. The second distance D50 between the resist patterns 51 and 52 is preferably greater than 0.20 mm and less than 0.30 mm.

[0077] In the region B1 where the 0603 size chip capacitor 62 is arranged, the first distance D40 between the conductor patterns 41 and 42 is preferably 0.20 mm to 0.30 mm, and the width W40 between the conductor patterns 41 and 42 is preferably 0.20 mm to 0.35 mm. The second distance D50 between the resist patterns 51 and 52 is preferably greater than 0.30 mm and less than 0.40 mm.

[0078] As described above, it is preferred that the width W40 of the conductor pattern 40 exceeds 70% of the first interval D40 of the conductor pattern 40 and is less than 130% of the first interval D40 of the conductor pattern 40, and the first interval D40 of the conductor pattern 40 exceeds 100% of the second interval D50 of the resist pattern 50 and is less than 180% of the second interval D50 of the resist pattern 50. In addition, the second interval D50 of the resist pattern 50 is preferably greater than 0.20 mm and less than 0.40 mm.

[0079] The width W50 of the resist pattern 50 applied using the dispenser is larger than 0.01 mm and smaller than 0.5 mm.

[0080] It is not easy to arrange a resist pattern on the small surface 40SA of the complex-shaped three-dimensional circuit device 2. However, it is not difficult to arrange two linear resist patterns 50 using a dispenser. In this embodiment, the conductor pattern 40 between the two resist patterns 50 can be used as a pad for soldering the chip capacitor 60.

[0081] As already described, the two pads defined by the two substantially parallel resist patterns 50 intersecting the two parallel conductor patterns 41 and 42 have the same area even if there is a positional shift. When the solder melts, the solder 69 spreads to the two pads in the same manner. Since the interfacial tension of the molten solder applied to the two electrodes 69A and 69B of the chip capacitor 60 is the same, poor bonding or reduced bonding strength such as the Manhattan phenomenon does not occur. Therefore, according to this manufacturing method, it is easy to solder the chip capacitor 60 to the three-dimensional circuit device 2.

[0082] <Modification of First Embodiment>

[0083] The imaging devices 1A to 1C of the modified examples of the first embodiment are similar to the imaging device 1 of the first embodiment and have the same effects. Therefore, in the following description, the same reference numerals are given to the components having the same functions as the imaging device 1 and the description thereof is omitted.

[0084] <Modification 1>

[0085] like Fig. 9 As shown, in the imaging device 1A of this modification, the width W51 of the resist pattern 51 of the stereoscopic circuit device 2A is different from the width W52 of the resist pattern 52. That is, the width W50 of the two resist patterns 50 may be different. In addition, although not shown, the length L50 of the two resist patterns 50 may also be different.

[0086] <Modification 2>

[0087] like Fig.10 As shown, in the imaging device 1B of the present modification, the resist pattern 50 of the three-dimensional circuit device 2B is inclined at an angle θ with respect to the conductor pattern 40 .

[0088] That is, the two resist patterns 50 are preferably substantially parallel and perpendicular to the conductor pattern 40 (θ=0), but may be substantially inclined (for example, θ<10 degrees).

[0089] Although not shown, the two conductor patterns 41 and 42 may be substantially parallel to each other. For example, the angle θ between the conductor pattern 41 and the conductor pattern 42 may be less than 10 degrees.

[0090] However, it is preferred that the two pads have substantially the same shape and substantially the same area. For example, the area of ​​the other pad is more than 90% of the area of ​​the one pad and less than 110% of the area of ​​the one pad.

[0091] <Variation 3>

[0092] like Fig.11 As shown, in the imaging device 1C of this modification, in the three-dimensional circuit device 2C, the conductor pattern 40 in the first area A1 has four peeling areas 59 whose solder wettability is lower than that of the surrounding areas. The gold plating on the surface of the peeling area 59 is peeled off using a laser.

[0093] The peeling region 59 with poor solder wettability has the same effect as the resist pattern 50. That is, when the electronic component 60 is soldered, the region 59 with poor solder wettability becomes a solder non-wettable portion to which the solder 69 is not attached.

[0094] The shape and the like of the peeling region 59 having poor solder wettability are preferably the same as the shape and the like of the resist pattern 50 .

[0095] The imaging device 1C has a higher degree of freedom in manufacturing than the imaging device 1 and the like.

[0096] <Second Embodiment>

[0097] Fig.12 The endoscope 9 of the present embodiment shown in the figure has: a rigid front end portion 9A equipped with an imaging device 1 (1A-1C); a bendable bending portion 9B connected to the base end of the rigid front end portion 9A; and an elongated soft portion 9C connected to the base end of the bending portion 9B. The bending portion 9B is bent by operating the operating portion 9C. The rigid front end portion 9A, the bending portion 9B, and the soft portion 9C are insertion portions inserted into the body. A universal cable 9E extending from the operating portion 9C is connected to a processor, etc., not shown.

[0098] The endoscope 9 has the imaging device 1 (1A to 1C) and thus has high performance.

[0099] In addition, the endoscope 9 is a flexible endoscope for medical use, but the endoscope of other embodiments may be an industrial endoscope or a rigid endoscope having a rigid straight tube instead of the flexible portion 9C.

[0100] In addition, the three-dimensional circuit device is not limited to MID. For example, the three-dimensional circuit device can also be produced by processing based on a 3D printer or cutting processing. The material of the three-dimensional circuit device is not limited to resin, and ceramic or glass epoxy resin can also be used. In addition, the electronic device is not limited to the camera device.

[0101] The present invention is not limited to the above-described embodiments and the like, and various changes and modifications can be made without departing from the spirit and scope of the present invention.

[0102] Description of Reference Numerals

[0103] 1. 1A-1C... Camera device

[0104] 2. 2A-2C...3D circuit devices

[0105] 9. Endoscope

[0106] 10···Camera unit

[0107] 11···Imager

[0108] 12···Optical unit

[0109] 19···Solder ball

[0110] 20···Sealing resin

[0111] 40(41,42)…conductor pattern

[0112] 49···Second end

[0113] 50(51,52)…Solder resist pattern

[0114] 60(61,62)…Chip capacitors

[0115] 59···Solder non-wetted area

[0116] 69···Solder

Claims

1. An electronic device, characterized in that: have: A three-dimensional circuit device having a first region, wherein two conductor patterns are provided on a surface of the first region, the two conductor patterns are arranged in parallel at a first interval and the widths of the two conductor patterns are substantially the same; and a plurality of solder non-wetted portions to which solder is not attached, which are arranged substantially parallel to the two conductor patterns at a second interval in the first region; as well as The electronic component has two external electrodes, and the two external electrodes are respectively soldered to the two conductor patterns between the plurality of solder non-wettable portions.

2. The electronic device according to claim 1, characterized in that The plurality of solder non-wettable portions have substantially the same width.

3. The electronic device according to claim 1, characterized in that: The plurality of solder non-wettable portions have different widths.

4. The electronic device according to claim 1, characterized in that: The two conductor patterns are substantially perpendicular to the plurality of solder non-wettable portions.

5. The electronic device according to claim 1, characterized in that The widths of the two conductor patterns are greater than 70% of the first interval and less than 130% of the first interval, The first interval is greater than 100% and less than 180% of the second interval.

6. The electronic device according to claim 1, characterized in that The first interval is greater than 0.16 mm and less than 0.30 mm, The width of the two conductor patterns is greater than 0.12 mm and less than 0.35 mm, The second interval is greater than 0.20 mm and less than 0.40 mm.

7. The electronic device according to claim 1, characterized in that: The electronic component is a capacitor.

8. The electronic device according to claim 1, characterized in that: The three-dimensional circuit device is a molded circuit device.

9. The electronic device according to claim 1, characterized in that: The plurality of solder non-wettable portions are two elongated resist patterns.

10. The electronic device according to claim 9, characterized in that: The resist pattern is provided using a dispenser.

11. The electronic device according to claim 1, characterized in that: The two conductor patterns are provided with a gold-plated film on the outermost surface. The plurality of solder non-wetted portions are regions where the gold plating films of the two conductor patterns are peeled off.

12. The electronic device according to claim 1, characterized in that The electronic device further includes a camera unit mounted on the three-dimensional circuit device.

13. The electronic device according to claim 1, characterized in that The electronic device includes a plurality of electronic components having different sizes.

14. An endoscope comprising: an insertion portion that is inserted into the subject; and an electronic device, which is disposed in the insertion portion and has a camera unit, The endoscope is characterized in that the electronic device has: A three-dimensional circuit device having a first region, wherein two conductor patterns are provided on a surface of the first region, the two conductor patterns are arranged in parallel at a first interval and the widths of the two conductor patterns are substantially the same; and a plurality of solder non-wetted portions to which solder is not attached, which are arranged substantially parallel to the two conductor patterns at a second interval in the first region; and The electronic component has two external electrodes, and the two external electrodes are respectively soldered to the two conductor patterns between the plurality of solder non-wettable portions.

15. A method for manufacturing an electronic device, characterized in that: have: A three-dimensional circuit device manufacturing step, manufacturing a three-dimensional circuit device, the three-dimensional circuit device having a first area, in which two conductor patterns are arranged on a surface, the two conductor patterns are arranged in parallel at a first interval and the widths of the two conductor patterns are substantially the same; a solder non-wettable portion arranging step of arranging a plurality of solder non-wettable portions in the first region, wherein the plurality of solder non-wettable portions are arranged in parallel at a second interval and are arranged substantially perpendicular to the two conductor patterns; as well as In the joining step, two electrodes of the sheet-like electronic component are soldered to the two conductor patterns between the plurality of solder non-wetted portions, respectively.

Images