Fast MSAA techniques for graphics processing
By optimizing multi-sample anti-aliasing (MSAA) technology, the problem of increased memory bandwidth and computing overhead in graphics processing is solved, achieving more efficient graphics rendering and improved edge quality.
Patent Information
- Application Number
- CN202280099730.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2022-09-15
- Publication Date
- 2025-04-11
AI Technical Summary
When prior art uses multi-sample anti-aliasing (MSAA) in graphics processing, it results in increased memory bandwidth and computational overhead, affecting overall performance and edge quality.
By optimizing MSAA technology, reduce memory bandwidth and overhead, and improve processing speed and edge quality. Specific methods include storing multi-sample data in the GPU, reducing unnecessary data writing, and adopting more efficient rendering processes and hybrid algorithms.
The optimized MSAA technology can significantly reduce memory bandwidth and computing overhead, improve graphics processing performance and edge quality, and is suitable for a variety of graphics rendering scenarios.
Smart Images

Figure CN119816864A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates generally to processing systems and, more particularly, to one or more techniques for graphics processing. Background Art
[0002] Computing devices typically perform graphics and / or display processing (e.g., using a graphics processing unit (GPU), a central processing unit (CPU), a display processor, etc.) to render and display visual content. Such computing devices may include, for example, computer workstations, mobile phones (such as smart phones), embedded systems, personal computers, tablet computers, and video game consoles. The GPU is configured to execute a graphics processing pipeline that includes one or more processing stages that operate together to execute graphics processing commands and output frames. The central processing unit (CPU) can control the operation of the GPU by issuing one or more graphics processing commands to the GPU. Modern CPUs are typically capable of executing multiple applications concurrently, each of which may require the use of a GPU during execution. The display processor is configured to convert digital information received from the CPU into analog values, and may issue commands to a display panel to display visual content. A device that provides content for visual presentation on a display may utilize a GPU and / or a display processor.
[0003] The GPU of a device may be configured to perform processes in a graphics processing pipeline. Additionally, a display processor or display processing unit (DPU) may be configured to perform processes for display processing. However, with the advent of wireless communications and smaller handheld devices, the need for improved graphics or display processing continues to increase. Summary of the invention
[0004] The following presents a simplified summary of one or more aspects in order to provide a basic understanding of these aspects. This summary is not an extensive overview of all contemplated aspects, and is neither intended to identify key or important elements of all aspects, nor to describe the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to a more detailed description presented later.
[0005] In one aspect of the present disclosure, a method, a computer-readable medium, and a device are provided. The device may be a graphics processing unit (GPU), a central processing unit (CPU), or any device that can perform graphics processing. The device may obtain a set of primitives associated with at least one current frame in a scene, wherein each of the set of primitives is associated with at least one pixel of a plurality of pixels in the at least one current frame. The device may also configure at least one coverage mask associated with each of the plurality of pixels, wherein each of the plurality of pixels corresponds to at least one sample, wherein the at least one coverage mask is based on the at least one sample for each of the plurality of pixels. In addition, the device may calculate at least one of color data or depth data associated with each of the plurality of pixels, wherein the color data includes a current color value of each of the plurality of pixels, wherein the depth data includes a current depth value of each of the plurality of pixels. The device may also send an indication of at least one of the color data or the depth data associated with each of the plurality of pixels, wherein the indication is sent after calculating at least one of the color data or the depth data associated with each of the plurality of pixels. In addition, the device may update at least one of the current color value or the current depth value of each of the plurality of pixels based on the at least one coverage mask. The device may also perform a depth test for each of the plurality of pixels before blending the updated current color value with the previous color value of each of the plurality of pixels. In addition, the device may blend the updated current color value of each of the plurality of pixels with the previous color value of each of the plurality of pixels based on the at least one coverage mask, wherein the updated current color value is associated with at least one current drawing of the scene, and wherein the previous color value is associated with at least one previous drawing of the scene. The device may also store at least one of the updated current color value or the updated current depth value of each of the plurality of pixels after blending the updated current color value with the previous color value of each of the plurality of pixels.
[0006] The details of one or more examples of the disclosure are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the disclosure will become apparent from the description and drawings, and from the claims. BRIEF DESCRIPTION OF THE DRAWINGS
[0007] Figure 1 is a block diagram illustrating an example content generation system.
[0008] Figure 2 An example graphics processing unit (GPU) is illustrated.
[0009] Figure 3 Example images or surfaces are illustrated in accordance with one or more techniques of this disclosure.
[0010] Figure 4 is a diagram illustrating an example frame for graphics processing.
[0011] Figure 5 is a diagram illustrating an example multi-sample anti-aliasing (MSAA) workflow for graphics processing.
[0012] Figure 6 is a diagram illustrating an example MSAA workflow for graphics processing.
[0013] Figure 7 is a diagram illustrating an example graph used for graphics processing.
[0014] Figure 8 is a communication flow diagram illustrating example communications between GPU components.
[0015] Fig. 9 is a flow chart of an example method of graphics processing.
[0016] Fig.10 is a flow chart of an example method of graphics processing. DETAILED DESCRIPTION
[0017] Some types of GPUs can render polygons by sampling objects at discrete pixel locations, which may cause jagged effects on the edges of objects. For example, when rendering an object on the screen, there may be a jagged, saw-like pattern along the edge of the model, which is called aliasing. There are quite a few techniques called anti-aliasing techniques that combat this jagged behavior by producing smoother edges. That is, anti-aliasing is a method for dealing with pixel display problems (such as rough or jagged edges) by smoothing the displayed pixel edges. Multi-sample anti-aliasing (MSAA) is one of a variety of anti-aliasing techniques for smoothing pixel edges. This anti-aliasing technique may rely on sampling the same pixel at multiple locations (e.g., 2, 4, 8, or 16 samples per pixel) and then determining the percentage of the pixel inside or outside the object. This information can later be used to blend pixel colors to smooth the rough pixel edges. In order to use the above anti-aliasing techniques, each pixel may require up to four times more storage (e.g., in the case of 4×MSAA) and more computational overhead (e.g., about 10% more overhead). This may result in a decrease in overall benchmark performance (e.g., a 25%-30% decrease). In addition, this technique may limit users from applying deferred lighting algorithms that can be used to render scenes with multiple light sources because the sampling level information may be lost when parsing the final frame buffer. In addition, some game developers may provide algorithms based on distance to edges as an alternative to MSAA, but they may be software-specific implementations based on post-processing pixels to detect edges, or may not be able to handle sub-pixel primitives. In some instances, a tile-based GPU may be able to perform multi-sample rendering by storing multi-sample data in an internal high-speed memory and downsampling the data when writing it out to external memory after rendering is completed. This method may save bandwidth and / or storage space because per-sample data may not be written out to external memory. In addition, this type of method may be widely used in certain types of rendering, such as mobile game rendering. In some aspects, since multi-sample data can be stored in GPU memory (GMEM), GMEM can be used to render smaller portions of the entire frame. The box count of a frame associated with MSAA may be greater than the box count without MSAA, which may result in increased binning overhead. For example, for the same render target (e.g., 2192×954 Red (R) Green (G) Blue (B) Alpha (A) (RGBA) 8888 render target), non-MSAA may utilize 12 bins, while 4×MSAA may utilize 48 bins. Downsampling may be required when writing the GMEM data out to external memory after rendering has completed. If there are format limitations, another block may be used for downsampling, which may take more time than a three-dimensional (3D) parsing engine. For some formats, 4×MSAA may result in increased overhead compared to 1×MSAA (e.g., 28% or 70% increased overhead).In fact, utilizing certain types of MSAA can result in wasting GPU internal resources (i.e., corresponding to all data in the GPU that is multisampled), but also only results in small edge quality improvements. Aspects of the present disclosure can utilize MSAA with improved edge quality. For example, aspects of the present disclosure can utilize MSAA with increased performance benefits. In addition, in some instances, aspects of the present disclosure can utilize MSAA with increased processing speed. By doing so, the aspects presented herein can optimize the performance benefits of the MSAA solution. In addition, the aspects presented herein can reduce the amount of memory bandwidth and overhead associated with utilizing MSAA.
[0018] Various aspects of the system, device, computer program product and method will be described more fully below with reference to the accompanying drawings. However, the present disclosure can be embodied in many different forms and should not be interpreted as being limited to any specific structure or function presented throughout the present disclosure. On the contrary, these aspects are provided so that the present disclosure will be thorough and complete, and the scope of the present disclosure will be fully conveyed to those skilled in the art. Based on the teachings of this article, it should be understood by those skilled in the art that the scope of the present disclosure is intended to cover any aspect of the system, device, computer program product and method disclosed herein, whether it is implemented independently of other aspects of the present disclosure or implemented in combination with other aspects of the present disclosure. For example, any number of aspects set forth herein may be used to implement a device or practice method. In addition, the scope of the present disclosure is intended to cover such a device or method practiced using other structures, functionality, or structure and functionality other than the various aspects of the disclosure set forth herein or different from the various aspects of the disclosure set forth herein. Any aspect disclosed herein may be embodied by one or more elements of the claims.
[0019] Although various aspects are described herein, many variations and permutations of these aspects fall within the scope of the present disclosure. Although some potential benefits and advantages of various aspects of the present disclosure are mentioned, the scope of the present disclosure is not intended to be limited to specific benefits, uses or objectives. On the contrary, various aspects of the present disclosure are intended to be widely applicable to different wireless technologies, system configurations, networks and transmission protocols, some of which are illustrated by way of example in the drawings and the description below. The specific embodiments and drawings merely illustrate the present disclosure rather than limit it, and the scope of the present disclosure is defined by the attached claims and their equivalent technical solutions.
[0020] Several aspects are presented with reference to various devices and methods. These devices and methods are described in the following detailed description and illustrated in the accompanying drawings by various blocks, components, circuits, processes, algorithms, etc. (collectively referred to as "elements"). These elements can be implemented using electronic hardware, computer software, or any combination thereof. Whether such elements are implemented as hardware or software depends on the specific application and the design constraints imposed on the overall system.
[0021] For example, an element or any part of an element or any combination of elements may be implemented as a "processing system" including one or more processors (which may also be referred to as a processing unit). Examples of processors include microprocessors, microcontrollers, graphics processing units (GPUs), general-purpose GPUs (GPGPUs), central processing units (CPUs), application processors, digital signal processors (DSPs), reduced instruction set computing (RISC) processors, systems on chips (SOCs), baseband processors, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), programmable logic devices (PLDs), state machines, gated logic devices, discrete hardware circuits, and other suitable hardware configured to perform the various functions described in this disclosure. One or more processors in a processing system may execute software. Software may be broadly interpreted as meaning instructions, instruction sets, codes, code segments, program codes, programs, subroutines, software components, applications, software applications, software packages, routines, subroutines, objects, executable files, threads of execution, procedures, functions, etc., whether expressed in software, firmware, middleware, microcode, hardware description languages, or other terms. The term "application" may refer to software. As described herein, one or more technologies may refer to an application, i.e., software, configured to perform one or more functions. In such examples, the application may be stored in a memory (e.g., an on-chip memory of a processor, a system memory, or any other memory). The hardware described herein (such as a processor) may be configured to execute an application. For example, an application may be described as including a code that, when executed by hardware, causes the hardware to perform one or more technologies described herein. As an example, the hardware may access the code from the memory and execute the code accessed from the memory to perform one or more technologies described herein. In some examples, components are identified in the present disclosure. In such examples, the components may be hardware, software, or a combination thereof. Each component may be a separate component or a subcomponent of a single component.
[0022] Therefore, in one or more examples described herein, the described functions may be implemented in hardware, software, or any combination thereof. If implemented in software, the functions may be stored or encoded on a computer-readable medium as one or more instructions or codes. Computer-readable media include computer storage media. Storage media may be any available medium that can be accessed by a computer. As an example and not limitation, such computer-readable media may include random access memory (RAM), read-only memory (ROM), electrically erasable programmable ROM (EEPROM), optical disk storage devices, magnetic disk storage devices, other magnetic storage devices, a combination of computer-readable media of the above types, or any other medium that can be used to store instructions or data structure forms that can be accessed by a computer.
[0023] In summary, this disclosure describes techniques for having a graphics processing pipeline in a single device or multiple devices to improve rendering of graphics content and / or reduce load on a processing unit (i.e., any processing unit, such as a GPU, configured to perform one or more of the techniques described herein). For example, this disclosure describes techniques for performing graphics processing in any device that utilizes graphics processing. Other example benefits are described throughout this disclosure.
[0024] As used herein, instances of the term "content" may refer to "graphic content," "images," and vice versa. This is true regardless of whether these terms are used as adjectives, nouns, or other parts of speech. In some examples, as used herein, the term "graphic content" may refer to content produced by one or more processes of a graphics processing pipeline. In some examples, as used herein, the term "graphic content" may refer to content produced by a processing unit configured to perform graphics processing. In some examples, as used herein, the term "graphic content" may refer to content produced by a graphics processing unit.
[0025] In some examples, as used herein, the term "display content" may refer to content generated by a processing unit configured to perform display processing. In some examples, as used herein, the term "display content" may refer to content generated by a display processing unit. Graphics content may be processed to become display content. For example, a graphics processing unit may output graphics content (such as a frame) to a buffer (which may be referred to as a frame buffer). The display processing unit may read graphics content (such as one or more frames) from the buffer and perform one or more display processing techniques thereon to generate display content. For example, the display processing unit may be configured to perform synthesis on one or more rendering layers to generate a frame. As another example, the display processing unit may be configured to synthesize, blend or otherwise combine two or more layers into a single frame. The display processing unit may be configured to perform scaling on the frame, such as zooming in or out. In some examples, a frame may refer to a layer. In other examples, a frame may refer to two or more layers that have been blended together to form the frame, that is, the frame includes two or more layers, and the frame including two or more layers may be subsequently blended.
[0026] Figure 1 1 is a block diagram illustrating an example content generation system 100 configured to implement one or more techniques of the present disclosure. The content generation system 100 includes a device 104. The device 104 may include one or more components or circuits for performing various functions described herein. In some examples, one or more components of the device 104 may be components of a SOC. The device 104 may include one or more components configured to perform one or more techniques of the present disclosure. In the example shown, the device 104 may include a processing unit 120, a content encoder / decoder 122, and a system memory 124. In some aspects, the device 104 may include several components, such as a communication interface 126, a transceiver 132, a receiver 128, a transmitter 130, a display processor 127, and one or more displays 131. References to the display 131 may refer to one or more displays 131. For example, the display 131 may include a single display or multiple displays. The display 131 may include a first display and a second display. The first display may be a left-eye display, and the second display may be a right-eye display. In some examples, the first display and the second display may receive different frames for presentation thereon. In other examples, the first display and the second display may receive the same frame for presentation thereon. In further examples, the results of the graphics processing may not be displayed on the device, for example, the first display and the second display may not receive any frames for presentation thereon. Instead, the frames or graphics processing results may be passed to another device. In some aspects, this situation is referred to as split rendering.
[0027] Processing unit 120 may include internal memory 121. Processing unit 120 may be configured to perform graphics processing, such as in graphics processing pipeline 107. Content encoder / decoder 122 may include internal memory 123. In some examples, device 104 may include a display processor (such as display processor 127) to perform one or more display processing techniques on one or more frames generated by processing unit 120 before being presented by one or more displays 131. Display processor 127 may be configured to perform display processing. For example, display processor 127 may be configured to perform one or more display processing techniques on one or more frames generated by processing unit 120. One or more displays 131 may be configured to display or otherwise present frames processed by display processor 127. In some examples, one or more displays 131 may include one or more of the following: a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, a projection display device, an augmented reality display device, a virtual reality display device, a head mounted display, or any other type of display device.
[0028] Memory external to the processing unit 120 and the content encoder / decoder 122, such as the system memory 124, may be accessible to the processing unit 120 and the content encoder / decoder 122. For example, the processing unit 120 and the content encoder / decoder 122 may be configured to read from and / or write to the external memory, such as the system memory 124. The processing unit 120 and the content encoder / decoder 122 may be communicatively coupled to the system memory 124 via a bus. In some examples, the processing unit 120 and the content encoder / decoder 122 may be communicatively coupled to each other via the bus or a different connection.
[0029] The content encoder / decoder 122 may be configured to receive graphics content from any source, such as the system memory 124 and / or the communication interface 126. The system memory 124 may be configured to store the received encoded or decoded graphics content. The content encoder / decoder 122 may be configured to receive the encoded or decoded graphics content in the form of encoded pixel data, for example, from the system memory 124 and / or the communication interface 126. The content encoder / decoder 122 may be configured to encode or decode any graphics content.
[0030] Internal memory 121 or system memory 124 may include one or more volatile or non-volatile memories or storage devices. In some examples, internal memory 121 or system memory 124 may include RAM, SRAM, DRAM, erasable programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), flash memory, magnetic data media, or optical storage media, or any other type of memory.
[0031] According to some examples, the internal memory 121 or the system memory 124 may be a non-transitory storage medium. The term "non-transitory" may indicate that the storage medium is not embodied in a carrier wave or propagation signal. However, the term "non-transitory" should not be interpreted to mean that the internal memory 121 or the system memory 124 is non-removable or that its contents are static. For example, the system memory 124 may be removed from the device 104 and moved to another device. For another example, the system memory 124 may not be removable from the device 104.
[0032] The processing unit 120 may be a central processing unit (CPU), a graphics processing unit (GPU), a general purpose GPU (GPGPU), or any other processing unit that may be configured to perform graphics processing. In some examples, the processing unit 120 may be integrated into the motherboard of the device 104. In some examples, the processing unit 120 may be present on a graphics card installed in a port in the motherboard of the device 104, or may be otherwise incorporated into a peripheral device configured to interoperate with the device 104. The processing unit 120 may include one or more processors, such as one or more microprocessors, GPUs, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), arithmetic logic units (ALUs), digital signal processors (DSPs), discrete logic, software, hardware, firmware, other equivalent integrated or discrete logic circuits, or any combination thereof. If the technology is partially implemented in software, the processing unit 120 may store instructions for the software in a suitable non-transitory computer-readable storage medium (e.g., internal memory 121), and may use one or more processors to execute instructions in hardware to perform the technology of the present disclosure. Any of the above (including hardware, software, a combination of hardware and software, etc.) may be considered to be one or more processors.
[0033] The content encoder / decoder 122 may be any processing unit configured to perform content decoding. In some examples, the content encoder / decoder 122 may be integrated into the mainboard of the device 104. The content encoder / decoder 122 may include one or more processors, such as one or more microprocessors, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), arithmetic logic units (ALUs), digital signal processors (DSPs), video processors, discrete logic, software, hardware, firmware, other equivalent integrated or discrete logic circuits, or any combination thereof. If the technology is partially implemented in software, the content encoder / decoder 122 may store instructions for the software in a suitable non-transitory computer-readable storage medium (e.g., internal memory 123), and may use one or more processors to execute instructions in hardware to perform the technology of the present disclosure. Any of the above (including hardware, software, a combination of hardware and software, etc.) may be considered to be one or more processors.
[0034] In some aspects, the content generation system 100 may include a communication interface 126. The communication interface 126 may include a receiver 128 and a transmitter 130. The receiver 128 may be configured to perform any receiving functions described herein with respect to the device 104. Additionally, the receiver 128 may be configured to receive information from another device, such as eye or head position information, rendering commands, or positioning information. The transmitter 130 may be configured to perform any sending functions described herein with respect to the device 104. For example, the transmitter 130 may be configured to send information to another device, which may include a request for content. The receiver 128 and the transmitter 130 may be combined into a transceiver 132. In such examples, the transceiver 132 may be configured to perform any receiving functions and / or sending functions described herein with respect to the device 104.
[0035] Refer again Figure 1In some aspects, the processing unit 120 may include a blending component 198 configured to obtain a set of primitives associated with at least one current frame in a scene, wherein each of the set of primitives is associated with at least one pixel of a plurality of pixels in the at least one current frame. The blending component 198 may also be configured to configure at least one coverage mask associated with each of the plurality of pixels, wherein each of the plurality of pixels corresponds to at least one sample, wherein the at least one coverage mask is based on the at least one sample for each of the plurality of pixels. The blending component 198 may also be configured to calculate at least one of color data or depth data associated with each of the plurality of pixels, wherein the color data includes a current color value of each of the plurality of pixels, wherein the depth data includes a current depth value of each of the plurality of pixels. The blending component 198 may also be configured to send an indication of at least one of the color data or the depth data associated with each of the plurality of pixels, wherein the indication is sent after calculating at least one of the color data or the depth data associated with each of the plurality of pixels. The blending component 198 may also be configured to update at least one of the current color value or the current depth value of each of the plurality of pixels based on the at least one coverage mask. The blending component 198 may also be configured to perform a depth test for each of the plurality of pixels before blending the updated current color value with the previous color value of each of the plurality of pixels. The blending component 198 may also be configured to blend the updated current color value of each of the plurality of pixels with the previous color value of each of the plurality of pixels based on the at least one coverage mask, wherein the updated current color value is associated with at least one current drawing of the scene, and wherein the previous color value is associated with at least one previous drawing of the scene. The blending component 198 may also be configured to store at least one of the updated current color value or the updated current depth value of each of the plurality of pixels after blending the updated current color value with the previous color value of each of the plurality of pixels. Although the following description may focus on graphics processing, the concepts described herein may be applicable to other similar processing techniques.
[0036] As described herein, a device such as device 104 may refer to any device, apparatus or system configured to perform one or more technologies described herein. For example, a device may be a server, a base station, a user equipment, a client device, a station, an access point, a computer (e.g., a personal computer, a desktop computer, a laptop computer, a tablet computer, a computer workstation or a mainframe computer), a final product, an apparatus, a phone, a smart phone, a server, a video game platform or console, a handheld device (e.g., a portable video game device or a personal digital assistant (PDA)), a wearable computing device (e.g., a smart watch, an augmented reality device or a virtual reality device), a non-wearable device, a display or display device, a television, a television set-top box, an intermediate network device, a digital media player, a video streaming device, a content streaming device, a vehicle-mounted computer, any mobile device, any device configured to generate graphics content, or any device configured to perform one or more technologies described herein. The process herein may be described as being performed by a specific component (e.g., a GPU), but in further embodiments, other components (e.g., a CPU) consistent with the disclosed embodiments may be used to perform.
[0037] The GPU may process multiple types of data or data packets in the GPU pipeline. For example, in some aspects, the GPU may process two types of data or data packets, such as context register packets and draw call data. The context register packet may be a collection of global state information, such as information about global registers, shaders, or constant data, which may adjust how the graphics context is to be processed. For example, the context register packet may include information about the color format. In some aspects of the context register packet, there may be a bit indicating which workload belongs to the context register. In addition, there may be multiple functions or programs running simultaneously and / or in parallel. For example, a function or program may describe an operation, such as a color mode or color format. Therefore, the context register may define multiple states of the GPU.
[0038] The context state can be used to determine how a single processing unit (e.g., a vertex fetcher (VFD), a vertex shader (VS), a shader processor, or a geometry processor) operates and / or in which mode the processing unit operates. To this end, the GPU can use context registers and programming data. In some aspects, the GPU can generate workloads (e.g., vertex or pixel workloads) in a pipeline based on the context register definition of the mode or state. Certain processing units (e.g., VFDs) can use these states to determine certain functions, such as how to assemble vertices. Since these modes or states may change, the GPU may need to change the corresponding context. In addition, the workload corresponding to the mode or state may follow the changed mode or state.
[0039] Figure 2 An example GPU 200 is illustrated in accordance with one or more techniques of this disclosure. Figure 2 As shown, GPU 200 includes a command processor (CP) 210, a draw call group 212, a VFD 220, a VS 222, a vertex cache (VPC) 224, a triangle setup engine (TSE) 226, a rasterizer (RAS) 228, a Z pass engine (ZPE) 230, a pixel interpolator (PI) 232, a fragment shader (FS) 234, a rendering back end (RB) 236, a second level (L2) cache (UCHE) 238, and a system memory 240. Although Figure 2 GPU 200 is shown to include processing units 220 to 238, but GPU 200 may include multiple additional processing units. Additionally, processing units 220 to 238 are merely examples, and any combination or order of processing units may be used with a GPU according to the present disclosure. GPU 200 also includes command buffer 250, context register group 260, and context state 261.
[0040] like Figure 2 As shown, the GPU may parse the command buffer into context register packets (e.g., context register packets 260) and / or draw call data packets (e.g., draw call packets 212) using a CP (e.g., CP 210) or a hardware accelerator. Subsequently, the CP 210 may transmit the context register packets 260 or the draw call packets 212 to a processing unit or block in the GPU through a separate path. In addition, the command buffer 250 may alternate different states of context registers and draw calls. For example, the command buffer may be constructed in the following manner: context registers of context N, draw calls of context N, context registers of context N+1, and draw calls of context N+1.
[0041] The GPU can render images in a variety of different ways. In some instances, the GPU can use rendering and / or tile rendering to render images. In a tile rendering GPU, the image can be divided or split into different parts or tiles. After the image is divided, each part or tile can be rendered separately. The tile rendering GPU can divide the computer graphics image into a grid format so that each part of the grid (i.e., tile) is rendered separately. In some aspects, during the binning process, the image can be divided into different boxes or tiles. In some aspects, during the binning process, a visibility stream can be constructed in which visible primitives or drawing calls can be identified. In contrast to tile rendering, direct rendering does not divide the frame into smaller boxes or tiles. On the contrary, in direct rendering, the entire frame is rendered at once. Additionally, some types of GPUs may allow both tile rendering and direct rendering.
[0042] In some aspects, the GPU may apply a drawing or rendering process to different bins or tiles. For example, the GPU may render for one bin and perform all drawing for the primitives or pixels in the bin. During the process of rendering for the bin, the render target may be located in GMEM. In some instances, after rendering for one bin, the contents of the render target may be moved to system memory and the GMEM may be released to render the next bin. Additionally, the GPU may render for another bin and perform drawing for the primitives or pixels in the bin. Therefore, in some aspects, there may be a small number of bins (e.g., four bins) that cover all the drawing in a surface. In addition, the GPU may loop through all the drawing in a bin, but perform drawing of visible drawing calls, i.e., drawing calls that include visible geometry. In some aspects, a visibility stream may be generated (e.g., in a binning process) to determine visibility information for each primitive in an image or scene. For example, the visibility stream may identify whether a primitive is visible. In some aspects, this information may be used to remove invisible primitives, such as during a rendering process. In addition, at least some of the primitives identified as visible may be rendered during a rendering process.
[0043] In some aspects of tile rendering, there may be multiple processing stages or processes. For example, rendering may be performed in two processes, such as a visibility or box visibility process and a rendering or box rendering process. During the visibility process, the GPU may input a rendering workload, record the positioning of primitives or triangles, and then determine which primitives or triangles fall into which box or region. In some aspects of the visibility process, the GPU may also identify or mark the visibility of each primitive or triangle in the visibility stream. During the rendering process, the GPU may input a visibility stream and process one box or region at a time. In some aspects, the visibility stream may be analyzed to determine which primitives or primitive vertices are visible or invisible. Therefore, visible primitives or primitive vertices may be processed. In this way, the GPU may reduce unnecessary workloads for processing or rendering invisible primitives or triangles.
[0044] In some aspects, during the visibility process, certain types of primitive geometry may be processed, such as only positioned geometry. Additionally, primitives may be classified into different bins or regions based on the position or positioning of primitives or triangles. In some instances, the classification of primitives or triangles into different bins may be performed by determining visibility information for these primitives or triangles. For example, the GPU may determine visibility information for each primitive in each bin or region or write it to, for example, system memory. The visibility information may be used to determine or generate a visibility stream. During the rendering process, the primitives in each bin may be rendered separately. In these instances, the visibility stream may be extracted from a memory for discarding primitives that are not visible to the bin.
[0045] Some aspects of the GPU or GPU architecture may provide a number of different options for rendering (e.g., software rendering and hardware rendering). In software rendering, the driver or CPU may process each view. Figure 1 In hardware rendering, the hardware or GPU may be responsible for copying or processing the geometry of each viewpoint in the image. Therefore, the hardware may manage the copying or processing of primitives or triangles for each viewpoint in the image.
[0046] Figure 3 An example image or surface 300 is shown, which includes a plurality of primitives divided into a plurality of bins. Figure 3 As shown, image or surface 300 includes region 302, which includes primitives 321, 322, 323, and 324. Primitives 321, 322, 323, and 324 are divided or placed into different bins, such as bins 310, 311, 312, 313, 314, and 315. Figure 3 An example of using multiple viewpoints for sub-tile rendering for primitives 321-324 is illustrated. For example, primitives 321-324 are in a first viewpoint 350 and a second viewpoint 351. Therefore, GPU processing or rendering of an image or surface 300 including region 302 may utilize multi-viewpoint or multi-view rendering.
[0047] As indicated herein, a GPU or graphics processor unit may use a tiled rendering architecture to reduce power consumption or save memory bandwidth. As further described above, this rendering method may divide a scene into multiple boxes and include a visibility process that identifies visible triangles in each box. Thus, in tiled rendering, a full screen may be divided into multiple boxes or tiles. The scene may then be rendered multiple times, for example, once or multiple times for each box.
[0048] In various aspects of graphics rendering, some graphics applications may render to a single target (i.e., a render target) one or more times. For example, in graphics rendering, a frame buffer on a system memory may be updated multiple times. A frame buffer may be a portion of a memory or random access memory (RAM) (e.g., containing a bitmap or storage device) to facilitate storage of display data for a GPU. A frame buffer may also be a memory buffer containing a complete frame of data. Additionally, a frame buffer may be a logical buffer. In some aspects, updating a frame buffer may be performed in box or tile rendering, where, as described above, a surface is divided into multiple boxes or tiles, and then each box or tile may be rendered separately. Furthermore, in tile rendering, a frame buffer may be divided into multiple boxes or tiles.
[0049] Some types of GPUs can render polygons by sampling objects at discrete pixel locations, which may cause jagged effects on the edges of objects. For example, when rendering an object on the screen, there may be a jagged, saw-like pattern along the edge of the model, which is called aliasing. There are quite a few techniques called anti-aliasing techniques that combat this jagged behavior by producing smoother edges. In other words, anti-aliasing is a method for dealing with pixel display problems (such as rough or jagged edges) by smoothing the edges of displayed pixels. Multi-sample anti-aliasing (MSAA) is one of a variety of anti-aliasing techniques for smoothing pixel edges. This anti-aliasing technique can rely on sampling the same pixel at multiple locations (e.g., 2, 4, 8, or 16 samples per pixel) and then determining the percentage of the pixel inside or outside the object. This information can be used later to blend pixel colors to smooth rough pixel edges.
[0050] In order to use the above anti-aliasing techniques, each pixel may require up to four times more storage (e.g., in the case of 4×MSAA) and more computational overhead (e.g., approximately 10% more overhead). This may result in a decrease in overall benchmark performance (e.g., a 25%-30% decrease). In addition, the technique may limit the user application of deferred lighting algorithms that can be used to render scenes with multiple light sources because the sampling level information may be lost when parsing the final frame buffer. In addition, some game developers may provide algorithms based on distance to edges as an alternative to MSAA, but they may be software-based implementations that post-process pixels to detect edges, or may not be able to handle sub-pixel primitives. In some instances, a tile-based GPU may be able to perform multi-sample rendering by storing multi-sample data in internal high-speed memory and downsampling the data when writing it out to external memory after rendering has been completed. This method can save bandwidth and / or storage space because per-sample data may not be written out to external memory. In addition, this type of method can be widely used in certain types of rendering, such as mobile game rendering.
[0051] Figure 4 4 is a diagram illustrating an example frame for graphics processing. More specifically, diagram 400 depicts a frame 410 that does not utilize MSAA and a frame 420 that utilizes MSAA. Figure 4 As shown, diagram 400 includes: frame 410 including bins 411 and frame 420 including bins 421. Diagram 400 illustrates that bins 411 in frame 410 include 12 bins and bins 421 in frame 420 include 48 bins. That is, frame 420 utilizes a specific type of MSAA (e.g., 4×MSAA), and thus frame 420 utilizes four times the amount of bins as frame 410.
[0052] In some aspects, because the multi-sample data can be stored in GPU memory (GMEM), GMEM can be used to render smaller portions of the entire frame. Figure 4 As depicted, the bin count of a frame associated with MSAA may be greater than the bin count without MSAA, which may result in increased binning overhead. Figure 4As shown, for the same rendering target (e.g., 2192×954RGBA8888 rendering target), non-MSAA may utilize 12 bins, while 4×MSAA may utilize 48 bins. Downsampling may be required when writing GMEM data out to external memory after rendering has been completed. If there are format restrictions, another block may be used for downsampling, which may take more time than a three-dimensional (3D) parsing engine. For some formats, 4×MSAA may result in increased overhead (e.g., 28% or 70% increased overhead) compared to 1×MSAA. In fact, utilizing certain types of MSAA may result in wasting GPU internal resources (i.e., corresponding to all data in the GPU that is multi-sampled), but also only results in small edge quality improvements. Based on the above, it may be beneficial to utilize MSAA with improved edge quality. That is, it may be beneficial to utilize MSAA with increased performance benefits and increased processing speed. In addition, it may be beneficial to reduce the amount of memory bandwidth and overhead associated with utilizing MSAA.
[0053] Aspects of the present disclosure may utilize MSAA with improved edge quality. For example, aspects of the present disclosure may utilize MSAA with increased performance benefits. Additionally, in some instances, aspects of the present disclosure may utilize MSAA with increased processing speed. By doing so, the aspects presented herein may optimize the performance benefits of the MSAA solution. Additionally, the aspects presented herein may reduce the amount of memory bandwidth and overhead associated with utilizing MSAA.
[0054] The GPU can use several workflows for MSAA. For example, the GPU can obtain a collection of primitives or triangles. The rasterizer can generate a sample coverage mask for each pixel based on the MSAA level. GMEM or GPU memory can then store per-sample data, including color values and depth values. The shader processor can calculate the color value once for each pixel. The rendering backend (RB) can update the color value for each sample based on the sample coverage mask. For the edge of the primitive or triangle, the GPU can update the color value for each sample when the sample is covered. If the sample is inside the primitive or triangle, the GPU can update the color value. If the sample is outside the primitive or triangle, the color value of the sample can maintain the previous color value. If the depth test is enabled, the RB can perform a depth test based on each sample, which can compare the current depth value with the previous depth value stored in GMEM. If the sample passes the depth test or the depth test is disabled, the RB can perform per-sample blending (that is, if blending is enabled) and the resulting color can be written back to GMEM. GMEM data may also be per-sample, whereas system memory may be per-pixel, so the GPU may need to downsample (i.e., average the color values of N samples and choose a sample as the depth value).
[0055] Figure 5 5 is a diagram 500 illustrating an example MSAA workflow for graphics processing. More specifically, the diagram 500 depicts an MSAA workflow including a rendering process 510 from a high level and a process 520 from a box level. Figure 5 As shown, in the rendering process 510 from a high level, at step 511, the render target color can be cleared (e.g., to black). At step 512, the GPU can draw opaque primitives or triangles. At step 513, the GPU can draw transparent primitives with blending enabled. For example, this can be based on the following formula: Color result =Color src *Alpha src +Color dst *(1-Alpha src ). At step 514, the GPU may resolve the color from GPU memory (e.g., 4 samples) to system memory (e.g., 1 sample). Figure 5 As further shown in FIG. 5 , in the process 520 from the bin level, at step 521 , the GPU may calculate the coverage mask of the primitive during rasterization. Figure 5 , where primitive 540 includes pixel 531 and pixel 532, where coverage mask 542 and coverage mask 543 are calculated. At step 522, the GPU can calculate the color value of the primitive in the fragment shader. This is shown in FIG. Figure 5 550, where color value 552 and color value 551 are calculated for primitive 540 in GMEM 550. At step 523, the GPU may calculate the color value of the second primitive (e.g., primitive 541), and then perform a blending process. For example, color value 571 may be calculated for primitive 541 based on coverage mask 562, which may be blended with color value 552 at 580. At step 524, the GPU may calculate the color average of the four samples, and then store it to system memory. Blended color value 582 may be used to calculate the color average, which may be stored in system memory at 590.
[0056] According to the GPU of the present disclosure, several different workflows can be utilized for MSAA. For example, according to various aspects of the present disclosure, the GPU can obtain a collection of primitives or triangles. The rasterizer can generate a sample coverage mask for each pixel based on the MSAA level. GMEM or GPU memory can then store per-pixel data, including color values and depth values. The shader processor can calculate the color value for each pixel (e.g., once for each pixel). The rendering backend (RB) can calculate the current color value and the previous color value based on the per-sample coverage mask. If the depth test is enabled, the RB can perform a per-pixel depth test, which compares the current depth value with the previous depth value stored in GMEM. If the pixel is disabled by the depth test or the depth test, the RB can perform per-pixel blending (i.e., if blending is enabled) and the resulting color can be written back to GMEM. Per-pixel data can be stored from GMEM to system memory.
[0057] Figure 6 600 is a diagram illustrating an example fast MSAA workflow for graphics processing. More specifically, the diagram 600 depicts a fast MSAA workflow including a rendering process 610 from a high level and a process 620 from a box level. Figure 6 As shown, in the rendering process 610 from a high level, at step 611, the render target color can be cleared (e.g., to black). At step 612, the GPU can draw opaque primitives or triangles. At step 613, the GPU can draw transparent primitives with blending enabled. For example, this can be based on the following formula: Color result =Color src *Alpha src +Color dst *(1-Alpha src ). At step 614, the GPU may resolve the color from GPU memory (eg, 1 sample) to system memory (eg, 1 sample).
[0058] like Figure 6 As further shown in FIG. 6 , in the process 620 from the box level, at step 621 , the GPU may calculate the coverage mask of the primitive during rasterization. Figure 6 , where primitive 640 includes pixel 631 and pixel 632, where coverage mask 642 and coverage mask 643 are calculated. At step 622, the GPU may calculate the color value of the primitive in the fragment shader (FS). Figure 66, where the color from FS 644 and the previous color value 646 are calculated for primitive 640 and then blended at 650. For example, the blended value may be 3 / 4 of FS 644 and 1 / 4 of the previous color value 646. In some instances, if there is a full coverage mask, blending may not need to be performed. At step 623, the GPU may calculate the color value of the second primitive and then perform the blending process. For example, coverage mask 661 and coverage mask 662 may be calculated for primitive 641. Coverage mask 661 may be combined with the color from FS 664 to obtain color value 665. Color value 665 may then be blended with color value 652 at step 670, which may produce color value 674 (e.g., 3 / 4 of color value 665 and 1 / 4 of color value 652). At step 624, the GPU may blend based on the blending function and then store it to system memory. For example, color value 674 and color value 652 may be mixed at step 680, which may produce mixed color value 682. Mixed color value 682 may be based on a particular formula (e.g., color value 674*α+(1-α)*color value 652), which may be stored in system memory (e.g., a buffer in system memory) at step 690.
[0059] In some aspects, overdraw at the GPU can affect the final pixel value. That is, the aspects presented herein can achieve anti-aliasing effects on edges, but if the same pixel has several partially covered overdraws, the final color may contain the color value of the previous draw. This can be based on the following formula: here, where p n,j ∈{0,1}, j∈{0,1,2,3}, and In addition, n may represent the coverage mask of the pixels of a particular drawing (e.g., the nth drawing). n Can be the pixel value rendered by the nth drawing, c n may be the pixel value after a certain amount of overdraw (e.g., n times overdraw), and c 0 Can be the original pixel value. If This may mean that the nth drawable covers the entire pixel. In addition, if It may mean that the nth draw does not touch the pixel.
[0060] Figure 7 700 is a diagram illustrating an example diagram for graphics processing. More specifically, diagram 700 depicts multiple draws and corresponding coverage masks and final color values with and without fast MSAA (i.e., comparing final color values with and without the various aspects presented herein). Figure 7As shown, diagram 700 includes multiple overdrawings (e.g., three overdrawings), where drawing 710 and drawing 720 may have the same coverage mask for pixels. For the third drawing, four cases are listed to compare the differences (e.g., drawing 730, drawing 740, drawing 750, and drawing 760). Drawing 710 includes coverage mask 712, as well as color value 714 (without fast MSAA) and color value 716 (with the fast MSAA technology of the present disclosure). Coverage mask 712 includes values (1, 0, 1, 1), color value 714 corresponds to (D1, C0, D1, D1), and color value 716 corresponds to: C 0 / 4+3D 1 / 4. Drawing 720 includes coverage mask 722, as well as color value 724 (without fast MSAA) and color value 726 (with fast MSAA). Coverage mask 722 includes the values (1,0,1,1), color value 714 corresponds to (D2,C0,D2,D2), and color value 726 corresponds to: (C 0 / 4+3D 1 / 4) / 4+3D 2 / 4. Drawing 730 includes coverage mask 732, as well as color value 734 (without MSAA) and color value 736 (with MSAA). Coverage mask 732 includes the values (1,0,1,1), and color value 734 corresponds to (D3,C0,D3,D3) and C 0 / 4+3D 3 / 4, and the color value 736 corresponds to: ((C 0 / 4+3D 1 / 4) / 4+3D 2 / 4) / 4+3D 3 / 4. Drawing 740 includes coverage mask 742, as well as color value 744 (without fast MSAA) and color value 746 (with fast MSAA). Coverage mask 742 includes the values (1,1,0,0), and color value 744 corresponds to (D3,D3,D2,D2) and D 2 / 2+D 3 / 2, and the color value 746 corresponds to: ((C 0 / 4+3D 1 / 4) / 4+3D 2 / 4) / 2+D 3 / 2. Drawing 750 includes coverage mask 752, as well as color values 754 (without fast MSAA) and color values 756 (with fast MSAA). Coverage mask 752 includes the values (0, 1, 0, 0), and color values 754 correspond to (D2, D3, D2, D2) and 3D 2 / 4+D 3 / 4, and the color value 756 corresponds to: 3((C0 / 4+3D 1 / 4) / 4+3D 2 / 4) / 4+D 3 / 4. Drawing 760 includes coverage mask 762, as well as color value 764 (without fast MSAA) and color value 766 (with fast MSAA). Coverage mask 762 includes the values (1,1,1,1), and color value 764 corresponds to (D3,D3,D3,D3) and D 3 , and the color value 766 corresponds to: D 3 .
[0061] As indicated herein, overdrawing can affect the final color values of various aspects of the present disclosure. For example, a simulated result of 3 draws on the same primitive or triangle can result in a low-quality situation. However, in actual mobile applications or games, overdrawing of the same primitive may be unlikely to occur. This may be because the application or game may not draw the same mesh several times with different colors. In addition, in some instances, there may be almost no discernible difference with and without fast MSAA. For example, intersections may have small color differences. By doing so, this can improve the rendering output of various aspects presented herein, and in most cases result in acceptable rendering output.
[0062] The various aspects presented herein may allow the GPU to reduce the amount of GMEM space utilized because data may be stored on a per-pixel basis. In some cases (e.g., 4×MSAA), the method may save a certain amount of memory (e.g., 6 / 8 memory). In addition, the various aspects presented herein may allow the GPU to achieve anti-aliasing effects on edges and may produce faster results than traditional MSAA solutions. In some cases (e.g., when depth testing is not enabled), rendering with and without fast MSAA may be similar, except for some intersections. If the next drawing covers a particular pixel, the intersection difference may be reset. In other cases (e.g., when depth testing is enabled), a per-pixel depth test may be performed, which may result in an increased rendering difference compared to traditional MSAA solutions. When utilizing the various aspects presented herein, image quality may be between non-MSAA solutions and traditional MSAA solutions (e.g., 4×MSAA).
[0063] In addition, according to the present disclosure, the GPU may utilize several different workflows for MSAA. For example, according to the present disclosure, the GPU may obtain a collection of primitives or triangles. The rasterizer may generate a sample coverage mask for each pixel based on the MSAA level. The GMEM or GPU memory may then store per-pixel data of the color value and per-sample data of the depth value. The shader processor may then calculate the color value for each pixel. The rendering backend (RB) may create a merged sample mask (mergeMask), wherein the merged sample mask may be equal to the per-sample coverage mask and the per-sample depth test mask. The RB may mix the current color and the previous color based on the merged sample mask. If blending is disabled, the RB may write the resulting color back to the GMEM. If the depth test is enabled, a per-sample depth test may be performed. If blending is enabled, the RB may perform per-pixel blending and the resulting color may be written back to the GMEM. The pixel-level color data may then be stored from the GMEM to the system memory. In some instances, the depth may be discarded so that the down-sampling depth may not be utilized. This type of aforementioned process may utilize an increased amount of GMEM space, but may result in improved image quality.
[0064] Aspects of the present disclosure may include multiple benefits or advantages. Aspects presented herein may utilize fast MSAA with improved edge quality. For example, aspects of the present disclosure may utilize fast MSAA with increased performance benefits. In addition, in some instances, aspects of the present disclosure may utilize fast MSAA with increased processing speed. By doing so, the various aspects presented herein may optimize the performance benefits of the MSAA solution. In addition, the various aspects presented herein may reduce the amount of memory bandwidth and overhead associated with utilizing fast MSAA. In some instances, the aforementioned process may utilize GPU hardware changes, so it may be difficult to provide actual performance data. However, utilizing the above process may produce expected performance benefits. For example, the amount of GPU memory utilized may be reduced because color data is stored per pixel. In addition, the final downsampling stage may be saved. From an image quality perspective, the final color value may be accurate for pixels on the interior (or edge) of a primitive or triangle. Aspects presented herein may also help achieve anti-aliasing effects. In addition, the various aspects presented herein may provide a fast solution for MSAA that can be used in several different situations (e.g., 2D situations and 3D situations). Additionally, various aspects presented herein may provide improved image quality (eg, improved edge quality) for several different MSAA-related solutions (eg, non-MSAA and 4x MSAA).
[0065] Figure 8 FIG. 8 is a communication flow diagram 800 of a graphical process according to one or more techniques of the present disclosure. Figure 8As shown in , diagram 800 includes example communications between a GPU component 802 (e.g., a GPU or component in a GPU pipeline, software for controlling a GPU, or a processor for controlling a GPU), a GPU component 804 (e.g., a GPU or component in a GPU pipeline or other graphics processor), and a memory 806 (e.g., graphics memory or GMEM or system memory) in accordance with one or more techniques of this disclosure.
[0066] At 810, GPU component 802 may obtain a set of primitives associated with at least one current frame in a scene (eg, receive primitives 812 from GPU component 804), wherein each of the set of primitives is associated with at least one pixel of a plurality of pixels in the at least one current frame.
[0067] At 820, the GPU component 802 may configure at least one coverage mask associated with each of the plurality of pixels, wherein each of the plurality of pixels corresponds to at least one sample, wherein the at least one coverage mask is based on at least one sample for each of the plurality of pixels. In addition, at 820, the GPU component 802 may configure at least one depth test mask associated with depth data for each of the plurality of pixels, wherein the at least one depth test mask is based on at least one sample for each of the plurality of pixels. At least one of the current color value or the current depth value of each of the plurality of pixels may be further updated based on the at least one depth test mask. In addition, at 820, the GPU component 802 may configure at least one merged sample mask based on a combination of at least one coverage mask and at least one depth test mask. At least one of the current color value or the current depth value of each of the plurality of pixels may be further updated based on the at least one merged sample mask. The at least one coverage mask may be at least one sample coverage mask. In addition, the at least one coverage mask may be configured based on a multi-sample anti-aliasing (MSAA) process.
[0068] At 830, GPU component 802 may calculate at least one of color data or depth data associated with each of the plurality of pixels, wherein the color data includes a current color value for each of the plurality of pixels, and wherein the depth data includes a current depth value for each of the plurality of pixels. The color data may include a set of color values associated with each of the plurality of pixels, and the depth data may include a set of depth values associated with each of the plurality of pixels.
[0069] At 840, GPU component 802 may send an indication of at least one of color data or depth data associated with each of the plurality of pixels, wherein the indication is sent after calculating the at least one of the color data or depth data associated with each of the plurality of pixels.
[0070] At 850, the GPU component 802 may update at least one of a current color value or a current depth value for each of the plurality of pixels based on at least one coverage mask or at least one merged sample mask. Additionally, at 830, at least one of the current color value or the current depth value may be calculated by a shader processor in a graphics processing unit (GPU).
[0071] At 860, the GPU component 802 may perform a depth test for each of the plurality of pixels before blending the updated current color value with the previous color value of each of the plurality of pixels. In some aspects, performing the depth test for each of the plurality of pixels may include comparing the current depth value of each of the plurality of pixels with the previous depth value of each of the plurality of pixels. That is, the GPU may compare the current depth value of each of the plurality of pixels with the previous depth value of each of the plurality of pixels. The depth test may be performed by a rendering back end (RB) in a graphics processing unit (GPU).
[0072] At 870, GPU component 802 may blend an updated current color value for each of the plurality of pixels with a previous color value for each of the plurality of pixels, wherein the updated current color value is associated with at least one current drawing of the scene, and wherein the previous color value is associated with at least one previous drawing of the scene.
[0073] At 880, the GPU component 802 may store at least one of the updated current color value or the updated current depth value for each of the plurality of pixels after blending the updated current color value with the previous color value for each of the plurality of pixels (e.g., store the value 882 in the memory 806). The updated current color value or the updated current depth value for each of the plurality of pixels may be stored in a graphics processing unit (GPU) memory (GMEM) or a system memory. Additionally, at 880, the GPU component 802 may generate at least one of the updated current color value or the updated current depth value for each of the plurality of pixels before storing the at least one of the updated current color value or the updated current depth value.
[0074] Fig. 9 900 is a flowchart of an example method of graphics processing according to one or more techniques of the present disclosure. The method can be performed by a GPU, a GPU component (e.g., a component in a GPU or a GPU pipeline, software for controlling a GPU, or a processor for controlling a GPU), a graphics processor, a CPU (or other central processing unit), an apparatus for graphics processing, a wireless communication device, and / or a combination thereof. Figures 1 to 8 The examples may be performed using any device that can perform graphics processing.
[0075] At 902, the GPU may obtain a set of primitives associated with at least one current frame in a scene, wherein each of the set of primitives is associated with at least one pixel of a plurality of pixels in the at least one current frame, such as in conjunction with Figures 1 to 8 For example, Figure 8 As described in 810 of , the GPU component 802 may obtain a set of primitives associated with at least one current frame in the scene, wherein each of the set of primitives is associated with at least one pixel of a plurality of pixels in the at least one current frame. In addition, step 902 may be performed by Figure 1 The processing unit 120 in the embodiment is used for execution.
[0076] At 904, the GPU may configure at least one coverage mask associated with each pixel of a plurality of pixels, wherein each of the plurality of pixels corresponds to at least one sample, wherein the at least one coverage mask is based on the at least one sample for each of the plurality of pixels, such as in combination with Figures 1 to 8 For example, Figure 8 As described in 820 of , the GPU component 802 may configure at least one coverage mask associated with each pixel in a plurality of pixels, wherein each of the plurality of pixels corresponds to at least one sample, wherein the at least one coverage mask is based on at least one sample for each of the plurality of pixels. In addition, step 904 may be performed by Figure 1 , and performing the above steps. In addition, at 904, the GPU may configure at least one depth test mask associated with the depth data of each of the plurality of pixels, wherein the at least one depth test mask is based on at least one sample for each of the plurality of pixels. At least one of the current color value or the current depth value of each of the plurality of pixels may be further updated based on the at least one depth test mask. In addition, at 904, the GPU may configure at least one merged sample mask based on a combination of at least one coverage mask and at least one depth test mask. At least one of the current color value or the current depth value of each of the plurality of pixels may be further updated based on the at least one merged sample mask. The at least one coverage mask may be at least one sample coverage mask. In addition, the at least one coverage mask may be configured based on a multi-sample anti-aliasing (MSAA) process.
[0077] At 906, the GPU may calculate at least one of color data or depth data associated with each of the plurality of pixels, wherein the color data includes a current color value of each of the plurality of pixels, wherein the depth data includes a current depth value of each of the plurality of pixels, such as in combination with Figures 1 to 8 For example, Figure 8As described in 830 of , the GPU component 802 may calculate at least one of color data or depth data associated with each of the plurality of pixels, wherein the color data includes a current color value of each of the plurality of pixels, and wherein the depth data includes a current depth value of each of the plurality of pixels. In addition, step 906 may be performed by Figure 1 The color data may include a set of color values associated with each of the plurality of pixels, and the depth data may include a set of depth values associated with each of the plurality of pixels.
[0078] At 910, the GPU may update at least one of a current color value or a current depth value of each of a plurality of pixels based on at least one coverage mask or at least one merged sample mask, such as in conjunction with Figures 1 to 8 For example, Figure 8 As described in 850 of , the GPU component 802 may update at least one of the current color value or the current depth value of each of the plurality of pixels based on at least one coverage mask or at least one merged sample mask. In addition, step 910 may be performed by Figure 1 In addition, at 906, at least one of the current color value or the current depth value may be calculated by a shader processor in the GPU.
[0079] At 914, the GPU may blend an updated current color value for each of the plurality of pixels with a previous color value for each of the plurality of pixels, wherein the updated current color value is associated with at least one current drawing of the scene, and wherein the previous color value is associated with at least one previous drawing of the scene, such as in conjunction with Figures 1 to 8 For example, Figure 8 As described in 870 of , GPU component 802 may blend an updated current color value for each of the plurality of pixels with a previous color value for each of the plurality of pixels, wherein the updated current color value is associated with at least one current drawing of the scene, and wherein the previous color value is associated with at least one previous drawing of the scene. In addition, step 914 may be performed by Figure 1 The processing unit 120 in the embodiment is used for execution.
[0080] Fig.10 1000 is a flowchart of an example method of graphics processing according to one or more techniques of the present disclosure. The method can be performed by a GPU, a GPU component (e.g., a component in a GPU or a GPU pipeline, software for controlling a GPU, or a processor for controlling a GPU), a graphics processor, a CPU (or other central processing unit), an apparatus for graphics processing, a wireless communication device, and / or a combination thereof. Figures 1 to 8 The examples may be performed using any device that can perform graphics processing.
[0081] At 1002, the GPU may obtain a set of primitives associated with at least one current frame in a scene, wherein each of the set of primitives is associated with at least one pixel of a plurality of pixels in the at least one current frame, such as in conjunction with Figures 1 to 8 For example, Figure 8 As described in 810 of , the GPU component 802 may obtain a set of primitives associated with at least one current frame in the scene, wherein each of the set of primitives is associated with at least one pixel of a plurality of pixels in the at least one current frame. In addition, step 1002 may be performed by Figure 1 The processing unit 120 in the embodiment is used for execution.
[0082] At 1004, the GPU may configure at least one coverage mask associated with each pixel of a plurality of pixels, wherein each of the plurality of pixels corresponds to at least one sample, wherein the at least one coverage mask is based on the at least one sample for each of the plurality of pixels, such as in combination with Figures 1 to 8 For example, Figure 8 As described in 820 of , the GPU component 802 may configure at least one coverage mask associated with each pixel in a plurality of pixels, wherein each of the plurality of pixels corresponds to at least one sample, wherein the at least one coverage mask is based on at least one sample for each of the plurality of pixels. In addition, step 1004 may be performed by Figure 1 1004. In addition, at 1004, the GPU may configure at least one depth test mask associated with the depth data of each of the plurality of pixels, wherein the at least one depth test mask is based on at least one sample for each of the plurality of pixels. At least one of the current color value or the current depth value of each of the plurality of pixels may be further updated based on the at least one depth test mask. In addition, at 1004, the GPU may configure at least one merged sample mask based on a combination of at least one coverage mask and at least one depth test mask. At least one of the current color value or the current depth value of each of the plurality of pixels may be further updated based on the at least one merged sample mask. The at least one coverage mask may be at least one sample coverage mask. In addition, the at least one coverage mask may be configured based on a multi-sample anti-aliasing (MSAA) process.
[0083] At 1006, the GPU may calculate at least one of color data or depth data associated with each of the plurality of pixels, wherein the color data includes a current color value of each of the plurality of pixels, wherein the depth data includes a current depth value of each of the plurality of pixels, such as in combination with Figures 1 to 8 For example, Figure 8As described in 830 of , the GPU component 802 may calculate at least one of color data or depth data associated with each of the plurality of pixels, wherein the color data includes a current color value of each of the plurality of pixels, and wherein the depth data includes a current depth value of each of the plurality of pixels. In addition, step 1006 may be performed by Figure 1 The color data may include a set of color values associated with each of the plurality of pixels, and the depth data may include a set of depth values associated with each of the plurality of pixels.
[0084] At 1008, the GPU may send an indication of at least one of color data or depth data associated with each of the plurality of pixels, wherein the indication is sent after calculating the at least one of the color data or depth data associated with each of the plurality of pixels, such as in conjunction with Figures 1 to 8 For example, Figure 8 As described in 840 of , the GPU component 802 may send an indication of at least one of the color data or the depth data associated with each of the plurality of pixels, wherein the indication is sent after calculating the at least one of the color data or the depth data associated with each of the plurality of pixels. In addition, step 1008 may be performed by Figure 1 The processing unit 120 in the embodiment is used for execution.
[0085] At 1010, the GPU may update at least one of a current color value or a current depth value of each of a plurality of pixels based on at least one coverage mask, such as in conjunction with Figures 1 to 8 For example, Figure 8 As described in 850 of , the GPU component 802 may update at least one of the current color value or the current depth value of each of the plurality of pixels based on at least one coverage mask. In addition, step 1010 may be performed by Figure 1 In addition, at least one of the current color value or the current depth value may be calculated by a shader processor in the GPU.
[0086] At 1012, the GPU may perform a depth test for each of the plurality of pixels before blending the updated current color value with the previous color value of each of the plurality of pixels, such as in conjunction with Figures 1 to 8 For example, Figure 8 As described in 860 of FIG. 8, the GPU component 802 may perform a depth test for each of the plurality of pixels before blending the updated current color value with the previous color value of each of the plurality of pixels. In addition, step 1012 may be performed by Figure 1In some aspects, performing a depth test for each of the plurality of pixels may include comparing a current depth value of each of the plurality of pixels with a previous depth value of each of the plurality of pixels. That is, the GPU may compare the current depth value of each of the plurality of pixels with a previous depth value of each of the plurality of pixels. The depth test may be performed by a rendering back end (RB) in a graphics processing unit (GPU).
[0087] At 1014, the GPU may blend an updated current color value for each of the plurality of pixels with a previous color value for each of the plurality of pixels, wherein the updated current color value is associated with at least one current drawing of the scene, and wherein the previous color value is associated with at least one previous drawing of the scene, such as in conjunction with Figures 1 to 8 For example, Figure 8 As described in 870 of , GPU component 802 may blend an updated current color value for each of the plurality of pixels with a previous color value for each of the plurality of pixels, wherein the updated current color value is associated with at least one current drawing of the scene, and wherein the previous color value is associated with at least one previous drawing of the scene. In addition, step 1014 may be performed by Figure 1 The processing unit 120 in the embodiment is used for execution.
[0088] At 1016, the GPU may store at least one of an updated current color value or an updated current depth value for each of the plurality of pixels after blending the updated current color value with a previous color value for each of the plurality of pixels, such as in conjunction with Figures 1 to 8 For example, Figure 8 As described in 880 of FIG. 101 , the GPU component 802 may store at least one of the updated current color value or the updated current depth value for each of the plurality of pixels after the updated current color value is blended with the previous color value for each of the plurality of pixels. In addition, step 1016 may be performed by Figure 1 The processing unit 120 in FIG. 1010 may be executed by the processing unit 120 in FIG. At least one of the updated current color value or the updated current depth value for each of the plurality of pixels may be stored in a graphics processing unit (GPU) memory (GMEM) or a system memory. Additionally, at 1016, the GPU may generate at least one of the updated current color value or the updated current depth value for each of the plurality of pixels before storing at least one of the updated current color value or the updated current depth value.
[0089] In a configuration, a method or apparatus for graphics processing is provided. The apparatus may be a GPU, a GPU component (e.g., a component in a GPU or GPU pipeline, software for controlling a GPU, or a processor for controlling a GPU), a graphics processor, a CPU (or other central processing unit), an apparatus for graphics processing, a wireless communication device, and / or some other processor that can perform graphics processing. In various aspects, the apparatus may be a processing unit 120 within a device 104, or may be some other hardware within a device 104 or another device. The apparatus (e.g., processing unit 120) may include a component for obtaining a set of primitives associated with at least one current frame in a scene, wherein each of the set of primitives is associated with at least one pixel of a plurality of pixels in at least one current frame. The apparatus (e.g., processing unit 120) may also include a component for configuring at least one coverage mask associated with each of a plurality of pixels, wherein each of the plurality of pixels corresponds to at least one sample, wherein at least one coverage mask is based on at least one sample for each of the plurality of pixels. The device (e.g., processing unit 120) may also include means for calculating at least one of color data or depth data associated with each of the plurality of pixels, wherein the color data includes a current color value of each of the plurality of pixels, wherein the depth data includes a current depth value of each of the plurality of pixels. The device (e.g., processing unit 120) may also include means for updating at least one of the current color value or the current depth value of each of the plurality of pixels based on at least one coverage mask. The device (e.g., processing unit 120) may also include means for blending the updated current color value of each of the plurality of pixels with a previous color value of each of the plurality of pixels based on at least one coverage mask, wherein the updated current color value is associated with at least one current drawing of the scene, and wherein the previous color value is associated with at least one previous drawing of the scene. The device (e.g., processing unit 120) may also include means for performing a depth test for each of the plurality of pixels before blending the updated current color value with the previous color value of each of the plurality of pixels. The device (e.g., processing unit 120) may also include means for configuring at least one depth test mask associated with depth data for each of the plurality of pixels, wherein the at least one depth test mask is based on at least one sample for each of the plurality of pixels. The device (e.g., processing unit 120) may also include means for configuring at least one merged sample mask based on a combination of at least one coverage mask and at least one depth test mask. The device (e.g., processing unit 120) may also include means for sending an indication of at least one of color data or depth data associated with each of the plurality of pixels, wherein the indication is sent after calculating at least one of color data or depth data associated with each of the plurality of pixels.The device (e.g., processing unit 120) may also include means for storing at least one of an updated current color value or an updated current depth value for each of the plurality of pixels after the updated current color value is blended with a previous color value for each of the plurality of pixels. The device (e.g., processing unit 120) may also include means for generating at least one of an updated current color value or an updated current depth value for each of the plurality of pixels before the means for storing at least one of the updated current color value or the updated current depth value.
[0090] The subject matter described herein can be implemented to achieve one or more benefits or advantages. For example, the described graphics processing techniques can be used by a GPU, a GPU component, a CPU, a graphics processor, a device for graphics processing, or some other processor that can perform graphics processing to implement the MSAA techniques described herein. This can also be implemented at a low cost compared to other graphics processing techniques. In addition, the graphics processing techniques herein can improve or accelerate data processing or execution. In addition, the graphics processing techniques herein can improve resource or data utilization and / or resource efficiency. In addition, various aspects of the present disclosure can utilize MSAA techniques to improve memory bandwidth efficiency and / or increase processing speed at a GPU or CPU.
[0091] It should be understood that the specific order or hierarchy of the blocks in the disclosed process / flowchart is merely an illustration of the exemplary method. It should be understood that the specific order or hierarchy of the blocks in the process / flowchart may be rearranged based on design preferences. Further, some blocks may be combined or omitted. The attached method claims provide the elements of each block in a sample order, but are not meant to be limited to the specific order or hierarchy provided.
[0092] The foregoing description is provided to enable any person skilled in the art to practice the various aspects described herein. Various modifications to these aspects will be apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects. Therefore, the claims are not intended to be limited to the various aspects shown herein, but should be given the full scope consistent with the language of the claims, wherein unless otherwise specified, reference to an element in the singular is not intended to mean "one and only one", but rather "one or more". The word "exemplary" is used herein to mean "used as an example, instance, or illustration". Any aspect described herein as "exemplary" is not necessarily to be interpreted as being preferred or having advantages over other aspects.
[0093] Unless specifically stated otherwise, the term “some” refers to one or more, and the term “or” may be interpreted as “and / or” if the context does not dictate otherwise. Combinations such as “at least one of A, B, or C,” “one or more of A, B, or C,” “at least one of A, B and C,” “one or more of A, B, and C,” and “A, B, C, or any combination thereof” include any combination of A, B, and / or C, which may include multiple A, multiple B, or multiple C. Specifically, combinations such as “at least one of A, B, or C,” “one or more of A, B, or C,” “at least one of A, B, and C,” “one or more of A, B, and C,” and “A, B, C, or any combination thereof” may be only A, only B, only C, A and B, A and C, B and C, or A and B and C, where any such combination may include one or more members of A, B, or C. All structural and functional equivalents of the elements of the various aspects described throughout the present disclosure that are known or will later be known to those of ordinary skill in the art are expressly incorporated herein by reference and are intended to be covered by the claims. In addition, nothing disclosed herein is intended to be dedicated to the public, regardless of whether such disclosure is explicitly recorded in the claims. Words such as "module", "mechanism", "element", "device" cannot replace the word "component". Therefore, no claim element will be understood as a part plus function unless the element is explicitly recorded using the phrase "component for..."
[0094] In one or more examples, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. For example, although the term "processing unit" is used throughout this disclosure, such processing unit may be implemented in hardware, software, firmware, or any combination thereof. If any function, processing unit, technique, or other module described herein is implemented in software, the function, processing unit, technique, or other module described herein may be stored or sent as one or more instructions or codes on a computer-readable medium.
[0095] According to the present disclosure, the term "or" may be understood as "and / or" in the absence of context dictating otherwise. Additionally, while phrases such as "one or more" or "at least one" may have been used for some features disclosed herein but not for other features, features not using such language may be understood to have such implicit meanings in the absence of context dictating otherwise.
[0096] In one or more examples, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. For example, although the term "processing unit" is used throughout this disclosure, such processing unit may be implemented in hardware, software, firmware, or any combination thereof. If any function, processing unit, technique, or other module described herein is implemented in software, the function, processing unit, technique, or other module described herein may be stored on a computer-readable medium or sent on a computer-readable medium as one or more instructions or codes. Computer-readable media may include computer data storage media and communication media, including any media that facilitates the transfer of computer programs from one place to another. In this way, computer-readable media may generally correspond to (1) a non-transient tangible computer-readable storage medium or (2) a communication medium such as a signal or carrier wave. Data storage media may be any available medium that can be accessed by one or more computers or one or more processors to retrieve instructions, codes, and / or data structures for implementing the techniques described in this disclosure. As an example and not limitation, such computer-readable media may include RAM, ROM, EEPROM, CD-ROM, or other optical disk storage devices, magnetic disk storage devices, or other magnetic storage devices. Disk and disc as used herein include compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and Blu-ray disc, where disks usually reproduce data magnetically, while discs reproduce data optically using lasers. Combinations of the above should also be included within the scope of computer-readable media. A computer program product may include a computer-readable medium.
[0097] The code may be executed by one or more processors, such as one or more digital signal processors (DSPs), general-purpose microprocessors, application-specific integrated circuits (ASICs), arithmetic logic units (ALUs), field programmable logic arrays (FPGAs), or other equivalent integrated or discrete logic circuits. Therefore, the term "processor" as used herein may refer to any of the above structures or any other structure suitable for implementing the techniques described herein. In addition, these techniques may be fully implemented in one or more circuits or logic elements.
[0098] The technology of the present disclosure can be implemented in a variety of devices or apparatuses, including wireless mobile phones, integrated circuits (ICs) or IC groups (e.g., chipsets). Various components, modules, or units are described in the present disclosure to emphasize the functional aspects of devices configured to perform the disclosed technology, but they do not necessarily need to be implemented by different hardware units. On the contrary, as described above, the various units can be combined in any hardware unit, or provided by a collection of interoperable hardware units (including one or more processors as described above) in combination with appropriate software and / or firmware. Therefore, the term "processor" as used herein can refer to any of the above structures or any other structure suitable for implementing the technology described herein. Similarly, these technologies can be fully implemented in one or more circuits or logic elements.
[0099] The following aspects are merely illustrative and may be combined with other aspects or teachings described herein without limitation.
[0100] Aspect 1 is a device for graphics processing, the device comprising: a memory; and at least one processor, the at least one processor is coupled to the memory, and based at least in part on information stored in the memory, the at least one processor is configured to: obtain a set of primitives associated with at least one current frame in a scene, wherein each of the set of primitives is associated with at least one pixel of a plurality of pixels in the at least one current frame; configure at least one coverage mask associated with each of the plurality of pixels, wherein each of the plurality of pixels corresponds to at least one sample, wherein the at least one coverage mask is based on the at least one sample for each of the plurality of pixels; calculate at least one of color data or depth data associated with each of the plurality of pixels, wherein the color data comprises a current color value for each of the plurality of pixels, wherein the depth data comprises a current depth value for each of the plurality of pixels; updating at least one of the current color value or the current depth value for each of the plurality of pixels based on the at least one coverage mask; and blending the updated current color value for each of the plurality of pixels with a previous color value for each of the plurality of pixels, wherein the updated current color value is associated with at least one current rendering of the scene, and wherein the previous color value is associated with at least one previous rendering of the scene.
[0101] Aspect 2 is an apparatus according to aspect 1, wherein the at least one processor is further configured to: perform a depth test for each of the plurality of pixels before the updated current color value is blended with the previous color value of each of the plurality of pixels.
[0102] Aspect 3 is a device according to any one of Aspect 1 and Aspect 2, wherein in order to perform the depth test for each of the multiple pixels, the at least one processor is configured to: compare the current depth value of each of the multiple pixels with the previous depth value of each of the multiple pixels.
[0103] Aspect 4 is an apparatus according to any one of aspects 1 to 3, wherein the depth test is performed by a rendering back end (RB) in a graphics processing unit (GPU).
[0104] Aspect 5 is a device according to any one of Aspects 1 to 4, wherein the at least one processor is further configured to: configure at least one depth test mask associated with the depth data of each of the multiple pixels, wherein the at least one depth test mask is based on the at least one sample for each of the multiple pixels.
[0105] Aspect 6 is a device according to any one of aspects 1 to 5, wherein at least one of the current color value or the current depth value of each of the plurality of pixels is further updated based on the at least one depth test mask.
[0106] Aspect 7 is an apparatus according to any one of aspects 1 to 6, wherein the at least one processor is further configured to: configure at least one merged sample mask based on a combination of the at least one coverage mask and the at least one depth test mask.
[0107] Aspect 8 is a device according to any one of aspects 1 to 7, wherein at least one of the current color value or the current depth value of each of the plurality of pixels is further updated based on the at least one merged sample mask.
[0108] Aspect 9 is a device according to any one of aspects 1 to 8, wherein the color data includes a set of color values associated with each of the multiple pixels, and wherein the depth data includes a set of depth values associated with each of the multiple pixels.
[0109] Aspect 10 is a device according to any one of Aspects 1 to 9, wherein an indication of at least one of the color data or the depth data associated with each of the multiple pixels is sent, wherein the indication is sent after calculating the color data or at least one of the depth data associated with each of the multiple pixels.
[0110] Aspect 11 is a device according to any one of Aspects 1 to 10, wherein the at least one processor is further configured to: store at least one of the updated current color value or the updated current depth value of each of the multiple pixels after the updated current color value is mixed with the previous color value of each of the multiple pixels.
[0111] Aspect 12 is a device according to any one of aspects 1 to 11, wherein at least one of the updated current color value or the updated current depth value of each of the multiple pixels is stored in a graphics processing unit (GPU) memory (GMEM) or a system memory.
[0112] Aspect 13 is a device according to any one of Aspects 1 to 12, wherein the at least one processor is further configured to: generate at least one of the updated current color value or the updated current depth value for each of the multiple pixels before storing at least one of the updated current color value or the updated current depth value.
[0113] Aspect 14 is an apparatus according to any one of aspects 1 to 13, wherein the at least one coverage mask is at least one sample coverage mask.
[0114] Clause 15 is an apparatus according to any one of clauses 1 to 14, wherein the at least one coverage mask is configured based on a multi-sample anti-aliasing (MSAA) process.
[0115] Aspect 16 is a device according to any one of aspects 1 to 15, wherein at least one of the current color value or the current depth value is calculated by a shader processor in a graphics processing unit (GPU).
[0116] Aspect 17 is an apparatus according to any one of aspects 1 to 16, wherein the apparatus is a wireless communication device, the apparatus further comprising at least one of an antenna or a transceiver coupled to the at least one processor.
[0117] Aspect 18 is a graphics processing method for implementing any one of aspects 1 to 16.
[0118] Aspect 19 is a device for performing graphics processing, the device comprising means for implementing any one of aspects 1 to 16.
[0119] Aspect 20 is a computer-readable medium (eg, non-transitory computer-readable medium) storing computer-executable code, which, when executed by at least one processor, causes the at least one processor to implement any one of aspects 1 to 16.
Claims
1. A device for graphics processing, the device comprising: Memory; as well as at least one processor coupled to the memory and based at least in part on the information stored in the memory, the at least one processor configured to: Obtaining a set of primitives associated with at least one current frame in a scene, wherein each of the set of primitives is associated with at least one pixel of a plurality of pixels in the at least one current frame; configuring at least one coverage mask associated with each pixel of the plurality of pixels, wherein each of the plurality of pixels corresponds to at least one sample, wherein the at least one coverage mask is based on the at least one sample for each of the plurality of pixels; calculating at least one of color data or depth data associated with each of the plurality of pixels, wherein the color data comprises a current color value for each of the plurality of pixels, wherein the depth data comprises a current depth value for each of the plurality of pixels; updating at least one of the current color value or the current depth value of each of the plurality of pixels based on the at least one coverage mask; as well as The updated current color value for each of the plurality of pixels is blended with a previous color value for each of the plurality of pixels, wherein the updated current color value is associated with at least one current drawing of the scene, and wherein the previous color value is associated with at least one previous drawing of the scene.
2. The apparatus of claim 1 , wherein the at least one processor is further configured to: A depth test is performed for each of the plurality of pixels before the updated current color value is blended with the previous color value for each of the plurality of pixels.
3. The apparatus of claim 2, wherein to perform the depth test for each of the plurality of pixels, the at least one processor is configured to: compare the current depth value of each of the plurality of pixels with the previous depth value of each of the plurality of pixels. 4 . The apparatus of claim 2 , wherein the depth test is performed by a rendering back end (RB) in a graphics processing unit (GPU).
5. The apparatus of claim 1 , wherein the at least one processor is further configured to: At least one depth test mask associated with the depth data for each of the plurality of pixels is configured, wherein the at least one depth test mask is based on the at least one sample for each of the plurality of pixels. 6 . The device of claim 5 , wherein at least one of the current color value or the current depth value of each of the plurality of pixels is further updated based on the at least one depth test mask.
7. The apparatus of claim 5, wherein the at least one processor is further configured to: At least one merged sample mask is configured based on a combination of the at least one coverage mask and the at least one depth test mask. 8 . The device of claim 7 , wherein at least one of the current color value or the current depth value of each of the plurality of pixels is further updated based on the at least one merged sample mask.
9. The device of claim 1, wherein the color data comprises a set of color values associated with each of the plurality of pixels, and wherein the depth data comprises a set of depth values associated with each of the plurality of pixels.
10. The apparatus of claim 1, wherein the at least one processor is further configured to: An indication of at least one of the color data or the depth data associated with each of the plurality of pixels is sent, wherein the indication is sent after calculating the at least one of the color data or the depth data associated with each of the plurality of pixels.
11. The apparatus of claim 1 , wherein the at least one processor is further configured to: After the updated current color value is blended with the previous color value of each of the plurality of pixels, at least one of the updated current color value or the updated current depth value of each of the plurality of pixels is stored.
12. The device of claim 11, wherein at least one of the updated current color value or the updated current depth value for each of the plurality of pixels is stored in a graphics processing unit (GPU) memory (GMEM) or a system memory.
13. The apparatus of claim 11, wherein the at least one processor is further configured to: At least one of the updated current color value or the updated current depth value is generated for each of the plurality of pixels before storing at least one of the updated current color value or the updated current depth value.
14. The apparatus of claim 1, wherein the at least one coverage mask is at least one sample coverage mask.
15. The apparatus of claim 1, wherein the at least one coverage mask is configured based on a multi-sample anti-aliasing (MSAA) process.
16. The device of claim 1, further comprising at least one of an antenna or a transceiver coupled to the at least one processor, wherein at least one of the current color value or the current depth value is calculated by a shader processor in a graphics processing unit (GPU).
17. A graphics processing method, comprising: Obtaining a set of primitives associated with at least one current frame in a scene, wherein each of the set of primitives is associated with at least one pixel of a plurality of pixels in the at least one current frame; configuring at least one coverage mask associated with each pixel of the plurality of pixels, wherein each of the plurality of pixels corresponds to at least one sample, wherein the at least one coverage mask is based on the at least one sample for each of the plurality of pixels; calculating at least one of color data or depth data associated with each of the plurality of pixels, wherein the color data comprises a current color value for each of the plurality of pixels, wherein the depth data comprises a current depth value for each of the plurality of pixels; updating at least one of the current color value or the current depth value of each of the plurality of pixels based on the at least one coverage mask; as well as The updated current color value for each of the plurality of pixels is blended with a previous color value for each of the plurality of pixels, wherein the updated current color value is associated with at least one current drawing of the scene, and wherein the previous color value is associated with at least one previous drawing of the scene.
18. The method according to claim 17, further comprising: A depth test is performed for each of the plurality of pixels before the updated current color value is blended with the previous color value for each of the plurality of pixels.
19. The method of claim 18, wherein performing the depth test for each of the plurality of pixels comprises: The current depth value of each of the plurality of pixels is compared to the previous depth value of each of the plurality of pixels.
20. The method of claim 18, wherein the depth test is performed by a rendering back end (RB) in a graphics processing unit (GPU).
21. The method according to claim 17, further comprising: configuring at least one depth test mask associated with the depth data for each of the plurality of pixels, wherein the at least one depth test mask is based on the at least one sample for each of the plurality of pixels, wherein at least one of the current color value or the current depth value for each of the plurality of pixels is further updated based on the at least one depth test mask.
22. The method according to claim 21, further comprising: At least one merged sample mask is configured based on a combination of the at least one coverage mask and the at least one depth test mask, wherein at least one of the current color value or the current depth value of each of the plurality of pixels is further updated based on the at least one merged sample mask.
23. The method of claim 17, wherein the color data comprises a set of color values associated with each of the plurality of pixels, and wherein the depth data comprises a set of depth values associated with each of the plurality of pixels.
24. The method according to claim 17, further comprising: An indication of at least one of the color data or the depth data associated with each of the plurality of pixels is sent, wherein the indication is sent after calculating the at least one of the color data or the depth data associated with each of the plurality of pixels.
25. The method of claim 17, further comprising: After the updated current color value is blended with the previous color value of each of the plurality of pixels, at least one of the updated current color value or the updated current depth value of each of the plurality of pixels is stored.
26. The method of claim 25, wherein at least one of the updated current color value or the updated current depth value for each of the plurality of pixels is stored in a graphics processing unit (GPU) memory (GMEM) or a system memory.
27. The method according to claim 25, further comprising: At least one of the updated current color value or the updated current depth value is generated for each of the plurality of pixels before storing at least one of the updated current color value or the updated current depth value.
28. The method of claim 17, wherein the at least one coverage mask is at least one sample coverage mask, wherein the at least one coverage mask is configured based on a multi-sample anti-aliasing (MSAA) process, and wherein at least one of the current color value or the current depth value is calculated by a shader processor in a graphics processing unit (GPU).
29. A device for graphics processing, the device comprising: means for obtaining a set of primitives associated with at least one current frame in a scene, wherein each of the set of primitives is associated with at least one pixel of a plurality of pixels in the at least one current frame; means for configuring at least one coverage mask associated with each pixel of the plurality of pixels, wherein each of the plurality of pixels corresponds to at least one sample, wherein the at least one coverage mask is based on the at least one sample for each of the plurality of pixels; means for calculating at least one of color data or depth data associated with each of the plurality of pixels, wherein the color data comprises a current color value for each of the plurality of pixels, wherein the depth data comprises a current depth value for each of the plurality of pixels; means for updating at least one of the current color value or the current depth value of each of the plurality of pixels based on the at least one coverage mask; as well as Means for blending the updated current color value for each of the plurality of pixels with a previous color value for each of the plurality of pixels, wherein the updated current color value is associated with at least one current drawing of the scene, and wherein the previous color value is associated with at least one previous drawing of the scene.
30. A computer readable medium storing computer executable code for graphics processing, the code when executed by a processor causing the processor to: Obtaining a set of primitives associated with at least one current frame in a scene, wherein each of the set of primitives is associated with at least one pixel of a plurality of pixels in the at least one current frame; configuring at least one coverage mask associated with each pixel of the plurality of pixels, wherein each of the plurality of pixels corresponds to at least one sample, wherein the at least one coverage mask is based on the at least one sample for each of the plurality of pixels; calculating at least one of color data or depth data associated with each of the plurality of pixels, wherein the color data comprises a current color value for each of the plurality of pixels, wherein the depth data comprises a current depth value for each of the plurality of pixels; updating at least one of the current color value or the current depth value of each of the plurality of pixels based on the at least one coverage mask; as well as The updated current color value for each of the plurality of pixels is blended with a previous color value for each of the plurality of pixels, wherein the updated current color value is associated with at least one current drawing of the scene, and wherein the previous color value is associated with at least one previous drawing of the scene.