Monitoring management device and implementation method thereof

Abstract

The invention discloses a monitoring management device and an implementation method thereof. According to the scheme, the monitoring management device comprises an acquisition processing module and a power supply module; the acquisition processing module is used for acquiring flight parameters of airborne equipment, performing flight state identification and anomaly detection processing according to the flight parameters, and generating a flight message and monitoring data; and the power supply module is used for converting the airborne current into power supply current and supplying power to the acquisition processing module according to the power supply current. According to the embodiment of the invention, the flight parameters of the airborne equipment are acquired through the integrated interface circuit in the acquisition processing module, the flight parameters can be subjected to flight state identification and anomaly detection processing through the system-level chip circuit, the flight message and the monitoring data are generated, the expansion capability of the monitoring management device is improved, and the monitoring management efficiency is improved. The device can be widely applied to the field of aviation airborne equipment.

Description

Technical Field

[0001] The present application relates to the technical field of aviation airborne equipment, and in particular to a monitoring and management device and an implementation method thereof. Background Art

[0002] With the development of civil aviation technology, the degree of comprehensive integration of aviation airborne equipment is getting higher and higher. In airline operations, there are more and more requirements for real-time collection and monitoring of various airborne systems and equipment parameters, and the requirements for the rapidity and timeliness of fault location and trend analysis are also getting higher and higher. In the related technologies, civil aircraft real-time monitoring and management units (RTMU) and related equipment have the disadvantages of high prices, a small number of interfaces, backward product technology, low scalability, low product robustness, few self-test functions, poor maintainability, and limited product application scenarios. In summary, the technical problems existing in the related technologies need to be improved. Summary of the invention

[0003] The main purpose of the embodiments of the present application is to provide a monitoring management device and an implementation method thereof, which can improve the efficiency of monitoring management.

[0004] To achieve the above-mentioned purpose, an embodiment of the present application provides a monitoring management device in one aspect, the monitoring management device includes an acquisition processing module and a power supply module; the acquisition processing module includes a system-level chip circuit, an integrated interface circuit, a local power supply circuit, a single-board reset generation circuit, a real-time clock circuit and a CF interface, and the system-level chip circuit is respectively connected to the integrated interface circuit, the local power supply circuit, the single-board reset generation circuit, the real-time clock circuit and the CF interface;

[0005] The acquisition and processing module is used to collect flight parameters of airborne equipment, perform flight status identification and abnormality detection processing according to the flight parameters, and generate flight messages and monitoring data;

[0006] The power supply module is used to convert the airborne current into the power supply current, and supply power to the acquisition and processing module according to the power supply current.

[0007] In some embodiments, the system-on-chip circuit includes a processing system, a programmable logic device, a debugging and maintenance interface, a memory, and a display panel;

[0008] The processing system is respectively connected to the programmable logic device, the debugging and maintenance interface, the memory and the display panel;

[0009] The debugging and maintenance interface includes a JTAG interface, a debugging and maintenance serial port and a debugging network port.

[0010] In some embodiments, the integrated interface circuit includes an ARINC429 interface circuit, a discrete quantity interface circuit, an ARINC717 interface circuit, a serial port interface circuit, and an Ethernet interface circuit;

[0011] The ARINC429 interface circuit is used to collect ARINC429 flight data of other airborne equipment and communicate with other airborne equipment;

[0012] The discrete quantity interface circuit is used to collect discrete quantity data of other airborne devices;

[0013] The ARINC717 interface circuit is used to collect ARINC717 flight data of other airborne equipment;

[0014] The serial port interface circuit is used for file transmission and communication with the wireless quick access recorder;

[0015] The Ethernet interface circuit is used for Ethernet interconnection with other airborne devices.

[0016] In some embodiments, the ARINC429 interface circuit includes an ARINC429 receiving circuit, an ARINC429 transmitting circuit and an ARINC429 built-in test circuit, the ARINC429 receiving circuit is connected to the ARINC429 built-in test circuit, and the ARINC429 built-in test circuit is connected to the ARINC429 transmitting circuit;

[0017] The ARINC429 receiving circuit includes an eight-channel level conversion chip for converting bus signals into level signals;

[0018] The ARINC429 transmitting circuit includes a single-channel level conversion chip for converting the level signal into a bus signal;

[0019] The ARINC429 built-in test circuit is composed of an analog switch device, a built-in test transmitting circuit, a built-in test receiving circuit and an input and output expander.

[0020] In some embodiments, the discrete quantity interface circuit is composed of a discrete quantity input circuit, a discrete quantity output circuit and a discrete quantity built-in test circuit;

[0021] The discrete quantity input circuit includes an isolation diode, a first single-pole double-throw switch and a discrete quantity-digital level conversion chip;

[0022] The discrete output circuit includes a ground / open type output circuit, a contact closure type output circuit and an ARINC591 type output circuit, the ground / open type output circuit includes a second single-pole double-throw switch and a discrete signal driver, the contact closure type output circuit includes a third single-pole double-throw switch and an analog switch, and the ARINC591 type output circuit includes a fourth single-pole double-throw switch and a relay;

[0023] The discrete quantity in-machine test circuit comprises the analog switch, the input and output expander, the discrete quantity signal in-machine test driver and the discrete quantity signal in-machine test receiver.

[0024] In some embodiments, the ARINC717 interface circuit is composed of an ARINC717 transceiver chip, a transmitter and a receiver.

[0025] In some embodiments, the serial port interface circuit is composed of an RS232 interface circuit and an RS422 interface circuit.

[0026] In some embodiments, the Ethernet interface circuit is composed of an Ethernet physical layer chip and a network transformer.

[0027] In some embodiments, the power module includes an integrated protection circuit, an energy storage management circuit, a main control circuit, a conversion circuit, an output rectification circuit, an inductive energy storage unit, an output filter circuit, an optocoupler isolation circuit, an output protection circuit, an auxiliary source and a status monitoring circuit.

[0028] To achieve the above object, another aspect of the embodiment of the present application provides a monitoring method of a monitoring management device, which is applied to a monitoring management device as described above, and the method includes:

[0029] The flight parameters of the airborne equipment are collected through the collection and processing module, and flight status identification and abnormality detection processing are performed according to the flight parameters to generate flight messages and monitoring data;

[0030] The airborne current is converted into a power supply current through a power supply module, and the acquisition and processing module is powered according to the power supply current.

[0031] The embodiments of the present application include at least the following beneficial effects: The present application provides a monitoring and management device and an implementation method thereof, wherein the monitoring and management device includes an acquisition and processing module and a power supply module; the acquisition and processing module is used to acquire the flight parameters of the airborne equipment, perform flight status identification and abnormality detection processing according to the flight parameters, and generate flight messages and monitoring data; the power supply module is used to convert the airborne current into the power supply current, and power the acquisition and processing module according to the power supply current. The embodiments of the present application acquire the flight parameters of the airborne equipment through the integrated interface circuit in the acquisition and processing module, and can perform flight status identification and abnormality detection processing on the flight parameters through the system-level chip circuit, generate flight messages and monitoring data, and improve the expansion capability of the monitoring and management device. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 It is a structural diagram of a monitoring management device provided in an embodiment of the present application;

[0033] Figure 2 is a schematic diagram of the structure of a system-on-chip circuit provided in an embodiment of the present application;

[0034] Figure 3 It is a structural schematic diagram of an ARINC429 interface circuit provided in an embodiment of the present application;

[0035] Figure 4 is a structural schematic diagram of a discrete interface circuit provided in an embodiment of the present application;

[0036] Figure 5 It is a structural schematic diagram of an ARINC717 interface circuit provided in an embodiment of the present application;

[0037] Figure 6 It is a structural schematic diagram of a serial port interface circuit provided in an embodiment of the present application;

[0038] Figure 7 It is a structural schematic diagram of an Ethernet interface circuit provided in an embodiment of the present application;

[0039] Figure 8 It is a structural schematic diagram of a power module provided in an embodiment of the present application;

[0040] Fig. 9 is a structural schematic diagram of a real-time circuit provided in an embodiment of the present application;

[0041] Fig.10 It is a structural schematic diagram of a single-board reset generating circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0042] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is further described in detail below in conjunction with the accompanying drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the embodiments of the present application. They are only examples of devices and methods consistent with some aspects of the embodiments of the present application as detailed in the attached claims.

[0043] It is understood that the terms "first", "second", etc. used in this application can be used to describe various concepts in this article, but unless otherwise specified, these concepts are not limited by these terms. These terms are only used to distinguish one concept from another concept. For example, without departing from the scope of the embodiment of the present application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the words "if" and "if" as used herein can be interpreted as "at the time of" or "when" or "in response to determination".

[0044] The terms "at least one", "multiple", "each", "any", etc. used in this application, at least one includes one, two or more, multiple includes two or more, each refers to each of the corresponding multiple, and any refers to any one of the multiple.

[0045] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0046] With the development of civil aviation technology, the degree of comprehensive integration of aviation airborne equipment is getting higher and higher. In airline operations, there are more and more requirements for real-time acquisition and monitoring of parameters of various systems or equipment on board, and the requirements for rapidity and timeliness of fault location and trend analysis are also getting higher and higher. It is also necessary to integrate multiple functions such as providing continuous monitoring and recording the status of predefined parameters. The processed data is sent to the ground operation control, safety supervision and maintenance engineering departments through ACARS messages for aircraft status monitoring and post-flight analysis.

[0047] In the related technologies, civil aircraft monitoring and management devices and related equipment have the following shortcomings: they are expensive, have a limited number of interfaces, have backward product technology, low scalability, low product robustness, few self-checking functions, poor maintainability, and limited product application scenarios. The related monitoring and management devices have a limited number of interfaces, few functions, backward product technology, low circuit integration, poor chip manufacturing level, and slow main frequency processing capability. At the same time, the collector in the monitoring and management device has few self-checking functions, poor maintainability, and low product robustness. The related products have single functions, low scalability, limited product application scenarios, and are expensive and have high maintenance costs.

[0048] In view of this, a monitoring and management device is provided in an embodiment of the present application, in which the monitoring and management device includes an acquisition and processing module and a power supply module; the acquisition and processing module is used to acquire the flight parameters of the airborne equipment, perform flight status identification and abnormality detection processing according to the flight parameters, and generate flight messages and monitoring data; the power supply module is used to convert the airborne current into the power supply current, and supply power to the acquisition and processing module according to the power supply current. The embodiment of the present application acquires the flight parameters of the airborne equipment through the integrated interface circuit in the acquisition and processing module, and performs flight status identification and abnormality detection processing on the flight parameters through the system-level chip circuit, and generates flight messages and monitoring data.

[0049] Figure 1 1 is a schematic diagram of the structure of a monitoring and management device provided in an embodiment of the present application, wherein the monitoring and management device comprises an acquisition and processing module and a power supply module; the acquisition and processing module comprises a system-level chip circuit, an integrated interface circuit, a local power supply circuit, a single-board reset generation circuit, a real-time clock circuit and a CF interface, and the system-level chip circuit is respectively connected to the integrated interface circuit, the local power supply circuit, the single-board reset generation circuit, the real-time clock circuit and the CF interface;

[0050] The acquisition and processing module is used to collect flight parameters of airborne equipment, perform flight status identification and abnormality detection processing according to the flight parameters, and generate flight messages and monitoring data;

[0051] The power supply module is used to convert the airborne current into the power supply current, and supply power to the acquisition and processing module according to the power supply current.

[0052] In the embodiment of the present application, the monitoring management unit (RTMU) is powered by the onboard 115VAC 400Hz power supply, has real-time monitoring and quick storage and recording functions (QAR), can generate aircraft communication addressing reporting system (ACARS) messages according to the logic defined by the real-time monitoring system message monitoring requirements, and store the messages and QAR record parameters in the matching 16GB flash card (CF), independent of the wireless quick storage and recording (WQAR) data; can provide ACARS messages that meet the requirements of the airline, and perform real-time upload and download processing; output QAR data and ACARS message information to WQAR records; send the device's own status information to the onboard equipment, and collect WQAR status information; at the same time, the RTMU can interact with the control display unit (CDU), generate aircraft status monitoring system (ACMS) messages and send them to the printer and ACARS link, etc.; Ethernet, ARINC 429, ARINC717, RS422, discrete quantity and other interfaces are reserved for subsequent function expansion. The acquisition and processing module is the core of the entire RTMU, which is used to collect flight parameters transmitted by other airborne devices connected to it, and process, forward and store them; it can be imagined that the acquisition and processing module has indicator LEDs, CF card interfaces, etc. to realize the human-computer interaction interface function. The power module is used to convert the airborne 115VAC / 400Hz power supply into +5VDC (main power supply) and ±12VDC DC power supply for other boards.

[0053] In some embodiments, the system-on-chip circuit includes a processing system, a programmable logic device, a debugging and maintenance interface, a memory, and a display panel;

[0054] The processing system is respectively connected to the programmable logic device, the debugging and maintenance interface, the memory and the display panel;

[0055] The debugging and maintenance interface includes a JTAG interface, a debugging and maintenance serial port and a debugging network port.

[0056] In the embodiments of this application, please refer to Figure 2The system-on-chip (SOC) circuit is the core component of the entire monitoring and management device. It is mainly composed of a processing system, a programmable logic device, a debugging and maintenance interface, a memory, and a display panel. It is used to process, store, and forward input data. Among them, the SOC is the main chip, which adopts a programmable SOC architecture. It integrates a dual-core Arm Cortex A9 processor (PS) and a 7-series programmable logic device (PL) using a 28nm process. The dual-core A9 of the PS can reach a main frequency of 800MHz and a processing capacity of 2500DMIPS (per core). The field programmable logic gate array (FPGA) built into the programmable system on chip (ZYNQ) has 350k logic units, 218600 lookup tables (LUTs), and 19.2Mb of internal random access memory (RAM).

[0057] Among them, the storage subsystem of PS is composed of memory chip (DDR), large-capacity eMMC and QSPI NOR Flash. QSPI NOR Flash is a flash memory that communicates with the device through the QSPI interface. They realize their corresponding functions. DDR is composed of two 16-bit wide 4Gb DDR particles to form a 32-bit wide DDR system, which provides running memory for RTMU's PS. The total capacity can reach 8Gb and the speed can reach 1066Mbps, which can meet the needs of program operation and data processing. At the same time, the DDR controller of PS has ECC function. ECC function is a memory error correction principle that can detect and correct data errors in memory or flash memory. Enabling this function can greatly improve the reliability of memory reading and writing data, but the cost is that the available memory capacity is halved after enabling this function. A 64GB large-capacity eMMC chip is used as large-capacity storage for caching flight data. QSPI NOR Flash: It is composed of two pieces with a capacity of 256Mb, each with a 4-bit bus, forming an 8-bit bit width, which can speed up the system startup speed. QSPI NOR Flash is used to store the boot loader startup system and the bitstream file for configuring PLD devices.

[0058] The debugging and maintenance interface consists of the JTAG interface, the debugging and maintenance serial port, and the debugging network port. The JTAG interface is a 10-pin connector for the downloader to connect to the PL. The interface has an ESD protection circuit. The debugging serial port converts the UART (serial communication) of the PS to the RJ45 interface via the RS422 level conversion chip. The debugging network port is connected to an RJ45 socket through the RGMII interface (Ethernet communication interface) of the PS via the PHY (physical layer chip) and the network transformer. It can communicate with the switch or PC through a network cable. This interface is a standard IEEE802.3 10 / 100 / 1000Mbps Ethernet interface.

[0059] One of the above technical solutions has the following advantages or beneficial effects: the embodiment of the present application processes data through a system-level chip circuit, which can realize functions such as processing, storing, and forwarding input data, thereby improving the scalability of the monitoring and management device.

[0060] As a further optional implementation, the integrated interface circuit includes an ARINC429 interface circuit, a discrete quantity interface circuit, an ARINC717 interface circuit, a serial port interface circuit and an Ethernet interface circuit;

[0061] The ARINC429 interface circuit is used to collect ARINC429 flight data of other airborne equipment and communicate with other airborne equipment;

[0062] The discrete quantity interface circuit is used to collect discrete quantity data of other airborne devices;

[0063] The ARINC717 interface circuit is used to collect ARINC717 flight data of other airborne equipment;

[0064] The serial port interface circuit is used for file transmission and communication with the wireless quick access recorder;

[0065] The Ethernet interface circuit is used for Ethernet interconnection with other airborne devices.

[0066] In the embodiment of the present application, the integrated interface circuit includes an ARINC429 interface circuit, a discrete quantity interface circuit, an ARINC717 interface circuit, a serial port interface circuit and an Ethernet interface circuit. Among them, the ARINC429 interface can be divided into two categories according to its function: an acquisition type ARINC429 interface and an interactive type ARINC429 interface. Among them, the acquisition type ARINC429 interface circuit is used to collect ARINC429 flight data of other airborne equipment (including power supply, indication record, automatic flight, power, fuel, flight control, environmental control, navigation, communication, etc.), and the collected parameters cover all parameters listed in the real-time monitoring system parameter requirements. The interactive type ARINC429 interface circuit is used to monitor the management device and communicate with other airborne equipment (including PDL, MCDU, airborne printer, CMC, ACARS, etc.). The discrete quantity interface circuit provides up to 42 inputs and 12 outputs of discrete quantity interfaces, and has a built-in BIT circuit. The ARINC717 interface circuit is composed of an ARINC717 transceiver chip and its peripheral circuits, providing 3 ARINC717 outputs and 3 ARINC717 input interfaces. Each channel can be independently configured as Harvard Bi-Phase or Bi-Ploar signal. The signal type can be selected according to the configuration file and the input signal type can be automatically identified. The current output signal type can be informed to WQAR through the ground / open discrete output (BI_PHASE_SEL, grounding is Harvard Bi-Phase mode, open circuit is bipolar mode). The communication rate can be configured as X2, X4, X8, X16, X32, X64 and X128 according to the configuration file, X1 represents a rate of 64 words per second; and the current output rate can be informed to WQAR through the contact closure discrete output (DAR_X2 / X4 / X8 / X16 / X32 / X64 / X128, the corresponding rate is turned on to select the rate, otherwise it is cut off). The serial port interface circuit consists of RS232 interface circuit and RS422 interface circuit, which are used for file transmission and communication with wireless fast access recorder. The Ethernet interface circuit is composed of an Ethernet PHY chip and a network transformer. The Ethernet interface circuit is connected to the backplane through the RGMII 1 interface of the PS via the Ethernet PHY chip and the network transformer to realize Ethernet interconnection with other airborne devices. This interface is a standard IEEE802.3 10 / 100 adaptive Ethernet interface, and the port mode can be configured to adaptive mode, forced 10M or forced 100M mode through software.

[0067] In some embodiments, the ARINC429 interface circuit includes an ARINC429 receiving circuit, an ARINC429 transmitting circuit and an ARINC429 built-in test circuit, the ARINC429 receiving circuit is connected to the ARINC429 built-in test circuit, and the ARINC429 built-in test circuit is connected to the ARINC429 transmitting circuit;

[0068] The ARINC429 receiving circuit includes an eight-channel level conversion chip for converting bus signals into level signals;

[0069] The ARINC429 transmitting circuit includes a single-channel level conversion chip for converting the level signal into a bus signal;

[0070] The ARINC429 built-in test circuit is composed of an analog switch device, a built-in test transmitting circuit, a built-in test receiving circuit and an input and output expander.

[0071] In the embodiment of the present application, the ARINC 429 interface circuit is composed of an ARINC 429 receiving circuit, an ARINC 429 transmitting circuit, and an ARINC 429 BIT circuit. The ARINC 429 interface circuit provides a total of up to 90 inputs and 7 outputs. All output and input channels are designed with configurable interfaces and can be configured to high speed or low speed through a customized configuration tool. Figure 3 The ARINC 429 receiving circuit uses an eight-channel ARINC 429-TLL level conversion chip, which converts the differential bipolar return-to-zero standard 429 signal into two single-ended unipolar return-to-zero LVTTL signals to the FPGA (PL) for decoding, caching and other related work. A single level conversion chip can convert 4 / 8 standard ARINC 429 signals. The level conversion chip has an integrated lightning protection circuit, which further improves the reliability and anti-interference ability of this part of the circuit. The ARINC 429 transmitting circuit uses a single-channel TLL-ARINC 429 level conversion chip, which converts the two single-ended unipolar return-to-zero LVTTL signals sent from the FPGA (PL) into differential bipolar return-to-zero standard ARINC 429 signals. The ARINC 429 in-machine test circuit consists of analog switching devices, ARINC 429BIT transmitting circuit / ARINC 429BIT receiving circuit and IO expander. The working principle is as follows: Taking the receiving channel as an example, if Figure 3As shown, an analog switch is built into each ARINC 429 receiving channel, which acts as a single-pole double-throw switch. In normal use, the BIT enable is low, the analog switch is connected, and the airborne ARINC 429 signal input from the backplane is selected; in the scenario of BIT testing, the BIT enable is high, the switch is connected, and the PL generates a specified ARINC 429 BIT pattern, and the BIT transmitter generates a standard ARINC 429 signal, which is input to the corresponding RX channel under test through the analog switch and returned to the PL after level conversion. The PL observes whether the signal is received within a specific time window. If the signal is received, it is compared with the transmitted signal and then generates the result. The ARINC 429 BIT transmitter is a dedicated independent single-channel ARINC 429 level conversion chip, and its implementation scheme and principle are the same as the ARINC 429 transmission circuit. Since there are many test channels and each channel needs to be tested independently, the BIT enable end of each channel needs an independent I / O control, and the number of I / Os required is large, so an I / O expander is needed. This expander can be implemented through serial-to-parallel conversion or a dedicated I / O expansion chip controlled by I2C. The principle for the sending direction is the same, and a dedicated independent single-channel ARINC 429 level conversion chip is also used. The signal flow of the data is opposite to that of the receiving BIT. Considering power consumption, weight, cost, etc., all receiving channels share a BIT transmitter through time division multiplexing, and all sending channels also share a BIT receiver through time division multiplexing.

[0072] In some embodiments, the discrete quantity interface circuit is composed of a discrete quantity input circuit, a discrete quantity output circuit and a discrete quantity built-in test circuit;

[0073] The discrete quantity input circuit includes an isolation diode, a first single-pole double-throw switch and a discrete quantity-digital level conversion chip;

[0074] The discrete output circuit includes a ground / open type output circuit, a contact closure type output circuit and an ARINC591 type output circuit, the ground / open type output circuit includes a second single-pole double-throw switch and a discrete signal driver, the contact closure type output circuit includes a third single-pole double-throw switch and an analog switch, and the ARINC591 type output circuit includes a fourth single-pole double-throw switch and a relay;

[0075] The discrete quantity in-machine test circuit comprises the analog switch, the input and output expander, the discrete quantity signal in-machine test driver and the discrete quantity signal in-machine test receiver.

[0076] In the embodiment of the present application, the discrete quantity interface circuit is composed of a discrete quantity input circuit, a discrete quantity output circuit, and a discrete quantity internal test circuit. Figure 4 As shown in the figure, the discrete input circuits are all shunt-type discrete input circuits (42 channels), which are composed of multiple 8-channel discrete-to-digital level conversion chips, the first single-pole double-throw switch (SPDT) and isolation diodes. The discrete-to-digital level conversion chip supports two input modes: 28VDC / on and ground / on. Different input modes can be switched by controlling the input level of the corresponding pin of the chip. In specific implementation, the mode selection pin of the chip is pulled up and down through pull-up and pull-down resistors, so that all channels are in the corresponding ground / on or 28VDC / on mode during power-on. The minimum granularity of adjustment is 8 channels, that is, the 8 channels of the same chip need to be in the same mode. By default, the mode selection pin is in the pull-down state during factory delivery, and all input channels are in ground / on mode. All input channels are isolated by isolation diodes to prevent the device from interacting with other parallel systems.

[0077] The discrete output circuits are all shunt-type discrete outputs, which are divided into ground / open type (4 channels), contact closure type (7 channels) and ARINC591 type (1 channel). Among them, the ground / open type output circuit includes a second single-pole double-throw switch and a discrete signal driver, the contact closure type output circuit includes a third single-pole double-throw switch and an analog switch, and the ARINC591 type output circuit includes a fourth single-pole double-throw switch and a relay. The contact closure type discrete output is implemented using an analog switch. The FPGA sends a 3.3V digital level signal to drive the conduction and disconnection of the third single-pole double-throw switch, which is mainly used in isolation control situations. The ARINC591 type discrete signal is used for the operation control of data recording, and its circuit form is the relay circuit specified in the ARINC591 standard. When the data needs to be recorded by the receiver, it should be set to LOW (GROUND). When the data does not need to be recorded by the receiver, it should be set to open.

[0078] The discrete built-in test (BIT) circuit consists of an analog switch device, a discrete BIT transmitter circuit / discrete BIT transmitter circuit and an IO expander. Working principle: Figure 4As shown, an analog switch is built into each discrete quantity receiving channel, which acts as a single-pole double-throw switch. In normal use, the BIT enable is low, the switch is connected, and the airborne discrete quantity signal input from the backplane is selected; when the BIT test is performed, the BIT enable is high, the switch is connected, and the PL generates a specified discrete quantity test pattern sequence, and the BIT driver generates a standard discrete quantity signal, which is input to the corresponding RX channel under test through the analog switch, and returns to the PL after level conversion. The PL observes whether the signal is received within a specific time window. If the signal is received, it is compared with the transmitted signal and then generates the result. The discrete quantity BIT driver is a single-channel discrete quantity driver. Since there are many test channels and each channel needs to be tested independently, the BIT enable end of each channel must have an independent I / O control, and the number of I / Os required is large, so an I / O expander is required. The expander can be implemented by serial-to-parallel conversion or a dedicated I / O expansion chip controlled by the I2C bus.

[0079] In some embodiments, the ARINC717 interface circuit is composed of an ARINC717 transceiver chip, a transmitter and a receiver.

[0080] In the embodiment of the present application, the ARINC717 interface circuit is composed of an ARINC717 transceiver chip and its peripheral circuits, providing 3-way ARINC717 output and 3-way ARINC717 input interfaces. Figure 5 , the ARINC717 transceiver chip will decode and cache the data on the 717 bus into the internal FIFO memory, and the PL reads the data through the SPI interface. The transceiver chip supports hardware and software configuration as Harvard biphase and bipolar mode. The hardware method is to select through the mode selection pin of the transceiver chip. When the pin inputs a low level, it is the Harvard biphase mode, and when the pin inputs a high level, it is the bipolar mode. The software method is to configure the internal registers of the chip to realize the selection of Harvard biphase and bipolar mode. The default is Harvard biphase mode. The ARINC717 interface of RTMU is mainly used to transmit flight data to WQAR. The transmit channel is the main channel, and the receive channel is reserved for backup. Its default mode and rate follow the configuration of the transmit channel, but can be independently set to different configurations according to the configuration file.

[0081] The ARINC717 transmitter writes the data to be sent into the FIFO memory of the transceiver chip through the SPI interface through the PL, and the transceiver chip then converts the data in the FIFO memory into a 717 signal and sends it out. The level chip also supports hardware and software configuration to Harvard biphase or bipolar mode.

[0082] The ARINC717 on-board test circuit is composed of analog switch devices and ARINC717 transceiver chips. Working principle: An analog switch is built into each ARINC717 receiving channel, which acts as a single-pole double-throw switch. In normal use, the BIT enable is low, the switch is connected, and the airborne ARINC717 signal input from the backplane is selected; when the BIT test is performed, the BIT enable is high, the switch is connected, and the PL generates a specified ARINC717 test pattern sequence, and the BIT driver generates a standard ARINC717 signal, which is input to the corresponding RX channel under test through the analog switch, and returns to the PL after level conversion. The PL observes whether the signal is received within a specific time window. If the signal is received, it is compared with the transmitted signal and then generates the result. The ARINC717BIT driver is a single-channel ARINC717 driver. The principle is the same for the sending direction, and the signal flow of the data is opposite to that of the receiving BIT. A single board can use an independent HI-3717PCT integrated circuit as a BIT transmitter and receiver.

[0083] In some embodiments, the serial port interface circuit is composed of an RS232 interface circuit and an RS422 interface circuit.

[0084] In the embodiment of the present application, the RS232 interface circuit is composed of an RS232 level chip, with a total of 1 channel, which is RS232 without flow control, that is, the communication mode of not using hardware flow control (Hardware Flow Control) or software flow control (Software Flow Control) in the RS232 communication protocol. The UART interface of PL is connected to the backplane through the RS232 chip. Please refer to Figure 6 The RS422 interface circuit is composed of an RS422 transceiver chip or an RS485 transceiver chip. The interface circuit has one full-duplex RS422 channel. The UART interface of the PL is connected to the backplane through the RS422 transceiver chip. The interface can be configured as one full-duplex 422 interface that complies with the EIA 422 specification or two 485 interfaces that comply with the EIA 485 specification as needed. The interface is configured in RS422 mode by default. RTMU transfers files and communicates with WQAR through the RS422 interface.

[0085] In some embodiments, the Ethernet interface circuit is composed of an Ethernet physical layer chip and a network transformer.

[0086] In the embodiments of this application, please refer to Figure 7The Ethernet interface circuit is composed of an Ethernet PHY chip and a network transformer. The Ethernet interface circuit is connected to the backplane through the RGMII 1 interface of the PS via the Ethernet PHY chip and the network transformer to realize Ethernet interconnection with other onboard devices. This interface is a standard IEEE802.3 10 / 100 adaptive Ethernet interface, and the port mode can be configured by software to be adaptive mode, forced 10M or forced 100M mode, open or close.

[0087] In some embodiments, the power module includes an integrated protection circuit, an energy storage management circuit, a main control circuit, a conversion circuit, an output rectification circuit, an inductive energy storage unit, an output filter circuit, an optocoupler isolation circuit, an output protection circuit, an auxiliary source and a status monitoring circuit.

[0088] In the embodiments of this application, please refer to Figure 8The integrated protection circuit includes lightning protection and overcurrent protection circuit, input EMC (electromagnetic compatibility) filtering and protection circuit, full-wave rectification circuit, surge current protection circuit and PFC (power factor correction) circuit. Among them, the lightning protection and overcurrent protection circuit consists of four bidirectional TVS diodes (transient voltage suppression diodes), and the overcurrent protection is protected by a fuse. When the input current exceeds the current of the fuse, the fuse is disconnected due to excessive current. The input EMC filtering and protection circuit is used to suppress common-mode and differential-mode voltage surges, various peak voltages and conducted disturbances input from the outside, improve the electromagnetic compatibility performance of the product, and provide overcurrent and overvoltage protection functions. The EMC filtering circuit protection circuit adopts a 2-level common-mode circuit and reasonably adjusts the common-mode circuit parameters. It is mainly composed of a conjugate coil, an X capacitor, a Y capacitor, and a voltage. The conjugate coil, the X capacitor, and the Y capacitor are used to eliminate common-mode and differential-mode interference. The full-wave rectifier circuit is composed of four identical slow-speed rectifier diodes and a film capacitor, which converts the input AC voltage into a unidirectional pulse DC voltage. The film capacitor converts the rectified pulsating voltage into a smooth DC voltage. The surge current protection circuit is to protect the circuit from excessive input current during startup, as the capacitor voltage cannot suddenly change, which is equivalent to a short circuit. The surge current protection circuit is placed between the rectifier circuit and the boost circuit. At the moment of startup, the MOS (metal oxide semi-conductor field effect transistor) inside the surge protection circuit is not turned on, and the current passes through the parallel 120Ω thermistor. When the current rises, the resistance value increases and the current passing through decreases. After normal operation, the MOS is turned on and the main current passes through the MOS, thereby playing a protective role. The PFC circuit mainly improves the electromagnetic compatibility of the power module, improves the input power factor of the power supply and the adaptability to a wide voltage input range. The input voltage range of the circuit is 85VAC~140VAC, and outputs a fixed DC voltage of 246.4VDC, so that the subsequent high-frequency isolation conversion circuit can work more stably. The PFC control circuit has a built-in undervoltage protection circuit and a hysteresis comparison function. It samples the PFC chip power supply pin (VCC). When VCC is less than 8V, the PFC chip shuts down the entire power output, and when VCC is greater than 13V, the PFC chip starts output. The onboard 115VAC power supply is rectified and filtered by the full bridge, and the voltage is divided by selecting an appropriate resistor combination. When the input voltage drops below 80VAC, the PFC circuit stops working and enables the internal energy storage capacitor to maintain the full power output of the power supply for at least 200ms. When the input is greater than 85VAC, the PFC enables the external input, and the power module starts to work normally. In this way, the power module provides undervoltage protection while preventing the power module from frequently starting and stopping when the input voltage fluctuates around 80VAC, thereby increasing the stability of the overall system. This power module adopts a boosted BOOST topology active PFC control circuit, because this topology circuit has many advantages and is also a typical boost switch circuit with stable and reliable circuit performance.The basic principle of the PFC circuit is to add a DC-DC chopper circuit between the input AC voltage through the rectifier circuit and the filter capacitor (capacitor C), and adjust the waveform of the current and voltage through a dedicated PFC control IC (integrated circuit) to compensate for the phase difference between the current and voltage. After adding the PFC circuit, the rectifier circuit output of the switching power supply is not directly connected to the large-capacity filter capacitor, so it presents a purely resistive load to the power supply line, and the PFC circuit adjusts the voltage and current waveforms so that the voltage and current waveforms are in phase, thereby improving the power factor.

[0089] The power module also includes an energy storage management circuit, wherein the energy storage management circuit is composed of a voltage conversion device and an energy storage element. When the external power supply is normal, the voltage conversion device converts the external power supply to a voltage that matches the energy storage element. When the system loses power, the voltage conversion device converts the voltage of the energy storage element to the voltage of the power supply bus, so that the device can still work uninterruptedly for more than 200ms after the external power supply is interrupted (the voltage level is lower than 80VAC). When the external power supply interruption time is less than or equal to 200ms, the energy storage circuit can make the normal operation of the system unaffected; when the interruption time is greater than 200ms, when the external power supply is restored, the RTMU does not require manual intervention, and can automatically restart, reinitialize and return to the beginning of the normal program cycle. At the same time, after the power supply is started, it can quickly continue to charge the energy storage element to meet the next system power outage. The energy storage circuit uses two 560uF / 300VDC energy storage capacitors. When the power module outputs at full power 52W load, the power on the energy storage capacitor is 52W / 80%=65W.

[0090] The power module also includes a main control circuit, a conversion circuit, an output rectifier circuit, an inductive energy storage unit, an output filter circuit, an optocoupler isolation circuit, an output protection circuit, an auxiliary source and a status monitoring circuit. Among them, the main control circuit controls the PFC (power factor correction circuit) switch and the PWM (pulse width modulation circuit) main switch. When working normally, it controls the two switch tubes to rise and transfer energy. When protection occurs, it turns off the PWM output and energy transfer. The operating voltage range of the conversion circuit is 110VDC~246.4VDC. The DC voltage sent by the PFC is converted into a high-frequency square wave voltage and sent to the transformer for isolation conversion. After the transformer is isolated, it is converted into a low-voltage high-frequency square wave. The rectifier circuit consists of two rectifier diodes and two groups of RC absorption circuits. The pulsating voltage output by the transformer is rectified into a DC voltage and output to the filter circuit. One of the rectifier diodes (upper tube) is a rectifier tube, and the lower tube is a freewheeling diode. The RC absorption circuit is used to absorb the high-frequency noise when the diode switches between forward conduction and cutoff to prevent electromagnetic interference from being output to the outside. When the primary switch tube of the inductor energy storage unit is closed, the energy is transferred from the primary to the secondary through the transformer. At this time, the energy storage inductor current increases and stores energy. When the primary switch tube is disconnected, the secondary rectifier diode is reverse biased, and the transformer cannot transfer energy to the output. At this time, the energy storage inductor unit releases the stored energy to power the output through the function of the freewheeling diode. The output filter circuit uses conventional multiple large-capacity capacitors and multi-layer ceramic capacitors to filter out high-frequency interference. It also uses a first-level differential mode filter circuit, and when the circuit parameters are adjusted, they are reasonably configured to reduce the output voltage ripple. The optocoupler isolation circuit is mainly used for mutual isolation control of the input and output stages. The isolation voltage of the optocoupler is 3700VAC, which meets the isolation voltage requirements of the power module. The optocoupler isolation circuit receives the signal sent by the output detection circuit and sends it to the power chip for processing. When the output voltage is abnormal, the power chip outputs a control signal to change the duty cycle of the PWM square wave of the main control, thereby shutting down or controlling the output voltage. The output protection circuit has the function of output over-voltage and under-voltage protection. When the output voltage exceeds or is lower than the set voltage of the protection chip, the protection chip feeds back the output protection signal to the primary control circuit through the optocoupler, disconnects the power supply of the primary switch tube driver chip, and turns off the control chip. The PWM output blocks the energy transmission of the transformer, turns off the output voltage, and protects the product from damage due to overvoltage and undervoltage. The output protection circuit also has an overcurrent protection function. When the output current exceeds the set value, the output current sampling resistor feeds back the sampled voltage to the output protection chip. The primary protection chip feeds back the output protection signal to the primary control circuit through the optocoupler, disconnects the power supply of the primary switch tube driver chip, turns off the PWM output, thereby blocking the energy transmission of the transformer, and turns off the output voltage, which also plays a role in protecting the product. The role of the auxiliary source is to provide a stable and reliable power supply for the output protection chip, so that the entire protection system can be protected more reliably.The status monitoring circuit is composed of input and output voltage monitoring, temperature monitoring, and over-voltage and under-voltage reporting. The function of the input monitoring circuit is to monitor the input voltage. When the external power supply fails for more than 200ms, the power module outputs a high-impedance power failure signal to notify the acquisition and processing module to start the protective shutdown process, save important data, and complete the shutdown task within 90ms. In the case of low external input voltage, the status monitoring and BIT circuits do not cut off the power output. In addition, the status monitoring and BIT circuits can also detect input overvoltage, output undervoltage and overvoltage and have a temperature detection circuit. When the input exceeds the specified value, the output is abnormal, and the temperature is too high, a power failure signal will be generated to notify the acquisition and processing module, and the power module output will be automatically shut down to prevent damage to other onboard equipment and protect other internal boards.

[0091] The following is a detailed description of the embodiments of the present invention with reference to specific application examples:

[0092] The embodiment of the present application can be applied to airborne system parameter collectors, civil aircraft data processing equipment, civil aircraft data real-time monitoring / flight status identification equipment, engine and aircraft status monitoring data management equipment, aircraft status monitoring and post-flight analyzers and other airborne equipment. The monitoring and management device of the embodiment of the present application has a flight data collection function, and can collect parameters of each member system on the aircraft through ARINC 429, discrete quantity and other interfaces, and the collected parameters can cover all parameters listed in the real-time monitoring system parameter requirements. The monitoring and management device of the embodiment of the present application also has communication interaction function and data processing function, and can communicate with airborne equipment through the ARINC 429 bus interface, respectively realizing the control display function that meets the ARINC 739A protocol, the data printing function of the ARINC 740 protocol, and the message upload and download function of the ARINC 619 protocol, and can also convert the collected data into physical quantities, perform flight status identification, have the real-time monitoring function of data, and generate ACARS messages according to the logic defined by the monitoring requirements and the parameters required to be recorded. The monitoring and management device of the embodiment of the present application provides functions such as ACARS messages, real-time upload and download processing of messages, CDU control display setting messages and system parameters, message output, and wireless transmission of QAR data. Through RTMU, ACARS messages that meet the requirements of the airline can be provided, and real-time upload and download processing can be performed. Pilots and maintenance personnel can set and view ACARS messages and system parameters on the human-machine interface of CDU; RTMU can send ACARS message information to WQAR for recording through the RS422 interface, and send flight data to WQAR for recording through the ARINC717 bus interface; at the same time, the collected flight data and generated ACARS message information are stored in the matching 16GB removable CF card. The embodiment of the present application can transmit the recorded flight data and message information to the ground receiving base station through the wireless communication network under the conditions set after the flight. The data transmitted by both ACARS messages and WQAR can be provided to the ground operation control, safety supervision and maintenance engineering departments for aircraft status monitoring and post-flight analysis.

[0093] In addition, the monitoring and management device is also equipped with RTMU customized configuration tool software and simulation test software, which can provide customized configuration and test simulation functions for QAR data and ACARS messages. Users can generate an on-board customized configuration loader through the ground configuration tool, which can add or delete the parameters and frequency of QAR data collected by RTMU; can configure the event name, capture logic, and parameters to be recorded of ACARS messages, and can add, modify, and delete messages. RTMU has the functions of starting built-in self-test (BIT), maintenance BIT, and periodic BIT, and can support continuous monitoring and abnormality detection at the device level, monitor or monitor the status of ARINC 429, ARINC717, RS422, Ethernet, and discrete input and output channels, monitor the usage of internal memory, processor, power supply, storage card, and storage resources, and save BIT data to the system log.

[0094] In the embodiment of the present application, the monitoring and management device also includes a real-time clock circuit, which is composed of an independent RTC chip (real-time clock chip) and a backup battery. The entire system provides an accurate time function. The structural diagram is shown in FIG. Fig. 9As shown. The system provides a relatively accurate time data (year / month / day / hour / minute / second) based on UTC (universal standard time) for the whole machine, and prevents the time data from being lost after the system is powered off. The RTC chip is built-in with a TXCO (temperature compensated crystal oscillator) with a stability of ±3ppm. The PS sets or reads the time data of the real-time clock through the I2C interface. The real-time clock has its own backup power interface. When it detects that the main power supply drops to the threshold value, it automatically switches to the backup power supply seamlessly. The backup battery pack uses 1 to 2 button-type rechargeable batteries. The battery pack is connected to the +3.3V main power supply through a Schottky diode. During the system power-on operation, the Schottky diode is turned on, and the main power supply circuit charges the battery pack; when the system is powered off, the Schottky diode is turned off, and the battery pack supplies power to the real-time clock chip. For a battery pack with a capacity of 120mAh, the maximum current consumption of the real-time clock chip in battery-powered mode is 900nA, and the estimated battery life is: total battery capacity / current consumption = 120mAh / 900nA≈133333.3 hours, which is about 15 years. In practical applications, considering the factors of IC leakage current and battery self-discharge, 40% of this value is generally taken, which is about 6 years. The battery capacity can ensure that the RTC will operate for more than one year after the main power supply fails (when the room temperature is 25℃). The real-time clock circuit uses a crystal oscillator with an accuracy of ±3ppm. Even so, the real-time clock circuit will still have a certain error after running for a period of time (using a crystal oscillator with an accuracy of ±3ppm, the error is about 8 seconds per month of operation). The system can obtain standard time through ARINC 429 broadcast bus, mobile wireless communication operators or ground data receiving base stations. When it is found that the error between the local system time and the standard time is too large, the local time is automatically corrected according to relevant strategies.

[0095] The monitoring management device of the embodiment of the present application also includes a single board reset generating circuit, see Fig.10 , mainly composed of a reset chip and its peripheral circuits, which can provide power-on reset, watchdog function and power-off alarm function for the single board.

[0096] The monitoring and management device of the embodiment of the present application also includes a CF card interface, which is composed of a CF card reader chip, a CF card holder and an ESD (electrostatic discharge) protection device. The RTMU uses a CF card as a storage medium and is installed on a card slot. At the same time, an opening is designed on the front panel and is covered by a locked door. When the door of the front panel is opened, it can be installed and removed through the front panel. The user can easily install and remove the CF card on the front panel.

[0097] The monitoring and management device of the embodiment of the present application also includes a front panel human-machine interface. When the locked door of the front panel is opened, two RJ45 interfaces and three indicator LEDs can be seen. The two RJ45s are RS422 serial ports and Ethernet interfaces, respectively, and the above interfaces are used for maintenance and debugging. The three indicator LEDs are respectively: FDAS (flight crew warning system) fault indicator (reserved), DMU (digital prototype) fault indicator and CF card status indicator from top to bottom. Among them, the FDAS fault indicator can use a yellow light to indicate the BITE state of FDAS. The BITE state refers to the automatic test state of the detection and isolation fault provided by the system or device. After power-on, it is always on, indicating that the device performs a power-on self-test on the FDAS function board. If the BITE is successful, the light goes out, otherwise the light is always on. The DMU fault indicator can use a yellow light to indicate the BITE state of the DMU. After power-on, it is always on, indicating that the device performs a power-on self-test on the FDAS function board. If the BITE is successful, the light goes out, otherwise the light is always on. The CF card status indicator light is used to indicate the CF card status. It can use a red / green dual-color light to indicate the software loading and flight data reading and writing status.

[0098] The embodiment of the present application further provides a monitoring method of a monitoring management device, which is applied to a monitoring management device as described above, and the method includes:

[0099] The flight parameters of the airborne equipment are collected through the collection and processing module, and flight status identification and abnormality detection processing are performed according to the flight parameters to generate flight messages and monitoring data;

[0100] The airborne current is converted into a power supply current through a power supply module, and the acquisition and processing module is powered according to the power supply current.

[0101] It can be understood that the contents of the above-mentioned device embodiments are all applicable to the present method embodiments, the functions specifically implemented by the present method embodiments are the same as those of the above-mentioned device embodiments, and the beneficial effects achieved are also the same as those achieved by the above-mentioned device embodiments.

[0102] The embodiment of the present application provides a monitoring and management device and its implementation method. In the scheme, the monitoring and management device includes an acquisition and processing module and a power supply module; the acquisition and processing module is used to acquire the flight parameters of the airborne equipment, perform flight status identification and abnormality detection processing according to the flight parameters, and generate flight messages and monitoring data; the power supply module is used to convert the airborne current into a power supply current, and power the acquisition and processing module according to the power supply current. The embodiment of the present application acquires the flight parameters of the airborne equipment through the integrated interface circuit in the acquisition and processing module, and can perform flight status identification and abnormality detection processing on the flight parameters through the system-level chip circuit, generate flight messages and monitoring data, and improve the expansion capability of the monitoring and management device. The monitoring and management device of the embodiment of the present application has rich interfaces, and has reserved interfaces such as Ethernet, ARINC 429, ARINC717, RS422, discrete quantity, 591, RS485, etc., and has powerful functions. The embodiment of the present application adopts an SOC (system-level chip) with integrated PS / PL, and the main frequency processing capability is fast and the chip process manufacturing level is advanced. In addition, the product of the embodiment of the present application is highly scalable, and can be transformed into other scene application equipment when only the interface board is replaced. In addition, the self-checking function of the embodiment of the present application is rich, and can support continuous monitoring and abnormality detection at the device level, monitor or monitor the status of ARINC 429, ARINC717, RS422, Ethernet, discrete input and output channels, monitor the internal memory, processor, power supply, memory card and storage resource usage, etc., and save BIT data to the system log. The product of the embodiment of the present application has high integration, BIT function, can timely detect abnormalities and maintenance through the background, low labor cost, high chip integration, high manufacturability, low overall price and other advantages.

[0103] The embodiments described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. Those skilled in the art will appreciate that with the evolution of technology and the emergence of new application scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0104] Those skilled in the art will appreciate that the technical solutions shown in the figures do not constitute a limitation on the embodiments of the present application, and may include more or fewer steps than shown in the figures, or a combination of certain steps, or different steps.

[0105] The device embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separated, that is, they may be located in one place or distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0106] Those skilled in the art will appreciate that all or some of the steps in the methods disclosed above, and the functional modules / units in the systems and devices may be implemented as software, firmware, hardware, or a suitable combination thereof.

[0107] The terms "first", "second", "third", "fourth", etc. (if any) in the specification of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0108] It should be understood that in the present application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0109] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the above units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0110] The units described above as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0111] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0112] The preferred embodiments of the present application are described above with reference to the accompanying drawings, but the scope of the rights of the present application is not limited thereto. Any modification, equivalent substitution and improvement made by a person skilled in the art without departing from the scope and essence of the present application should be within the scope of the rights of the present application.

Claims

1. A monitoring management device, characterized in that: The monitoring management device includes an acquisition processing module and a power supply module; the acquisition processing module includes a system-level chip circuit, an integrated interface circuit, a local power supply circuit, a single board reset generation circuit, a real-time clock circuit and a CF interface, and the system-level chip circuit is respectively connected to the integrated interface circuit, the local power supply circuit, the single board reset generation circuit, the real-time clock circuit and the CF interface; The acquisition and processing module is used to collect flight parameters of airborne equipment, perform flight status identification and abnormality detection processing according to the flight parameters, and generate flight messages and monitoring data; The power supply module is used to convert the airborne current into the power supply current, and supply power to the acquisition and processing module according to the power supply current.

2. The device according to claim 1, characterized in that The system-on-chip circuit includes a processing system, a programmable logic device, a debugging and maintenance interface, a memory and a display panel; The processing system is respectively connected to the programmable logic device, the debugging and maintenance interface, the memory and the display panel; The debugging and maintenance interface includes a JTAG interface, a debugging and maintenance serial port and a debugging network port.

3. The device according to claim 1, characterized in that The integrated interface circuit includes an ARINC429 interface circuit, a discrete quantity interface circuit, an ARINC717 interface circuit, a serial port interface circuit and an Ethernet interface circuit; The ARINC429 interface circuit is used to collect ARINC429 flight data of other airborne equipment and communicate with other airborne equipment; The discrete quantity interface circuit is used to collect discrete quantity data of other airborne devices; The ARINC717 interface circuit is used to collect ARINC717 flight data of other airborne equipment; The serial port interface circuit is used for file transmission and communication with the wireless quick access recorder; The Ethernet interface circuit is used for Ethernet interconnection with other airborne devices.

4. The device according to claim 3, characterized in that The ARINC429 interface circuit includes an ARINC429 receiving circuit, an ARINC429 transmitting circuit and an ARINC429 built-in test circuit, wherein the ARINC429 receiving circuit is connected to the ARINC429 built-in test circuit, and the ARINC429 built-in test circuit is connected to the ARINC429 transmitting circuit; The ARINC429 receiving circuit includes an eight-channel level conversion chip for converting bus signals into level signals; The ARINC429 transmitting circuit includes a single-channel level conversion chip for converting the level signal into a bus signal; The ARINC429 built-in test circuit is composed of an analog switch device, a built-in test transmitting circuit, a built-in test receiving circuit and an input and output expander.

5. The device according to claim 3, characterized in that The discrete quantity interface circuit is composed of a discrete quantity input circuit, a discrete quantity output circuit and a discrete quantity internal test circuit; The discrete quantity input circuit includes an isolation diode, a first single-pole double-throw switch and a discrete quantity-digital level conversion chip; The discrete output circuit includes a ground / open type output circuit, a contact closure type output circuit and an ARINC591 type output circuit, the ground / open type output circuit includes a second single-pole double-throw switch and a discrete signal driver, the contact closure type output circuit includes a third single-pole double-throw switch and an analog switch, and the ARINC591 type output circuit includes a fourth single-pole double-throw switch and a relay; The discrete quantity in-machine test circuit comprises the analog switch, the input and output expander, the discrete quantity signal in-machine test driver and the discrete quantity signal in-machine test receiver.

6. The device according to claim 3, characterized in that The ARINC717 interface circuit is composed of an ARINC717 transceiver chip, a transmitter and a receiver.

7. The device according to claim 3, characterized in that The serial port interface circuit is composed of an RS232 interface circuit and an RS422 interface circuit.

8. The device according to claim 3, characterized in that The Ethernet interface circuit is composed of an Ethernet physical layer chip and a network transformer.

9. The device according to claim 1, characterized in that The power module includes an integrated protection circuit, an energy storage management circuit, a main control circuit, a conversion circuit, an output rectification circuit, an inductive energy storage unit, an output filtering circuit, an optocoupler isolation circuit, an output protection circuit, an auxiliary source and a status monitoring circuit.

10. A monitoring method for a monitoring management device, characterized in that: Applied to a monitoring management device according to any one of claims 1 to 9, the method comprising: The flight parameters of the airborne equipment are collected through the collection and processing module, and flight status identification and abnormality detection processing are performed according to the flight parameters to generate flight messages and monitoring data; The airborne current is converted into a power supply current through a power supply module, and the acquisition and processing module is powered according to the power supply current.

Images