A method, system, medium, and device for feedback implementation of receiver vector tracking.

Abstract

This invention discloses a feedback implementation method, system, medium, and device for receiver vector tracking. First, EKF processing and extraction of data for calculating the NCO adjustment are performed at the ARM end. Data encoding is then performed at the ARM end. Data communication occurs between the ARM and FPGA. At the FPGA end, satellite position and velocity calculations and code / carrier NCO adjustment calculations are performed at any given time. New ranging codes and carriers are generated at the FPGA end using the NCO adjustment values ​​to participate in the tracking calculation. If the newly generated ranging codes and carriers fail to enable successful satellite tracking, the tracking calculation result is transmitted to the ARM end for a new round of EKF, completing a new round of data update iterations. The above steps are repeated to complete the feedback loop. If the newly generated ranging codes and carriers enable successful satellite tracking, the iteration stops, and the result is output. This invention enables parallel high-precision calculation of vector tracking and feedback adjustment of the vector tracking loop in the hardware design, increasing execution efficiency and improving processing speed.

Description

Technical Field

[0001] This invention belongs to the field of satellite navigation, and specifically relates to a feedback implementation method, system, medium, and device for receiver vector tracking. Background Technology

[0002] While traditional navigation receivers are widely used, they still cannot meet the increasing navigation needs of users. The most significant drawback is the requirement for the receiver antenna to continuously receive satellite signals. If a satellite signal is briefly blocked, it must be reacquired to regain positioning. Considering the increasingly demanding urban applications, frequent signal loss or attenuation is a major challenge facing today's navigation satellite systems. Buildings and trees in the streets can easily block navigation satellite signals, causing the receiver channel tracking the blocked signal to lose track. When the blocked signal is restored after a period of time, the channel must reacquire the signal to re-enter tracking mode. Signal acquisition requires significant time and processor resources, hindering the receiver from providing continuous and reliable navigation services.

[0003] To improve the navigation performance of receivers in harsh environments, some researchers have explored using other navigation systems to assist satellite navigation systems, such as inertial sensors, visual sensors, mobile cellular networks, and WiFi. Others have investigated array receiving antenna technology. However, these methods all require additional hardware support, and the added hardware is often far more complex and expensive than the receiver itself. Furthermore, the development of inter-system information fusion algorithms significantly increases the complexity and cost of receiver hardware and software development. In recent years, software receiver technology has flourished. Its ease of configuration has attracted many researchers to use software receivers to study new satellite signal tracking methods to improve tracking performance. Among these, vector tracking technology based on software receivers has received widespread attention from researchers both domestically and internationally. This technology fully utilizes the inherent, unaddressed related information within the tracking loop through software algorithms, combining previously independent tracking loops with the navigation solution stage, thereby improving the receiver's ability to track satellite signals. Moreover, this technology requires no additional hardware or external auxiliary information, thus avoiding cost burdens. Compared to traditional tracking methods, vector tracking technology has significant advantages in tracking weak signals, high-dynamic user tracking, and instantaneous bridging of blocked satellite signals. Vector tracking technology also has an inherent advantage in overcoming the "urban canyon" effect. Traditional vector receivers process channel information serially in software, which consumes computing resources, increases processing time, increases power consumption, causes delays or loss of other channel information, and limits the number of channels. Therefore, to meet positioning and navigation requirements, this invention addresses the problem of signal loss due to the receiver's inability to maintain continuous tracking of satellite signals in complex and undesirable environments such as cities and forests. This invention proposes a method for implementing receiver vector tracking loop feedback, allowing the adjustment of the vector receiver tracking loop to be processed in parallel on the hardware side. This speeds up information processing, providing more timely and accurate information. Furthermore, the addition of a satellite position interpolation module on the hardware side saves hardware resources and computation time compared to traditional ephemeris demodulation, which consumes system memory and computation time. This accelerates the calculation of adjustments in the hardware-side vector tracking feedback loop. Summary of the Invention

[0004] The purpose of this invention is to provide a feedback implementation method, system, medium, and device for receiver vector tracking, enabling parallel high-precision calculation of vector tracking, solving the aforementioned problems of traditional vector receivers, reducing the processor's workload, and improving system execution efficiency.

[0005] The objective of this invention is achieved through the following technical solution:

[0006] A feedback implementation method for receiver vector tracking includes the following steps:

[0007] Step 1: Perform EKF processing and extract data for calculating NCO adjustment on the ARM side;

[0008] Step 2: Based on Step 1, perform data encoding on the ARM side;

[0009] Step 3: Based on Step 2, perform data communication between the ARM and FPGA;

[0010] Step 4: Perform satellite position and velocity calculations and code / carrier NCO adjustment calculations at any given time on the FPGA.

[0011] Step 5: On the FPGA side, use the NCO adjustment obtained in Step 4 to generate a new ranging code and carrier to participate in the tracking operation;

[0012] Step 6: According to step 5, if the newly generated ranging code and carrier cannot enable satellite tracking, the tracking calculation result is transmitted to the ARM terminal to perform a new round of EKF, complete a new round of data update iteration, and repeat steps (1) to (5) to complete the feedback loop; if the newly generated ranging code and carrier can enable satellite tracking, the iteration can be stopped and the result is output.

[0013] Further, step 1 includes the following steps:

[0014] Step 1.1: Calculate the receiver's predicted position velocity, clock bias and drift, measurement time, and transmission time;

[0015] First, the position and velocity of the receiver are estimated. The navigation filter of the vector tracking loop adopts an extended Kalman filter. The state variables of the filter are the components of the user receiver's position and velocity error in the x, y, and z axes and the receiver's clock error and clock drift error. The observed variables of the filter are the pseudorange of each tracking channel and the change in pseudorange rate. Using the Kalman filter equation, the state prediction value is obtained.

[0016] Step 1.2: Select five time points and the satellite's position, velocity, clock bias, and clock drift at each time point;

[0017] The receiver enters the process of parsing the satellite ephemeris and using the satellite orbit data in the ephemeris to calculate the satellite's position and velocity clock bias and drift. Five time points within a 10-minute period when the receiver is stably tracking the satellite are selected to calculate the satellite's position and velocity clock bias and drift information, which prepares for subsequent satellite velocity clock bias and drift interpolation calculations.

[0018] Furthermore, step 1.2 is only executed when the receiver is running in scalar positioning mode or in the initial state. This step is not executed in vector tracking mode and is replaced by satellite parameter interpolation.

[0019] Furthermore, step 2 must first ensure the accuracy of the data. The receiver's satellite position, velocity, clock difference, and clock drift must all be double-precision floating-point numbers. The more bits involved in the calculation, the more accurate the result. The double-precision floating-point numbers are converted and encoded according to the IEEE 754 floating-point format. The data format for satellite interpolation and NCO adjustment calculations on the FPGA side is also IEEE 754 encoded. Step 2 achieves the purpose of high-precision parallel computing.

[0020] Furthermore, in step 3, the on-chip BRAM of the FPGA is used on the AXI bus to perform data exchange by reading and writing temporary data. When the PS needs to write data to the PL, the AXI GPIO is called to transmit control information. This information is used to distinguish the tracking channel and the purpose of the data. The write function is used to write the data to the specified address in the BRAM. If the FPGA detects a change in the information transmitted by the AXI GPIO, it will read the data in the BRAM to complete the write operation from the PS to the PL. When the PL needs to write data to the PS, the FPGA sends an interrupt request to the ARM through the AXI bus and writes the data to the BRAM. When the ARM detects the corresponding interrupt signal, it starts reading the data pre-written in the BRAM by the FPGA, thereby completing the data transfer between the FPGA and the ARM.

[0021] Furthermore, step 4 includes the following steps:

[0022] Step 4.1 Complete the calculation of satellite position, velocity, clock difference, and clock drift at any given time;

[0023] The formula for calculating the nth degree Lagrange polynomial is obtained, and the satellite parameters for the starting point, ending point, and intermediate point are calculated using the following formula:

[0024]

[0025] In the formula, there are n+1 known variables x0, x1, ..., x in the interval [a, b]. n The corresponding function values ​​are y0, y1, ..., y n x in the interval i The corresponding estimated value y can be obtained for each. i x i With x k For distinct numbers of nodes, y k For x k The corresponding estimated value,

[0026] Ln (x) is the Lagrange estimate corresponding to x, l k (x) is the interpolation basis function;

[0027] The calculation formulas for different directions during position determination are as follows:

[0028]

[0029] In the formula, t is the observation time of the interpolation node; l k (t) is the interpolation basis function; (X(t),Y(t),Z(t)) are the satellite position coordinates at time t during interpolation, (X... k (t),Y k (t),Z k (t) represents the satellite position coordinates of the corresponding interpolation node, and the velocity clock difference and clock drift parameters are similar;

[0030] Step 4.2 Complete the calculation of carrier NCO adjustment amount;

[0031] The predicted value of the carrier frequency change obtained dynamically from the receiver is:

[0032]

[0033] In the formula, α represents the predicted value obtained using the corrected estimate; f carr For carrier standard frequency, This represents the rate of change of the relative distance between the receiver and the satellite, obtained from the navigation state estimate. The formula for its calculation is:

[0034]

[0035] In the formula, Let Vα be the velocity of satellite i at time k+1 calculated based on the satellite ephemeris. k+1 Indicates receiver speed. tα is the unit line-of-sight vector between satellite i and the receiver. d,k+1 This indicates receiver clock drift, measured in m / s. This indicates satellite clock drift. Since the frequency of satellite atomic clocks is quite stable, this term is 0 here. Δt is the discriminator update cycle. This represents the Doppler frequency shift rate of the carrier signal. For typical low-dynamic users, if the NCO update frequency is fast, the impact of this term is small, and its frequency change is ignored here. Therefore, the replicated carrier frequency input to the carrier NCO should be:

[0036]

[0037] In the formula f IFThe intermediate frequency determined for the radio frequency processing module;

[0038] Step 4.3 Complete the NCO adjustment calculation;

[0039] The frequency of the C / A code signal copied in the NCO should be:

[0040]

[0041] In the formula, f code The ranging code rate is used; the change in the phase of the replicated ranging code corresponds to the change in pseudorange, and its correction value is obtained according to geometric relationships:

[0042]

[0043] In the formula, The distance the satellite travels in time interval Δt is obtained by subtracting the satellite's position at two different times, or by calculating the satellite's velocity; therefore, the code phase input to the code generator is:

[0044]

[0045] The code phase is input to the code generator to adjust the phase of the locally replicated code, thereby obtaining the control quantities for carrier tracking and pseudo-code tracking, and the vector tracking loop is closed.

[0046] A receiver vector tracking feedback system is disclosed, implemented using a receiver vector tracking feedback method. The system includes a high-precision antenna for receiving satellite signals, a receiver RF front-end, and a receiver baseband ZYNQ motherboard. The ZYNQ motherboard includes a processing system (PS module), a programmable logic module (PL module), and an AXI4 bus. The PS module internally includes an ARM Cortex A9 processor, which performs baseband processing tasks such as satellite acquisition and search detection, navigation message decoding, satellite ephemeris extraction, interpolation parameter calculation, receiver PVT information decoding, extended Kalman filtering, and IEEE 754 data encoding. The PL module integrates a carrier NCO module, a code NCO module, a code generator module, an integral accumulation module, a carrier NCO feedback calculation module, a code NCO feedback calculation module, a satellite position interpolation calculation module, a PL-PS parameter transfer module, a segmented matched filter module, and an FFT calculation module.

[0047] The PS writes the control and calculation data required for tracking the NCO into the shared memory BRAM via the AXI bus. The PL parses the control and calculation data from the shared memory BRAM to participate in the NCO adjustment calculation. The PL stores the loop correlation values ​​and other data calculated during the tracking process in the memory BRAM and sends an interrupt request to the PS. The PS reads the tracking data from the shared memory BRAM via the AXI bus, performs phase and frequency discrimination, and updates the calculation results of the EKF.

[0048] The code NCO feedback calculation module and satellite position interpolation calculation module directly participate in the multi-channel parallel NCO adjustment calculation; it is necessary to design corresponding operation unit modules to perform operations such as addition, subtraction, multiplication, division, decoding, sine and cosine, rounding, and square root while ensuring the accuracy and speed of the operation; in order to save PL resources, the logic of time-division multiplexing of the calculation modules is adopted to complete the calculation of the entire process.

[0049] A computer-readable storage medium having a computer program / instructions stored thereon, which, when executed by a processor, implements the steps of a feedback implementation method for receiver vector tracking.

[0050] A computer program product includes a computer program / instructions that, when executed by a processor, implement steps of a feedback implementation method for receiver vector tracking.

[0051] An electronic device, comprising:

[0052] Memory, used to store computer programs;

[0053] A processor for executing the computer program to implement the instruction tracking method described in the feedback implementation method for receiver vector tracking.

[0054] The beneficial effects of this invention are as follows:

[0055] 1. This invention fully utilizes the parallel high-speed computing advantages of the FPGA inside the ZYNQ motherboard and the software processing capabilities of the ARM, deploying some of the parallel NCO adjustment and satellite parameter interpolation functions in the PL module, and deploying the rest in the PS module, which greatly simplifies the design process.

[0056] 2. This invention can effectively perform parallel high-precision calculations for vector tracking, change the adjustment method of tracking NCO from serial operation to parallel operation, and adopt a method of parallel satellite parameter interpolation for multiple tracking channels to reduce the system's computational load, improve the system's processing speed for multiple tracking channels, reduce the processor's burden, reduce chip power consumption, and improve overall processing efficiency. Attached Figure Description

[0057] Figure 1This is a schematic diagram of the overall system principle structure of the present invention;

[0058] Figure 2 This is a diagram of the overall system architecture of the present invention;

[0059] Figure 3 A flowchart illustrating the workflow of vector tracking feedback;

[0060] Figure 4 Data format encoding diagram;

[0061] Figure 5 A flowchart of the data transformation workflow;

[0062] Figure 6 Block diagram of the AXI4-Lite BRAM controller;

[0063] Figure 7 This is a general block diagram for implementing feedback communication based on BRAM;

[0064] Figure 8 Flowchart for carrier / ranging code NCO adjustment;

[0065] Figure 9(a) is a schematic diagram of satellite parameter interpolation and NCO adjustment control RTL.

[0066] Figure 9(b) is the unfolded RTL schematic diagram of Figure 9(a);

[0067] Figure 10 A graph showing the interpolation results of satellite parameters;

[0068] Figure 11 A graph showing the results of NCO adjustment for carrier / ranging code;

[0069] Figure 12 To generate a new carrier result diagram under the adjustment amount;

[0070] Figure 13 To generate a new ranging code result image under the adjustment. Detailed Implementation

[0071] The present invention will now be further described with reference to the accompanying drawings.

[0072] A feedback implementation method for receiver vector tracking, the overall system architecture of the present invention is shown in the figure below. Figure 2As shown, the system includes: a high-precision antenna for receiving satellite signals, a receiver's RF front-end, and a receiver's baseband ZYNQ motherboard. This architecture uses Xilinx's ZYNQ series chips, which feature a PS module (ARM) + PL module (FPGA) functional architecture, as its carrier. The ZYNQ-XC7020 motherboard used has a general-purpose GPIO interface, supporting various expandable devices. The GPIO interface connects to the RF front-end circuitry. The RF chip selected is the Max2771 from Maxium, which supports systems such as BeiDou, GPS, Galileo, GLONASS, and SBAS, offering powerful performance suitable for the design of this invention.

[0073] The ZYNQ motherboard includes: a processing system (PS module), a programmable logic module (PL module), and an AXI4 bus. Shared memory (BRAM) is used for data sharing between the PS and PL modules, allowing both modules to access data stored in the BRAM simultaneously via the AXI4 bus. The PL module integrates: a carrier NCO module, a code NCO module, a code generator module, an integral accumulation module, a carrier NCO feedback calculation module, a code NCO feedback calculation module, a satellite position interpolation calculation module, a PL-PS parameter transfer module, a segmented matched filter module, and an FFT calculation module. The PS module internally contains an ARM Cortex A9 processor, which performs baseband processing tasks such as satellite acquisition and search detection, navigation message decoding, satellite ephemeris extraction, interpolation parameter calculation, receiver PVT information decoding, extended Kalman filtering, and IEEE 754 data encoding.

[0074] The schematic diagram of the entire system is as follows: Figure 1 As shown: The vector tracking loop consists of two parts, PS and PL, to complete the closed loop. Multiple tracking channels run in parallel at the PL end. PS is responsible for updating the calculation data and bridging the tracking information of each channel. Even in the event of an undesirable environment, such as obstruction, low signal-to-noise ratio, or multipath effect, the satellite can still be locked, avoiding the waste of system running time and computing resources caused by the reacquisition process.

[0075] The workflow diagram of vector tracking feedback is as follows: Figure 3 As shown:

[0076] (1) Perform EKF processing and extract data for calculating NCO adjustment at the ARM end.

[0077] Step 1.1 Calculate the receiver's predicted position velocity, clock bias / drift, measurement time, and transmission time:

[0078] First, the receiver's position and velocity are estimated. The navigation filter of the vector tracking loop uses an extended Kalman filter. The filter's state is the state vector of the navigation filter, which is composed of the receiver's position, velocity, and clock state.

[0079]

[0080] Where the vector [δx] k ,δy k ,δz k ,δt b,k ] T This represents the components of the user receiver position error along the x, y, and z axes, and the receiver clock error, in vector form. The components of the user receiver velocity error along the x, y, and z axes and the receiver clock drift error are represented. Based on kinematics, the system state equations are established and discretized to obtain the discrete state equations:

[0081] δX k+1 =F k ·δX k+1 +W k

[0082] Where δX k+1 δX k The state vectors at time k+1 and time k are respectively, F k Let be the state transition matrix at time k, which is defined as: where T is the navigation filter update period.

[0083]

[0084] W k Let Q be the system discrete noise matrix at time k. k Let be the discrete noise variance matrix at time k, which satisfies:

[0085]

[0086] These represent the power spectral densities of the clock difference and clock drift noise of the x, y, and z axes, respectively.

[0087] The system's observation equation is: Z k+1 =H k+1 δX k+1 +β k+1 The observed parameters are pseudorange and pseudorange rate variation information converted from the phase and frequency discrimination results of each tracking channel:

[0088]

[0089] Where H k+1 The measurement matrix is ​​defined as follows:

[0090]

[0091] Each term in the matrix represents the partial derivative of the least squares method with respect to the x, y, and z directions.

[0092] The difference between the predicted receiver position and the actual receiver position, δP = [δx, δy, δz], is given by the filter. T According to geometric relationships, δP will project onto the line-of-sight (LOS) direction between the receiver and the satellite, causing pseudorange error. The receiver's clock error will also cause pseudorange error. The pseudorange error caused by both is expressed as follows:

[0093]

[0094] Where ε i It is pseudorange error measurement noise. The unit line-of-sight vector between the receiver's predicted position and satellite i is defined as:

[0095]

[0096] where X i (t) represents the position of satellite i. The relationship between the receiver's predicted position of the satellite, the phase detector result, and the pseudorange variation is as follows:

[0097]

[0098] in This represents the distance measurement code length of the satellite, where c is the speed of light. This indicates the ranging code rate of the satellite.

[0099] The receiver's speed and clock drift error affect the pseudorange rate variation, as expressed as:

[0100]

[0101] in Let θ be the velocity error state variable. i The relationship between pseudorange rate error measurement noise and the discriminator result and pseudorange variation is as follows:

[0102]

[0103] in This represents the distance measurement code length of the satellite, where c is the speed of light. This represents the ranging code rate of the satellite. θ k+1 To measure the noise vector, it is represented as:

[0104]

[0105] And satisfy

[0106]

[0107] R ρ , The pseudorange and pseudorange rate error measurement noise variance for each satellite, combined with the discrete state equation and observation equation of the integrated navigation filter, satisfy the conditions for Kalman filtering. The filtering process is as follows:

[0108]

[0109] P k+1 =(IK k+1 H k+1 )P k+1|k

[0110] The state error estimate at time k+1 can be obtained. The predicted position and velocity of the receiver are obtained.

[0111] Step 1.2 Select five time points and the satellite's position, velocity, clock bias, and clock drift at each time point;

[0112] The receiver analyzes the satellite ephemeris and uses the satellite orbit data in the ephemeris to calculate the satellite's position and velocity clock bias and drift. Five time points within a 10-minute period when the receiver is stably tracking the satellite are selected to calculate the satellite's position and velocity clock bias and drift information, preparing for subsequent satellite velocity clock bias and drift interpolation calculations. This process is only performed when the receiver is running in scalar positioning mode or in its initial state; in vector tracking mode, this step is not performed and is replaced by satellite parameter interpolation.

[0113] (2) Data encoding is performed at the PS (ARM) end.

[0114] The data used in PL calculations must be pre-encoded in IEEE 754 format to achieve high-precision parallel computing. First, data accuracy must be guaranteed. The receiver's satellite position, velocity, clock bias, and clock drift must all be double-precision floating-point numbers (64 bits). The more bits involved in the calculation, the more accurate the result. The double-precision floating-point numbers are converted and encoded according to the IEEE 754 floating-point format. The data format for satellite interpolation and NCO adjustment calculations on the FPGA (PL) side is also IEEE 754 encoded. The data format encoding diagram is shown below. Figure 4 As shown, `sign` represents the sign bit, 1 bit, where 0 represents a positive number and 1 represents a negative number; `biased exponent`: the biased exponent, i.e., the green square in the diagram, 11 bits, representing E, the exponent part; `fraction`: the mantissa, i.e., the red square in the diagram, 52 bits, representing M, the mantissa part; the data conversion workflow is as follows... Figure 5As shown, after this process, the data from the ARM side is converted into a data format that the PL can process to calculate the NCO adjustment.

[0115] (3) Perform data communication between PS (ARM) and PL (FPGA).

[0116] The ZYNQ's PL and PS need to exchange information, but they cannot communicate directly. Data transmission in the ZYNQ is performed on the AXI bus, utilizing the on-chip BRAM of the FPGA for data exchange through read / write operations. When the PS needs to write data to the PL, it calls the AXI GPIO to transmit control information. This information distinguishes the tracking channel and data purpose, and the write function writes the data to the specified address in the BRAM. If the FPGA detects a change in the AXI GPIO transmission, it reads the data from the BRAM to complete the write operation from the PS to the PL. When the PL needs to write data to the PS, the FPGA sends an interrupt request to the ARM via the AXI bus and writes the data to the BRAM. Upon detecting the corresponding interrupt signal, the ARM starts reading the data pre-written in the BRAM by the FPGA, thus completing the data transfer between the FPGA and the ARM.

[0117] BRAM is the memory array in PL. Communication based on shared memory is achieved by the PS and PL performing read and write operations on the dual-port BRAM. In the PL, read and write operations are performed on the BRAM by instantiating and outputting signals such as address, clock, data, enable, and read / write control. In the PS, the processor core needs to control the read and write operations of the dual-port BRAM through the AXI BRAM controller in the Vivado design software. Because the read / write data throughput is relatively low, the AXI BRAM can be configured in the AXI4-Lite type bus interface mode to save design resources and reduce design complexity. The AXI4-Lite BRAM controller block diagram is shown below. Figure 6 As shown:

[0118] The AXI4-Lite interface mode is a low-performance AXI4 interface. During the interactive communication process, the AR core's M_AXI_GP0 acts as the master port, connecting to the AXI interconnect module. The AXI interconnect module, in turn, connects to the AXI BRAM Controller module, ensuring that the PS side can read and write to the dual-port BRAM IP core. The overall block diagram for implementing feedback communication based on BRAM is as follows: Figure 7 As shown.

[0119] AXI GPIO handles address decoding and read / write control throughout the communication scheme. It connects to the bus via 12-bit GPIO ports for bus configuration. From high to low, the 12-bit GPIO ports represent a 1-bit chip select signal, a 1-bit read signal, a 1-bit write signal, and a 9-bit address signal. Whenever data needs to be transmitted, the bus chip select signal, read / write control, and read / write address must first be set. Then, the AXI BRAM Controller module reads and writes to the BRAM block to complete the data read / write operation.

[0120] (4) Perform satellite position and velocity calculations and code / carrier NCO adjustment calculations at any time on the FPGA.

[0121] Step 4.1 Complete the calculation of satellite position, velocity, clock difference, and clock drift at any given time;

[0122] Receiver positioning requires at least four satellites. If the instantaneous coordinates of these satellites are calculated serially at the ARM end using fixed formulas based on Kepler orbit parameters and orbital perturbation parameters from the received navigation messages, the computational load is high, the process is complex, the calculation time is long, and the chip power consumption is high. Therefore, it is necessary to reduce the burden on the processor chip, avoid complex calculations, and reduce memory usage. Because the components of satellite position and velocity change smoothly over time, an interpolation method can be used. Only the satellite parameters at the starting point, ending point, and intermediate points need to be calculated; the remaining time points can be calculated using polynomial fitting.

[0123] This invention selects the Lagrange interpolation method: the iterative approach is inheritable, flexible in implementation, and highly accurate. The specific calculation process is as follows:

[0124] There are n+1 known independent variables x0, x1, ... x1 in the interval [a, b]. n and the corresponding function values ​​y0, y1…y n For any x in [a, b] i All can be obtained with x i The corresponding estimated value y i The formula is as follows:

[0125]

[0126] In the formula L n (x) is a Lagrange polynomial; k Let n be an undetermined polynomial of degree no more than n, also called an interpolation basis function. In this case, the Lagrange interpolation order is n, satisfying the following formula:

[0127]

[0128] The specific calculation formula is as follows:

[0129]

[0130] Combining the above formula, the formula for calculating an nth-degree Lagrange polynomial is:

[0131]

[0132] In the formula x i With x k Let L be a distinct number of nodes, x be any value in the given interval [a, b]. n (x) represents the Lagrange estimate corresponding to x. The calculation formulas for different directions are as follows:

[0133]

[0134] In the formula, t is the observation time of the interpolation node; l k (t) is the interpolation basis function; (X(t),Y(t),Z(t)) are the satellite position coordinates at time t during interpolation, (X... k (t),Y k (t),Z k (t) represents the satellite position coordinates of the corresponding interpolation node, and the velocity clock difference and clock drift parameters are similar.

[0135] Step 4.2 Complete the calculation of carrier NCO adjustment amount.

[0136] After obtaining the receiver's navigation state estimate, the Doppler frequencies of the carrier and C / A code signals can be predicted based on the known receiver state and satellite ephemeris or satellite position interpolation. This process is precisely the inverse process of solving the receiver dynamics using Doppler frequencies. The predicted value of the carrier frequency change obtained from the receiver dynamics can be obtained as follows:

[0137]

[0138] In the formula, α represents the predicted value obtained using the corrected estimate. carr For carrier standard frequency, This represents the rate of change of the relative distance between the receiver and the satellite, obtained from the navigation state estimate. The formula for its calculation is:

[0139]

[0140] In the formula, Let Vα be the velocity of satellite i at time k+1 calculated based on the satellite ephemeris. k+1 Indicates receiver speed. tα is the unit line-of-sight vector between satellite i and the receiver. d,k+1This indicates receiver clock drift, measured in m / s. This indicates satellite clock drift. Since the frequency of satellite atomic clocks is quite stable, this term is 0 here. Δt is the discriminator update cycle. This represents the Doppler frequency shift rate of the carrier signal. For typical low-dynamic users, if the NCO update frequency is fast, the impact of this term is small, and its frequency change is ignored here. Therefore, the replicated carrier frequency input to the carrier NCO should be:

[0141]

[0142] In the formula f IF The intermediate frequency determined for the radio frequency processing module.

[0143] Step 4.3 Complete the NCO adjustment calculation.

[0144] In step (4), the method for calculating the code NCO adjustment is as follows: Since there is a linear relationship between the Doppler frequency shift of the pseudocode signal and the Doppler frequency shift of the carrier signal, it is easy to obtain that the frequency of the replicated C / A code signal in the code NCO should be:

[0145]

[0146] In the formula f code The ranging code rate is given. The change in the phase of the replicated ranging code corresponds to a change in the pseudorange. Based on geometric relationships, its correction value can be obtained as:

[0147]

[0148] In the formula The distance the satellite travels in time interval Δt can be obtained by subtracting the satellite's position at two different times, or it can be calculated based on the satellite's velocity. The code phase input to the code generator is then:

[0149]

[0150] The code phase is input to the code generator to adjust the phase of the locally replicated code. This provides the control inputs for carrier tracking and pseudocode tracking, completing the vector tracking loop. The carrier / ranging code NCO adjustment flowchart is shown below. Figure 8 As shown.

[0151] Calculating satellite position and velocity at any given time and calculating code / carrier NCO adjustment amounts on the PL (FPGA) side requires performing basic IEEE 754 double-precision floating-point arithmetic operations, as well as square root, sine and cosine operations, integer rounding, and IEEE 754 decoding. The arithmetic units are implemented using IP cores and RTL: square root calculations (addition, subtraction, and square root) are performed using IEEE 754 double-precision floating-point IP cores; multiplication is coded using RTL; and division uses multiplication RTL code plus a reciprocal IEEE 754 double-precision floating-point IP core. This multiplication and division design reduces hardware resource consumption. Sine and cosine operations use an equivalent method; integer rounding and IEEE 754 decoding operations use IEEE 754 floating-point to fixed-point conversion IP cores to restore the true value of the data, thus participating in the accurate calculation of code / carrier NCO adjustment amounts to complete the vector tracking process. All arithmetic units employ time-division multiplexing, with identical operations performed in a single module, saving hardware resources. The parallel NCO adjustment and satellite parameter interpolation operations on the FPGA reduce the computational burden on the ARM processor. The schematic diagrams of satellite parameter interpolation and NCO adjustment control RTL are shown in Figures 9(a) and 9(b):

[0152] (5) At the FPGA end, the NCO adjustment is used to generate a new ranging code and carrier to participate in the tracking operation.

[0153] (6) If the newly generated ranging code and carrier cannot enable the satellite to track successfully, the tracking calculation result is transmitted to the ARM end to perform a new round of EKF, complete a new round of data update iteration, and repeat steps (1) to (5) to complete the feedback loop; if the newly generated ranging code and carrier can enable the satellite to track successfully, the iteration can be stopped and the result is output.

[0154] The experiment used GPS L1 signals for vector tracking feedback adjustment. The satellite parameter interpolation results are as follows: Figure 10 As shown, the carrier / ranging code NCO adjustment result is as follows: Figure 11 As shown, parallel computing can be achieved across multiple channels, and the test results for each channel are similar. The calculation results for channel 0 are displayed. The results of generating new carrier and ranging code under adjustment are shown below. Figure 12 and Figure 13 As shown above, the basic principles, main features and advantages of the present invention have been illustrated and described.

[0155] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A feedback implementation method for receiver vector tracking, characterized in that: Includes the following steps: Step 1: Perform EKF processing and extract data for calculating NCO adjustment on the ARM side; Step 1.1: Calculate the receiver's predicted position velocity, clock bias and drift, measurement time, and transmission time; First, the position and velocity of the receiver are estimated. The navigation filter of the vector tracking loop adopts an extended Kalman filter. The state variables of the filter are the components of the user receiver's position and velocity error in the x, y, and z axes and the receiver's clock error and clock drift error. The observed variables of the filter are the pseudorange of each tracking channel and the change in pseudorange rate. Using the Kalman filter equation, the state prediction value is obtained. Step 1.2: Select five time points and the satellite's position, velocity, clock bias, and clock drift at each time point; The receiver enters the process of parsing the satellite ephemeris and using the satellite orbit data in the ephemeris to calculate the satellite's position and velocity clock bias and drift. Five time points within a 10-minute period when the receiver is stably tracking the satellite are selected to calculate the satellite's position and velocity clock bias and drift information, which prepares for subsequent satellite velocity clock bias and drift interpolation calculations. Step 2: Based on Step 1, perform data encoding on the ARM side; Step 3: Based on Step 2, perform data communication between the ARM and FPGA; First, the BRAM on the FPGA chip is used to implement read and write data temporary storage on the AXI bus to perform data interaction. When the PS end needs to write data information to the PL end, the AXIGPIO is called to transmit control information. This information is used to distinguish the tracking channel and the purpose of the data. The write function is used to write the data information to the specified address in the BRAM. If the FPGA end detects that the information transmitted by AXIGPIO has changed, it will read the data information in the BRAM to complete the write operation that the PS end needs to perform to the PL end. When the PL terminal needs to write data to the PS terminal, the FPGA sends an interrupt request to the ARM via the AXI bus and writes the data into the BRAM. When the ARM detects the corresponding interrupt signal, it starts reading the data pre-written in the BRAM by the FPGA, thereby completing the data transfer between the FPGA and the ARM. Step 4: Perform satellite position and velocity calculations and code / carrier NCO adjustment calculations at any given time on the FPGA. Step 5: On the FPGA side, use the NCO adjustment obtained in Step 4 to generate a new ranging code and carrier to participate in the tracking operation; Step 6: According to step 5, if the newly generated ranging code and carrier cannot enable satellite tracking, the tracking calculation result is transmitted to the ARM terminal to perform a new round of EKF, complete a new round of data update iteration, and repeat steps (1) to (5) to complete the feedback loop; if the newly generated ranging code and carrier can enable satellite tracking, the iteration can be stopped and the result is output.

2. The feedback implementation method for receiver vector tracking according to claim 1, characterized in that: Step 1.2 is executed only when the receiver is running in scalar positioning mode or in the initial state. This step is not executed in vector tracking mode and is replaced by satellite parameter interpolation.

3. The feedback implementation method for receiver vector tracking according to claim 1, characterized in that: Step 2 first requires ensuring data accuracy. The receiver's satellite position, velocity, clock difference, and clock drift must all be double-precision floating-point numbers. The more bits involved in the calculation, the more accurate the result. The double-precision floating-point numbers are converted and encoded according to the IEEE 754 floating-point format. The data format for satellite interpolation and NCO adjustment calculations on the FPGA side is also IEEE 754 encoded. Step 2 achieves the goal of high-precision parallel computing.

4. The feedback implementation method for receiver vector tracking according to claim 1, characterized in that: Step 4 includes the following steps: Step 4.1 Complete the calculation of satellite position, velocity, clock difference, and clock drift at any given time; The formula for calculating the nth degree Lagrange polynomial is obtained, and the satellite parameters for the starting point, ending point, and intermediate point are calculated using the following formula: In the formula, there are n+1 known variables x0, x1, ..., x in the interval [a, b]. n The corresponding function values ​​are y0, y1, ..., y n x in the interval i The corresponding estimated value y can be obtained for each. i x i With x k For distinct numbers of nodes, y k For x k The corresponding estimated value, L n (x) is the Lagrange estimate corresponding to x, l k (x) is the interpolation basis function; The calculation formulas for different directions during position determination are as follows: In the formula, t is the observation time of the interpolation node; l k (t) is the interpolation basis function; (X(t),Y(t),Z(t)) are the satellite position coordinates at time t during interpolation, (X... k (t),Y k (t),Z k (t) represents the satellite position coordinates of the corresponding interpolation node, and the velocity clock difference and clock drift parameters are similar; Step 4.2 Complete the carrier NCO adjustment calculation; The predicted value of the carrier frequency change obtained dynamically from the receiver is: In the formula, α represents the predicted value obtained using the corrected estimate; f carr For carrier standard frequency, This represents the rate of change of the relative distance between the receiver and the satellite, obtained from the navigation state estimate. The formula for its calculation is: In the formula, Let Vα be the velocity of satellite i at time k+1 calculated from the satellite ephemeris. k+1 Indicates receiver speed. tα is the unit vector of the line of sight between satellite i and the receiver. d,k+1 This indicates receiver clock drift, measured in m / s. This indicates satellite clock drift. Since the frequency of satellite atomic clocks is quite stable, this term is 0 here. Δt is the discriminator update period. This represents the Doppler frequency shift rate of the carrier signal. For typical low-dynamic users, if the NCO update frequency is fast, the impact of this term is small, and its frequency change is ignored here. Therefore, the replicated carrier frequency input to the carrier NCO should be: In the formula f IF The intermediate frequency determined for the radio frequency processing module; Step 4.3 Complete the NCO adjustment calculation; The frequency of the C / A code signal copied in the NCO should be: In the formula, f code The ranging code rate is used; the change in the phase of the replicated ranging code corresponds to the change in pseudorange, and its correction value is obtained according to geometric relationships: In the formula, The distance the satellite travels in time interval Δt is obtained by subtracting the satellite's position at two different times, or by calculating the satellite's velocity; therefore, the code phase input to the code generator is: The code phase is input to the code generator to adjust the phase of the locally replicated code, thereby obtaining the control quantities for carrier tracking and pseudo-code tracking, and the vector tracking loop is closed.

5. A feedback system for receiver vector tracking, characterized in that: The system, implemented using any one of claims 1 to 4, comprises a high-precision antenna for receiving satellite signals, a receiver's radio frequency front-end, and a receiver's baseband ZYNQ motherboard. The ZYNQ motherboard includes a processing system (PS module), a programmable logic module (PL module), and an AXI4 bus. The PS module internally houses an ARM Cortex A9 processor, performing baseband processing tasks such as satellite acquisition and search detection, navigation message decoding, satellite ephemeris extraction, interpolation parameter calculation, receiver PVT information decoding, extended Kalman filtering, and IEEE 754 data encoding. The PL module integrates a carrier NCO module, a code NCO module, a code generator module, an integral accumulation module, a carrier NCO feedback calculation module, a code NCO feedback calculation module, a satellite position interpolation calculation module, a PL-PS parameter transfer module, a segmented matched filter module, and an FFT calculation module. The PS writes the control and calculation data required for tracking the NCO into the shared memory BRAM via the AXI bus. The PL parses the control and calculation data from the shared memory BRAM to participate in the NCO adjustment calculation. The PL stores the loop correlation values ​​and other data calculated during the tracking process in the memory BRAM and sends an interrupt request to the PS. The PS reads the tracking data from the shared memory BRAM via the AXI bus, performs phase and frequency discrimination, and updates the calculation results of the EKF. The code NCO feedback calculation module and satellite position interpolation calculation module directly participate in the multi-channel parallel NCO adjustment calculation; it is necessary to design corresponding operation unit modules to perform operations such as addition, subtraction, multiplication, division, decoding, sine and cosine, rounding, and square root while ensuring the accuracy and speed of the operation; in order to save PL resources, the logic of time-division multiplexing of the calculation modules is adopted to complete the calculation of the entire process.

6. A computer-readable storage medium having a computer program / instructions stored thereon, characterized in that: When the computer program / instructions are executed by the processor, they implement the steps of the method described in any one of claims 1 to 4.

7. A computer program product comprising a computer program / instructions, characterized in that: When the computer program / instructions are executed by the processor, they implement the steps of the method described in any one of claims 1 to 4.

8. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the instruction tracing method as described in any one of claims 1 to 4.

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