Area array static LCMV algorithm implementation based on FPGA

By implementing the static LCMV algorithm of the surface matrix on FPGA, and using cholesky decomposition to perform matrix inversion, the problem of difficulty in inversion of the large-scale surface matrix is ​​solved, real-time static LCMV weight calculation is realized without the need for training data, and the real-time and efficiency of the algorithm are improved.

CN119829006APending Publication Date: 2025-04-15NANJING UNIV OF SCI & TECH
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Patent Information

Application Number
CN202411888497.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-09
Publication Date
2025-04-15

AI Technical Summary

Technical Problem

Large-scale surface arrays encounter difficulties in inversion, and the prior art requires training data to calculate static LCMV weights, which cannot be processed in real time without training data.

Method used

The FPGA-based surface matrix static LCMV algorithm is used to construct the constraint matrix and the self-conjugation matrix, use cholesky decomposition to perform matrix inversion, and calculate the LCMV static weight, real-time calculation is achieved when the azimuth pitch angle of the expected signal and the interference signal is known.

Benefits of technology

The problem of difficulty in inverse calculation of large-scale surface arrays is solved, and the static LCMV weights are calculated in real time without training data is not required, which improves the real-time and efficiency of the algorithm.

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Abstract

The invention discloses an area array static LCMV algorithm based on an FPGA, and belongs to the field of array signal processing. The method comprises a steering vector module, a constraint matrix module, a matrix multiplication module, a matrix inversion module, a response matrix generation module and a weight solving module. Firstly, expected angle information and interference angle information are input into a steering vector module, and a steering vector of the steering vector module is solved. Secondly, inputting the steering vector into a constraint matrix module to construct a constraint matrix C1; then inputting the constraint matrix into a matrix multiplication module to obtain a self-conjugate matrix C1HC1; inputting the self-conjugation matrix into a matrix inversion module, and solving an inverse matrix W of the self-conjugation matrix by using a cholesky decomposition method; and finally, inputting the steering vector, the inverse matrix W and a response matrix F of the response matrix generation module into a weight solving module to obtain static LCMV weight information. According to the invention, a large-scale area array is used as a background, and a static LCMV beam forming algorithm is realized on an FPGA by using time division multiplexing.
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Description

Technical Field

[0001] The invention belongs to the technical field of array signal processing, and in particular relates to an algorithm implementation of static LCMV of an area array based on FPGA. Background Art

[0002] Large-scale phased arrays have the characteristics of large array aperture and large number of arrays. Therefore, large-scale phased arrays have better gain, more accurate beam pointing, more degrees of freedom and other characteristics. The static LCMV algorithm is based on large-scale arrays. The increase in the number of array elements makes matrix inversion difficult to achieve. Therefore, the LCMV static weight calculation method is used to enable FPGA to perform matrix inversion. Anti-interference processing can also be performed in two-dimensional directions using arrays. The directional pattern formed by the LCMV static weight beam is a static directional pattern, and the null pit it produces is a fixed null pit with a known direction. To calculate the LCMV static weight, it is necessary to know the directional information of the interference signal, and then suppress the interference through the static weight. The directional pattern formed by the LCMV static weight has good sidelobe characteristics. Summary of the invention

[0003] The present invention proposes an algorithm implementation of static LCMV of a large-scale array based on FPGA. The algorithm calculates the LCMV static weight information when the desired signal direction and the interference angle direction are known, and implements FPGA. The algorithm solves the difficulty of inversion of large-scale arrays, and completes the weight calculation using FPGA only for the azimuth and elevation angles of the desired signal and the interference signal without the need for training data.

[0004] The technical solution of the present invention is: an algorithm implementation of static LCMV of an array based on FPGA, and the specific steps are:

[0005] Step 1: Assume that the array model is M×N dimensional, and the array model is distributed in the yoz plane. The spacing between the array elements arranged on the y axis and the horizontal line parallel to the y axis is d1, and the spacing between the array elements arranged on the z axis and the horizontal line parallel to the z axis is d2. The time delay expression of the array element with coordinate position (p, q) relative to the coordinate origin in the two-dimensional array model block diagram is:

[0006]

[0007] The expression of the two-dimensional array steering vector is:

[0008]

[0009] It can be deduced that the specific steering vector of the two-dimensional array is:

[0010]

[0011] λ is the wavelength of the signal.

[0012] Step 2: Construct the constraint matrix:

[0013] The desired signal and interference signal steering vectors are stored in RAM to form a constraint matrix.

[0014] Step 3: Calculate the self-conjugate matrix:

[0015] The constraint matrix is ​​input into the matrix multiplication module to obtain the self-conjugate matrix.

[0016] Step 4: Use Cholesky decomposition to invert the self-conjugate matrix. This step includes a multiplication and addition calculation module and a division calculation module. The specific steps of matrix inversion are as follows:

[0017] 1. Perform LC decomposition according to the formula to obtain the element values ​​of matrices C and L. The specific formula is as follows:

[0018]

[0019] LC decomposition includes multiplication, addition, and division operations. The elements of A, C, and L in the dual-port RAM are output to the multiplication and addition calculation module and the division calculation module for corresponding calculations, and then the calculated element values ​​of the matrices C and L are stored in the dual-port RAM.

[0020] 2. Obtain the element value of matrix Y according to the formula. The specific formula is as follows:

[0021]

[0022] To obtain the elements of the matrix Y, there are multiplication and addition and division operations. The elements of C and Y in the dual-port RAM are output to the multiplication and addition calculation module and the division calculation module for corresponding calculations, and the calculated element values ​​of Y are stored in the dual-port RAM.

[0023] 3. Obtain the element value of matrix W according to the formula. The specific formula is as follows:

[0024]

[0025] To obtain the elements of the matrix W, a multiplication-addition operation is performed. The elements of Y, L, and W in the dual-port RAM are output to the multiplication-addition calculation module for calculation. The calculated elements of W are stored in the dual-port RAM. The element value is the result of the matrix inversion.

[0026] Step 4: Generate the response matrix:

[0027] After the matrix inversion is completed, the response matrix generation module generates a response matrix and outputs it to the weight calculation module.

[0028] Step 5: According to the formula of LCMV static weight:

[0029] W opt =C1(C1 H C1) -1 F

[0030] The first column of the self-conjugate inverse matrix is ​​selected through the response matrix, and then the matrix element multiplication operation is performed. The elements of the constraint matrix are multiplied by the selected self-conjugate inverse matrix column elements, and the matrix element addition operation is performed on the multiplication result, and finally the LCMV static weight information is obtained.

[0031] The beneficial effects of the present invention are:

[0032] The present invention receives the expected angle information and the interference angle information, calculates the corresponding steering vector; then forms a constraint matrix through the steering vector of the expected angle information and the interference angle information; then performs complex multiplication operation to calculate the self-conjugate matrix; then uses the Cholesky decomposition method to perform matrix inversion operation, and uses multiplication and addition operation and division operation to calculate the elements of the inverse matrix; finally, calculates the weight information through multiplication and addition operation. By inputting the changes of the expected angle information and the interference angle information, different weight information can be calculated. The algorithm uses the time-division multiplexing method in the operation process of steering vector, self-conjugate matrix and matrix inversion, which greatly reduces the consumption of FPGA resources. When calculating the steering vector, self-conjugate matrix and weight, the pipeline design is used to improve the overall operation speed and improve the real-time performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 It is a block diagram of the static LCMV algorithm module of the present invention.

[0034] Figure 2 It is a flowchart of the steering vector calculation process of the present invention.

[0035] Figure 3 It is a flowchart of the self-conjugate matrix calculation process of the present invention.

[0036] Figure 4 It is a block diagram of the specific calculation idea of ​​the self-conjugate matrix of the present invention.

[0037] Figure 5 It is a matrix inversion block diagram of the present invention.

[0038] Figure 6 It is a state transition block diagram of the state machine 1 of the present invention.

[0039] Figure 7 It is the update sequence diagram of the element value address index of matrix C and matrix L of the present invention.

[0040] Figure 8 It is a state transition block diagram of the state machine 2 of the present invention.

[0041] Fig. 9 It is the matrix Y element value address index update sequence diagram of the present invention.

[0042] Fig.10 It is a state transition block diagram of the state machine 3 of the present invention.

[0043] Fig.11 It is a matrix W element value address index update sequence diagram of the present invention.

[0044] Fig.12 It is the multiplication and addition calculation block diagram of the present invention.

[0045] Fig.13 It is a division operation block diagram of the present invention.

[0046] Fig.14 It is a weight obtaining block diagram of the present invention. DETAILED DESCRIPTION

[0047] The specific implementation of the embodiment of the present invention is described in detail below in conjunction with the accompanying drawings. It should be understood that the specific implementation described here is only used to illustrate and explain the embodiment of the present invention, and is not used to limit the embodiment of the present invention. The specific steps are as follows:

[0048] Step 1. Figure 2 The steerable vector module uses two cordic IP cores and two complex multipliers. The complex multipliers and cordic IP cores use time-division multiplexing to save FPGA resources.

[0049] First, the desired angle information and interference angle information (azimuth and elevation) are input into the cordic IP core using the time-division multiplexing method. The trigonometric function of the azimuth angle is calculated first, and then the trigonometric function of the elevation angle is calculated. Then, the first step of the time-division multiplexing method is to use complex multiplier 2 to calculate sinθ and The product of

[0050] The second step uses complex multiplier 2 to calculate The product of and parameter 2df / c, and using complex multiplier 1 to calculate The product of the parameter 2df / c;

[0051] The third step uses complex multiplier 2 to calculate The product of the position of the array element and the parameter array element obtains the y-axis phase information of the array element, and at the same time calculates The product of the array element position and the parameter array element position is used to obtain the array element z-axis phase information. Finally, the sum of the array element y-axis phase information and the array element z-axis phase information is sent to the second cordic IP core to calculate the steering vector of the azimuth pitch angle. After calculating the element value of the steering vector of an array element, the parameter array element position is updated until all the element values ​​of the steering vector are calculated.

[0052] The input range of cordic IP core is -1~1, and there is a fixed-point bit number that has been determined. It will automatically multiply by π internally, so the input range of azimuth and elevation angles is -1~1. The input phase information range of the second cordic IP core is also -1~1. Because the output data characteristic is a period of 2, the bit number is selected to make the input range between -1~1, and then the steering vector is calculated.

[0053] Step 2. The steering vector calculated by the steering vector module is input to the constraint matrix module for storage to form an M×N constraint matrix, which is subsequently output to the matrix inversion module and the weight calculation module.

[0054] Step 3. Then perform matrix multiplication. The size of the rectangular array for matrix multiplication is 11×3072*3072×11. To perform one element multiplication of the rectangular array, 3072 complex multipliers are required, which consumes a lot of FPGA resources. Therefore, the matrix multiplication module uses time-division multiplexing for the complex multipliers, and only uses 11 complex multipliers to complete the operation.

[0055] According to the attached Figure 3 , read the constraint matrix element values ​​in RAM and send them to the complex multiplier for multiplication. Then accumulate the results of the complex multiplier to get the self-conjugate matrix element values. This module uses 11 complex multipliers for calculation.

[0056] After the first column elements of the constraint matrix conjugate matrix are multiplied by the first row elements of the constraint matrix, the calculated values ​​are temporarily stored using 121 registers. This results in an 11×11 matrix. The specific calculation idea is as follows: Figure 4 Then, the second column element value of the conjugate matrix of the constraint matrix and the second row element value of the constraint matrix are multiplied in the same way to obtain an 11×11 matrix, which is then accumulated into the previous 11×11 matrix, and the accumulation is performed 3072 times. Finally, 22 ports are used to output the real and imaginary parts of the self-conjugate matrix.

[0057] Step 4. The three formulas for matrix inversion using the Cholesky decomposition method correspond to three state machines. The specific steps are as follows: Figure 5 , attached Figure 6 This is the process of state machine 1. The steps of state machine 1 are as follows:

[0058] (1) Store the self-conjugate matrix element values ​​calculated by the multiplication module into RAM. At this time, the matrix is ​​the matrix A of the matrix inversion module. After all element values ​​are stored, switch to step (2).

[0059] (2) According to the element value address index Cij (i, j = 0, 1...10) currently calculated, update the address of the multiplication and addition data, read the 10 element values ​​of the i-th row in the matrix CRAM according to the address, and the matrix L H The jth row of , that is, the 10 elements of the jth column in the matrix L RAM. The read data is sent to the multiplication and addition calculation module, and the 10 element values ​​are all sent to the multiplication and addition calculation module and then converted to step (3).

[0060] (3) The multiplication and addition calculation module performs multiplication and addition calculations, obtains Cij, and switches to step (4).

[0061] (4) Store the Cij element value calculated by the multiplication and addition calculation module into the RAM of the matrix C, and input Cij to the dividend port of the division calculation module, and switch to step (5).

[0062] (5) Store the Cjj element value calculated by the multiplication and addition calculation module into the register and switch to step (6).

[0063] (6) Input the Cjj element value to the divisor port of the division calculation module, and perform a division operation to obtain the Lij element value. After the division is completed, switch to step (7).

[0064] (7) Store the Lij element value calculated by the division module into the RAM of the matrix L and switch to step (8).

[0065] (8) Update the element address indexes i and j. The specific updates are as shown in the attached Figure 7 , switch to step (2). When i=j=10, the update is completed and switch to step (1) to wait for the next set of self-conjugate matrix element values.

[0066] After obtaining the element values ​​of matrix C and matrix L, switch state machine 1 to state machine 2, as shown in the attached figure. Figure 8 This is the process of state machine 2. The specific steps are as follows:

[0067] (1) Wait for state machine 1 to end and enter state machine 2, and initialize all values ​​of state machine 2. Wait for the end mark of state machine 1 to arrive and switch to step (2).

[0068] (2) According to the address index of the currently calculated element value Yij (i, j = 0, 1...10), update the address of the multiplication and addition data, read the 10 elements of the i-th row in the RAM of the matrix C according to the address index, and read the 10 elements of the j-th column in the RAM of the matrix Y, send the read data to the multiplication and addition calculation module, and switch to step (3) after all 10 element values ​​are input into the multiplication and addition calculation module.

[0069] (3) The multiplication and addition calculation module performs multiplication and addition operations, obtains the multiplication and addition value for division calculation, and switches to step (4).

[0070] (4) According to the address index of the currently calculated element value Yij (i, j = 0, 1...10), select the input data of the division calculation module, and after the selection is completed, switch to step (5).

[0071] (5) The division calculation module performs division calculation and switches to step (6) after the division is completed.

[0072] (6) The Yij element value obtained by the division calculation module is stored in the RAM of the matrix Y and switched to step (7).

[0073] (7) Update the element address index i and j. The specific update is as shown in the attached Fig. 9 , switch to step (2). When i=0, j=10, the calculation of the inverse matrix Y element value is completed, the address update is completed, and switch to step (1) to wait for the next arrival of the state machine 1 end mark.

[0074] After calculating the element values ​​of matrix Y, switch state machine 2 to state machine 3, as shown in the attached figure. Fig.10 This is the process of state machine 3, and the specific steps are as follows:

[0075] (1) Wait for state machine 2 to finish and enter state machine 3, and initialize all values ​​of state machine 2. Wait for the end flag of state machine 2 to switch to step (2).

[0076] (2) According to the address index of the currently calculated element value Wij (i, j = 0, 1...10), update the address of the multiplication and addition data, read the 10 elements in the i-th column in the RAM of the matrix L according to the address index, and read the 10 elements in the j-th column in the RAM of the matrix W, and send the read data to the multiplication and addition calculation module. After all 10 element values ​​are input into the multiplication and addition calculation module, switch to step (3).

[0077] (3) The multiplication and addition calculation module performs multiplication and addition operations, obtains the multiplication and addition value for subtraction operations, and switches to step (4).

[0078] (4) According to the address index of the currently calculated element value Wij (i, j = 0, 1...10), select the Wij calculation formula and calculate Wij, and store Wij in the RAM of the matrix W.

[0079] (5) Invert the imaginary part of the element value of Wij to obtain Wji as W * The ij element value is stored in the RAM of the matrix W and the process goes to step (6).

[0080] (6) Update the element address indexes i and j. The specific updates are as shown in the attached Fig.11 , switch to step (2). When i=0, j=10, the calculation of the element value of the inverse matrix W when i=0, j=0 is completed, the address update is completed, and switch to step (1) to wait for the arrival of the next state machine 2 end mark.

[0081] The design of multiplication and addition operation in matrix inversion operation is shown in the attached figure. Fig.12 , the division operation design is as shown in the attached Fig.13 .

[0082] The complex multiplier uses a time-sharing multiplexing method to select matrix elements according to the multiplication and addition operations performed by each state machine, and then input them into the complex multiplier. Because the dimension of the matrix inversion is 11×11, a total of 10 complex multipliers are instantiated in this module according to the calculation formula of Cholesky decomposition. In the first-level adder, the effective addition number is determined based on the address index of the calculation element. Finally, the output of the multiplication and addition result is truncated and selected for output according to the working mode of the state machine.

[0083] The division calculation uses a time-division multiplexing method. State machine 1 and state machine 2 use the division calculation module. Although this module calculates complex number division, the divisors of the division operations in the two state machines are both the real parts of the diagonal elements, so two dividers are instantiated to calculate the real part division and the imaginary part division respectively. Since the data in state machine 1 and state machine 2 are truncated differently, truncation selection is required after the divider output.

[0084] Step 5. After the inversion is completed, the response vector generation module generates 1 1 and 10 0s according to the number of expected signals and interference signals, and forms a response vector F which is output to the weight calculation module.

[0085] Step 6. The weight calculation module is based on w opt =C1(C1 H C1) -1F is calculated, and the columns of the inverse matrix of the self-conjugate matrix are selected according to the response vector. At the same time, the matrix inversion end flag signal is output to the constraint matrix module to read the element values ​​of the constraint matrix in RAM, and then the inverse matrix element values ​​and the constraint matrix element values ​​are matrix multiplied. The specific calculation process is shown in the attached figure. Fig.14 .

[0086] The real and imaginary parts of the 11 elements of the inverse matrix are input into the weight module using 22 channels, and then the inverse matrix column elements are selected according to the response matrix, and complex multiplication operations are performed on them with the 11 elements of each column of the constraint matrix input, and then multi-level addition operations are performed to obtain the weight information.

[0087] The above-mentioned embodiments only express the preferred implementation modes of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the invention patent. It should be pointed out that for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention.

Claims

1. An algorithm implementation of static LCMV of an array based on FPGA, characterized in that: The steps include: Step 1: First, input P expected angle information and Q interference angle information into the steering vector module, calculate P expected angle steering vectors and Q interference angle steering vectors through the steering vector module, and then output the expected angle steering vectors and the interference angle steering vectors to the constraint matrix module; Step 2: The constraint matrix module receives the desired angle steering vector and the interference angle steering vector, forms a constraint matrix C1 in the form of M×N with the desired angle steering vector and the interference angle steering vector, and stores it in the RAM. After the inversion is completed, the constraint matrix is ​​output to the weight calculation module; Step 3: Input the constraint matrix into the matrix multiplication module to implement C1 through multipliers and adders H *C1 operation, obtain an N×N self-conjugate matrix, and then output the N×N self-conjugate matrix to the matrix inversion module; Step 4: The N×N self-conjugate matrix is ​​input to the matrix inversion module, which uses the Cholesky decomposition method to perform matrix inversion operations; the elements of the N×N matrix enter the state control module in turn, and the state control module performs state machine conversion and controls the multiplication and addition calculation module and the division calculation module to calculate the element values ​​in the inverse matrix; then it is stored, and finally an N×N inverse matrix is ​​obtained and output to the weight calculation module; Step 5: After the matrix inversion is completed, the corresponding matrix generation module generates a response matrix F and inputs it to the weight calculation module; Step 6: The weight calculation module calculates the static LCMV weights through the constraint matrix output by the constraint matrix module, the inverse matrix output by the matrix inversion module and the response matrix of the response matrix generation module, and finally outputs a static LCMV weight information.

2. The FPGA-based static LCMV algorithm of claim 1, characterized in that: The specific steps of step 1 include: Assume that the array array has a total of M×N array elements, the array element spacing arranged on the y-axis and the horizontal line parallel to the y-axis is d1, and the array element spacing arranged on the z-axis and the horizontal line parallel to the z-axis is d2; the time delay expression of the array element with coordinate position (p, q) relative to the coordinate origin in the two-dimensional array model block diagram is: The steering vector of the two-dimensional array is calculated as: When the array element spacing and wavelength are known and unchanged, the azimuth angle information θ and elevation angle information are obtained. The corresponding steering vector can be calculated and converted from M×N to 1×(M*N) for output; 3. The FPGA-based static LCMV algorithm of claim 1, characterized in that: The specific steps of step 2 include: The steering vectors of the desired signal and the interference signal are stored in the RAM to form an M×N constraint matrix, and the constraint matrix element values ​​are read out from the RAM and output to the matrix multiplication module and the weight calculation module respectively when a command is received.

4. The FPGA-based static LCMV algorithm of claim 1, characterized in that: The specific steps of step 3 include: The constraint matrix is ​​in the form of M×N, so the matrix multiplication of this module is N×M*M×N. This module uses N complex multipliers, and the multipliers need to be reused; the self-conjugate matrix is ​​N×N, and each element of the first row of the constraint matrix is ​​multiplied by the first column of the conjugate matrix of the constraint matrix using N complex multipliers. There are N elements on the constraint matrix, so the first column of the conjugate matrix of the constraint matrix needs to be reused N times, and an N×N matrix can be obtained here; then each element of the second row of the constraint matrix is ​​multiplied by the second column of the conjugate matrix of the constraint matrix to obtain a second N×N matrix. In this way, M N×N matrices are repeatedly calculated and accumulated to obtain an N×N self-conjugate matrix, and the self-conjugate matrix is ​​output to the matrix inversion module.

5. The FPGA-based static LCMV algorithm of claim 1, characterized in that: The specific steps of step 4 include: The element values ​​of the self-conjugate matrix enter the state control module of the matrix inversion module to perform the first step of LC decomposition of the matrix; according to the address index value (i, j) (i, j = 0, 1...N-1) of the element value of the self-conjugate matrix, the element value of the i-th row of the matrix C and the element value of the j-th row of the matrix L are read and sent to the multiplication and addition calculation module to convert C ij and C jj Send it to the division calculation module and calculate the C ij and L ij Store them in RAM respectively; refresh i and j, and when i=j=N-1, LC decomposition is completed. The corresponding calculation formula is: After LC decomposition is achieved, the inverse matrix Y of matrix C is obtained; the i-th row element value of matrix C and the j-th column element value of matrix Y are read according to the address index value (i, j) (i, j = 0, 1...N-1) and sent to the multiplication and addition calculation module, and C ii The value obtained by the multiplication and addition calculation module is sent to the division calculation module to obtain y ij , stored in the RAM of matrix Y; refresh i and j, when i = 0, j = N-1, the calculation of inverse matrix Y is completed. The corresponding calculation formula is: After the inverse matrix Y is obtained, the inverse matrix W of the self-conjugate matrix is ​​obtained; according to the address index value (i, j) (i, j = 0, 1...N-1), the i-th column element value of the matrix L and the j-th column element value of the matrix W are read and sent to the multiplication and addition calculation module to calculate w ij , stored in RAM; because the matrix W is conjugate transposed, the addresses (i, j) are swapped, w ij The imaginary part is inverted and stored in RAM; i and j are refreshed until i=0, j=0 to complete the calculation of the inverse matrix W, and then the value of the inverse matrix W is output to the static weight calculation module. The corresponding calculation formula is:

6. The FPGA-based static LCMV algorithm of claim 1, characterized in that: The specific steps of step 5 include: After the weights are calculated, the response matrix generation module generates the response matrix F = [1 0 … 0] T , the module for obtaining the weights of the response matrix output values.

7. The FPGA-based static LCMV algorithm of claim 1, characterized in that: The specific steps of step 6 include: The weight calculation formula is w opt =C1(C1 H C1) -1 F, select the column element values ​​of the inverse matrix of the self-conjugate matrix according to the response matrix, and the data format is N×1; assuming that the selected column element composition matrix is ​​B, the constraint matrix is ​​in the form of M×N, and N complex multipliers are used for time-sharing multiplexing. The N elements of each row of the constraint matrix are multiplied by the N elements of the matrix B, and an M×1 static LCMV weight information can be obtained.