Packaging structure and forming method thereof

Abstract

A package structure and a method of forming the same are provided. The package structure includes a first redistribution structure and first and second package components attached to a first side of the first redistribution structure and spaced apart from each other. The package structure also includes a first semiconductor die attached to the second side of the first redistribution structure and an encapsulant. The package structure also includes a thermal diffuser layer formed over the first semiconductor die, and a thermal conductivity of the thermal diffuser layer is greater than a thermal conductivity of the encapsulant. The package structure also includes a conductive feature formed through the thermal diffuser layer and a second redistribution structure formed over the thermal diffuser layer. Further, the second redistribution structure is electrically connected to the first semiconductor die through the conductive feature.

Description

Technical Field

[0001] Some embodiments of the present application provide a packaging structure and a method for forming the same. Background Art

[0002] The semiconductor integrated circuit (IC) industry has experienced rapid growth. Continuous advances in semiconductor manufacturing processes have produced semiconductor devices with more sophisticated components and / or higher integration. Functional density (i.e., the number of interconnected devices per chip area) has generally increased, while component size (i.e., the smallest component that can be created using a manufacturing process) has decreased. This shrinking process generally provides benefits by increasing production efficiency and reducing associated costs.

[0003] The chip package not only provides protection for the semiconductor device from environmental contamination, but also provides a connection interface for the semiconductor device packaged therein. Smaller package structures occupying less space or being lower in height have been developed to package semiconductor devices.

[0004] New packaging technologies have been developed to further improve the density and functionality of semiconductor dies.These relatively new packaging technologies for semiconductor dies face manufacturing challenges. Summary of the invention

[0005] Some embodiments of the present application provide a packaging structure including: a first redistribution structure; a first packaging component and a second packaging component attached to a first side of the first redistribution structure and spaced apart from each other in a first direction; a first semiconductor die attached to a second side of the first redistribution structure; an encapsulant formed around the first semiconductor die; a heat diffuser layer formed above the first semiconductor die, wherein the thermal conductivity of the heat diffuser layer is greater than the thermal conductivity of the encapsulant; a conductive component formed through the heat diffuser layer; and a second redistribution structure formed above the heat diffuser layer, wherein the second redistribution structure is electrically connected to the first semiconductor die through the conductive component.

[0006] Other embodiments of the present application provide a packaging structure, including: a first semiconductor die having a first projection area in a top view; a first redistribution structure attached to a first side of the first semiconductor die; a heat diffuser layer attached to a second side of the first semiconductor die, wherein the heat diffuser layer has a second projection area in the top view, and the second projection area of ​​the heat diffuser layer is larger than the first projection area of ​​the first semiconductor die; a second redistribution structure formed above the heat diffuser layer; a conductive component formed through the heat diffuser layer and electrically connecting the first semiconductor die and the second redistribution structure; and a first packaging component and a second packaging component attached to the first redistribution structure, wherein the first semiconductor die partially overlaps with both the first packaging component and the second packaging component.

[0007] Some other embodiments of the present application provide a method for forming a packaging structure, including: setting a first semiconductor die above a first carrier substrate; forming a first redistribution structure above a first side of the first semiconductor die; setting a first packaging component and a second packaging component above the first redistribution structure, wherein the first packaging component is spaced apart from the second packaging component in a first direction; attaching a second carrier substrate above the first packaging component and the second packaging component; removing the first carrier substrate from the second side of the first semiconductor die; forming a heat diffuser layer covering the second side of the first semiconductor die, wherein the heat diffuser layer is made of a carbon-containing material and the width of the heat diffuser layer is greater than the width of the first semiconductor die in the first direction; forming a first conductive component through the heat diffuser layer; and forming a second redistribution structure covering the heat diffuser layer and the first conductive component. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] When read in conjunction with the accompanying drawings, various aspects of the disclosed embodiments can be best understood from the following detailed description. It should be noted that, in accordance with standard practice in the industry, the various components are not drawn to scale. In fact, for clarity of discussion, the size of the various components may be arbitrarily increased or reduced.

[0009] Figures 1A to 1C A schematic top view of a package structure according to some embodiments is shown.

[0010] Figures 2A to 2P A cross-sectional view illustrating an intermediate stage in the fabrication of a package structure according to some embodiments is shown.

[0011] Figure 2N-1 According to some embodiments Figure 2N An enlarged cross-sectional view of region R_2N is shown in FIG.

[0012] Figure 2O-1 Conductive features formed in openings are shown in accordance with some embodiments.

[0013] Figure 2O-2 Conductive features formed in openings are shown in accordance with some embodiments.

[0014] Figure 2P-1 According to some embodiments, the Figure 2O-1 The packaging structure of the conductive components shown in FIG.

[0015] Figure 2P-2 According to some embodiments, the Figure 2O-2 The packaging structure of the conductive components shown in FIG.

[0016] Figure 3 A cross-sectional view of a package structure according to some embodiments is shown.

[0017] Figure 4A According to some embodiments Figure 3 An enlarged cross-sectional view of region R_3a is shown in FIG.

[0018] Figure 4B According to some embodiments Figure 3 An enlarged cross-sectional view of region R_3b is shown in FIG.

[0019] Figure 5A According to some other embodiments Figure 3 An enlarged cross-sectional view of region R_3a is shown in FIG.

[0020] Figure 5B According to some other embodiments Figure 3 An enlarged cross-sectional view of region R_3b is shown in FIG.

[0021] Figure 6 A schematic top view of a package structure according to some embodiments is shown.

[0022] Fig. 7A A schematic top view of a package structure according to some embodiments is shown.

[0023] Figure 7B According to some embodiments, Fig. 7A Line X 7A -X 7A 'A cross-sectional view of the packaging structure shown.

[0024] Figure 8 A schematic top view of a package structure according to some embodiments is shown.

[0025] Fig.9A A schematic top view of a package structure according to some embodiments is shown.

[0026] Fig. 9B The package structure according to some embodiments is shown along line X 9A -X 9A 'Cross-sectional view.

[0027] Fig. 9C A cross-sectional view of a package structure according to some embodiments is shown.

[0028] Fig.10 A schematic top view of a package structure according to some embodiments is shown.

[0029] Fig.11A A schematic top view of a package structure according to some embodiments is shown.

[0030] Fig. 11B A schematic top view of a package structure according to some embodiments is shown.

[0031] Fig. 12A A schematic top view of a package structure according to some embodiments is shown.

[0032] Fig. 12B A schematic top view of a package structure according to some embodiments is shown.

[0033] Fig.13A A schematic top view of a package structure according to some embodiments is shown.

[0034] Fig. 13B The package structure according to some embodiments is shown along line X 13A -X 13A 'Cross-sectional view.

[0035] Fig. 13C A cross-sectional view of a package structure according to some embodiments is shown.

[0036] Fig.14 A schematic top view of a package structure according to some embodiments is shown.

[0037] Fig.15 A schematic top view of a package structure according to some embodiments is shown.

[0038] Fig.16 A schematic top view of a package structure according to some embodiments is shown.

[0039] Fig.17 A schematic top view of a package structure according to some embodiments is shown.

[0040] Fig.18 A schematic top view of a package structure according to some embodiments is shown.

[0041] Fig.19 A schematic top view of a package structure according to some embodiments is shown.

[0042] Fig. 20 A schematic top view of a package structure according to some embodiments is shown.

[0043] Fig.21 A schematic top view of a package structure according to some embodiments is shown.

[0044] Fig. 22 A schematic top view of a package structure according to some embodiments is shown.

[0045] Fig.23 A schematic top view of a package structure according to some embodiments is shown.

[0046] Fig.24 A schematic top view of a package structure according to some embodiments is shown. DETAILED DESCRIPTION

[0047] The following disclosure provides many different embodiments or examples for realizing the different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the disclosed embodiments. Of course, these are merely examples and are not intended to be limiting. For example, in the following description, forming a first component above or on a second component may include an embodiment in which the first component and the second component are directly contacted, and may also include an embodiment in which an additional component may be formed between the first component and the second component so that the first component and the second component may not be in direct contact. In addition, the disclosed embodiments may repeat reference numerals and / or characters in various examples. This repetition is for the purpose of simplicity and clarity, and does not itself indicate the relationship between the various embodiments and / or configurations discussed.

[0048] Some variations of the embodiments are described. Throughout the various views and illustrative embodiments, the same reference numerals are used to represent the same elements. It should be understood that additional operations may be provided before, during, and after the method, and that some of the described operations may be replaced or eliminated for other embodiments of the method.

[0049] Additionally, for ease of description, spatially relative terms such as "below," "beneath," "lower," "above," "upper," etc. may be used herein to describe the relationship of one element or component to another (or additional) elements or components as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein should likewise be interpreted accordingly.

[0050] Embodiments of the present disclosure may be directed to packaging structures, such as three-dimensional (3D) packaging, 3D-IC devices, and 2.5D packaging. Embodiments of the present disclosure form a packaging structure including a substrate that carries one or more dies or packages and a protective element (such as a protective cover) next to the die or package. The protective element may also be used as a warpage control element and / or a heat dissipation element.

[0051] Other components and processes may also be included. For example, a test structure may be included to help perform verification testing on 3D packages or 3DIC devices and / or 2.5D packages. The test structure may include, for example, a test pad formed in a redistribution layer or on a substrate, which allows testing using a probe and / or a probe card, etc. Verification testing may be performed on intermediate structures as well as final structures. In addition, the structures and methods disclosed herein may be used in conjunction with a test method that incorporates intermediate verification of known good dies to increase yield and reduce costs.

[0052] The package structure may include individual package components and semiconductor dies electrically connected to the package components. These semiconductor dies may generate heat during operation and may be considered hot spots in the device. Therefore, a heat diffuser layer is formed above the semiconductor die so that the temperature at the semiconductor die can be diffused (e.g., dissipated) through the heat diffuser layer. In addition, the temperature of the package component may therefore be reduced during operation.

[0053] Figures 1A to 1C A schematic top view of a package structure 100 according to some embodiments is shown. To better understand the structure, XYZ coordinate references are provided in the following figures. In addition, to better understand the inventive concepts of the disclosed embodiments, the following figures may have been simplified for clarity. Additional components may be included, and some of the components described below may be replaced, modified, or eliminated.

[0054] More specifically, Figure 1A The layout of package components 10 and 20 in a package structure 100 according to some embodiments is shown. In some embodiments, package components 10 and 20 are semiconductor tube cores with different functions. In some embodiments, package component 10 includes: a memory device including multiple memory tube cores, such as a hybrid memory multidimensional cube (HMC) module, a high bandwidth memory (HBM) module, etc. In some embodiments, package component 20 includes a system on chip (SoC) tube core, a chip scale package (CSP), or a combination thereof. In some embodiments, package component 10 is an HBM tube core, and package component 20 is a SoC tube core.

[0055] In some embodiments, one of the package components 20 is sandwiched between two of the package components 10 in the X direction, such as Figure 1AIn some embodiments, one of the package components 20 and two of the package components 10 are aligned with each other in the X direction. In some embodiments, the package components 10 are aligned with each other in the Y direction, and the package components 20 are aligned with each other in the Y direction. The package components 10 and 20 may be formed on a redistribution structure ( Figure 1A The process is not shown in the figure), and the details of the process will be described later.

[0056] Figure 1B The layout of semiconductor dies 30 and 40 in package structure 100 according to some embodiments is further shown. More specifically, semiconductor dies 30 and 40 are embedded active dies and are electrically coupled to package components 10 and 20 through redistribution structures. In some embodiments, semiconductor dies 30 and 40 are embedded local interconnect dies.

[0057] In some embodiments, each of semiconductor die 30 is configured to provide electrical connection between two of package components 10 and one of package components 20 in the X direction. In some embodiments, in the top view, each of semiconductor die 30 partially overlaps two of package components 10 and one of package components 20, such as Figure 1B In some embodiments, in the top view, each of the semiconductor dies 30 partially overlaps two adjacent sidewall surfaces of two package components 10 and one sidewall surface of one package component 20. In some embodiments, each of the semiconductor dies 40 is configured to provide electrical connection between two of the package components 30 in the Y direction. In some embodiments, in the top view, each of the semiconductor dies 40 vertically overlaps two of the package components 20, as shown in FIG. Figure 1B as shown in .

[0058] Figure 1C The layout of the heat diffuser layer 130 in the package structure 100 according to some embodiments is further shown. In some embodiments, the heat diffuser layer 130 is a carbon-containing heat diffuser layer. More specifically, the heat diffuser layer 130 is formed above the semiconductor die 30 and 40 so that the heat generated by the semiconductor die 30 and 40 during operation can be dissipated and the temperature of the device can be reduced. In some embodiments, the heat diffuser layer 130 extends continuously from above the semiconductor die 30 to above the semiconductor die 40. In some embodiments, the semiconductor die 30 and 40 are completely covered by the heat diffuser layer 130. In some embodiments, the width of the heat diffuser layer 130 is greater than the width of each of the semiconductor die 30 and 40 in both the X direction and the Y direction. In some embodiments, in the top view, the package components 10 and 20 are also completely covered by the heat diffuser layer 130. In some embodiments, the width of the heat diffuser layer 130 is greater than the width of each of the package components 10 and 20 in both the X direction and the Y direction.

[0059] Figures 2A to 2P 1 shows a cross-sectional view of an intermediate stage of manufacturing a package structure 100 according to some embodiments. More specifically, according to some embodiments, Figure 1C Line X 1C -X 1C ' shows a cross-sectional view. Figure 2A As shown in FIG. 1 , a through-insulated via (TIV) 104 is formed over a carrier substrate 102 in accordance with some embodiments.

[0060] The carrier substrate 102 may be configured to provide structural support during the manufacturing process of the package structure 100. In some embodiments, the carrier substrate 102 is made of a material such as silicon, a polymer, a polymer composite, a metal foil, a ceramic, a glass, a glass epoxy, beryllium oxide, a tape, or other suitable materials for structural support. In some embodiments, the carrier substrate 102 is a sapphire glass substrate.

[0061] In some embodiments, the insulating via 104 is made of a conductive material, such as copper, titanium, tungsten, aluminum, etc. In some embodiments, a seed layer (not shown) is formed before forming the insulating via 104. The insulating via 104 can be formed by the following process. A photoresist layer can be formed above the carrier substrate 102 by spin coating, etc. The photoresist layer can then be exposed to light for patterning, and an opening can be formed in the photoresist layer. After the opening is formed, the insulating via 104 can be formed in the opening by filling the opening with a conductive material by plating (such as electroplating or chemical plating, etc.). The photoresist can then be removed by ashing or stripping processes, such as using oxygen plasma, etc.

[0062] According to some embodiments, after forming insulating via 104, semiconductor dies 30 and 40 ( Figure 2B Not shown, see Figure 1B ) is disposed above the carrier substrate 102, such as Figure 2B Although the semiconductor die 40 is not Figure 2B , but the structure of semiconductor die 40 may be similar to Figure 2B to Figure 2P Those of the semiconductor die 30 shown in and described below or with Figure 2B to Figure 2P 1 and 12 are the same as those of the semiconductor die 30 shown in and described later. In some embodiments, the insulating via 104 is interposed between the semiconductor dies 30 and 40 and is spaced apart from the semiconductor dies 30 and 40. In some embodiments, some of the semiconductor dies 30 and 40 are formed adjacent to each other without the insulating via 104 formed therebetween. In some embodiments, the closest distance between two adjacent semiconductor dies 30 and 40 is in a range from about 50 μm to about 150 μm.

[0063] In some embodiments, each of semiconductor dies 30 and 40 includes a substrate 202, a conductive via 204 formed through substrate 202, and an interconnect structure 206 formed over substrate 202. In some embodiments, interconnect structure 206 includes a plurality of metallization layers, and the metallization layers include a dielectric layer 208 and a conductive structure 210 formed in dielectric layer 208. Conductive structure 210 may include metal lines and metal vias formed in dielectric layer 208. Furthermore, conductive via 204 is electrically connected to conductive structure 210 in interconnect structure 206 according to some embodiments. In some embodiments, conductive connectors 212 are formed over interconnect structure 206 to be electrically connected to conductive structure 210 in interconnect structure 206. The layout of conductive structure 210 in interconnect structure 208 in each of semiconductor dies 30 and 40 may be the same or different.

[0064] Substrate 202 may be a semiconductor substrate, such as silicon, which may be doped or undoped, and which may be an active layer of a silicon wafer or a semiconductor on insulator (SOI) substrate, etc. Substrate 202 may include other semiconductor materials, such as germanium, silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, indium antimonide, SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, GaInAsP, or a combination thereof. Other substrates, such as multilayer or gradient substrates, may also be used. In some embodiments, conductive vias 204 are formed to pass through substrate 202 to electrically connect both sides of substrate 202. In some embodiments, conductive vias 204 are made of W, Ru, Co, Cu, Ti, TiN, Ta, TaN, Mo, Ni, other applicable conductive materials, or a combination thereof.

[0065] The interconnect structure 206 may be formed by a damascene process, such as a single damascene process, a dual damascene process, etc. In some embodiments, the dielectric layer 208 includes a multilayer made of a low-k dielectric material having a k value less than 7. In some embodiments, the dielectric layer 208 is made of SiO2, SiN, SiCN, SiOC, SiOCN, etc. The dielectric layer 208 may be formed by chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), or other applicable processes. In some embodiments, the conductive structure 210 is made of W, Ru, Co, Cu, Ti, TiN, Ta, TaN, Mo, Ni, other applicable conductive materials, or combinations thereof. The conductive structure 210 may be formed using a process such as chemical vapor deposition (CVD), physical vapor deposition (PVD), plasma enhanced CVD (PECVD), plasma enhanced physical vapor deposition (PEPVD), atomic layer deposition (ALD), or any other applicable deposition process.

[0066] The conductive connector 212 may include a bonding pad, a micro bump, a copper pillar, a copper layer, a nickel layer, a lead-free layer, an electroless nickel electroless palladium immersion gold (ENEPIG) layer, a Sn / Ag layer, a Sn / Pb layer, etc. In some embodiments, the conductive connector 212 is electrically connected to the conductive structure 210 in the interconnect structure 206 .

[0067] According to some embodiments, after semiconductor dies 30 and 40 are disposed over carrier substrate 102 , encapsulant 106 is formed over carrier substrate 102 , such as Figure 2C . More specifically, encapsulant 106 is formed to laterally encapsulate insulating vias 104 and semiconductor dies 30 and 40. In some embodiments, in this step, insulating vias 104 and top surfaces of semiconductor dies 30 and 40 are covered by encapsulant 106. In some embodiments, encapsulant 106 includes a molding compound such as resin, polyimide, PPS, PEEK, PES, epoxy molding compound (EMC), or a combination thereof.

[0068] According to some embodiments, after the sealant 106 is formed, a planarization process is performed on the sealant 106 until the insulating via 104 and the conductive connection 212 are exposed, such as Figure 2D . A planarization process may be performed to remove excess portions of the encapsulant 106 by using a mechanical grinding process, a chemical mechanical polishing (CMP) process, or the like. In some embodiments, during the planarization process, the insulating vias 104 and / or the conductive connections 212 are also slightly polished. According to some embodiments, after the planarization process, the top surfaces of the insulating vias 104 and the conductive connections 212 are substantially flush with the top surface of the encapsulant 106.

[0069] Next, according to some embodiments, a redistribution structure 108 is formed over semiconductor dies 30 and 40, insulating vias 104, and encapsulant 106, and a conductive pad 114 is formed over redistribution structure 108, such as Figure 2E In some embodiments, the redistribution structure 108 includes a plurality of insulating layers 110 and a redistribution layer (RDL) 112, and the RDL 112 is electrically connected to the insulating vias 104 and the conductive connections 212 of the semiconductor dies 30 and 40. The RDL 112 may be considered a fan-out structure. Figure 2E The number of insulating layers 110 and redistribution layers 112 shown in FIG. 1 is merely an example and is not intended to be limiting. For example, the number of insulating layers 110 and redistribution layers 112 may range from about 1 to about 15.

[0070] In some embodiments, the insulating layer 110 is made of one or more suitable dielectric materials, such as oxides (e.g., silicon oxide), nitrides (e.g., silicon nitride), polymer materials, polyimide materials, low-k dielectric materials, molding materials (e.g., EMC, etc.), another dielectric material, or a combination thereof. The insulating layer 110 can be formed by processes such as spin coating, lamination, CVD, etc., or a combination thereof. In some embodiments, the redistribution layer 112 is made of a conductive material, such as copper, titanium, tungsten, aluminum, or a combination thereof. The conductive material can be formed by a deposition process such as electroplating, chemical plating, etc.

[0071] According to some embodiments, after forming the redistribution structure 108, the conductive pad 114 is formed over the redistribution structure 108, such as Figure 2E . In some embodiments, the conductive pad 114 is physically connected to the redistribution layer 112 in the redistribution structure 108. In addition, according to some embodiments, the conductive pad 114 is electrically connected to the insulating via 104 and the conductive connector 212 of the semiconductor die 30 and 40 through the redistribution layer 112 in the redistribution structure 108. In some embodiments, the conductive pad 114 is made of a conductive material, such as W, Ru, Co, Cu, Ti, TiN, Ta, TaN, Mo, Ni, Al, other applicable conductive materials, or combinations thereof. In some embodiments, the conductive pad 114 and the redistribution layer 112 are made of different conductive materials.

[0072] Thereafter, according to some embodiments, the package components 10 and 20 are disposed above the redistribution structure 108, such as Figure 2F and Figure 1B More specifically, according to some embodiments, package components 10 and 20 are bonded to conductive pads 114 above redistribution structure 108 via conductive connectors 116. As previously described, package components 10 and 20 may be Figures 1A to 1C The layout shown in FIG. 1 is disposed above the redistribution structure 108. In addition, according to some embodiments, the package assembly 10 is an HBM die, and the package assembly 20 is an SoC die. In addition, according to some embodiments, the package assemblies 10 and 20 include conductive pads 118 electrically connected to the devices in the package assemblies 10 and 20. In some embodiments, the conductive pads 114 are made of a conductive material, such as W, Ru, Co, Cu, Ti, TiN, Ta, TaN, Mo, Ni, Al, other applicable conductive materials, or combinations thereof.

[0073] In some embodiments, the conductive connector 116 is bonded to the conductive pad 118 of the package assembly 10 and 20. In some embodiments, the conductive connector 116 is a solder ball, a metal column, a controlled collapse chip connection (C4) bump, a microbump, a bump formed by electroless nickel plating-electroless palladium plating-immersion gold technology (ENEPIG), etc. In some embodiments, the conductive connector 116 is a microbump vertically sandwiched between the conductive pads 114 and 118. In some embodiments, the conductive connector 116 is made of a conductive material such as solder, copper, aluminum, gold, nickel, silver, palladium, tin, etc. or a combination thereof. In some embodiments, the conductive connector 116 is formed by initially forming a solder layer by evaporation, electroplating, printing, solder transfer, ball placement, etc., and a reflow process can be implemented to shape the material into a desired bump shape. In some embodiments, the conductive connector 116 includes a metal column (such as a copper column) formed by sputtering, printing, electroplating, chemical plating, CVD, etc. The metal column can be solder-free and have a substantially vertical sidewall.

[0074] According to some embodiments, after the package components 10 and 20 are bonded to the redistribution structure 108, an underfill 120 is formed around the package components 10 and 20, such as Figure 2G . More specifically, according to some embodiments, the bottom surface and sidewalls of the package components 10 and 20 are surrounded and covered by the bottom filler 120. In addition, according to some embodiments, the conductive pads 114 and 118 and the conductive connector 116 are embedded in the bottom filler 120. In some embodiments, the top surface of the package components 10 and 20 is not covered by the bottom filler 120 (i.e., exposed). In some embodiments, the upper portion of the sidewall surface of the package components 10 and 20 is not covered by the bottom filler 120 (i.e., exposed).

[0075] In some embodiments, the bottom filler 120 is made of a polymer, an epoxy resin, a molded bottom filler, etc. After the package components 10 and 20 are attached to the redistribution structure 108, the bottom filler 120 can be formed by a capillary flow process. According to some embodiments, after the bottom filler 120 is formed, a curing process can be implemented. The curing process can include heating the bottom filler 120 to a predetermined temperature for a predetermined period of time using an annealing process or other heating process. The curing process can also include an ultraviolet (UV) light exposure process, an infrared (IR) energy exposure process, a combination thereof, or a combination thereof with a heating process.

[0076] Next, according to some embodiments, a sealant 122 is formed around the bottom filler 120, such as Figure 2H. More specifically, according to some embodiments, the package components 10 and 20 and the bottom filler 120 are covered and surrounded by a sealant 122. In some embodiments, the sealant 122 includes an epoxy resin, an organic polymer, a polymer with or without an added silicon-based filler or glass filler, etc. In some embodiments, the sealant 122 includes a liquid molding compound (LMC) that is a gel-type liquid when applied. When applied, the sealant 122 may also include a liquid or a solid. Optionally, the sealant 122 includes other insulating and / or sealing materials. The sealant 122 can be applied using a wafer-level molding process. The sealant 122 can be molded using, for example, compression molding, transfer molding, molded bottom fill (MUF) or other methods. In some embodiments, the sealant 122 and the bottom filler 120 are made of different materials. A curing process can be implemented on the sealant 112. The curing process can include heating the sealant 122 to a predetermined temperature for a predetermined period of time using an annealing process or other heating process. The curing process may also include an ultraviolet (UV) light exposure process, an infrared (IR) energy exposure process, a combination thereof, or a combination thereof with a heating process.

[0077] According to some embodiments, after forming the sealant 122, a planarization process is performed until the top surfaces of the package components 10 and 20 are exposed, such as Fig.2I . A planarization process may be performed to remove excess portions of the encapsulant 122 by using a mechanical grinding process, a chemical mechanical polishing (CMP) process, or the like. In some embodiments, the package components 10 and 20 are also slightly polished during the planarization process. According to some embodiments, after the planarization process, the top surfaces of the package components 10 and 20 are substantially flush with the top surface of the encapsulant 122.

[0078] Next, according to some embodiments, carrier substrate 124 is attached to encapsulant 122 and package components 10 and 20, such as Figure 2J . Carrier substrate 124 may be configured to provide structural support during the manufacturing process of package structure 100. In some embodiments, carrier substrate 124 is made of a material such as silicon, a polymer, a polymer composite, a metal foil, a ceramic, a glass, a glass epoxy, beryllium oxide, a tape, or other suitable materials for structural support. In some embodiments, carrier substrate 124 is a sapphire glass substrate. In some embodiments, carrier substrates 102 and 124 are made of the same material, but have different thicknesses.

[0079] According to some embodiments, after carrier substrate 124 is attached to encapsulant 122, the package structure is turned upside down and carrier substrate 102 is removed, such as Figure 2K. In some embodiments, carrier substrate 102 is removed by a carrier stripping process. The carrier stripping process may use any suitable process to remove carrier substrate 102, such as etching, grinding, and mechanical stripping. In some embodiments, after removing carrier substrate 102, residues such as adhesive may remain on the exposed surfaces of semiconductor dies 30 and 40. Next, according to some embodiments, a cleaning process 126 is performed to clean the exposed surfaces of semiconductor dies 30 and 40, such as Figure 2L as shown in .

[0080] Thereafter, according to some embodiments, a heat spreader layer 130 is formed over encapsulant 106 , insulating vias 104 , and semiconductor dies 30 and 40 , such as Figure 2M . Heat spreader layer 130 may be configured to spread (e.g., dissipate) heat generated from semiconductor die 30 and 40. In some embodiments, heat spreader layer 130 is in direct contact with substrate 202 of semiconductor die 30 and 40. In some embodiments, heat spreader layer 130 and interconnect structure 206 are located at opposite sides of substrate 202 of semiconductor die 30 and 40.

[0081] In some embodiments, the heat diffuser layer 130 is a carbon-containing layer having a relatively high lateral thermal conductivity. In some embodiments, the thermal conductivity of the heat diffuser layer 130 is greater than the thermal conductivity of the sealant 106. In some embodiments, the heat diffuser layer 130 is made of graphene or diamond-like carbon. In some embodiments, the heat diffuser layer 130 has a thermal conductivity in the range of about 1 W / mK to about 1000 W / mK. In some embodiments, the heat diffuser layer 130 has a thickness in the range of from about 10 μm to about 30 μm. The heat diffuser layer 130 should be thick enough to provide sufficient thermal conductivity, but not too thick, or the formation of the material layer may be difficult.

[0082] According to some embodiments, after forming the heat spreader layer 130, an opening 132 is formed through the heat spreader layer 130, such as Figure 2N as shown in . Figure 2N-1 According to some embodiments Figure 2N An enlarged cross-sectional view of the region R_2N shown in FIG. Figure 2N and Figure 2N-1 As shown in , insulating vias 104 and conductive vias 204 in semiconductor dies 30 and 40 are exposed by openings 132 , in accordance with some embodiments.

[0083] The opening 132 may be formed by: forming a mask layer over the heat spreader layer 130; transferring the pattern of the mask layer onto the heat spreader layer 130 by performing an etching process; and removing the mask layer. In some embodiments, the exposed portions of the insulating via 104 and the conductive via 204 are also slightly etched so that the insulating via 104 and the conductive via 204 have curved top surfaces exposed by the opening 132. In some embodiments, the heat spreader layer 130 has rounded corners and inclined sidewall surfaces at the opening 132.

[0084] According to some embodiments, after forming the opening 132, a conductive feature 134 is formed in the opening 132, such as Fig.2O as shown in . Figure 2O-1 and Figure 2O-2 According to some embodiments Fig.2O An enlarged cross-sectional view of region R_2O shown in FIG.

[0085] More specifically, Figure 2O-1 A conductive component 134-1 is shown formed in the opening 132 according to some embodiments. The conductive component 134-1 can be formed by forming a conductive material in the opening 132 and above the heat diffuser layer 130, and performing a planarization process on the conductive material until the top surface of the heat diffuser layer 130 is exposed. The planarization process can be performed by using a mechanical grinding process, a chemical mechanical polishing (CMP) process, etc. to remove excess portions of the conductive material. In some embodiments, the conductive material includes W, Ru, Co, Cu, Ti, TiN, Ta, TaN, Mo, Ni, Al, other applicable conductive materials, or combinations thereof. According to some embodiments, after the planarization process is performed, the top surface of the conductive component 134-1 is substantially flush with the top surface of the heat diffuser layer 130. In some embodiments, at least one of the conductive components 134-1 has a tip portion that vertically overlaps the heat diffuser layer 130 and the sealant 106. In some embodiments, at least one of the conductive features 134 - 1 has a tip portion 134 - 1T that vertically overlaps the heat spreader layer 130 and the semiconductor die 30 or 40 .

[0086] Figure 2O-2 A conductive feature 134-2 is shown formed in the opening 132 according to some embodiments. The conductive feature 134-2 can be formed by selectively depositing a conductive material in the opening 132 until a top surface of the conductive material is substantially flush with a top surface of the heat spreader layer 130. In some embodiments, the conductive material includes W, Ru, Co, Cu, Ti, TiN, Ta, TaN, Mo, Ni, Al, other suitable conductive materials, or combinations thereof. Figure 2O-2As shown in , each of the conductive features 134 - 2 has a convex top surface. In some embodiments, a middle portion of each of the conductive features 134 - 2 is thicker than an edge portion thereof.

[0087] like Figure 2O-1 and Figure 2O-2 As shown in , because the heat spreader layer 130 has an inclined sidewall surface at the opening 132, the conductive component 134 (including the conductive components 134-1 and 134-2) has an inclined sidewall surface that is in direct contact with the heat spreader layer 130. In addition, according to some embodiments, the top surface of each of the conductive components 134 is wider than the bottom surface thereof (e.g., in the X direction). That is, according to some embodiments, the upper portion of the conductive component 134 is wider than the bottom portion of the conductive component 134 (e.g., in the X direction).

[0088] According to some embodiments, after forming the conductive features 134, a redistribution structure 140 is formed over the heat spreader layer 130, such as Figure 2P In some embodiments, the redistribution structure 140 includes a plurality of insulating layers 142 and a redistribution layer (RDL) 144 (in Figure 2P-1 ), and the redistribution layer 144 is electrically connected to the conductive features 134 in the heat spreader layer 130. The redistribution layer 144 can be regarded as a fan-out structure. Figure 2P The number of insulating layers 142 and redistribution layers 144 shown in FIG. 1 is merely an example and is not intended to be limiting. For example, the number of insulating layers 142 and redistribution layers 144 may range from about 1 to about 15.

[0089] In some embodiments, the thermal conductivity of the heat spreader layer 130 is greater than the thermal conductivity of the insulating layer 142. In some embodiments, the insulating layer 142 is made of one or more suitable dielectric materials, such as oxides (e.g., silicon oxide), nitrides (e.g., silicon nitride), polymer materials, polyimide materials, low-k dielectric materials, molding materials (e.g., EMC, etc.), another dielectric material, or a combination thereof. The insulating layer 142 can be formed by processes such as spin coating, lamination, CVD, etc., or a combination thereof. In some embodiments, the redistribution layer 144 is made of a conductive material, such as copper, titanium, tungsten, aluminum, another metal, or a combination thereof. The conductive material can be formed by a deposition process such as electroplating, chemical plating, etc.

[0090] According to some embodiments, after forming the redistribution structure 140, a conductive connector 146 is formed over the redistribution structure 140, and the package structure 100 is formed, such as Figure 2P. The conductive connector 146 may include a bonding pad, a microbump, a copper pillar, a copper layer, a nickel layer, a lead-free layer, an electroless nickel-electroless palladium-immersion gold (ENEPIG) layer, a Sn / Ag layer, a Sn / Pb layer, etc. In some embodiments, the conductive connector 146 includes a conductive pillar 148 and a solder ball 150 formed over the conductive pillar 148. In some embodiments, the conductive connector 146 is electrically connected to the redistribution layer 144 in the redistribution structure 140.

[0091] Figure 2P-1 and Figure 2P-2 According to some embodiments Figure 2P More specifically, Figure 2P-1 According to some embodiments, the Figure 2O-1 1. In some embodiments, the bottom surface of the bottommost one of the insulating layers 142 is substantially flush with the top surface of the conductive component 134-1.

[0092] Figure 2P-2 According to some embodiments, the Figure 2O-2 134-2. In some embodiments, the redistribution layer 144 above the conductive component 134-2 has a concave bottom surface that is in direct contact with the convex top surface of the conductive component 134-2. In some embodiments, the bottom surface of the bottommost one of the insulating layers 142 is not flat. In some embodiments, the bottommost one of the insulating layers 142 has a protruding portion that is laterally sandwiched (e.g., in the X direction) between the conductive component 134-2 and the heat spreader layer 130. In some embodiments, the bottommost portion of the bottommost one of the insulating layers 142 is lower than the topmost portion of the top surface of the heat spreader layer 130.

[0093] In the package structure 100, the semiconductor dies 30 and 40 may generate relatively large amounts of heat during operation, and the heat may even affect the performance of the package components 10 and 20. Therefore, a heat spreader layer 130 having high thermal conductivity is formed over the semiconductor dies 30 and 40 so that the heat generated by the semiconductor dies 30 and 40 can be diffused laterally. Therefore, the temperature of the package structure 100, especially the temperature at the hot spots around the semiconductor dies 30 and 40, can be reduced (e.g., reduced by about 8°C at the semiconductor dies 30 and 40, reduced by about 10°C at the package component 10, and reduced by about 3°C ​​at the package component 20), and thus the performance of the package structure 100 can be improved.

[0094] In some embodiments, the package structure 100 includes a redistribution structure 108, and Figures 1A to 1CAll package components 10 and 20 shown in FIG. 1 are positioned above the first side of the redistribution structure 108. In addition, according to some embodiments, Figures 1A to 1C All semiconductor dies 30 and 40 shown in FIG. 1 are positioned over the second side of the redistribution structure 108 , as shown in FIG. Figure 2P In addition, according to some embodiments, package components 10 and 20 are spaced apart from each other in the X and Y directions, and semiconductor dies 30 and 40 are spaced apart from each other in the X and Y directions, as shown in FIG. Figures 1A to 1C As previously described, semiconductor dies 30 and 40 may be configured to electrically connect package components 10 and 20. Therefore, each of semiconductor dies 30 partially overlaps package components 10 and 20 (ie, is located in the projection area of ​​semiconductor die 30).

[0095] Furthermore, according to some embodiments, heat spreader layer 130 is formed over semiconductor dies 30 and 40 and is vertically sandwiched between semiconductor dies 30 and 40 and redistribution structure 140. According to some embodiments, conductive features 134 (including conductive features 134-1 and 134-2) are formed through heat spreader layer 130 so that insulating vias 104 and conductive vias 204 of semiconductor dies 30 and 40 are electrically connected to redistribution structure 140 through conductive features 134. In some embodiments, the projected area of ​​heat spreader layer 130 is larger than the projected area of ​​semiconductor dies 30 and 40 and the projected area of ​​package components 10 and 20. In some embodiments, the projected area of ​​semiconductor dies 30 and 40 and the projected area of ​​package components 10 and 20 are located within the projected area of ​​heat spreader layer 130.

[0096] Figure 3 1 shows a cross-sectional view of a package structure 100' according to some embodiments. According to some embodiments, the package structure 100' can be similar to the package structure 100 described previously, except that the conductive features 134'a, 134'b, and 134'c formed in the heat spreader layer 130 are wider than the insulating vias 104 and the conductive vias 204 in the semiconductor dies 30 and 40. That is, the package structure 100' can also have the previously described Figures 1A to 1C The processes and materials used to form the package structure 100 ′ may be similar to or the same as those previously described for forming the package structure 100 , and are not repeated here.

[0097] Figure 4A According to some embodiments Figure 3 An enlarged cross-sectional view of the region R_3a shown in FIG. Figure 4AAs shown in FIG. 1 , according to some embodiments, a conductive feature 134 ′ a - 1 is formed in the heat spreader layer 130 that is electrically connected to the insulating via 104 and the conductive via 204 in the semiconductor dies 30 and 40 . The structure and material of the conductive feature 134 ′ a - 1 are substantially similar to Figure 2P-1 Those of the conductive member 134-1 shown in FIG. Figure 2P-1 The conductive features 134 - 1 shown in FIG. 1 are identical to those of the conductive features 134 - 1 shown in FIG. 1 , except that the conductive features 134 ′ a - 1 are relatively wider.

[0098] In some embodiments, at least one of the conductive features 134'a-1 is wider than one of the insulating vias 104 in the X direction. In some embodiments, at least one of the conductive features 134'a-1 is wider than one of the vias 204 in the X direction. In some embodiments, the conductive features 134'a-1 protrude laterally from opposing sidewall surfaces of the insulating vias 104 below the conductive features 134'a-1. In some embodiments, the bottom surface of the conductive features 134'a-1 is in direct contact with the top surface of the encapsulant 106. In some embodiments, the conductive features 134'a-1 protrude laterally from opposing sidewall surfaces of the conductive vias 204 below the conductive features 134'a-1. In some embodiments, the bottom surface of the conductive features 134'a-1 is in direct contact with the top surface of the substrate 202 of the semiconductor dies 30 and 40.

[0099] Figure 4B According to some embodiments Figure 3 An enlarged cross-sectional view of the region R_3b shown in FIG. Figure 4B As shown in FIG. 1 , according to some embodiments, conductive features 134 ′ b - 1 and 134 ′ c - 1 are formed in heat spreader layer 130 and are electrically connected to insulating via 104 and conductive via 204 in semiconductor die 30 and 40 , respectively. The structure and material of conductive features 134 ′ b - 1 and 134 ′ c - 1 are substantially similar to Figure 2P-1 Those of the conductive member 134-1 shown in FIG. Figure 2P-1 1 are the same as those of the conductive features 134-1 shown in FIG. 1 , except that the conductive features 134'b-1 and 134'c-1 are relatively wider. In some embodiments, at least one of the conductive features 134'b-1 protrudes laterally from one of the sidewall surfaces of the insulating via 104 below the conductive feature 134'b-1. In some embodiments, the bottom surface of the conductive feature 134'b-1 is in direct contact with the top surface of the encapsulant 106. In some embodiments, the conductive feature 134'c-1 protrudes laterally from one of the sidewall surfaces of the conductive via 204 below the conductive feature 134'c-1. In some embodiments, the bottom surface of the conductive feature 134'c-1 is in direct contact with the top surface of the substrate 202 of the semiconductor dies 30 and 40.

[0100] Figure 5A According to some other embodiments Figure 3 An enlarged cross-sectional view of the region R_3a shown in FIG. Figure 5A As shown in FIG. 1 , according to some embodiments, a conductive feature 134 ′ a - 2 is formed in the heat spreader layer 130 that is electrically connected to the insulating via 104 and the conductive via 204 in the semiconductor dies 30 and 40 . The structure and material of the conductive feature 134 ′ a - 2 are substantially similar to Figure 2P-2 Those of the conductive member 134-1 shown in FIG. Figure 2P-2 The conductive features 134-1 shown in FIG. 1 are the same as those shown in FIG. 1 , except that the conductive features 134'a-2 are wider. According to some embodiments, the spatial relationship between the conductive features 134'a-2 and the adjacent elements is similar to Figure 4A The spatial relationship of the conductive component 134'a-1 shown in FIG. 1 is the same, and the shape of the conductive component 134'a-2 is the same as that of the conductive component 134'a-1 shown in FIG. Figure 2P-2 Therefore, the details of the conductive component 134'a-2 will not be repeated here.

[0101] Figure 5B According to some other embodiments Figure 3 An enlarged cross-sectional view of the region R_3b shown in FIG. Figure 5B As shown in FIG. 1 , according to some embodiments, conductive features 134 ′ b - 2 and 134 ′ c - 2 are formed in heat spreader layer 130 and are electrically connected to insulating via 104 and conductive via 204 in semiconductor die 30 and 40 , respectively. The structure and material of conductive features 134 ′ b - 2 and 134 ′ c - 2 are substantially similar to Figure 2P-2 Those of the conductive member 134-2 shown in FIG. Figure 2P-2 The conductive features 134-2 shown in FIG. 1 are the same as those of the conductive features 134-2 shown in FIG. 1 , except that the conductive features 134'b-2 and 134'c-2 are relatively wider. According to some embodiments, the spatial relationship of the conductive features 134'b-2 and 134'c-2 to the adjacent elements is similar to that of the conductive features 134-2. Figure 4B The spatial relationship of the conductive components 134'b-1 and 134'c-1 shown in FIG. 1 is the same, and the shapes of the conductive components 134'b-2 and 134'c-2 are the same as those shown in FIG. Figure 2P-2 Therefore, the details of the conductive component 134'b-2 will not be repeated here.

[0102] Figure 6A schematic top view of a package structure 200 in accordance with some embodiments is shown. In accordance with some embodiments, package structure 200 can be similar to previously described package structure 100, except that the dimensions of the semiconductor die are different from those in package structure 100. Processes and materials used to form package structure 200 can be similar to or the same as those previously described for forming package structure 100, and are not repeated here.

[0103] like Figure 6 As shown in , according to some embodiments, package structure 200 includes package components 10 and 20 and semiconductor die 40, but semiconductor die 30 is replaced by semiconductor die 30a and 30b. More specifically, according to some embodiments, each of semiconductor die 30a and 30b is configured to connect electrical signals between one of package components 10 and one of package components 20. The functions and formations of semiconductor die 30a and 30b may be the same as those of semiconductor die 30, and therefore are not repeated here.

[0104] Similar to the package structure 100, the heat spreader layer 130 in the package structure 200 is formed over the semiconductor dies 30a, 30b, and 40 so that the heat generated by the semiconductor dies 30a, 30b, and 40 during operation can be dissipated and the temperature of the device can be reduced. In some embodiments, the semiconductor dies 30a, 30b, and 40 are completely covered by the heat spreader layer 130 (e.g., located in the projection area of ​​the heat spreader layer 130). In some embodiments, the width of the heat spreader layer 130 is greater than the width of each of the semiconductor dies 30a, 30b, and 40 in both the X direction and the Y direction.

[0105] Fig. 7A A schematic top view of a package structure 300 is shown in accordance with some embodiments. Figure 7B According to some embodiments, Fig. 7A Line X 7A -X 7A ' is a cross-sectional view of package structure 300 shown in FIG. According to some embodiments, package structure 300 may be similar to previously described package structure 100, except that semiconductor die 50 is provided together with semiconductor dies 30 and 40. Processes and materials used to form package structure 300 may be similar to or the same as those previously described for forming package structure 100, and are not repeated here.

[0106] like Fig. 7AAs shown in FIG. 1 , according to some embodiments, package structure 300 includes package components 10 and 20 and semiconductor dies 30 and 40, and an additional semiconductor die 50 is also disposed in package structure 300. Semiconductor die 50 may be configured to control power of package component 10. More specifically, according to some embodiments, semiconductor dies 30, 40, and 50 are disposed over carrier substrate 102, and an additional semiconductor die 50 is also disposed in package structure 300. Semiconductor die 50 may be configured to control power of package component 10. Figure 2C to Figure 2P The process shown in FIG. 3 is used to form a package structure 300, as shown in FIG. Figure 7B In some embodiments, each of semiconductor dies 50 overlaps a portion of package assembly 10 .

[0107] Similar to package structure 100, heat spreader layer 130 in package structure 300 is formed over semiconductor die 30, 40, and 50 so that heat generated by semiconductor die 30, 40, and 50 during operation can be dissipated and the temperature of the device can be reduced. In some embodiments, semiconductor die 30, 40, and 50 are completely covered by heat spreader layer 130 (i.e., are located in the projection area of ​​heat spreader layer 130). In some embodiments, the width of heat spreader layer 130 is greater than the width of each semiconductor die 30, 40, and 50 in both the X direction and the Y direction, such as Fig. 7A as shown in .

[0108] Figure 8 A schematic top view of a package structure 400 according to some embodiments is shown. According to some embodiments, package structure 400 can be similar to previously described package structure 200, except that semiconductor die 50 is also provided. Processes and materials used to form package structure 400 can be similar to or the same as those previously described for forming package structures 100, 200, and 300, and are not repeated here.

[0109] like Figure 8 As shown in , according to some embodiments, package structure 400 includes package components 10 and 20 and semiconductor die 30a, 30b, 40, and 50. Similar to package structure 200, heat spreader layer 130 in package structure 400 is formed over semiconductor die 30a, 30b, 40, and 50 so that heat generated by semiconductor die 30a, 30b, 40, and 50 during operation can be dissipated and the temperature of the device can be reduced. In some embodiments, semiconductor die 30a, 30b, 40, and 50 are completely covered by heat spreader layer 130 (i.e., are located in the projection area of ​​heat spreader layer 130). In some embodiments, the width of heat spreader layer 130 is greater than the width of each of semiconductor die 30a, 30b, 40, and 50 in both the X direction and the Y direction, as shown in FIG. Figure 8 as shown in .

[0110] Fig.9A A schematic top view of a package structure 100A is shown in accordance with some embodiments. Fig. 9B The package structure 100A according to some embodiments is shown along line X 9A -X 9A ' is a cross-sectional view. According to some embodiments, package structure 100A can be similar to package structure 100 described previously, except that the size of its heat spreader layer is different. Processes and materials used to form package structure 100A can be similar to those previously described for forming package structure 100 or the same as those previously described for forming package structure 100, and are not repeated here.

[0111] like Fig.9A As shown in, according to some embodiments, the package structure 100A includes package components 10 and 20 and semiconductor dies 30 and 40. In addition, a heat diffuser layer 130A is formed over the semiconductor dies 30 and 40 so that the heat generated by the semiconductor dies 30 and 40 during operation can be dissipated and the temperature of the device can be reduced. In some embodiments, the semiconductor dies 30 and 40 are completely covered by the heat diffuser layer 130A (i.e., located in the projection area of ​​the heat diffuser layer 130A). In some embodiments, the width of the heat diffuser layer 130A is greater than the width of each of the semiconductor dies 30 and 40 in both the X direction and the Y direction. In some embodiments, the package component 20 is also completely covered by the heat diffuser layer 130A (i.e., located in the projection area of ​​the heat diffuser layer 130A). In some embodiments, the package component 10 is partially covered by the heat diffuser layer 130A (i.e., partially located outside the projection area of ​​the heat diffuser layer 130A).

[0112] More specifically, according to some embodiments, implementing Figures 2A to 2L The process shown in FIG. 1 is to form a dielectric layer 131 over the sealant 106, and the heat spreader layer 130A is positioned in the dielectric layer 131, as shown in FIG. Fig. 9B Furthermore, according to some embodiments, a conductive feature 134A is formed in the dielectric layer 131 .

[0113] In some embodiments, the formation of the dielectric layer 131 and the heat spreader layer 130A includes: forming the dielectric layer 131 covering the sealant 106; forming an opening in the dielectric layer 131; and forming the heat spreader layer 130A in the opening. In some other embodiments, the formation of the dielectric layer 131 and the heat spreader layer 130A includes: forming the heat spreader layer 130A covering the sealant 106; patterning the heat spreader layer 130A; and forming the dielectric layer 131 around the heat spreader layer 130A.

[0114] In some embodiments, dielectric layer 131 is made of a dielectric material having a k value lower than 7. In some embodiments, dielectric layer 131 is made of SiO2, SiN, SiCN, SiOC, SiOCN, etc. Dielectric layer 131 can be formed by chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), or other applicable processes. The processes and materials used to form heat diffuser layer 130A and conductive component 134A are substantially similar to those previously described for forming heat diffuser layer 130 and conductive component 134 or are the same as those previously described for forming heat diffuser layer 130 and conductive component 134, and are not repeated here.

[0115] According to some embodiments, after forming the dielectric layer 131 and the heat spreader layer 130A, performing Figure 2P The process shown in FIG. 1 is used to form a package structure 100A. Fig. 9B Although Fig. 9B It is not clearly shown in FIG. 1 , but according to some embodiments, the conductive component 134A of the package structure 100A may have a similar Figure 2P-1 or Figure 2P-2 The structures of those shown in .

[0116] Fig. 9C 1 shows a cross-sectional view of a package structure 100A′ according to some embodiments. According to some embodiments, package structure 100A′ can be similar to package structure 100A described previously, except that its conductive features are wider than those in package structure 100A. Processes and materials used to form package structure 100A′ can be similar to or the same as those previously described for forming package structures 100 and 100A, and are not repeated here. In addition, according to some embodiments, package structure 100A′ also has Fig.9A The layout shown in .

[0117] More specifically, according to some embodiments, the heat spreader layer 130A is formed in the dielectric layer 131, and the conductive features 134'a and 134'b (eg, Figure 3 The conductive features 134'a and 134'b shown in FIG. 1 are the same) formed in the heat spreader layer 130A. In addition, according to some embodiments, the package structure 100A' also includes a conductive feature 134A'a, and the conductive feature 134A'a is substantially similar to Figure 3 The conductive member 134'a shown in FIG. Figure 3 The conductive member 134'a shown in FIG. 1 is the same as the conductive member 134'a shown in FIG. 1 , except that the conductive member 134A'a is formed in the dielectric layer 131. Fig. 9CAlthough not clearly shown in FIG. 1 , the conductive component 134A′a of the package structure 100A′ may have a similar Figure 4A or Figure 5A The structures of those shown in .

[0118] Fig.10 A schematic top view of a package structure 200A according to some embodiments is shown. According to some embodiments, package structure 200A can be similar to previously described package structure 200, except that the size of its heat spreader layer is different. Processes and materials used to form package structure 200A can be similar to or the same as those previously described for forming package structure 200, and are not repeated here.

[0119] like Fig.10 As shown in, according to some embodiments, the package structure 200A includes package components 10 and 20 and semiconductor dies 30a, 30b and 40. In addition, a heat diffuser layer 130A is formed over the semiconductor dies 30a, 30b and 40 so that the heat generated by the semiconductor dies 30a, 30b and 40 during operation can be dissipated and the temperature of the device can be reduced. In some embodiments, the semiconductor dies 30a, 30b and 40 are completely covered by the heat diffuser layer 130A (i.e., located in the projection area of ​​the heat diffuser layer 130A). In some embodiments, the width of the heat diffuser layer 130A is greater than the width of each of the semiconductor dies 30a, 30b and 40 in both the X direction and the Y direction. In some embodiments, the package component 20 is also completely covered by the heat diffuser layer 130A (i.e., located in the projection area of ​​the heat diffuser layer 130A). In some embodiments, the package component 10 is partially covered by the heat diffuser layer 130A (i.e., partially located outside the projection area of ​​the heat diffuser layer 130A).

[0120] Fig.11A A schematic top view of a package structure 300A according to some embodiments is shown. According to some embodiments, package structure 300A can be similar to previously described package structure 300, except that the size of its heat spreader layer is different. Processes and materials used to form package structure 300A can be similar to or the same as those previously described for forming package structure 300, and are not repeated here.

[0121] like Fig.11AAs shown in , according to some embodiments, the package structure 300A includes package components 10 and 20 and semiconductor dies 30, 40 and 50. In addition, a heat diffuser layer 130A is formed over the semiconductor dies 30 and 40 so that the heat generated by the semiconductor dies 30 and 40 during operation can be dissipated and the temperature of the device can be reduced. On the other hand, the semiconductor die 50 is not covered by the heat diffuser layer 130A (i.e., is completely located outside the projection area of ​​the heat diffuser layer 130A) because the heat generated by the semiconductor die 50 may be less than the heat generated by the semiconductor dies 30 and 40. In some embodiments, the semiconductor dies 30 and 40 are completely covered by the heat diffuser layer 130A, while the semiconductor die 50 is not covered by the heat diffuser layer 130A.

[0122] Fig. 11B A schematic top view of a package structure 300A' is shown in accordance with some embodiments. In accordance with some embodiments, package structure 300A' can be similar to previously described package structure 300, except that the size of its heat spreader layer is different. Processes and materials used to form package structure 300A' can be similar to or the same as those previously described for forming package structure 300, and are not repeated here.

[0123] like Fig. 11B As shown in , according to some embodiments, the package structure 300A' includes package components 10 and 20 and semiconductor tube cores 30, 40 and 50. In addition, a heat diffuser layer 130A' is formed above the semiconductor tube cores 30 and 40. In some embodiments, the semiconductor tube cores 30 and 40 are completely covered by the heat diffuser layer 130A' (i.e., located in the projection area of ​​the heat diffuser layer 130A'), and the semiconductor tube core 50 is partially covered by the heat diffuser layer 130A' (i.e., partially located outside the projection area of ​​the heat diffuser layer 130A'). The process and materials used to form the heat diffuser layer 130A' can be similar to those previously described for forming the heat diffuser layer 130A or the same as those previously described for forming the heat diffuser layer 130A, and are not repeated here.

[0124] Fig. 12A A schematic top view of a package structure 400A according to some embodiments is shown. According to some embodiments, package structure 400A can be similar to package structure 400 described previously, except that the size of its heat spreader layer is different. The processes and materials used to form package structure 400A can be similar to or the same as those previously described for forming package structure 300, and are not repeated here.

[0125] like Fig. 12AAs shown in , according to some embodiments, package structure 400A includes package components 10 and 20 and semiconductor dies 30a, 30b, 40, and 50. In addition, heat spreader layer 130A is formed over semiconductor dies 30a, 30b, and 40 so that heat generated by semiconductor dies 30a, 30b, and 40 can be dissipated, but semiconductor die 50 is not covered by heat spreader layer 130A because the heat generated by semiconductor die 50 may be less than the heat generated by semiconductor dies 30a, 30b, and 40. In some embodiments, semiconductor dies 30a, 30b, and 40 are completely covered by heat spreader layer 130A (i.e., are located in the projection area of ​​heat spreader layer 130A), while semiconductor die 50 is not covered by heat spreader layer 130A (i.e., is located outside the projection area of ​​heat spreader layer 130A).

[0126] Fig. 12B A schematic top view of a package structure 400A' is shown in accordance with some embodiments. In accordance with some embodiments, package structure 400A' can be similar to previously described package structure 400, except that the size of its heat spreader layer is different. Processes and materials used to form package structure 400A' can be similar to or the same as those previously described for forming package structure 400, and are not repeated here.

[0127] like Fig. 12B As shown in , according to some embodiments, package structure 400A' includes package components 10 and 20 and semiconductor dies 30a, 30b, 40, and 50. In addition, heat spreader layer 130A' is formed over semiconductor dies 30a, 30b, and 40, and semiconductor die 50 is not completely covered by heat spreader layer 130A'. In some embodiments, semiconductor dies 30a, 30b, and 40 are completely covered by heat spreader layer 130A' (i.e., located in the projection area of ​​heat spreader layer 130A'), while semiconductor die 50 is partially covered by heat spreader layer 130A' (i.e., partially located outside the projection area of ​​heat spreader layer 130A').

[0128] Fig.13A A schematic top view of a package structure 100B is shown in accordance with some embodiments. Fig. 13B The package structure 100B according to some embodiments is shown along line X 13A -X 13A' is a cross-sectional view. According to some embodiments, package structure 100B can be similar to package structure 100 described previously, except that the size of its heat spreader layer is different. Processes and materials used to form package structure 100B can be similar to or the same as those previously described for forming package structures 100 and 100A, and are not repeated here.

[0129] like Fig.13A As shown in, according to some embodiments, the package structure 100B includes package components 10 and 20 and semiconductor dies 30 and 40. In addition, heat diffuser layers 130B-1 and 130B-2 slightly larger than the semiconductor dies 30 and 40 are formed above the semiconductor dies 30 and 40, respectively, so that the heat generated by the semiconductor dies 30 and 40 during operation can be dissipated and the temperature of the device can be reduced. In some embodiments, the semiconductor dies 30 and 40 are completely covered by the heat diffuser layers 130B-1 and 130B-2 (that is, located in the projection area of ​​the heat diffuser layers 130B-1 and 130B-2). In some embodiments, the width of the heat diffuser layers 130B-1 and 130B-2 is greater than the width of each of the semiconductor dies 30 and 40 in both the X direction and the Y direction. In some embodiments, the package component 10 is partially covered by the heat diffuser layer 130B-1. In some embodiments, the package component 20 is partially covered by the heat diffuser layers 130B-1 and 130B-2.

[0130] The process for forming heat spreader layers 130B-1 and 130B-2 can be similar to or the same as the process for forming heat spreader layer 130A described previously, except that heat spreader layers 130B-1 and 130B-2 are formed primarily over semiconductor dies 30 and 40, respectively. Fig.13A In the top view shown in FIG. 1 , the heat spreader layers 130B- 1 and 130B- 2 are spaced apart from each other in both the X-direction and the Y-direction. Fig. 13B Although not clearly shown in FIG. 1 , the conductive component 134A of the package structure 100B may have a similar Figure 2P-1 or Figure 2P-2 The structures of those shown in .

[0131] Fig. 13C1 shows a cross-sectional view of a package structure 100B′ according to some embodiments. According to some embodiments, package structure 100B′ can be similar to package structure 100B described previously, except that its conductive features are wider than those in package structure 100B. Processes and materials used to form package structure 100B′ can be similar to or the same as those previously described for forming package structure 100B, and are not repeated here. In addition, according to some embodiments, package structure 100B′ also has Fig.13A More specifically, according to some embodiments, heat spreader layers 130B-1 and 130B-2 are formed in dielectric layer 131, and conductive features 134'a and 134'b are formed in heat spreader layers 130B-1 and 130B-2. In addition, according to some embodiments, the middle portion of package assembly 20 is not covered by any of heat spreader layers 130B-1 and 130B-2.

[0132] Fig.14 A schematic top view of a package structure 200B according to some embodiments is shown. According to some embodiments, package structure 200B can be similar to previously described package structure 200A, except that the size of its heat spreader layer is different. Processes and materials used to form package structure 200B can be similar to or the same as those previously described for forming package structures 200 and 200A, and are not repeated here.

[0133] like Fig.14 As shown in , in accordance with some embodiments, heat spreader layers 130B-1a, 130B-1b, and 130B-2 that are slightly larger than semiconductor dies 30a, 30b, and 40 are formed over semiconductor dies 30a, 30b, and 40, respectively. The process for forming heat spreader layers 130B-1a, 130B-1b, and 130B-2 may be similar to or the same as the process for forming heat spreader layer 130A described previously, except that heat spreader layers 130B-1a, 130B-1b, and 130B-2 are primarily formed over semiconductor dies 30a, 30b, and 40, respectively. In some embodiments, heat spreader layers 130B-1a, 130B-1b, and 130B-2 are spaced apart from each other in a top view, as shown in FIG. Fig.14 Furthermore, according to some embodiments, the middle portion of package assembly 20 is not covered by any of heat spreader layers 130B-1a, 130B-1b, and 130B-2.

[0134] Fig.15A schematic top view of a package structure 300B according to some embodiments is shown. According to some embodiments, package structure 300B can be similar to previously described package structure 300A, except that the size of its heat spreader layer is different. Processes and materials used to form package structure 300B can be similar to or the same as those previously described for forming package structures 300 and 300A, and are not repeated here.

[0135] like Fig.15 As shown in , in accordance with some embodiments, heat spreader layers 130B-1, 130B-2, and 130B-3 are formed over semiconductor dies 30, 40, and 50, respectively. The process for forming heat spreader layers 130B-1, 130B-2, and 130B-3 may be similar to or the same as the process for forming heat spreader layer 130A described previously, except that heat spreader layers 130B-1, 130B-2, and 130B-3 are primarily formed over semiconductor dies 30, 40, and 50, respectively, and are slightly larger than semiconductor dies 30, 40, and 50. In some embodiments, heat spreader layers 130B-1, 130B-2, and 130B-3 are spaced apart from each other in a top view, as shown in FIG. Fig.15 Furthermore, according to some embodiments, the middle portion of package assembly 20 is not covered by any of heat spreader layers 130B- 1 , 130B- 2 , and 130B- 3 .

[0136] Fig.16 A schematic top view of a package structure 400B according to some embodiments is shown. According to some embodiments, package structure 400B can be similar to previously described package structure 400A, except that the size of its heat spreader layer is different. The processes and materials used to form package structure 400B can be similar to or the same as those previously described for forming package structures 400 and 400A, and are not repeated here.

[0137] like Fig.16As shown in , according to some embodiments, heat spreader layers 130B-1a, 130B-1b, 130B-2, and 130B-3 are formed over semiconductor dies 30a, 30b, 40, and 50, respectively. The process for forming heat spreader layers 130B-1a, 130B-1b, 130B-2, and 130B-3 can be similar to or the same as the process for forming heat spreader layer 130A described previously, except that heat spreader layers 130B-1a, 130B-1b, 130B-2, and 130B-3 are primarily formed over semiconductor dies 30a, 30b, 40, and 50, respectively, and are slightly larger than semiconductor dies 30a, 30b, 40, and 50. In some embodiments, the heat spreader layers 130B-1a, 130B-1b, 130B-2, and 130B-3 are separated from each other in the top view, as shown in FIG. Fig.16 Furthermore, according to some embodiments, the middle portion of package assembly 20 is not covered by any of heat spreader layers 130B-1a, 130B-1b, 130B-2, and 130B-3.

[0138] Fig.17 A schematic top view of a package structure 100C according to some embodiments is shown. According to some embodiments, package structure 100C can be similar to previously described package structure 100, except that the shape of its heat spreader layer is different. Processes and materials used to form package structure 100C can be similar to or the same as those previously described for forming package structures 100, 100A, and 100B, and are not repeated here.

[0139] like Fig.17 As shown in , according to some embodiments, a package structure 100C includes package components 10 and 20 and semiconductor dies 30 and 40. In addition, a heat diffuser layer 130C is formed over the semiconductor dies 30 and 40 so that the heat generated by the semiconductor dies 30 and 40 during operation can be dissipated and the temperature of the device can be reduced. In some embodiments, the semiconductor dies 30 and 40 are completely covered by the heat diffuser layer 130C. In some embodiments, the heat diffuser layer 130C has a first portion vertically overlapping the semiconductor die 30 and a second portion vertically overlapping the semiconductor die 40, and the first portion and the second portion are connected to each other.

[0140] In some embodiments, in the top view, the middle portion of each of the package components 20 does not overlap with the heat spreader layer 130C, while the peripheral portion of each of the package components 20 overlaps with the heat spreader layer 130C, as shown in FIG. Fig.17In some embodiments, the heat spreader layer 130C has a first width W measured along the X direction. 1-17 , the second width W 2-17 and the third width W 3-17 In addition, according to some embodiments, the second width W 2-17 Greater than the first width W 1-17 and the third width W 3-17 In some embodiments, the first width W 1-17 Greater than the third width W 3-17 .

[0141] In some embodiments, package components 10 and 20 are partially covered by heat spreader layer 130C. The process for forming heat spreader layer 130C can be similar to or the same as the process for forming heat spreader layer 130A described previously, except that heat spreader layer 130C is primarily formed over semiconductor die 30 and 40.

[0142] Fig.18 A schematic top view of a package structure 200C according to some embodiments is shown. According to some embodiments, package structure 200C can be similar to previously described package structure 200A, except that the shape of its heat spreader layer is different. The processes and materials used to form package structure 200C can be similar to or the same as those previously described for forming package structures 200, 200A, and 200B, and are not repeated here.

[0143] like Fig.18 As shown in , according to some embodiments, heat diffuser layer 130C is formed over semiconductor die 30a, 30b, and 40. The process for forming heat diffuser layer 130C can be similar to the process for forming heat diffuser layer 130A described previously or the same as the process for forming heat diffuser layer 130A described previously, except that heat diffuser layer 130C is mainly formed over semiconductor die 30a, 30b, and 40, respectively. In some embodiments, semiconductor die 30a, 30b, and 40 are completely covered by heat diffuser layer 130C. In addition, according to some embodiments, the middle portion of package assembly 20 is not covered by heat diffuser layer 130C.

[0144] Fig.19A schematic top view of a package structure 300C according to some embodiments is shown. According to some embodiments, package structure 300C can be similar to previously described package structure 300A, except that the shape of its heat spreader layer is different. The processes and materials used to form package structure 300C can be similar to or the same as those previously described for forming package structures 300, 300A, and 300B, and are not repeated here.

[0145] like Fig.19 As shown in , according to some embodiments, a heat spreader layer 130C' is formed over semiconductor die 30, 40, and 50. The process for forming heat spreader layer 130C' can be similar to or the same as the process for forming heat spreader layer 130A described previously, except that heat spreader layer 130C' is primarily formed over semiconductor die 30, 40, and 50. In addition, according to some embodiments, the middle portion of package assembly 20 is not covered by heat spreader layer 130C'.

[0146] Fig. 20 400A, and 400B are shown, and are not repeated here. Fig. 20 As shown in FIG. 1 , in accordance with some embodiments, heat spreader layer 130C′ is formed over semiconductor dies 30a, 30b, 40, and 50. Furthermore, in accordance with some embodiments, a middle portion of package assembly 20 is not covered by heat spreader layer 130C′.

[0147] Fig.21 A schematic top view of a package structure 300D according to some embodiments is shown. According to some embodiments, package structure 300D can be similar to previously described package structure 300, except that the shape of its heat spreader layer is different. The processes and materials used to form package structure 300D can be similar to or the same as those previously described for forming package structures 300, 300A, 300B, and 300C, and are not repeated here.

[0148] like Fig.21As shown in , according to some embodiments, package structure 300D includes package components 10 and 20 and semiconductor dies 30, 40, and 50. In addition, according to some embodiments, heat spreader layers 130B-1 and 130B-2 are formed over semiconductor dies 30 and 40, but not over semiconductor die 50. In addition, according to some embodiments, a middle portion of package component 20 is not covered by any of heat spreader layers 130B-1 and 130B-2.

[0149] Fig. 22 A schematic top view of a package structure 400D according to some embodiments is shown. According to some embodiments, package structure 400D can be similar to previously described package structure 400, except that the shape of its heat spreader layer is different. The processes and materials used to form package structure 400D can be similar to or the same as those previously described for forming package structures 400, 400A, 400B, and 400C, and are not repeated here.

[0150] like Fig. 22 As shown in , according to some embodiments, package structure 400D includes package components 10 and 20 and semiconductor dies 30a, 30b, 40, and 50. In addition, according to some embodiments, heat spreader layers 130B-1a, 130B-1b, and 130B-2 are formed over semiconductor dies 30a, 30b, and 40, but not over semiconductor die 50. In addition, according to some embodiments, a middle portion of package component 20 is not covered by any of heat spreader layers 130B-1a, 130B-1b, and 130B-2.

[0151] Fig.23 A schematic top view of a package structure 300E according to some embodiments is shown. According to some embodiments, package structure 300E can be similar to previously described package structure 300, except that its heat spreader layer has a different shape. Processes and materials used to form package structure 300E can be similar to or the same as those previously described for forming package structures 300, 300A, 300B, 300C, and 300D, and are not repeated here.

[0152] like Fig.23As shown in , according to some embodiments, package structure 300E includes package components 10 and 20 and semiconductor dies 30, 40, and 50. Furthermore, according to some embodiments, heat spreader layer 130C is formed over semiconductor dies 30 and 40, but not over semiconductor die 50. Furthermore, according to some embodiments, a middle portion of package component 20 is not covered by heat spreader layer 130C.

[0153] Fig.24 A schematic top view of a package structure 400E according to some embodiments is shown. According to some embodiments, package structure 400E can be similar to package structure 400 described previously, except that the shape of its heat spreader layer is different. The processes and materials used to form package structure 400E can be similar to those previously described for forming package structures 400, 400A, 400B, 400C, and 400D or the same as those previously described for forming package structures 400, 400A, 400B, 400C, and 400D, and are not repeated here.

[0154] like Fig.24 As shown in , according to some embodiments, package structure 400E also includes package components 10 and 20 and semiconductor dies 30a, 30b, 40, and 50. In addition, according to some embodiments, heat spreader layer 130C is formed over semiconductor dies 30a, 30b, and 40, but not over semiconductor die 50. In addition, according to some embodiments, a middle portion of package component 20 is not covered by heat spreader layer 130C.

[0155] As described above, semiconductor dies (e.g., semiconductor dies 30, 30a, 30b, 40, and 50) may be formed to be electrically connected to a package assembly (e.g., package assemblies 10 and 20) through a redistribution structure (e.g., redistribution structure 108). However, during operation, the semiconductor die may generate heat. Therefore, a heat diffuser layer (e.g., heat diffuser layer 130, 130A, 130A', 130B-1, 130B-2, 130B-1a, 130B-1b, 130B-3, 130C, and 130C') is formed above the semiconductor die so that the heat generated by the semiconductor die can be diffused laterally (e.g., dissipated). Therefore, the temperature of the package structure, especially the temperature at the hot spots around the semiconductor die, can be reduced, and thus the performance of the package structure can be improved.

[0156] It should be understood that the elements shown in the package structures 100, 100', 200, 300, 400, 100A, 100A', 200A, 300A, 300A', 400A, 400A', 100B, 100B', 200B, 300B, 400B, 100C, 100C', 200C, 300C, 400C, 300D, 400D, 300E, and 400E may be combined and / or interchanged. For example, the conductive features in the heat spreader layers (e.g., heat spreader layers 130, 130A, 130A', 130B-1, 130B-2, 130B-1a, 130B-1b, 130B-3, 130C, and 130C') formed in the package structure may have Figure 2P-1 , Figure 2P-2 , Figure 4A , Figure 4B , Figure 5A or Figure 5B The structure shown in , but the layout of the package structure can be different.

[0157] In addition, it should be noted that Figures 1A to 24 The same elements in the present invention may be represented by the same reference numerals, may include the same or similar materials, and may be formed by the same or similar processes; therefore, such redundant details are omitted for the sake of brevity. Figures 1A to 24 It is described in terms of methods, but it should be understood that Figures 1A to 24 The structure disclosed in is not limited to the method, but can exist independently as a structure independent of the method. Similarly, Figures 1A to 24 The methods shown in are not limited to the disclosed structures but can exist independently of the structures.

[0158] In addition, although disclosed method is shown and described as a series of steps or events above, it should be understood that in some other embodiments, the shown order of such steps or events can be changed. For example, some steps can occur in different orders and / or with other steps or events except those shown and / or described above. In addition, not all steps shown are necessary for implementing one or more aspects or embodiments described above. In addition, one or more of the steps described above can be performed as one or more independent steps and / or stages.

[0159] In addition, the terms "approximately", "substantially", "substantially" and "about" used above take into account small variations and may vary in different technologies and are within the range of deviations understood by those skilled in the art. For example, when used in conjunction with an event or circumstance, the term can refer to instances where the event or circumstance occurred exactly as well as instances where the event or circumstance occurred very nearly.

[0160] Embodiments of a package structure may be provided. The package structure may include a package assembly and a semiconductor die disposed at opposite sides of a redistribution structure. In addition, a heat spreader layer is formed above the semiconductor die so that heat generated by the semiconductor die can be laterally diffused through the heat spreader layer. Therefore, the temperature of the device during operation can be reduced and performance can be improved.

[0161] A packaging structure is provided. The packaging structure includes a first redistribution structure and a first packaging component and a second packaging component attached to a first side of the first redistribution structure and spaced apart from each other in a first direction. The packaging structure also includes a first semiconductor die attached to a second side of the first redistribution structure and an encapsulant formed around the first semiconductor die. The packaging structure also includes a heat diffuser layer formed above the first semiconductor die, and the thermal conductivity of the heat diffuser layer is greater than the thermal conductivity of the encapsulant. The packaging structure also includes a conductive component formed through the heat diffuser layer and a second redistribution structure formed above the heat diffuser layer. In addition, the second redistribution structure is electrically connected to the first semiconductor die through the conductive component.

[0162] A packaging structure is provided. The packaging structure includes: a first semiconductor die having a first projection area in a top view; and a first redistribution structure attached to a first side of the first semiconductor die. The packaging structure also includes: a heat diffuser layer attached to a second side of the first semiconductor die, and the heat diffuser layer has a second projection area in a top view, and the second projection area of ​​the heat diffuser layer is larger than the first projection area of ​​the first semiconductor die. The packaging structure also includes: a second redistribution structure formed above the heat diffuser layer; and a conductive component formed through the heat diffuser layer and electrically connecting the first semiconductor die and the second redistribution structure. The packaging structure also includes: a first packaging component and a second packaging component attached to the first redistribution structure. In addition, the first semiconductor die partially overlaps with both the first packaging component and the second packaging component.

[0163] A method for forming a package structure is provided. The method for forming the package structure includes: disposing a first semiconductor die above a first carrier substrate; and forming a first redistribution structure above a first side of the first semiconductor die. The method for forming the package structure also includes: disposing a first package component and a second package component above the first distribution structure. In addition, the first package component is spaced apart from the second package component in a first direction. The method for forming the package structure also includes: attaching a second carrier substrate above the first package component and the second package component; and removing the first carrier substrate from the second side of the first semiconductor die. The method for forming the package structure also includes: forming a heat diffuser layer covering the second side of the first semiconductor die, and the heat diffuser layer is made of a carbon-containing material, and the width of the heat diffuser layer is greater than the width of the first semiconductor die in the first direction. The method for forming the package structure also includes: forming a first conductive component through the heat diffuser layer; and forming a second redistribution structure covering the heat diffuser layer and the first conductive component.

[0164] Some embodiments of the present application provide a packaging structure including: a first redistribution structure; a first packaging component and a second packaging component attached to a first side of the first redistribution structure and spaced apart from each other in a first direction; a first semiconductor die attached to a second side of the first redistribution structure; an encapsulant formed around the first semiconductor die; a heat diffuser layer formed above the first semiconductor die, wherein the thermal conductivity of the heat diffuser layer is greater than the thermal conductivity of the encapsulant; a conductive component formed through the heat diffuser layer; and a second redistribution structure formed above the heat diffuser layer, wherein the second redistribution structure is electrically connected to the first semiconductor die through the conductive component.

[0165] In some embodiments, the heat spreader layer is made of graphene or diamond-like carbon. In some embodiments, in a top view, the first semiconductor die overlaps the first sidewall of the first package component and the first sidewall of the second package component. In some embodiments, the package structure further includes: a second semiconductor die attached to the second side of the first redistribution structure; and a third package component attached to the first side of the first redistribution structure and spaced apart from the second package component in the first direction, wherein the second semiconductor die overlaps the second sidewall of the second package component, the first sidewall of the third package component, and the heat spreader layer. In some embodiments, the heat spreader layer extends continuously from above the first semiconductor die to above the second semiconductor die. In some embodiments, the heat spreader layer has a first portion covering the first semiconductor die and a second portion covering the second semiconductor die, and the first portion is spaced apart from the second portion in the first direction. In some embodiments, the package structure further includes: an insulating via attached to the second side of the first redistribution structure and surrounded by the sealant; and a second conductive component formed through the heat spreader layer and in contact with the insulating via. In some embodiments, the width of the second conductive component is greater than the width of the insulating via in the first direction.

[0166] Other embodiments of the present application provide a packaging structure, including: a first semiconductor die having a first projection area in a top view; a first redistribution structure attached to a first side of the first semiconductor die; a heat diffuser layer attached to a second side of the first semiconductor die, wherein the heat diffuser layer has a second projection area in the top view, and the second projection area of ​​the heat diffuser layer is larger than the first projection area of ​​the first semiconductor die; a second redistribution structure formed above the heat diffuser layer; a conductive component formed through the heat diffuser layer and electrically connecting the first semiconductor die and the second redistribution structure; and a first packaging component and a second packaging component attached to the first redistribution structure, wherein the first semiconductor die partially overlaps with both the first packaging component and the second packaging component.

[0167] In some embodiments, the first projected area of ​​the first semiconductor die is located within the second projected area of ​​the heat spreader layer, and portions of the first package component and the second package component are located outside the second projected area of ​​the heat spreader layer. In some embodiments, the second projected area of ​​the heat spreader layer has a first width and a second width measured along a first direction, and the first width is different from the second width. In some embodiments, the package structure further includes: a third package component and a fourth package component attached to the first redistribution structure, wherein the first package component, the second package component, and the third package component are aligned in a first direction, and the fourth package component and the second package component are aligned in a second direction different from the first direction; a second semiconductor die attached to the first redistribution structure and overlapping the second package component and the third package component; and a third semiconductor die attached to the first redistribution structure and overlapping the second package component and the fourth package component, wherein, in the top view, the first semiconductor die, the second semiconductor die, and the third semiconductor die are located in the second projected area of ​​the heat spreader layer.

[0168] In some embodiments, the package structure further includes: a fifth package component attached to the first redistribution structure, wherein the fifth package component and the first package component are aligned in the second direction, and the fifth package component is located within the second projection area of ​​the heat spreader layer and partially overlaps with the first projection area of ​​the first semiconductor die in the top view. In some embodiments, the package structure further includes: a fourth semiconductor die attached to the first redistribution structure and spaced apart from the first semiconductor die in the first direction, wherein the fourth semiconductor die vertically overlaps with the first package component and is located outside the second projection area of ​​the heat spreader layer in the top view. In some embodiments, the heat spreader layer is formed in a dielectric layer.

[0169] Some other embodiments of the present application provide a method for forming a packaging structure, including: setting a first semiconductor die above a first carrier substrate; forming a first redistribution structure above a first side of the first semiconductor die; setting a first packaging component and a second packaging component above the first redistribution structure, wherein the first packaging component is spaced apart from the second packaging component in a first direction; attaching a second carrier substrate above the first packaging component and the second packaging component; removing the first carrier substrate from the second side of the first semiconductor die; forming a heat diffuser layer covering the second side of the first semiconductor die, wherein the heat diffuser layer is made of a carbon-containing material and the width of the heat diffuser layer is greater than the width of the first semiconductor die in the first direction; forming a first conductive component through the heat diffuser layer; and forming a second redistribution structure covering the heat diffuser layer and the first conductive component.

[0170] In some embodiments, the method for forming a package structure further includes: forming an opening through the heat diffuser layer, wherein the through hole in the first semiconductor die is exposed by the opening, and the first conductive component is formed in the opening. In some embodiments, the method for forming a package structure further includes: forming an insulating through hole above the first carrier substrate; and forming a sealant around the insulating through hole and the first semiconductor die, wherein the sealant is sandwiched between the heat diffuser layer and the first redistribution structure. In some embodiments, the method for forming a package structure further includes: forming a second conductive component in the heat diffuser layer, wherein the second conductive component is in direct contact with the curved top surface of the insulating through hole. In some embodiments, the method for forming a package structure further includes: disposing a second semiconductor die, a third semiconductor die, and a fourth semiconductor die above the first carrier substrate, wherein the first semiconductor die, the second semiconductor die, the third semiconductor die, and the fourth semiconductor die vertically cover the first sidewall, the second sidewall, the third sidewall, and the fourth sidewall of the first package component, respectively, and the heat diffuser layer covers the first semiconductor die, the second semiconductor die, the third semiconductor die, and the fourth semiconductor die.

[0171] The features of several embodiments are summarized above so that those skilled in the art can better understand the various aspects of the embodiments of the present disclosure. Those skilled in the art should understand that they can easily use the embodiments of the present disclosure as a basis to design or modify other processes and structures for performing the same purpose and / or achieving the same advantages as the embodiments introduced herein. Those skilled in the art should also appreciate that such equivalent constructions do not deviate from the spirit and scope of the embodiments of the present disclosure, and that they can make various changes, substitutions and modifications herein without departing from the spirit and scope of the embodiments of the present disclosure.

Claims

1. A packaging structure, comprising: First redistribution structure; a first package component and a second package component attached to a first side of the first redistribution structure and spaced apart from each other in a first direction; a first semiconductor die attached to a second side of the first redistribution structure; an encapsulant formed around the first semiconductor die; a heat spreader layer formed over the first semiconductor die, wherein a thermal conductivity of the heat spreader layer is greater than a thermal conductivity of the encapsulant; a conductive member formed through the heat spreader layer; and A second redistribution structure is formed over the heat spreader layer, wherein the second redistribution structure is electrically connected to the first semiconductor die through the conductive feature.

2. The packaging structure according to claim 1, wherein: The heat spreader layer is made of graphene or diamond-like carbon.

3. The packaging structure according to claim 1, wherein: In a top view, the first semiconductor die overlaps a first sidewall of the first package assembly and a first sidewall of the second package assembly.

4. The packaging structure according to claim 3, further comprising: a second semiconductor die attached to the second side of the first redistribution structure; as well as A third package component is attached to the first side of the first redistribution structure and is spaced apart from the second package component in the first direction, wherein the second semiconductor die overlaps the second sidewall of the second package component, the first sidewall of the third package component, and the heat spreader layer.

5. The packaging structure according to claim 4, wherein: The heat spreader layer extends continuously from over the first semiconductor die to over the second semiconductor die.

6. The packaging structure according to claim 4, wherein: The heat spreader layer has a first portion covering the first semiconductor die and a second portion covering the second semiconductor die, and the first portion is spaced apart from the second portion in the first direction.

7. The package structure according to claim 1, further comprising: an insulating via attached to the second side of the first redistribution structure and surrounded by the encapsulant; as well as A second conductive member is formed through the heat spreader layer and contacts the insulating via.

8. The packaging structure according to claim 7, wherein: A width of the second conductive component is greater than a width of the insulating via in the first direction.

9. A packaging structure, comprising: a first semiconductor die having a first projected area in the top view; a first redistribution structure attached to a first side of the first semiconductor die; a heat spreader layer attached to a second side of the first semiconductor die, wherein the heat spreader layer has a second projected area in the top view, and the second projected area of ​​the heat spreader layer is larger than the first projected area of ​​the first semiconductor die; a second redistribution structure formed over the heat spreader layer; a conductive feature formed through the heat spreader layer and electrically connecting the first semiconductor die and the second redistribution structure; and A first package assembly and a second package assembly are attached to the first redistribution structure, wherein the first semiconductor die partially overlaps both the first package assembly and the second package assembly.

10. A method for forming a package structure, comprising: disposing a first semiconductor die over a first carrier substrate; forming a first redistribution structure over a first side of the first semiconductor die; disposing a first package component and a second package component over the first redistribution structure, wherein the first package component is spaced apart from the second package component in a first direction; attaching a second carrier substrate over the first package component and the second package component; removing the first carrier substrate from the second side of the first semiconductor die; forming a heat spreader layer covering the second side of the first semiconductor die, wherein the heat spreader layer is made of a carbon-containing material and has a width greater than a width of the first semiconductor die in the first direction; forming a first conductive feature through the heat spreader layer; and A second redistribution structure is formed covering the heat spreader layer and the first conductive member.

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