Asymmetric Doherty power amplifier based on cascode structure

By adopting a co-gate structure transistor design in Doherty power amplifier, the traditional design has solved the shortcomings in low gain, low saturation output power and self-excitation oscillation, and achieved higher linear gain and saturated output power.

CN119834738APending Publication Date: 2025-04-15GUANGZHOU INSTITUTE OF TECHNOLOY XIDIAN UNIVERSITY +1
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Patent Information

Application Number
CN202411640601.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-18
Publication Date
2025-04-15

AI Technical Summary

Technical Problem

Traditional asymmetric Doherty power amplifiers have shortcomings in terms of low gain, low saturation output power and easy self-excitation oscillation, which is difficult to meet the needs of peak average ratio and high data transmission rates.

Method used

Using an asymmetric Doherty power amplifier design based on a cascorder structure, the carrier amplifier and peak amplifier output stages use a co-gate transistor. By adjusting the size and structure of the driving stage transistor, the output stage transistors can be ensured to achieve saturated output.

Benefits of technology

Higher linear gain, higher saturated output power and greater fallback range are achieved, improving the performance and stability of the power amplifier.

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Abstract

The invention belongs to the technical field of radio frequency integrated chips, and particularly discloses an asymmetric Doherty power amplifier based on a cascode structure, which comprises a power divider, a carrier power amplification branch, a peak power amplification branch and a post-matching network, according to the Doherty power amplifier, the carrier power amplifier output stage transistor and the peak power amplifier output stage transistor both adopt a cascode structure, the source cascode structure has the advantage of high reverse isolation, the feedback quantity of the cascode structure is smaller, the circuit is more stable, and the Doherty power amplifier has larger gain; meanwhile, the voltage swing is larger, so that the saturation output power is higher; in addition, the Doherty power amplifier provided by the invention adopts an asymmetric structure, so that the Doherty power amplifier has a larger rollback range.
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Description

Technical Field

[0001] The invention relates to the technical field of radio frequency integrated chips, in particular to an asymmetric Doherty power amplifier based on a common source and common gate structure. Background Art

[0002] With the rapid development of communication systems today, the new generation of broadband wireless mobile communications has become a research hotspot in the field of mobile communications at home and abroad. Since wireless communication systems need to achieve high channel capacity and data transmission efficiency, but spectrum resources are limited, complex modulation methods are used to improve spectrum utilization. In order to achieve higher-speed data transmission, the peak-to-average ratio is getting higher and higher, which requires Doherty power amplifiers to have a larger back-off range to meet more stringent linearity requirements.

[0003] In order to expand the back-off range of Doherty power amplifiers, an asymmetric structure is usually adopted, and larger peak power amplifier output stage transistors are usually used. The traditional asymmetric Doherty power amplifier directly uses a single larger transistor or a structure of two transistors in parallel as the output stage transistor of the peak power amplifier. The Doherty power amplifier designed with this structure has low gain, low saturated output power, and is prone to self-oscillation. Therefore, in order to solve the above problems, it is necessary to study a new Doherty power amplifier structure. Summary of the invention

[0004] In order to solve the above technical problem, the present invention provides an asymmetric Doherty power amplifier based on a common source and common gate structure.

[0005] To achieve the above object, the present invention is implemented according to the following technical solutions:

[0006] An asymmetric Doherty power amplifier based on a common source and common gate structure, comprising a power divider, a carrier power amplification branch, a peak power amplification branch, and a post-matching network;

[0007] The power divider, the input end is connected to the radio frequency signal input end;

[0008] The carrier power amplifier branch includes a phase shift network, a carrier power amplifier input matching network, a carrier power amplifier driver stage transistor, a carrier power amplifier interstage matching network, a carrier power amplifier output stage transistor and a carrier power amplifier output matching network, which are sequentially connected to the output end of the power divider; the carrier power amplifier output stage transistor is a common source and common gate structure;

[0009] The peak power amplification branch includes a peak power amplifier input matching network, a peak power amplifier driving stage transistor, a peak power amplifier inter-stage matching network, a peak power amplifier output stage transistor, a peak power amplifier output matching network and a small signal open line which are sequentially connected to the output end of the power divider; the peak power amplifier output stage transistor is a common source and common gate structure;

[0010] The post-matching network has an input end connected to the output end of the carrier power amplifier output matching network and a small signal open-circuit output end respectively, and an output end connected to the radio frequency signal output end.

[0011] Furthermore, the power divider is a Wilkinson 1:1 power divider or a Lange 1:1 power divider.

[0012] Furthermore, the input end of the phase-shifting network is connected to the output end of the power divider; the input end of the carrier power amplifier input matching network is connected to the output end of the phase-shifting network; the gate of the carrier power amplifier driving-stage transistor is connected to the output end of the carrier power amplifier input matching network, the drain is connected to the carrier power amplifier inter-stage matching network, and the source is grounded; the output end of the carrier power amplifier inter-stage matching network is connected to the input end of the carrier power amplifier output-stage transistor; the output end of the carrier power amplifier output-stage transistor is connected to the carrier power amplifier output matching network; and the output end of the carrier power amplifier output matching network is connected to the input end of the post-matching network.

[0013] Furthermore, the input end of the peak power amplifier input matching network is connected to the output end of the power divider; the gate of the peak power amplifier driving stage transistor is connected to the output end of the peak power amplifier input matching network, the drain is connected to the input end of the peak power amplifier inter-stage matching network, and the source is grounded; the input end of the peak power amplifier output stage transistor is connected to the output end of the peak power amplifier inter-stage matching network; the input end of the carrier power amplifier output matching network is connected to the output end of the peak power amplifier output stage transistor; the input end of the small signal open line is connected to the output end of the peak power amplifier output matching network, and the output end of the small signal open line is connected to the post-matching network.

[0014] Furthermore, the carrier power amplifier driving stage transistor includes a size of N×W g transistor; the peak power amplifier driver stage transistor includes a size of N'×W g 'transistor; the sizes of the carrier power amplifier driving stage transistor and the peak power amplifier driving stage transistor satisfy the following relationship:

[0015] N×W g =2×N'×W g ';

[0016] Where: N ensures W gWithout violating process rules, the linear output power of the driver-stage die can drive the output-stage transistor to reach a saturated output state.

[0017] Furthermore, the carrier power amplifier output stage transistor includes two transistors with a size of N"×W g "Common source and common gate transistors; the peak power amplifier output stage transistors include two transistors with a size of N'"×W g '" common source and common gate transistors; the sizes of the carrier power amplifier output stage transistors and the peak power amplifier output stage transistors satisfy the following relationship:

[0018] N”×W g ”=2×N'”×W g '";

[0019] Where: N ensures W g If the process rules are not violated, set it to the maximum gate index allowed by the process.

[0020] Compared with the prior art, the Doherty power amplifier of the present invention adopts a common source and common gate structure for both the carrier power amplifier output stage transistor and the peak power amplifier output stage transistor. The common source and common gate structure has the advantage of high reverse isolation, and the common source and common gate structure has less feedback, so the circuit will be more stable and have a greater gain; at the same time, it has a larger voltage swing, and therefore has a higher saturated output power; in addition, the Doherty power amplifier of the present invention adopts an asymmetric structure and has a larger back-off range. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 This is a principle block diagram of an asymmetric Doherty power amplifier chip based on a common source and common gate structure of this embodiment.

[0022] Figure 2 The following is a comparison diagram between the peak power amplifier output stage transistor using a common source and common gate structure in this embodiment and the traditional peak power amplifier output stage transistor structure: (a) is the traditional peak power amplifier output stage transistor structure; (b) is the peak power amplifier output stage transistor structure using a common source and common gate structure.

[0023] Figure 3 The following is a simulation comparison diagram of a power amplifier made of a peak power amplifier output stage transistor using a common source and common gate structure in this embodiment and a power amplifier made of a traditional peak power amplifier output stage transistor structure: (a) is the Doherty power amplifier in this embodiment; (b) is the traditional Doherty power amplifier.

[0024] Reference numerals in the figures:

[0025] 10: power divider; 20: carrier power amplifier branch; 201: phase shift network; 202: carrier power amplifier input matching network; 203: carrier power amplifier driver stage transistor; 204: carrier power amplifier inter-stage matching network; 205: carrier power amplifier output stage transistor; 206: carrier power amplifier output matching network; 30: peak power amplifier branch; 301: peak power amplifier input matching network; 302: peak power amplifier driver stage transistor; 303: peak power amplifier inter-stage matching network; 304: peak power amplifier output stage transistor; 305: peak power amplifier output matching network; 306: small signal open-circuit line; 40: post-matching network. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with embodiments. The specific embodiments described herein are only used to explain the present invention and are not used to limit the invention.

[0027] like Figure 1 As shown, this embodiment exemplarily shows an asymmetric Doherty power amplifier based on a common source and common gate structure, including a power divider 10, a carrier power amplification branch 20, a peak power amplification branch 30, and a post-matching network 40;

[0028] The power divider 10 has an input end connected to the radio frequency signal input end. In this embodiment, the power divider 10 can be a Wilkinson 1:1 power divider or a Lange 1:1 power divider.

[0029] The carrier power amplifier branch 20 includes a phase shift network 201, a carrier power amplifier input matching network 202, a carrier power amplifier driver stage transistor 203, a carrier power amplifier interstage matching network 204, a carrier power amplifier output stage transistor 205 and a carrier power amplifier output matching network 206, which are sequentially connected to the output end of the power divider 10; the carrier power amplifier output stage transistor 205 is a common source and common gate structure; specifically, the input end of the phase shift network 201 is connected to the output end of the power divider 10; the input end of the carrier power amplifier input matching network 202 is connected The output end of the phase shift network 201; the gate of the carrier power amplifier driving stage transistor 203 is connected to the output end of the carrier power amplifier input matching network 202, the drain is connected to the carrier power amplifier interstage matching network 204, and the source is grounded; the output end of the carrier power amplifier interstage matching network 204 is connected to the input end of the carrier power amplifier output stage transistor 205; the output end of the carrier power amplifier output stage transistor 205 is connected to the carrier power amplifier output matching network 206; the output end of the carrier power amplifier output matching network 206 is connected to the input end of the rear matching network 40.

[0030] Wherein: the carrier power amplifier driving stage transistor 203 includes a size of N×W g Peak power amplifier driver stage transistor 302 includes a size of N '×Wg carrier power amplifier driver stage transistor 203 and the peak power amplifier driver stage transistor size needs to satisfy the following relationship:

[0031] N×W g =2×N'×W g ';

[0032] Where: N ensures W g Without violating process rules, the linear output power of the driver-stage die can drive the output-stage transistor to reach a saturated output state.

[0033] The peak power amplifier branch 30 includes a peak power amplifier input matching network 301, a peak power amplifier driving stage transistor 302, a peak power amplifier inter-stage matching network 303, a peak power amplifier output stage transistor 304, a peak power amplifier output matching network 305 and a small signal open line 306 which are sequentially connected to the output end of the power divider 10; the peak power amplifier output stage transistor 304 is a common source and common gate structure; specifically, the input end of the peak power amplifier input matching network 301 is connected to the output end of the power divider 10; the gate of the peak power amplifier driving stage transistor 302 is connected to the peak power amplifier input matching The output end of network 301, the drain is connected to the input end of the peak power amplifier interstage matching network 303, and the source is grounded; the input end of the peak power amplifier output stage transistor 304 is connected to the output end of the peak power amplifier interstage matching network 303; the input end of the carrier power amplifier output matching network 305 is connected to the output end of the peak power amplifier output stage transistor 304; the input end of the small signal open line 306 is connected to the output end of the peak power amplifier output matching network 305, the output end of the small signal open line 306 is connected to the rear matching network 40, and the output end of the rear matching network 40 is connected to the RF signal output end.

[0034] Wherein: The carrier power amplifier output stage transistor 205 includes two transistors with a size of N"×W g The common source and common gate transistor has one more transistor than the traditional peak power amplifier output stage transistor, see Figure 2 ; The peak power amplifier output stage transistor 302 includes two dimensions of N'"×W g '" cascode transistor; the sizes of the carrier power amplifier output stage transistor 205 and the peak power amplifier output stage transistor 304 satisfy the following relationship:

[0035] N”×W g ”=2×N'”×W g '";

[0036] Where: N ensures W g If the process rules are not violated, set it to the maximum gate index allowed by the process.

[0037] The power amplifier made of the peak power amplifier output stage transistor with the common source and common gate structure in this embodiment and the traditional peak power amplifier output stage transistor structure was simulated to test the performance of the Doherty power amplifier. Figure 3 shown.

[0038] Depend on Figure 3 It can be seen from (a) in the figure that the saturated output power of an asymmetric Doherty power amplifier based on a common source and common gate structure provided in this embodiment is 3.15dBm to 31.8dBm within the frequency range. Figure 3 It can be seen from (b) that the saturated output power of the Doherty power amplifier using only a single-tube structure is 27.5 dBm to 28 dBm within the frequency range. The asymmetric Doherty power amplifier based on the common source and common gate structure provided in this embodiment can effectively increase the saturated output power;

[0039] Depend on Figure 3 It can be seen from (a) in the figure that the asymmetric Doherty power amplifier based on the common source and common gate structure provided in this embodiment has a back-off range of 8 dB within the frequency range. Figure 3 It can be seen from (b) that the back-off range of the Doherty power amplifier using only a single-tube structure is 6 dB within the frequency range. The asymmetric Doherty power amplifier based on a common source and common gate structure provided in this embodiment can effectively increase the back-off range;

[0040] Depend on Figure 3 It can be seen from (a) in the figure that the asymmetric Doherty power amplifier based on the common source and common gate structure provided in this embodiment has a gain of 15.7dB to 16.1dB within the frequency range. Figure 3 It can be seen from (b) that the Doherty power amplifier using only a single-tube structure has a gain of 10.7 dB to 13.7 dB within the frequency range. The asymmetric Doherty power amplifier based on a common source and common gate structure provided in this embodiment can effectively increase the gain and improve the gain flatness.

[0041] In summary, the Doherty power amplifier provided in this embodiment uses transistors with a common source and common gate structure as the output stage, so that the Doherty power amplifier has better linear gain, higher saturated output power and larger back-off range.

[0042] The technical solution of the present invention is not limited to the above-mentioned specific embodiments. All technical variations made according to the technical solution of the present invention fall within the protection scope of the present invention.

Claims

1. An asymmetric Doherty power amplifier based on a common source and common gate structure, comprising a power divider (10), a carrier power amplification branch (20), a peak power amplification branch (30), and a post-matching network (40); characterized in that: The power divider (10) has an input end connected to a radio frequency signal input end; The carrier power amplification branch (20) comprises a phase shift network (201) connected in sequence to the output end of the power divider (10), a carrier power amplifier input matching network (202), a carrier power amplifier driving stage transistor (203), a carrier power amplifier interstage matching network (204), a carrier power amplifier output stage transistor (205) and a carrier power amplifier output matching network (206); the carrier power amplifier output stage transistor (205) is a common source and common gate structure; The peak power amplification branch (30) comprises a peak power amplifier input matching network (301), a peak power amplifier driving stage transistor (302), a peak power amplifier inter-stage matching network (303), a peak power amplifier output stage transistor (304), a peak power amplifier output matching network (305) and a small signal open line (306) which are sequentially connected to the output end of the power divider (10); the peak power amplifier output stage transistor (304) is a common source and common gate structure; The post-matching network (40) has an input end connected to the output end of the carrier power amplifier output matching network (206) and the output end of the small signal open line (306), and an output end connected to the radio frequency signal output end.

2. The asymmetric Doherty power amplifier based on a cascode structure according to claim 1, characterized in that: The power divider (10) is a Wilkinson 1:1 power divider or a Lange 1:1 power divider.

3. The asymmetric Doherty power amplifier based on a cascode structure according to claim 1, characterized in that: The input end of the phase shift network (201) is connected to the output end of the power divider (10); the input end of the carrier power amplifier input matching network (202) is connected to the output end of the phase shift network (201); the gate of the carrier power amplifier driving stage transistor (203) is connected to the output end of the carrier power amplifier input matching network (202), the drain is connected to the carrier power amplifier inter-stage matching network (204), and the source is grounded; the output end of the carrier power amplifier inter-stage matching network (204) is connected to the input end of the carrier power amplifier output stage transistor (205); the output end of the carrier power amplifier output stage transistor (205) is connected to the carrier power amplifier output matching network (206); and the output end of the carrier power amplifier output matching network (206) is connected to the input end of the post-matching network (40).

4. The asymmetric Doherty power amplifier based on a cascode structure according to claim 1, characterized in that: The input end of the peak power amplifier input matching network (301) is connected to the output end of the power divider (10); the gate of the peak power amplifier driving stage transistor (302) is connected to the output end of the peak power amplifier input matching network (301), the drain is connected to the input end of the peak power amplifier inter-stage matching network (303), and the source is grounded; the input end of the peak power amplifier output stage transistor (304) is connected to the output end of the peak power amplifier inter-stage matching network (303); the input end of the carrier power amplifier output matching network (305) is connected to the output end of the peak power amplifier output stage transistor (304); the input end of the small signal open line (306) is connected to the output end of the peak power amplifier output matching network (305), and the output end of the small signal open line (306) is connected to the post-matching network (40).

5. The asymmetric Doherty power amplifier based on a cascode structure according to claim 1 or 3, characterized in that: The carrier power amplifier driving stage transistor (203) comprises a size of N×W g The peak power amplifier driver stage transistor (302) includes a size of N'×W g The size of the carrier power amplifier driving stage transistor (203) and the peak power amplifier driving stage transistor (302) satisfies the following relationship: N×W g =2×N’×W g ’; Where: N ensures W g Without violating process rules, the linear output power of the driver-stage die can drive the output-stage transistor to reach a saturated output state.

6. The asymmetric Doherty power amplifier based on a cascode structure according to claim 1 or 4, characterized in that: The carrier power amplifier output stage transistor (205) includes two transistors with a size of N"×W g "Common source and common gate transistor; the peak power amplifier output stage transistor (304) includes two dimensions of N'"×W g '" cascode transistor; the sizes of the carrier power amplifier output stage transistor (205) and the peak power amplifier output stage transistor (304) satisfy the following relationship: N”×W g ”=2×N’”×W g ’”; Where: N ensures W g If the process rules are not violated, set it to the maximum gate index allowed by the process.