Thermal turn-off power supply management circuit with base current compensation

By introducing base current compensation technology into the thermal shutdown power management circuit, the chip operating temperature is accurately reflected and timely shut down, the problem of low control accuracy in the existing technology is solved, and the probability of chip damage is reduced.

CN119834786APending Publication Date: 2025-04-15WUHU RES INST OF XIAN UNIV OF ELECTRONIC SCI & TECH +1
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Patent Information

Application Number
CN202411683952.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-22
Publication Date
2025-04-15

AI Technical Summary

Technical Problem

The existing thermal shutdown power management circuit has low control accuracy and cannot shut down the chip in time when the chip temperature is too high, resulting in an increase in the chance of chip damage.

Method used

A thermal shutdown power management circuit with base current compensation is designed. The compensated positive temperature coefficient current is provided to the thermal shutdown judgment module through the positive temperature coefficient current module, which accurately reflects the working temperature of the chip and shuts down the chip in time when the temperature is too high.

Benefits of technology

It realizes an accurate judgment of the actual working temperature of the chip, and timely shuts down the chip when the temperature is too high, reducing the chance of chip damage.

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Abstract

The invention relates to a thermal turn-off power supply management circuit with base current compensation. The thermal turn-off power supply management circuit comprises a thermal turn-off judgment module and a positive temperature coefficient current module connected with the thermal turn-off judgment module, the positive temperature coefficient current module is used for providing compensated positive temperature coefficient current for the thermal turn-off judgment module; the compensated positive temperature coefficient current linearly changes along with the positive temperature coefficient, and the compensated positive temperature coefficient current is used for reflecting the working temperature of a chip electrically connected with the thermal turn-off power supply management circuit; the thermal turn-off judgment module is used for determining whether the working temperature of the chip is within a temperature range formed by a first preset threshold value and a second preset threshold value or not based on the compensated positive temperature coefficient current, turning off the chip when the working temperature of the chip is larger than the second preset threshold value, and turning off the chip when the working temperature of the chip drops to the temperature range. And restarting the chip. The circuit can accurately judge the actual working temperature of the current chip and reduce the damage probability of the chip.
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Description

Technical Field

[0001] The invention belongs to the technical field of power management chips, and in particular relates to a thermal shutdown power management circuit with base current compensation. Background Art

[0002] The power management chip is an important component of the integrated circuit chip. It optimizes and adjusts the power supply connected to the external integrated circuit chip, thereby providing a more efficient and stable internal power supply for the internal circuit of the integrated circuit chip. Because the temperature inside the power management chip is very high under abnormal working conditions such as power short circuit, output short circuit to ground, and normal working conditions such as high temperature and high current, which may exceed the maximum junction temperature and affect its reliability. With the development of science and technology, the equipment used in the medical field is becoming more and more miniaturized, which requires the power density of its chips to be greatly improved, which may cause the operating temperature of the chip to rise sharply; at the same time, the automotive electronic equipment industry needs to face a more complex chip operating temperature environment, and its operating temperature must be guaranteed to be between -40℃ and 125℃. In order to ensure that the power management chip works within the preset temperature range, it is necessary to integrate a thermal shutdown power management circuit to shut down the power chip in time when the chip temperature rises, and to restart the chip when the chip temperature drops to the preset temperature range.

[0003] However, the existing thermal shutdown power management circuit has the problem of low control accuracy and cannot shut down the chip in time when the chip temperature is too high, which increases the probability of chip damage. Summary of the invention

[0004] In order to solve the above problems existing in the prior art, the present invention provides a thermal shutdown power management circuit with base current compensation. The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0005] The present invention provides a thermal shutdown power management circuit with base current compensation, comprising: a thermal shutdown judgment module, and a positive temperature coefficient current module connected to the thermal shutdown judgment module; the positive temperature coefficient current module is used to provide a compensated positive temperature coefficient current to the thermal shutdown judgment module; the compensated positive temperature coefficient current changes linearly with the positive temperature coefficient, and the compensated positive temperature coefficient current is used to reflect the operating temperature of a chip electrically connected to the thermal shutdown power management circuit; the thermal shutdown judgment module is used to determine whether the operating temperature of the chip is within a temperature range formed by a first preset threshold and a second preset threshold based on the compensated positive temperature coefficient current, and shut down the chip when the operating temperature of the chip is greater than the second preset threshold, and restart the chip when the operating temperature of the chip drops to the temperature range; the first preset threshold is less than the second preset threshold.

[0006] Compared with the prior art, the present invention has the following beneficial effects:

[0007] In view of the problem that the existing thermal shutdown power management circuit is difficult to accurately judge the actual operating temperature of the current chip, resulting in the inability to shut down the chip in time when the chip temperature is too high, resulting in an increased probability of chip damage, the present invention provides a thermal shutdown power management circuit with base current compensation, the circuit includes a positive temperature coefficient current module and a thermal shutdown judgment module, wherein the positive temperature coefficient current module provides the thermal shutdown judgment module with a current that can accurately reflect the operating temperature of the chip, the thermal shutdown judgment module determines whether the current operating temperature of the chip is suitable for the chip to work based on the current, and shuts down the chip in time when the temperature is too high to cool the chip, and restarts the chip when the temperature drops to a suitable temperature range. Based on the thermal shutdown power management circuit with base current compensation provided by the present invention, the actual operating temperature of the current chip can be accurately judged, the chip can be shut down in time when the chip temperature is too high, and the probability of chip damage can be reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 It is a circuit connection diagram of an existing thermal shutdown power management circuit provided by an embodiment of the present invention;

[0009] Figure 2 is a schematic structural diagram of a thermal shutdown power management circuit with base current compensation provided by an embodiment of the present invention;

[0010] Figure 3 This is a circuit connection example diagram of a thermal shutdown power management circuit with base current compensation provided by an embodiment of the present invention;

[0011] Figure 4 This is another circuit connection example diagram of a thermal shutdown power management circuit with base current compensation provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0012] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0013] In the description of the present invention, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0014] Figure 1 FIG. 1 is a circuit connection diagram of an existing thermal shutdown power management circuit provided by an embodiment of the present invention. Figure 1 As shown, the positive temperature coefficient current IPTAT_0 Flow through resistor R 2_0 A positive temperature coefficient voltage V is generated at point X X , its voltage V X It will increase linearly with the temperature. When the preset temperature is reached, the positive temperature coefficient voltage V X Greater than transistor Q 1_0 The on-state voltage V BE , making the transistor Q 1_0 On, voltage at point Y V Y Pull it down to a low potential, and then pass the Schmitt trigger ST 1_0 The signal is inverted to a high potential, thereby outputting a high potential signal to the chip to shut down the chip and protect it from high temperature. At the same time, when the TSD_ok signal is high, the inverter INV 1_0 Function: Output a low level signal to control the NMOS tube MN 1_0 Turn off, the NMOS tube MN 1_0 After shutdown, the resistor R 3 Connect the branch so that the voltage V X From I PTAT_0 *R 2_0 Increase to I PTAT_0 *(R 2_0 +R 3_0 ).

[0015] When the operating temperature of the chip is lower than the preset temperature, due to the connected resistor R 3 Will make V X The voltage is still higher than Q 1_0 The on-state voltage makes Q 1_0 Continue to conduct until the temperature drops, the positive temperature coefficient voltage V X Less than transistor Q 1_0 The on-state voltage V BE , transistor Q 1_0 The shutdown voltage V Y is pulled high, the ST 1_0 After the action, the TSD_ok signal outputs a low potential to the chip, so that the chip starts to work normally, and then the inverter processes and outputs a high potential to make MN 1_0 conduction, so that the resistor R 3_0 short circuit to further reduce the positive temperature coefficient voltage V X .

[0016] However, during the operation of the existing thermal shutdown power management circuit, a part of the positive temperature coefficient current flows through the resistor as the base current and flows through the transistor Q 1_0 , that is, the higher the temperature, the higher the transistor Q 1_0The larger the current that is divided, the more nonlinear the positive temperature coefficient voltage generated will grow, making it difficult to accurately judge the actual operating temperature of the current chip. As a result, the chip cannot be shut down in time when the chip temperature is too high, increasing the probability of chip damage.

[0017] In order to solve the above problems, an embodiment of the present invention proposes a thermal shutdown power management circuit with base current compensation, which is now described in detail with reference to the accompanying drawings.

[0018] Figure 2 1 is a schematic diagram of the structure of a thermal shutdown power management circuit with base current compensation provided by an embodiment of the present invention. Figure 2 As shown, the circuit includes: a thermal shutdown judgment module, and a positive temperature coefficient current module connected to the thermal shutdown judgment module; the positive temperature coefficient current module is used to provide a compensated positive temperature coefficient current to the thermal shutdown judgment module; the compensated positive temperature coefficient current changes linearly with the positive temperature coefficient, and the compensated positive temperature coefficient current is used to reflect the operating temperature of the chip electrically connected to the thermal shutdown power management circuit; the thermal shutdown judgment module is used to determine whether the operating temperature of the chip is within a temperature range formed by a first preset threshold value and a second preset threshold value based on the compensated positive temperature coefficient current, and shut down the chip when the operating temperature of the chip is greater than the second preset threshold value, and restart the chip when the operating temperature of the chip drops to the temperature range; the first preset threshold value is less than the second preset threshold value.

[0019] Here, positive temperature coefficient (PTC) refers to the property that the resistance value increases with the increase of temperature. PTC is the abbreviation of Positive Temperature Coefficient, which means positive temperature coefficient, and generally refers to semiconductor materials or components with a large positive temperature coefficient. The PTC we usually refer to is a positive temperature coefficient thermistor, or PTC thermistor for short. PTC thermistor is a typical semiconductor resistor with temperature sensitivity. When the temperature exceeds a certain level, its resistance value increases in a step-like manner as the temperature increases. In other words, the resistance in the positive temperature coefficient current module will increase with the operating temperature of the chip.

[0020] Here, illustratively, the first preset threshold is -40° C., and the second preset threshold is 125° C. It should be noted that in actual use, the first preset threshold and the second preset threshold may also be determined according to the heat-resistant material of different chips.

[0021] Embodiment 1

[0022] Figure 3 FIG. 1 is a circuit connection example diagram of a thermal shutdown power management circuit with base current compensation provided by an embodiment of the present invention. Figure 3As shown, the thermal shutdown power management circuit also includes: a startup module; the startup module is connected to the positive temperature coefficient current module and is used to start the thermal shutdown power management circuit. Specifically, the startup module includes: an NMOS tube MN 1 、NMOS tube MN 2 、PMOS tube MP 1 、PMOS tube MP 2 And PMOS tube MP 7 ; Among them, PMOS tube MP 1 The source of the PMOS tube MP 2 The source of the PMOS tube MP is connected to the power supply VDD. 1 The gate and drain of the NMOS tube MN 1 The drain of the PMOS tube MP 7 Gate connection of NMOS tube MN 1 The gate of the NMOS tube MN 2 The gate connection of NMOS tube MN 1 The source and NMOS tube MN 2 The source of NMOS tube MN is grounded. 2 The gate and drain of the PMOS tube MP 2 The drain connection of PMOS tube MP 7 The source is grounded, and the drain is connected to the PMOS tube MP in the positive temperature coefficient current module. 3 The drain connection of PMOS tube MP 2 The gate and the PMOS tube MP in the positive temperature coefficient current module 3 The gate connection.

[0023] Here, the PMOS tube MP 1 Plays the role of voltage division, NMOS tube MN 1 、NMOS tube MN 2 Used to mirror the compensated positive temperature coefficient current generated by the positive temperature coefficient current module, PMOS tube MP 7 The voltage at point A can be pulled low to enable the thermal shutdown power management circuit.

[0024] Here, the positive temperature coefficient current module includes: NMOS tube MN 3 、PMOS tube MP 3 、PMOS tube MP 4 、PMOS tube MP 8 , transistor Q 1 , transistor Q 2 and resistor R 1 ; Among them, PMOS tube MP 3 The source and PMOS tube MP 4 The source of the PMOS tube MP is connected to the power supply VDD.3 The drain and gate of transistor Q 1 The collector connection of the PMOS tube MP 3 The gate of the PMOS tube MP 4 The gate connection of transistor Q 1 The emitter and resistor R 1 The first end of transistor Q 1 The base of NMOS tube MN 3 The source of transistor Q 2 The base connection, resistor R 1 The second end of the PMOS tube MP is grounded; 4 The drain of transistor Q 2 The collector connection of transistor Q 2 The emitter of the PMOS tube MP is grounded; 4 The gate of the PMOS tube MP is also connected to the first input terminal of the thermal shutdown judgment module; 8 The source of the PMOS tube MP is connected to the power supply VDD. 8 The gate of the PMOS tube MP is connected to the second input terminal of the thermal shutdown judgment module; 8 The drain and gate of the NMOS tube MN 3 The drain connection of NMOS tube MN 3 The gate of transistor Q 2 Collector connection.

[0025] Here, the current flowing through the PMOS tube MP 3 , transistor Q 1 The current in the branch is equal to the current flowing through the PMOS tube MP 4 , transistor Q 2 The current size of the branch, and flows through the PMOS tube MP 3 , transistor Q 1 The current in the branch is related to the transistor Q 1 And transistor Q 2 is proportional to the ratio.

[0026] For example, the current flowing through the PMOS tube MP 3 And transistor Q 1 The branch current is the compensated positive temperature coefficient current I PTAT . Transistor Q 1 The voltage between the base and emitter is V BE1 , whose size is expressed as: Transistor Q 2 The voltage between the base and emitter is V BE2 , whose size is expressed as: Since the currents in the two branches are equal, the resistance R 1The voltage values ​​are: Furthermore, the current I PTAT It can be expressed as: Where k is the Boltzmann constant, T is the operating temperature of the chip, q is the electron charge, I 1 is flowing into transistor Q 1 The collector current, n 1 Q is the transistor 1 The number of S is a preset fixed value, I 2 is flowing into transistor Q 2 The collector current, n 2 Q is the transistor 2 The number of .

[0027] Here, the thermal shutdown judgment module includes: NMOS tube MN 4 、PMOS tube MP 5 、PMOS tube MP 6 、PMOS tube MP 9 , resistor R 2 , resistor R 3 , resistor R 4 , transistor Q 3 、Schmitt trigger ST 1 and inverter INV 1 ; Among them, PMOS tube MP 5 The source of the PMOS tube MP 6 The source and PMOS tube MP 9 The source of the positive temperature coefficient current module is connected to the power supply VDD; the PMOS tube MP 4 The gate of the PMOS tube MP 5 The gate and PMOS tube MP 6 The gates of the PMOS tubes MP 9 The gate and the PMOS tube MP in the positive temperature coefficient current module 8 The gate connection of the PMOS tube MP 5 The drain and PMOS tube MP 9 The drain of the resistor R 2 The first end of the PMOS tube MP 6 The drain of the Schmitt trigger ST 1 The input terminal and transistor Q 3 The collector connection of the Schmitt trigger ST 1 The output terminal is used to output the level signal of whether the control chip works or not; the Schmitt trigger ST 1 The output of the inverter INV 1 The input terminal of transistor Q 3 The base of the resistor R2 The second end of the resistor R 3 The first end of transistor Q 3 The emitter of is grounded; the resistor R 3 The second end of the resistor R 4 The first end of the NMOS tube MN 4 The drain connection of the inverter INV 1 The output terminal of the NMOS tube MN 4 The gate connection, resistor R 4 The second end and NMOS tube MN 4 The source is grounded.

[0028] In the thermal shutdown judgment module, the PMOS tube MP 5 And PMOS tube MP 6 The positive temperature coefficient current I after copy compensation PTAT , PMOS tube MP 9 Copy PMOS tube MP 8 The transistor Q 1 The base current and transistor Q 2 The sum of the base currents of the PMOS tube MP 8 And PMOS tube MP 9 The width-to-length ratio is: (n 1 +n 2 ):1. That is, transistor Q 3 The base current of the transistor is Q 1 The base current of transistor Q 2 The base current is 1 / (n 1 +n 2 ) times. Through the PMOS tube MP 9 The base current can be copied so that it flows through the resistor R 3 and resistor R 4 The current is the compensated positive temperature coefficient current I PTAT .

[0029] Here, through the resistor R 2 , resistor R 3 and resistor R 4 , forming a positive temperature coefficient voltage V at point B B Specifically, when the operating temperature of the chip gradually increases within the temperature range formed by the first preset threshold and the second preset threshold, the positive temperature coefficient voltage V B It can be expressed as: V B =I PTAT R 3 When the operating temperature of the chip is greater than the second preset threshold, Q3 is turned on to input a low voltage signal to the Schmitt trigger ST 1, so that it outputs a high voltage signal to shut down the chip, and at the same time inputs the high voltage signal into the inverter INV 1 In, control MN 4 turns on and enters the shutdown state, and then the positive temperature coefficient voltage V B It can be expressed as: From the positive temperature coefficient voltage V B It can be seen from the expression that n 1 、n 2 , R 1 , R 3 , R 4 , q and k are all fixed values, I PTAT 、V B It is linearly related to the operating temperature T of the chip and can accurately reflect the actual operating temperature of the chip.

[0030] Embodiment 2

[0031] Figure 4 FIG. 1 is another circuit connection example diagram of a thermal shutdown power management circuit with base current compensation provided by an embodiment of the present invention. Figure 4 As shown, the positive temperature coefficient current module is a Brokaw type band gap; the positive temperature coefficient current module includes: PMOS tube MP 1_1 、PMOS tube MP 2_1 、PMOS tube MP 5_1 、NMOS tube MN 1_1 , transistor Q 1_1 , transistor Q 2_1 , resistor R 1_1 and resistor R 2_1 ; Among them, PMOS tube MP 1_1 The source and PMOS tube MP 2_1 The source of the PMOS tube MP is connected to the power supply VDD. 1_1 The drain and gate of transistor Q 1_1 The collector connection of the PMOS tube MP 1_1 The gate of the PMOS tube MP 2_1 The gate connection of the PMOS tube MP 2_1 The gate of the transistor Q is connected to the first input terminal of the thermal shutdown judgment module; 1_1 The emitter and resistor R 1_1 The first end of transistor Q 1_1 The base of NMOS tube MN 1_1 The source of transistor Q 2_1 The base connection, resistor R 1_1 The second end of transistor Q 2_1 The emitter of the resistor R 2_1 The first end of the resistor R 2_1The second end of the PMOS tube MP is grounded; 2_1 The drain of transistor Q 2_1 The collector connection of transistor Q 2_1 The base is used to output the reference voltage V ref ; PMOS tube MP 5_1 The source is connected to the power supply VDD, and the drain and gate are connected to the NMOS tube MN 1_1 The drain connection of the PMOS tube MP 5_1 The gate of the NMOS tube MN is also connected to the second input terminal of the thermal shutdown judgment module. 1_1 The source of transistor Q 1_1 The base of transistor Q 2_1 The base connection of NMOS tube MN 1_1 The gate of transistor Q 2_1 Collector connection.

[0032] Correspondingly, the thermal shutdown judgment module includes: PMOS tube MP 3_1 , PMOS tube MP 4_1 , PMOS tube MP 6_1 , NMOS tube MN 2_1 , transistor Q 3_1 , resistor R 3_1 , resistor R 4_1 , resistor R 5_1 , Schmitt trigger ST 1_1 , inverter INV 1_1 ; Among them, PMOS tube MP 3_1 The source of the PMOS tube MP 4_1 The source and PMOS tube MP 6_1 The source of the positive temperature coefficient current module is connected to the power supply VDD; the PMOS tube MP 2_1 The gate of the PMOS tube MP 3_1 The gate and PMOS tube MP 4_1 The gate connection of the PMOS tube MP 6_1 The gate and the PMOS tube MP in the positive temperature coefficient current module 5_1 The gate connection of the PMOS tube MP 3_1 and PMOS tube MP 6_1 The drain of the resistor R 3_1 The first end of the PMOS tube MP 6_1 The drain of the Schmitt trigger ST 1_1 The input terminal and transistor Q 3_1 The collector connection of the Schmitt trigger ST 1_1 The output terminal is used to output the level signal of whether the control chip works or not; the Schmitt trigger ST 1_1The output of the inverter INV 1_1 The input terminal of transistor Q 3_1 The base of the resistor R 3_1 The second end of the resistor R 4_1 The first end of transistor Q 3_1 The emitter of is grounded; the resistor R 4_1 The second end of the resistor R 5_1 The first end of the NMOS tube MN 2_1 The drain connection of the inverter INV 1_1 The output terminal of the NMOS tube MN 2_1 The gate connection, resistor R 5_1 The second end and NMOS tube MN 2_1 The source is grounded.

[0033] It should be noted that Figure 3 and Figure 4 The circuit connection of the thermal shutdown judgment module in the same way, its working principle is exactly the same, for the sake of brevity, no further description is given here Figure 4 How the thermal shutdown judgment module works.

[0034] Here, transistor Q 1_1 The voltage between the base and emitter is V BE3 , whose size is expressed as: Transistor Q 2_1 The voltage between the base and emitter is V BE4 , whose size is expressed as: Flow through resistor R 1_1 The current is: and flows through resistor R 2_1 The current is: Furthermore, the transistor Q 2_1 Output reference voltage V ref It can be expressed as: The voltage at point C is V C It is expressed as: And, the voltage at point D is expressed as: Among them, n 3 Q is the transistor 1_1 The number of 4 Q is the transistor 2_1 The number of 3 is flowing into transistor Q 1_1 The collector current, I 1 is flowing into transistor Q 2_1 The collector current.

[0035] Here, the NMOS tube MN 1_1 is the output stage, flowing through MN1_1 and MP 5_1 The current of transistor Q 1_1 And transistor Q 2_1 The sum of the base currents can be expressed as: I = (n 3 +n 4 )×I B .

[0036] Here, in Figure 4 In the positive temperature coefficient current module, the current flows through the PMOS tube MP 1_1 , transistor Q 1_1 , resistor R 1_1 The branch current flows through the PMOS tube MP 2_1 , transistor Q 2_1 The branch current and the current flowing through the PMOS tube MP 3_1 The currents in the branches are equal. That is, the resistance R 3_1 The current flowing through the PMOS tube MP 1_1 , transistor Q 1_1 , resistor R 1_1 The branch current I PTAT_1 And transistor Q 3 The base current I B The sum of the positive temperature coefficient voltage V E It can be expressed as: V E =(I PTAT_1 +I B )R 3_1 .

[0037] Here, the PMOS tube MP 6_1 The drain current of the PMOS tube MP 5_1 The drain current is the mirror current of the PMOS tube MP 6_1 The drain current of the PMOS tube MP 5_1 The drain current of the PMOS tube MP is proportional to 6_1 The drain current of the PMOS tube MP 5_1 The drain current is 1 / (n 3 +n 4 In this way, the PMOS tube MP can be guaranteed 6_1 The current in the transistor is exactly equal to the Q 3_1 The base current is reduced to avoid taking away the current of the compensated positive temperature coefficient current, so that the compensated positive temperature coefficient current can accurately reflect the operating temperature of the chip.

[0038] In view of the problem that the existing thermal shutdown power management circuit is difficult to accurately judge the actual operating temperature of the current chip, resulting in the inability to shut down the chip in time when the chip temperature is too high, resulting in an increased probability of chip damage, the present invention provides a thermal shutdown power management circuit with base current compensation, the circuit includes a positive temperature coefficient current module and a thermal shutdown judgment module, wherein the positive temperature coefficient current module provides the thermal shutdown judgment module with a current that can accurately reflect the operating temperature of the chip, the thermal shutdown judgment module determines whether the current operating temperature of the chip is suitable for the chip to work based on the current, and shuts down the chip in time when the temperature is too high to cool the chip, and restarts the chip when the temperature drops to a suitable temperature range. Based on the thermal shutdown power management circuit with base current compensation provided by the present invention, the actual operating temperature of the current chip can be accurately judged, the chip can be shut down in time when the chip temperature is too high, and the probability of chip damage can be reduced.

[0039] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

Claims

1. A thermal shutdown power management circuit with base current compensation, characterized in that: include: A thermal shutdown judgment module, and a positive temperature coefficient current module connected to the thermal shutdown judgment module; The positive temperature coefficient current module is used to provide a compensated positive temperature coefficient current to the thermal shutdown judgment module; the compensated positive temperature coefficient current changes linearly with the positive temperature coefficient, and the compensated positive temperature coefficient current is used to reflect the operating temperature of the chip electrically connected to the thermal shutdown power management circuit; The thermal shutdown judgment module is used to determine whether the operating temperature of the chip is within a temperature range consisting of a first preset threshold and a second preset threshold based on the compensated positive temperature coefficient current, and to shut down the chip when the operating temperature of the chip is greater than the second preset threshold, and to restart the chip when the operating temperature of the chip drops to within the temperature range; the first preset threshold is less than the second preset threshold.

2. The thermal shutdown power management circuit with base current compensation according to claim 1, characterized in that: The positive temperature coefficient current module includes: NMOS tube MN3, PMOS tube MP3, PMOS tube MP4, PMOS tube MP8, triode Q1, triode Q2, and resistor R1; The source of the PMOS tube MP3 and the source of the PMOS tube MP4 are connected to the power supply VDD, the drain and the gate of the PMOS tube MP3 are connected to the collector of the transistor Q1, the gate of the PMOS tube MP3 is also connected to the gate of the PMOS tube MP4, the emitter of the transistor Q1 is connected to the first end of the resistor R1, the base of the transistor Q1 is respectively connected to the source of the NMOS tube MN3 and the base of the transistor Q2, and the second end of the resistor R1 is grounded; The drain of the PMOS tube MP4 is connected to the collector of the transistor Q2; the emitter of the transistor Q2 is grounded; the gate of the PMOS tube MP4 is also connected to the first input terminal of the thermal shutdown judgment module; The source of the PMOS tube MP8 is connected to the power supply VDD, and the gate of the PMOS tube MP8 is connected to the second input end of the thermal shutdown judgment module; the drain and gate of the PMOS tube MP8 are connected to the drain of the NMOS tube MN3, and the gate of the NMOS tube MN3 is connected to the collector of the transistor Q2.

3. The thermal shutdown power management circuit with base current compensation according to claim 2, characterized in that: The thermal shutdown power management circuit further includes: a startup module; the startup module is connected to the positive temperature coefficient current module and is used to start the thermal shutdown power management circuit.

4. The thermal shutdown power management circuit with base current compensation according to claim 3, characterized in that: The startup module includes: NMOS tube MN1, NMOS tube MN2, PMOS tube MP1, PMOS tube MP2 and PMOS tube MP7; wherein, The source of the PMOS tube MP1 and the source of the PMOS tube MP2 are both connected to the power supply VDD, and the gate and drain of the PMOS tube MP1 are both connected to the drain of the NMOS tube MN1 and the gate of the PMOS tube MP7; The gate of the NMOS tube MN1 is connected to the gate of the NMOS tube MN2, the source of the NMOS tube MN1 and the source of the NMOS tube MN2 are grounded, and the gate and drain of the NMOS tube MN2 are both connected to the drain of the PMOS tube MP2; The source of the PMOS tube MP7 is grounded, and the drain is connected to the drain of the PMOS tube MP3 in the positive temperature coefficient current module; The gate of the PMOS tube MP2 is connected to the gate of the PMOS tube MP3 in the positive temperature coefficient current module.

5. The thermal shutdown power management circuit with base current compensation according to claim 2, characterized in that: The thermal shutdown judgment module includes: NMOS tube MN4, PMOS tube MP5, PMOS tube MP6, PMOS tube MP9, resistor R2, resistor R3, resistor R4, transistor Q3, Schmitt trigger ST1, inverter INV1; Wherein, the source of the PMOS tube MP5, the source of the PMOS tube MP6 and the source of the PMOS tube MP9 are connected to the power supply VDD; The gate of the PMOS tube MP4, the gate of the PMOS tube MP5 and the gate of the PMOS tube MP6 in the positive temperature coefficient current module are connected in sequence, the gate of the PMOS tube MP9 is connected to the gate of the PMOS tube MP8 in the positive temperature coefficient current module, and the drain of the PMOS tube MP5 and the drain of the PMOS tube MP9 are both connected to the first end of the resistor R2; The drain of the PMOS tube MP6 is connected to the input end of the Schmitt trigger ST1 and the collector of the transistor Q3 respectively. The output end of the Schmitt trigger ST1 is used to output a level signal for controlling whether the chip works or not. The output end of the Schmitt trigger ST1 is also connected to the input end of the inverter INV1. The base of the transistor Q3 is connected to the second end of the resistor R2 and the first end of the resistor R3 respectively; the emitter of the transistor Q3 is grounded; The second end of the resistor R3 is respectively connected to the first end of the resistor R4 and the drain of the NMOS transistor MN4, the output end of the inverter INV1 is connected to the gate of the NMOS transistor MN4, and the second end of the resistor R4 and the source of the NMOS transistor MN4 are grounded.

6. The thermal shutdown power management circuit with base current compensation according to claim 2, characterized in that: The magnitude of the current flowing through the drain of the PMOS tube MP3 and the collector of the transistor Q1 is equal to the magnitude of the branch current flowing through the drain of the PMOS tube MP4 and the collector of the transistor Q2, and the magnitude of the current flowing through the drain of the PMOS tube MP3 and the collector of the transistor Q1 is proportional to the ratio of the transistor Q1 to the transistor Q2.

7. The thermal shutdown power management circuit with base current compensation according to claim 1, characterized in that: The positive temperature coefficient current module includes: a PMOS tube MP 1_1 , PMOS tube MP 2_1 , PMOS tube MP 5_1 , NMOS tube MN 1_1 , transistor Q 1_1 , transistor Q 2_1 , resistor R 1_1 , resistor R 2_1 ; Among them, the PMOS tube MP 1_1 The source and the PMOS tube MP 2_1 The source of the PMOS tube MP is connected to the power supply VDD. 1_1 The drain and gate of the transistor Q 1_1 The collector of the PMOS tube MP 1_1 The gate of the PMOS tube MP 2_1 The gate connection of the PMOS tube MP 2_1 The gate is connected to the first input terminal of the thermal shutdown judgment module; The transistor Q 1_1 The emitter and the resistor R 1_1 The first end of the transistor Q 1_1 The base of the NMOS tube MN 1_1 The source of the transistor Q 2_1 The base connection, the resistor R 1_1 The second end of the transistor Q 2_1 The emitter is connected to the resistor R 2_1 The first end of the resistor R 2_1 The second end of is grounded; The PMOS tube MP 2_1 The drain of the transistor Q 2_1 The collector connection of the transistor Q 2_1 The base is used to output the reference voltage V ref ; The PMOS tube MP 5_1 The source is connected to the power supply VDD, and the drain and gate are connected to the NMOS tube MN 1_1 The drain connection of the PMOS tube MP 5_1 The gate of the NMOS tube MN is also connected to the second input terminal of the thermal shutdown judgment module. 1_1 The source of the transistor Q 1_1 The base of the transistor Q 2_1 The base of the NMOS tube MN 1_1 The gate of the transistor Q 2_1 Collector connection.

8. The thermal shutdown power management circuit with base current compensation according to claim 7, characterized in that: The thermal shutdown judgment module includes: a PMOS tube MP 3_1 , PMOS tube MP 4_1 , PMOS tube MP 6_1 , NMOS tube MN 2_1 , transistor Q 3_1 , resistor R 3_1 , resistor R 4_1 , resistor R 5_1 , Schmitt trigger ST 1_1 , inverter INV 1_1 ; Among them, the PMOS tube MP 3_1 The source of the PMOS tube MP 4_1 The source and the PMOS tube MP 6_1 The source electrode is connected to the power supply VDD; The PMOS tube MP in the positive temperature coefficient current module 2_1 The gate of the PMOS tube MP 3_1 The gate and the PMOS tube MP 4_1 The gate connection of the PMOS tube MP 6_1 The gate of the PMOS tube MP in the positive temperature coefficient current module 5_1 The gate connection of the PMOS tube MP 3_1 The PMOS tube MP 6_1 The drain terminals are connected to the resistor R 3_1 A first end is connected; The PMOS tube MP 6_1 The drain of the Schmitt trigger ST 1_1 The input terminal and the transistor Q 3_1 The collector connection of the Schmitt trigger ST 1_1 The output terminal is used to output a level signal for controlling whether the chip works or not; the Schmitt trigger ST 1_1 The output of the inverter INV 1_1 The input terminal connection of The transistor Q 3_1 The base of the resistor R 3_1 The second end of the resistor R 4_1 The first end of the transistor Q 3_1 The emitter is grounded; The resistor R 4_1 The second end of the resistor R 5_1 The first end of the NMOS tube MN 2_1 The drain of the inverter INV is connected 1_1 The output terminal of the NMOS tube MN 2_1 The gate connection, the resistor R 5_1 The second end and the NMOS tube MN 2_1 The source is grounded.

9. The thermal shutdown power management circuit with base current compensation according to claim 8, characterized in that: The PMOS tube MP 6_1 The drain current of the PMOS tube MP 5_1 The drain current is a current mirror current, and the PMOS tube MP 6_1 The drain current of the PMOS tube MP 5_1 is proportional to the drain current.