Communication frame processing method and device, electronic equipment and storage medium

Abstract

The invention discloses a communication frame processing method and device, electronic equipment and a storage medium. The method comprises the steps of storing a target UFCS communication frame to a target data queue under the condition that communication connection based on a UFCS protocol is established with power supply equipment and the target UFCS communication frame sent by the power supply equipment is received; and processing the at least one UFCS communication frame included in the target data queue. According to the method, after the UFCS communication frame sent by the power supply equipment is received, the UFCS communication frame is transferred into the data queue of the memory of the electronic equipment, and then the communication frame in the data queue is processed, so that the requirement on the processing capacity of a CPU (Central Processing Unit) is reduced, the influence on the charging speed caused by heating of the CPU is avoided, and the real-time response requirement of the UFCS can still be met under the condition that the system load is heavy.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of fast charging technology, and are related to but not limited to a communication frame processing method and device, an electronic device, and a storage medium. Background Art

[0002] Electronic devices (such as mobile phones) and power supply devices (such as adapters) that run the UFCS protocol that integrates the fast charging technical specification interact through communication frames. Since the UFCS chip of the electronic device has limited space to store UFCS communication frames, if the CPU does not process the UFCS communication frames in a timely manner, the UFCS communication frames will be lost and the device will be reset. The solution currently adopted by electronic devices is that the UFCS chip issues a hardware interrupt after receiving the communication frame sent by the power supply device. After receiving the hardware interrupt, its software program immediately increases the CPU frequency to send and receive communication frames, and resumes normal frequency when the communication frame processing begins, and then continues to occupy the CPU scheduling for communication frame processing.

[0003] Since the power supply equipment and electronic equipment send and receive communication frames at least once every 500ms, the repeated CPU frequency increase and preemptive CPU occupation during fast charging will aggravate CPU heating, which will in turn reduce the charging current due to CPU overheating, thereby indirectly affecting the charging speed. Summary of the invention

[0004] In view of this, the communication frame processing method and device, electronic device, and storage medium provided in the embodiments of the present application can transfer the UFCS communication frame sent by the power supply device to the data queue of the electronic device memory after receiving it, and then process the communication frame in the data queue, thereby reducing the requirements for CPU processing power, avoiding the impact of CPU heating on charging speed, and still meeting the UFCS real-time response requirements when the system is heavily loaded.

[0005] In a first aspect, a communication frame processing method provided in an embodiment of the present application is applied to an electronic device, including:

[0006] When a communication connection based on the UFCS protocol of the converged fast charging standard is established with the power supply device and a target UFCS communication frame sent by the power supply device is received, the target UFCS communication frame is stored in a target data queue, the target data queue is located in the memory of the electronic device, and the target data queue is used to store the UFCS communication frame sent by the power supply device;

[0007] At least one UFCS communication frame included in the target data queue is processed.

[0008] In a second aspect, a communication frame processing device provided in an embodiment of the present application is applied to an electronic device, including:

[0009] A communication frame transfer module, for establishing a communication connection based on the UFCS protocol of the converged fast charging standard with the power supply device and receiving a target UFCS communication frame sent by the power supply device, storing the target UFCS communication frame in a target data queue, wherein the target data queue is located in the memory of the electronic device, and the target data queue is used to store the UFCS communication frame sent by the power supply device;

[0010] The communication frame processing module is used to process at least one UFCS communication frame included in the target data queue.

[0011] In a third aspect, an electronic device provided in an embodiment of the present application includes a memory and a processor, wherein the memory stores a computer program that can be run on the processor, and when the processor executes the program, the steps of the communication frame processing method provided in the first aspect of the embodiment of the present application are implemented.

[0012] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the communication frame processing method provided in the first aspect of the embodiment of the present application are implemented.

[0013] The communication frame processing method, device, electronic device and computer-readable storage medium provided in the embodiments of the present application can transfer the UFCS communication frame sent by the power supply device to the data queue of the electronic device memory after receiving it, and then process the communication frame in the data queue, thereby reducing the requirements for CPU processing power, avoiding the impact of CPU heating on charging speed, and still meeting the UFCS real-time response requirements when the system is heavily loaded, thereby solving the technical problems raised in the background technology. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The drawings herein are incorporated into the specification and constitute a part of the specification. These drawings illustrate embodiments consistent with the present application and are used together with the specification to illustrate the technical solution of the present application.

[0015] Figure 1 A schematic diagram of a communication system provided in an embodiment of the present application;

[0016] Figure 2 A schematic diagram of an implementation flow of a communication frame processing method provided in an embodiment of the present application;

[0017] Figure 3 A flowchart of a method for processing a UFCS communication frame provided in an embodiment of the present application;

[0018] Figure 4 A schematic diagram of a process of establishing communication between a mobile phone and an adapter provided in an embodiment of the present application;

[0019] Figure 5 A schematic diagram of a process of processing a UFCS communication frame by a mobile phone provided in an embodiment of the present application;

[0020] Figure 6 A schematic diagram of the structure of a communication frame processing device provided in an embodiment of the present application;

[0021] Figure 7 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the specific technical solution of the present application will be further described in detail below in conjunction with the drawings in the embodiments of the present application. The following embodiments are used to illustrate the present application, but are not used to limit the scope of the present application.

[0023] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0024] In the following description, reference is made to “some embodiments”, which describe a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0025] It should be pointed out that the terms "first\second\third" involved in the embodiments of the present application are used to distinguish similar or different objects, and do not represent a specific ordering of the objects. It can be understood that "first\second\third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of the present application described here can be implemented in an order other than that illustrated or described here.

[0026] Figure 1 A schematic diagram of a UFCS communication system provided in an embodiment of the present application. Figure 1 As shown, the UFCS communication system includes an electronic device 10 and a power supply device 20. The electronic device 10 includes a processor 110, a storage area 120 and a UFCS chip. One end of the power supply device 20 can be connected to a power source, and the other end can be inserted into the charging interface of the electronic device 10 to charge the electronic device. One end of the power supply device 20 is provided with two control lines D+ and D-.

[0027] In some scenarios, the electronic device 10 is plugged into the power supply device 20. After the electronic device 10 detects that the power supply device is plugged in, it sends a pulse string to the power supply device 20 on D-, activating the power supply device 20 to enter the UFCS fast charging protocol. After receiving the pulse string, if the power supply device 20 is a UFCS adapter, it will pull up D+ again. When the electronic device 10 detects that D+ is pulled up, it indicates that the UFCS handshake between the power supply device 20 and the electronic device 10 is successful. Next, the electronic device 10 and the power supply device 20 begin to interact through UFCS communication frames. For example, if an electronic device wants to apply for voltage and current from a UFCS power supply device, the electronic device will first send a request communication packet to the power supply device. After receiving the packet, the power supply device will reply to the electronic device with an ack communication packet; after receiving the ack communication packet, the electronic device will wait for the power supply device to send a reply of accept that agrees to adjust the voltage and current; the power supply device sends an accept communication packet to the electronic device, and the electronic device replies to the power supply device with an ack communication packet; the electronic device continues to wait for the power_ready communication packet of the power supply device to actually adjust the voltage and current to the target voltage and current; the power supply device replies with a power_ready communication packet to the electronic device, and the electronic device replies with an ack communication packet to the power supply device. At this point, the interactive process of voltage and current regulation between the electronic equipment and the power supply equipment is completed.

[0028] In the process of the electronic device 10 (such as a mobile phone) and the power supply device 20 (such as an adapter) running the UFCS protocol of the integrated fast charging technical specification interacting through communication frames. Since the UFCS chip of the electronic device 10 has limited space for storing UFCS communication frames, if the CPU does not process in time, the UFCS communication frame will be lost, causing the device to reset. The current solution adopted by the electronic device 10 is that the UFCS chip 130 issues a hardware interrupt after receiving the communication frame sent by the power supply device 20. After receiving the hardware interrupt, its software program immediately increases the CPU frequency to send and receive communication frames, and restores the normal frequency when the communication frame begins to be processed, and then occupies the CPU scheduling to process the communication frame.

[0029] Although the existing UFCS software processing mechanism can solve the problem of electronic devices resetting due to lost UFCS communication packets, since the power supply equipment and electronic devices send and receive communication frames at least once every 500ms, the repeated frequency increase and preemptive occupation of the CPU during fast charging will aggravate the CPU heating, which will in turn reduce the charging current due to CPU overheating, thereby indirectly affecting the charging speed.

[0030] In view of this, an embodiment of the present application provides a communication frame processing method, by establishing a communication connection based on the integrated fast charging standard UFCS protocol with a power supply device and receiving a target UFCS communication frame sent by the power supply device, storing the target UFCS communication frame in a target data queue, the target data queue is located in the memory of the electronic device, and the target data queue is used to store the UFCS communication frame sent by the power supply device; and processing at least one UFCS communication frame included in the target data queue. This method can transfer the UFCS communication frame sent by the power supply device to the data queue of the electronic device memory after receiving the UFCS communication frame, and then process the communication frame in the data queue, which reduces the requirements for CPU processing power, avoids the impact of CPU heating on charging speed, and can still meet the UFCS real-time response requirements when the system is heavily loaded.

[0031] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0032] Figure 2 A schematic diagram of the implementation flow of a communication frame processing method provided in an embodiment of the present application. The communication frame processing method can be applied to electronic devices. During the implementation, the electronic device can be various types of devices with information processing capabilities. For example, the electronic device can include a personal computer, a laptop computer, a PDA or a server, etc.; the electronic device can also be a mobile terminal, for example, the mobile terminal can include a mobile phone, a car computer, a tablet computer or a projector, etc. Figure 2 As shown, the method may include the following steps 201 to 203:

[0033] Step 201: When an electronic device and a power supply device establish a communication connection based on the unified fast charging standard UFCS protocol, the power supply device sends a target UFCS communication frame to the electronic device.

[0034] The power supply device may be various types of devices that can charge electronic devices and support the UFCS protocol. For example, it may be an adapter, etc. After the electronic device and the power supply device successfully shake hands, the power supply device and the electronic device interact through UFCS communication frames. The power supply device may send a target UFCS communication frame to the electronic device in accordance with the provisions of the UFCS protocol. The embodiment of the present application does not limit the way in which the power supply device sends a target UFCS communication frame to the electronic device.

[0035] Step 202: the electronic device stores the received target UFCS communication frame into a target data queue, where the target data queue is located in a memory of the electronic device and is used to store the UFCS communication frame sent by the power supply device.

[0036] After receiving the target UFCS communication frame, the electronic device stores it in a target data queue, and the target data queue is located in the memory of the electronic device and is specifically used to store the UFCS communication frame sent by the power supply device. There are many ways for the electronic device to store the received target UFCS communication frame in the target data queue, for example, various types of software programs can be set for calling. The embodiment of the present application does not limit the way in which the electronic device stores the received target UFCS communication frame in the target data queue.

[0037] It is understandable that the UFCS communication frames in the prior art are stored in the storage space of the UFCS chip. Due to the limited chip space, at most two communication frames can be stored, so the CPU processing speed has high requirements. However, the memory space of the electronic device is very sufficient, so multiple UFCS communication frames can be stored at the same time, which greatly reduces the CPU processing speed requirements of the UFCS communication frames.

[0038] Step 203: Process at least one UFCS communication frame included in the target data queue.

[0039] Among them, there are many ways to process at least one UFCS communication frame included in the target data queue, for example, a processing thread of the UFCS communication frame can be called for processing, etc. The embodiment of the present application does not limit the way to process at least one UFCS communication frame included in the target data queue.

[0040] The embodiment of the present application provides an optimized design scheme based on UFCS communication frame processing. By transferring the received UFCS communication frames from the storage space of the UFCS chip to the target data queue of the electronic device, the storage space is increased and the number of UFCS communication frames stored is also increased, thereby reducing the requirements for the CPU processing power of the electronic device and still meeting the UFCS real-time response requirements even when the system is heavily loaded.

[0041] In some embodiments, since the UFCS chip sends a hardware interrupt to the CPU after receiving the UFCS communication frame, a monitoring program for the hardware interrupt can be set to achieve the transfer of the target UFCS communication frame.

[0042] In an embodiment of the present application, storing the target UFCS communication frame in the target data queue in step 202 may include: storing the target UFCS communication frame in the target data queue through a virtual chip process, wherein the virtual chip process is triggered when a UFCS hardware interrupt is received, and the UFCS hardware interrupt is sent by the UFCS chip of the electronic device to the central processing unit CPU when the target UFCS communication frame is received, and the virtual chip process is used to simulate the UFCS chip.

[0043] It should be noted that a virtual chip process simulating a UFCS chip may be used, and the virtual chip process is triggered when a UFCS hardware interrupt is received, and the virtual chip process is responsible for storing the target UFCS communication frame into the target data queue.

[0044] Exemplarily, when the electronic device is just started, the UFCS virtual IC driver can be loaded, and the driver will register the UFCS hardware interrupt handler, that is, the subsequent triggering of the hardware interrupt will immediately jump to the interrupt handler to run. Then the target data queue of the communication frame of the virtual IC is initialized, that is, the target data queue mentioned above, which is used to cache the communication frame sent by the UFCS chip to the electronic CPU, so that the electronic device CPU can process the UFCS communication frame without frequency increase. If the UFCS chip does not generate a hardware interrupt, the initial UFCS virtual IC communication frame target data queue is also empty, and the thread processing the target data queue is also in a sleep state.

[0045] It can be understood that by designing the UFCS software and hardware to coordinate and synchronously process communication frames, that is, the buffering mechanism of the data queue of the UFCS physical chip + virtual chip to process communication frames, it is possible to reduce the requirements for the CPU processing power of electronic devices and ensure the real-time response requirements of the UFCS when the low-end UFCS system is under heavy load.

[0046] Further, storing the target UFCS communication frame in the target data queue through the virtual chip process may include: acquiring the target UFCS communication frame from the storage queue of the UFCS chip by calling a communication frame reading thread through the virtual chip process, and storing the target UFCS communication frame in the target data queue.

[0047] It is understandable that the virtual chip process can read the target UFCS communication frame from the storage queue of the UFCS chip by calling the communication frame reading thread, and then store the UFCS communication frame in the target data queue. It is understandable that by calling an existing thread such as a communication frame reading thread to transfer the communication frame, the complexity of system processing can be reduced and the efficiency of communication frame transfer can be improved.

[0048] In some embodiments, in order to determine whether the speed of transferring the target communication frame meets the requirements, the process of storing the target UFCS communication frame into the target data queue may be monitored.

[0049] In an embodiment of the present application, after receiving the target UFCS communication frame sent by the power supply device, the method may further include: adding 1 to the count value of a preset counter; before storing the target UFCS communication frame in the target data queue, the method may further include: determining that the count value of the preset counter is not greater than the maximum storage number of UFS communication frames corresponding to the UFCS chip of the electronic device.

[0050] Among them, the electronic device is provided with a preset counter, the initial value can be 0, and the count value is increased by 1 when a UFCS communication frame is received. Since the maximum number of communication frames that the UFCS chip can store is the maximum storage number, when the count value of the preset counter is greater than the maximum storage number, the UFCS chip cannot store, and either the storage fails or a frame is thrown away and then stored, which will cause the communication frame to be missed. Therefore, before transferring the UFCS communication frame, it is necessary to determine that the count value of the current counter is not greater than the maximum storage number to determine that the current UFCS communication frame is received normally.

[0051] Furthermore, the method may further include: when it is determined that the count value of the preset counter is greater than the maximum storage quantity, sending hard reset information to the power supply device. It is understandable that when it is determined that the UFCS communication frame reception is abnormal, hard reset information is sent to the power supply device to notify the power supply device to resume communication after reset.

[0052] Furthermore, after storing the target UFCS communication frame into the target data queue, the method may further include: reducing the count value of the preset counter by 1. It is understandable that when a UFCS communication frame is transferred to the target data queue, the count value is reduced by 1, and it can be determined that after a period of transfer, the current UFCS communication frame is still received normally and communication can continue. This method can further verify whether the currently transferred UFCS communication frame is abnormal, thereby ensuring the timeliness and accuracy of UFCS communication frame processing.

[0053] In some embodiments, there are multiple ways to process the communication frames in the target data queue, for example, copying part of the communication frames to the data storage area for processing, or copying all the communication frames to the data storage area before processing.

[0054] Figure 3 A flowchart of a method for processing a UFCS communication frame provided in an embodiment of the present application. Figure 3As shown, the step 203 processes at least one UFCS communication frame included in the target data queue, which may include:

[0055] Step 2031: When the target data queue is not empty, part of or all of the at least one UFCS communication frame is copied to a data storage area corresponding to the target data queue through the virtual chip process.

[0056] Wherein, when it is determined that there are communication frames in the target data queue, the communication frames need to be copied to the data storage area before the communication frames can be processed. The copying method can be partial copying or full copying, which is not limited in the embodiment of the present application.

[0057] Furthermore, in order to speed up the processing of the communication frames, the communication frames may be traversed before being copied, and corresponding processing may be performed according to whether the communication frames in the current data queue include a soft reset communication frame.

[0058] In an embodiment of the present application, copying part or all of the at least one UFCS communication frame to the data storage area corresponding to the target data queue through the virtual chip process may include: when the at least one UFCS communication frame includes a soft reset communication frame, calling the data queue processing thread to copy the soft reset communication frame to the data storage area and clearing the target data queue; or, when the at least one UFCS communication frame does not include a soft reset communication frame, calling the data queue processing thread to copy the UFCS communication frames in the target data queue to the data storage area in sequence according to a first-in-first-out order.

[0059] Among them, the soft reset communication frame Soft Reset means that when there is a message synchronization error, the source device or the receiving device can send a Soft_Reset message for soft reset. When the target data queue includes a soft reset communication frame, it means that the power supply device has discovered a data transmission problem and sent a soft reset communication frame to reconnect or re-communicate. If there is a soft reset communication frame at the end of the target data queue, then early processing can reduce the invalid time of processing the previous communication frames, and at the same time, the communication frames in the target data queue can be cleared to avoid misprocessing previous communication frames after reset. If there is no soft reset communication frame in the target data queue, then each communication frame is processed in the first-in-first-out order of the data queue.

[0060] It can be understood that the above method can reduce the processing time of previously received UFCS communication frames when errors occur in data transmission, avoid invalid processing, and improve the efficiency of processing UFCS communication frames.

[0061] Step 2032: Process the UFCS communication frames in the data storage area through a communication frame processing process, and the communication frame processing process is awakened by a communication frame processing message sent by the virtual chip process to the communication frame processing process.

[0062] After the virtual chip process stores the communication frame in the data storage area, the communication frame processing process can be awakened to start communication frame processing by sending a communication frame processing message to the communication frame processing process.

[0063] Further, the UFCS communication frames in the data storage area include the target communication frames, and processing the UFCS communication frames in the data storage area through the communication frame processing process may include: calling a UFCS message processing thread to read the target UFCS communication frames in the data storage area; parsing and processing the target UFCS communication frames.

[0064] It can be understood that by calling an existing thread such as a UFCS message processing thread through a communication frame processing process to parse and process the UFCS communication frame, the complexity of system processing can be reduced and the processing efficiency of the UFCS communication frame can be improved.

[0065] In some embodiments, the processing speed of the communication frame processing process on the UFCS communication frame will also affect the notification with the power supply device, so the processing time of the communication frame processing process can be monitored.

[0066] In an embodiment of the present application, the method also includes: when a processing completion signal for the target communication frame sent by the communication frame processing process is not received within a preset waiting time, a hard reset information is sent to the power supply device through the virtual chip process, and the preset waiting time is started from the time when the virtual chip process sends a communication frame processing message to the communication frame processing process.

[0067] It should be noted that the timing starts after the virtual chip process sends a communication frame processing message to the communication frame processing process. When the communication frame processing process completes the processing of the current communication frame and sends a processing completion signal for the target communication frame to the virtual chip process, the timing of the virtual chip process ends. The virtual chip process is set with a preset waiting time. When the processing completion signal for the target communication frame is not received when the timing reaches the preset waiting time, it is considered that the communication frame processing process does not process the data in time, and a hard reset message is sent to the power supply device to perform reset and resume communication.

[0068] It can be understood that the above method can monitor the processing speed of the communication frame processing process, avoid abnormal processing of UFCS communication frames, and improve the efficiency of processing UFCS communication frames.

[0069] The embodiment of the present application provides an optimized design scheme based on UFCS communication frame processing. By designing the UFCS software and hardware coordinated synchronous processing of communication frames, that is, the buffering mechanism of the data queue of the UFCS physical chip + virtual chip, the requirements for the CPU processing power of the electronic device are reduced, and the UFCS real-time response requirements can be met even when the CPU frequency is not increased and the system is under heavy load.

[0070] The following describes an exemplary application of the embodiments of the present application in a practical application scenario.

[0071] Figure 4 The present invention provides a flow chart of establishing communication between a mobile phone and an adapter. Figure 4 As shown, the method includes the following steps 301 to 302:

[0072] Step 301: The UFCS virtual IC driver will be loaded when the mobile phone is just started.

[0073] Step 302: The UFCS virtual IC driver will be registered with the UFCS hardware interrupt handler, so that subsequent hardware interrupts will immediately jump to the interrupt handler for execution.

[0074] Step 303: Initialize the data queue of the communication frame of the UFCS virtual IC, which is used to cache the communication frame sent by the UFCS chip to the mobile phone CPU, so that the mobile phone CPU can process the UFCS communication frame without frequency increase. If the UFCS chip does not generate a hardware interrupt, the initial data queue of the communication frame of the UFCS virtual IC is empty, and the thread processing the data queue is always in sleep.

[0075] Step 304: When the mobile phone is inserted into the adapter, the mobile phone detects that the adapter is inserted and sends a pulse string to the adapter on D- to activate the adapter to enter the UFCS fast charging protocol.

[0076] Step 305: Determine whether the handshake is successful. After the adapter receives the pulse string, if it is a UFCS adapter, it will pull up D+. If the mobile phone detects that D+ is pulled high, it means that the UFCS handshake between the adapter and the mobile phone is successful. Otherwise, other fast charging protocols are used and the UFCS processing step ends.

[0077] Step 306: If the handshake is successful, wait for the message sent by the UFCS virtual IC.

[0078] Figure 5 A flow chart of a mobile phone processing UFCS communication frames provided in an embodiment of the present application. Figure 5 As shown, the method includes steps 401 to 423:

[0079] Step 401: The UFCS hardware chip will constantly monitor the communication with the adapter and wait for the UFCS communication frame from the adapter.

[0080] Step 402: When the UFCS hardware chip receives a communication frame, it stores the communication frame in the RAM storage area of ​​the chip. The chip uses the RAM fixed storage unit as the RAM data storage area. Currently, only a storage area that can store two communication frames is set (for cost considerations). The working mode is also in the form of a queue. Every time the chip receives a communication frame from the adapter, it stores it at the end of the idle queue of the storage queue.

[0081] Step 403: After the UFCS chip stores the received communication frame sent by the adapter, it triggers a hardware interrupt of the UFCS chip, and sends a hardware interrupt to the mobile phone CPU to fetch data.

[0082] Step 404: The software side will jump to the registered hardware interrupt handler of the UFCS virtual IC.

[0083] Step 405: Every time an interrupt signal is received, the interrupt count of irq_count is increased by 1.

[0084] Step 406: Call the communication frame reading threads of the UFCS virtual IC and the actual hardware IC.

[0085] Step 407: Determine whether irq_count is greater than or equal to 3. Since the RAM buffer of the UFCS hardware chip only opens two queues for storing frame units, if the data is not stored in the UFCS virtual IC data queue in time, resulting in the irq_count reaching 3, it indicates that the data queue is not processed in time and a hardware reset is required.

[0086] Step 408: When irq_count is less than 3, the first element in the data buffer queue of the UFCS chip IC is returned to the tail of the communication frame queue of the UFCS virtual IC.

[0087] Step 409: Every time a communication frame is stored in the data queue of the virtual IC, the interrupt count of irq_count is reduced by 1.

[0088] Step 410: Wake up the data queue processing thread of the UFCS virtual IC.

[0089] Step 411: The processing data queue thread will be awakened until there is a hardware interrupt and there is data in the data queue of the UFCS virtual IC.

[0090] Step 412: First, check whether there is a soft_reset communication frame in the current communication frame data queue.

[0091] Step 413: If there is a soft_reset communication frame, it indicates that the adapter wants the mobile phone to perform a soft reset at this time, so the sort_reset communication frame will be processed first, copied to the data storage area, and the communication frame data queue will be cleared. If there is no sort_reset communication frame in the queue, the element at the head of the communication frame queue will be popped out and copied to the data storage area.

[0092] Step 414: The UFCS virtual IC sends a message to the UFCS logical layer (communication frame processing process) to notify it to process the communication frame.

[0093] Step 415: The logic layer of the UFCS wakes up its logic processing according to whether it has received a message from the UFCS virtual IC. If there is no virtual IC and no message notification, it will keep waiting.

[0094] Step 416: If a message notification is received, the UFCS message processing thread is started and scheduled.

[0095] Step 417: Read the data storage area of ​​the UFCS virtual IC.

[0096] Step 418: Parse the data storage area according to the UFCS communication frame format and perform corresponding processing.

[0097] Step 419: Send a communication frame processing completion signal to end the message processing waiting time of the virtual IC.

[0098] Step 420: The virtual IC waits for the logic layer to complete processing, but the waiting time is no more than 50 ms.

[0099] Step 421: The virtual IC stops waiting after receiving the signal from the logic layer that the processing is completed, indicating that the communication frame processing is completed and continues to process subsequent elements in the queue.

[0100] Step 422: If it is determined that the communication frame processing process has timed out, it indicates that the logic layer processes the message too slowly.

[0101] Step 423: The mobile phone actively pulls D- to ground for 1ms to put the adapter into hard reset, and then starts over.

[0102] The above embodiment provides an optimized design scheme based on UFCS communication frame processing. By designing the UFCS software and hardware coordinated synchronous processing of communication frames, that is, the buffering mechanism of the data queue of the UFCS physical chip + virtual chip, the requirements for the CPU processing power of the mobile phone are reduced, and the UFCS real-time response requirements can be met even when the system is heavily loaded without increasing the CPU frequency (increasing the frequency causes heat).

[0103] It should be understood that, although the various steps in the above-mentioned flow chart are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flow chart may include a plurality of sub-steps or a plurality of stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these sub-steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the sub-steps or stages of other steps.

[0104] Based on the foregoing embodiments, the embodiments of the present application provide a communication frame processing device, and the modules included in the device and the units included in each module can be implemented by a processor; of course, they can also be implemented by a specific logic circuit; in the implementation process, the processor can be a central processing unit (CPU), a microprocessor (MPU), a digital signal processor (DSP) or a field programmable gate array (FPGA), etc.

[0105] Figure 6 A schematic diagram of the structure of a communication frame processing device provided in an embodiment of the present application. Figure 6 As shown, the device 500 includes a communication frame transfer module 501 and a communication frame processing module 502, wherein:

[0106] The communication frame transfer module 501 is used to establish a communication connection based on the integrated fast charging standard UFCS protocol with the power supply device and store the target UFCS communication frame in a target data queue when receiving a target UFCS communication frame sent by the power supply device. The target data queue is located in the memory of the electronic device, and the target data queue is used to store the UFCS communication frame sent by the power supply device;

[0107] The communication frame processing module 502 is used to process at least one UFCS communication frame included in the target data queue.

[0108] In some embodiments, the communication frame transfer module 501 is specifically used to: store the target UFCS communication frame to the target data queue through a virtual chip process, the virtual chip process is triggered when a UFCS hardware interrupt is received, and the UFCS hardware interrupt is sent to the central processing unit CPU by the UFCS chip of the electronic device when the target UFCS communication frame is received, and the virtual chip process is used to simulate the UFCS chip.

[0109] In some embodiments, the communication frame transfer module 501 is further specifically used to: obtain the target UFCS communication frame from the storage queue of the UFCS chip through calling the communication frame reading thread through the virtual chip process, and store the target UFCS communication frame into the target data queue.

[0110] In some embodiments, the communication frame transfer module 501 is also specifically used to: after receiving the target UFCS communication frame sent by the power supply device, add 1 to the count value of the preset counter; before storing the target UFCS communication frame in the target data queue, determine that the count value of the preset counter is not greater than the maximum storage number of UFS communication frames corresponding to the UFCS chip of the electronic device.

[0111] In some embodiments, the communication frame transfer module 501 is further specifically used to: when it is determined that the count value of the preset counter is greater than the maximum storage quantity, send hard reset information to the power supply device.

[0112] In some embodiments, the communication frame transfer module 501 is further specifically configured to: after storing the target UFCS communication frame into the target data queue, reduce the count value of the preset counter by 1.

[0113] In some embodiments, the communication frame processing module 502 includes a storage unit and a processing unit, wherein:

[0114] The storage unit is used for copying part of or all of the at least one UFCS communication frame to a data storage area corresponding to the target data queue through the virtual chip process when the target data queue is not empty;

[0115] The processing unit is used to process the UFCS communication frames in the data storage area through a communication frame processing process, and the communication frame processing process is awakened by a communication frame processing message sent by the virtual chip process to the communication frame processing process.

[0116] In some embodiments, the storage unit is specifically used to: when the at least one UFCS communication frame includes a soft reset communication frame, call the data queue processing thread to copy the soft reset communication frame to the data storage area and clear the target data queue; or, when the at least one UFCS communication frame does not include a soft reset communication frame, call the data queue processing thread to copy the UFCS communication frames in the target data queue to the data storage area in sequence in a first-in-first-out order.

[0117] In some embodiments, the processing unit is specifically used to: call the UFCS message processing thread to read the target UFCS communication frame in the data storage area; and parse and process the target UFCS communication frame.

[0118] In some embodiments, the processing unit is also specifically used to: send a hard reset message to the power supply device through the virtual chip process when no processing completion signal for the target communication frame sent by the communication frame processing process is received within a preset waiting time, and the preset waiting time is the waiting time after the virtual chip process sends a communication frame processing message for the target communication frame to the communication frame processing process.

[0119] In an embodiment of the present application, after receiving the UFCS communication frame sent by the power supply device, it can be transferred to the data queue of the electronic device memory, and then the communication frame in the data queue can be processed, thereby reducing the requirements for CPU processing power, avoiding the impact of CPU heating on charging speed, and still being able to meet the UFCS real-time response requirements when the system is heavily loaded.

[0120] The description of the above device embodiment is similar to the description of the above method embodiment, and has similar beneficial effects as the method embodiment. For technical details not disclosed in the device embodiment of the present application, please refer to the description of the method embodiment of the present application for understanding.

[0121] It should be noted that in the embodiments of this application Figure 6 The division of modules in the communication frame processing device shown is schematic and is only a logical function division. There may be other division methods in actual implementation. In addition, each functional unit in each embodiment of the present application may be integrated into a processing unit, or may exist physically alone, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of a software functional unit. It may also be implemented in the form of a combination of software and hardware.

[0122] It should be noted that in the embodiment of the present application, if the above method is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the embodiment of the present application can be essentially or partly embodied in the form of a software product that contributes to the relevant technology. The computer software product is stored in a storage medium, including several instructions to enable an electronic device to execute all or part of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a U disk, a mobile hard disk, a read-only memory (ROM), a magnetic disk or an optical disk. In this way, the embodiment of the present application is not limited to any specific combination of hardware and software.

[0123] Figure 7 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. Figure 7 As shown, the electronic device 100 may include a processor 110, a memory 120, a UFCS chip 130, a wireless communication module 140, a sensor module 150, a power module 160, and the like.

[0124] The processor 110 may include one or more processing units. For example, the processor 110 is a central processing unit (CPU), or an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present application, such as one or more microprocessors (digital signal processors, DSPs), or one or more field programmable gate arrays (FPGAs). Different processing units may be independent devices or integrated into one or more processors.

[0125] The memory 120 can be used to store computer executable program codes, which include instructions. The memory 120 may include a program storage area and a data storage area. Among them, the program storage area may store an operating system, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc. The data storage area may store data created during the use of the electronic device 100 (such as audio data, video data, etc.), etc. In addition, the memory 120 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc. The processor 110 executes various functional applications and data processing of the electronic device 100 by running instructions stored in the memory 120, and / or instructions stored in a memory provided in the processor.

[0126] The UFCS chip 130 can be any type of chip that can support the UFCS protocol. Among them, the UFCS chip 130 can be a single chip that supports the UFCS protocol, or it can be a chip that supports multiple fast charging protocols at the same time. For example, the UFCS chip can not only support UFCS fast charging certification, but also support traditional FCP, SCP, PD, QC, and DCP fast charging protocols. The UFCS chip meets the requirements of the implementation rules of the integrated fast charging function certification and can be widely used in devices such as chargers, adapters, and terminal devices.

[0127] The wireless communication module 140 can provide solutions for wireless communication including WLAN, such as Wi-Fi network, Bluetooth, NFC, IR, etc., applied to the electronic device 100. The wireless communication module 140 can be one or more devices integrating at least one communication processing module. In some embodiments of the present application, the electronic device 100 can establish a wireless communication connection with other electronic devices through the wireless communication module 140.

[0128] The sensor module 150 may include a gyro sensor, which may be used to determine the motion posture of the electronic device 100. In some embodiments, the angular velocity of the electronic device 100 around three axes (ie, x, y, and z axes) may be determined by the gyro sensor.

[0129] The power module 160 may include a battery, a battery management component, etc. The power management component is used to manage the charging of the power source and the power supply to other modules. The battery may be a rechargeable battery such as a lithium battery or a lead-acid battery. The shape of the battery may be, but is not limited to, a button type, a square type, etc. The electronic device 100 also includes a power module 160 (such as a battery) for supplying power to each component. Preferably, the power module may be logically connected to the processor 110 through a power management device, so that the power management device can realize functions such as managing charging, discharging, and power consumption management.

[0130] It is to be understood that the structure illustrated in the embodiment of the present invention does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown in the figure, or combine some components, or separate some components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

[0131] An embodiment of the present application provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps in the communication frame processing method provided in the above embodiment are implemented.

[0132] The above-mentioned computer-readable storage medium can adopt any combination of one or more computer-readable media. The computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples (non-exhaustive list) of computer-readable storage media include: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM) or flash memory, an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this document, a computer-readable storage medium can be any tangible medium containing or storing a program, which can be used by an instruction execution system, device or device or used in combination with it.

[0133] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, which carry computer-readable program code. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. Computer-readable signal media may also be any computer-readable medium other than a computer-readable storage medium, which may send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, apparatus, or device.

[0134] The program code embodied on the computer-readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wire, optical cable, radio frequency (RF), etc., or any suitable combination of the foregoing.

[0135] Computer program code for performing the operations of the present specification may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0136] An embodiment of the present application provides a computer program product including instructions, which, when executed on a computer, enables the computer to execute the steps in the communication frame processing method provided in the above method embodiment.

[0137] The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present invention is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from a website site, a computer, a server, or a data center to another website site, a computer, a server, or a data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium may be any available medium that a computer can store or a data storage device such as a server or a data center that includes one or more available media integrated. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive Solid State Disk (SSD)), etc.

[0138] It should be noted here that the description of the above storage medium, program product and device embodiments is similar to the description of the above method embodiment, and has similar beneficial effects as the method embodiment. For technical details not disclosed in the storage medium, storage medium and device embodiments of this application, please refer to the description of the method embodiment of this application for understanding.

[0139] It should be understood that "one embodiment" or "an embodiment" or "some embodiments" mentioned throughout the specification means that specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, "in one embodiment" or "in one embodiment" or "in some embodiments" appearing throughout the specification may not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in various embodiments of the present application, the size of the sequence number of the above-mentioned processes does not mean the order of execution, and the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present application. The above-mentioned sequence numbers of the embodiments of the present application are only for description and do not represent the advantages and disadvantages of the embodiments. The above description of each embodiment tends to emphasize the differences between the various embodiments, and the same or similar aspects can be referenced to each other. For the sake of brevity, this article will not repeat them.

[0140] The term "and / or" in this article is only a description of the association relationship of associated objects, indicating that there may be three relationships. For example, object A and / or object B can represent three situations: object A exists alone, object A and object B exist at the same time, and object B exists alone.

[0141] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0142] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The embodiments described above are only schematic. For example, the division of the modules is only a logical function division. There may be other division methods in actual implementation, such as: multiple modules or components can be combined, or can be integrated into another system, or some features can be ignored, or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of devices or modules can be electrical, mechanical or other forms.

[0143] The modules described above as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical modules; they may be located in one place or distributed on multiple network units; some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment.

[0144] In addition, all functional modules in the embodiments of the present application may be integrated into one processing unit, or each module may be a separate unit, or two or more modules may be integrated into one unit; the above-mentioned integrated modules may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0145] A person skilled in the art can understand that all or part of the steps of implementing the above method embodiment can be completed by hardware related to program instructions, and the aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps of the above method embodiment; and the aforementioned storage medium includes: mobile storage devices, read-only memories (ROM), magnetic disks or optical disks, etc., various media that can store program codes.

[0146] Alternatively, if the above-mentioned integrated unit of the present application is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiment of the present application can essentially or in other words, the part that contributes to the relevant technology can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for enabling an electronic device to execute all or part of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as mobile storage devices, ROMs, magnetic disks, or optical disks.

[0147] The methods disclosed in the several method embodiments provided in this application can be arbitrarily combined without conflict to obtain a new method embodiment. The features disclosed in the several product embodiments provided in this application can be arbitrarily combined without conflict to obtain a new product embodiment. The features disclosed in the several method or device embodiments provided in this application can be arbitrarily combined without conflict to obtain a new method embodiment or device embodiment.

[0148] The above is only an implementation method of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A communication frame processing method, characterized in that: Used in electronic equipment, including: When a communication connection based on the UFCS protocol of the converged fast charging standard is established with the power supply device and a target UFCS communication frame sent by the power supply device is received, the target UFCS communication frame is stored in a target data queue, the target data queue is located in the memory of the electronic device, and the target data queue is used to store the UFCS communication frame sent by the power supply device; At least one UFCS communication frame included in the target data queue is processed.

2. The method according to claim 1, characterized in that: The storing the target UFCS communication frame into a target data queue comprises: The target UFCS communication frame is stored in the target data queue through a virtual chip process. The virtual chip process is triggered when a UFCS hardware interrupt is received. The UFCS hardware interrupt is sent to the central processing unit CPU by the UFCS chip of the electronic device when the target UFCS communication frame is received. The virtual chip process is used to simulate the UFCS chip.

3. The method according to claim 2, characterized in that The storing the target UFCS communication frame into the target data queue through the virtual chip process includes: The target UFCS communication frame is acquired from the storage queue of the UFCS chip by calling the communication frame reading thread through the virtual chip process, and the target UFCS communication frame is stored in the target data queue.

4. The method according to claim 1, characterized in that: After receiving the target UFCS communication frame sent by the power supply device, the method further includes: Add 1 to the count value of the preset counter; Before storing the target UFCS communication frame in the target data queue, the method further includes: Determine that the count value of the preset counter is not greater than the maximum storage quantity of the UFCS communication frames corresponding to the UFCS chip of the electronic device.

5. The method according to claim 4, characterized in that The method further comprises: When it is determined that the count value of the preset counter is greater than the maximum storage quantity, hard reset information is sent to the power supply device.

6. The method according to claim 4 or 5, characterized in that: After storing the target UFCS communication frame in the target data queue, the method further includes: The count value of the preset counter is reduced by 1.

7. The method according to claim 2, characterized in that The processing of at least one UFCS communication frame included in the target data queue includes: When the target data queue is not empty, copying part of or all of the at least one UFCS communication frame to a data storage area corresponding to the target data queue through the virtual chip process; The UFCS communication frames in the data storage area are processed by a communication frame processing process, and the communication frame processing process is awakened by a communication frame processing message sent by the virtual chip process to the communication frame processing process.

8. The method according to claim 7, characterized in that The step of copying part of or all of the at least one UFCS communication frame to a data storage area corresponding to the target data queue through the virtual chip process includes: In the case where the at least one UFCS communication frame includes a soft reset communication frame, calling a data queue processing thread to copy the soft reset communication frame to the data storage area, and clearing the target data queue; or, In the case that the at least one UFCS communication frame does not include a soft reset communication frame, the data queue processing thread is called to copy the UFCS communication frames in the target data queue to the data storage area in sequence according to a first-in-first-out order.

9. The method according to claim 7, characterized in that: The UFCS communication frames in the data storage area include the target communication frames, and the processing of the UFCS communication frames in the data storage area by the communication frame processing process includes: Calling a UFCS message processing thread to read the target UFCS communication frame in the data storage area; Parse and process the target UFCS communication frame.

10. The method according to claim 7, characterized in that The method further comprises: When the processing completion signal for the target communication frame sent by the communication frame processing process is not received within the preset waiting time, a hard reset information is sent to the power supply device through the virtual chip process. The preset waiting time is the waiting time after the virtual chip process sends the communication frame processing message for the target communication frame to the communication frame processing process.

11. A communication frame processing device, characterized in that: Used in electronic equipment, including: A communication frame transfer module, for establishing a communication connection based on the UFCS protocol of the converged fast charging standard with the power supply device and receiving a target UFCS communication frame sent by the power supply device, storing the target UFCS communication frame in a target data queue, wherein the target data queue is located in the memory of the electronic device, and the target data queue is used to store the UFCS communication frame sent by the power supply device; The communication frame processing module is used to process at least one UFCS communication frame included in the target data queue.

12. An electronic device comprising a memory and a processor, wherein the memory stores a computer program that can be run on the processor, characterized in that: When the processor executes the program, the steps of the communication frame processing method according to any one of claims 1 to 10 are implemented.

13. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the communication frame processing method as claimed in any one of claims 1 to 10 are implemented.

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