Solar cell and preparation method thereof

By constructing a dual-gradient doped polysilicon stack and tunneling layer structure on the first surface of the substrate of the TOPCon solar cell, and connecting the first electrode to the doped polysilicon stack through the first passivation and reverse reduction layer, the problems of electrode contact and parasitic absorption are solved, and higher light utilization and efficiency are achieved.

CN119836055APending Publication Date: 2025-04-15TRINA SOLAR (YANGZHOU) OPTOELECTRONICS CO LTD +1
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Patent Information

Application Number
CN202510062608.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-15
Publication Date
2025-04-15

AI Technical Summary

Technical Problem

The existing TOPCon solar cells have shortcomings in electrode contact and parasitic absorption, which affects their photoelectric conversion performance.

Method used

Using a doped polysilicon stack with a dual gradient structure, a tunneling layer, a doped polysilicon stack and a first passivation and anti-reflection layer are sequentially prepared on the first surface of the substrate, and the first electrode passes through the first passivation and anti-reflection layer and is connected to the doped polysilicon stack.

Benefits of technology

Optimize electrode contact, reduce parasitic absorption, improve light utilization, and thus improve the efficiency of solar cells.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a solar cell and a preparation method thereof. The solar cell comprises a substrate, and the first surface of the substrate is sequentially provided with a tunneling layer, a doped polycrystalline silicon lamination layer and a first passivation anti-reflection layer; the doped polycrystalline silicon laminated layer comprises a plurality of first doped polycrystalline silicon layers, and the doping concentration of the first doped polycrystalline silicon layer far away from the substrate is higher than that of the first doped polycrystalline silicon layer close to the substrate. The crystallization rate of the first doped polycrystalline silicon layer far away from the substrate is lower than that of the first doped polycrystalline silicon layer close to the substrate; the semiconductor device further comprises a first electrode which is located on the first face of the substrate, penetrates through the first passivation anti-reflection layer and is connected to the doped polycrystalline silicon lamination layer. The solar cell is smaller in parasitic absorption, higher in light utilization rate and better in electrode contact.
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Description

Technical Field

[0001] The present invention mainly relates to the technical field of solar cells, and in particular to a solar cell and a preparation method thereof. Background Art

[0002] Solar cells (also called photocells, photovoltaic cells) are photoelectric semiconductor sheets that use sunlight to generate electricity directly. When sunlight shines on the surface of solar cells, photons are absorbed and stimulate electrons to form current and generate electrical energy. Among them, TOPCon (Tunnel Oxide Passivated Contact) cells are a type of high-efficiency solar cell that has attracted much attention in the photovoltaic field in recent years.

[0003] TOPCon cells are tunneling oxide layer passivated contact solar cells based on the principle of selective carriers. The cell structure is generally an N-type silicon substrate cell. An ultra-thin tunneling layer is prepared on the back of the cell, and then a thin layer of doped polysilicon is deposited. The two together form a passivated contact structure, which effectively reduces surface recombination and metal contact recombination, thereby achieving higher photoelectric conversion efficiency. TOPCon cells often use a sintering process to prepare electrodes. By sintering the conductive paste, the conductive paste corrodes a portion of the thickness of the passivation contact structure, causing the conductive paste to penetrate into the passivation contact structure and make electrical contact with the passivation contact structure. The electrical contact performance between the electrode and the passivation contact structure affects the electrode's ability to collect carriers. If the conductive paste corrodes too much of the passivation contact structure, the formed electrode will penetrate the passivation contact structure and directly contact the substrate, thereby forming a carrier recombination center on the substrate surface, which is not conducive to improving the photoelectric conversion performance of the solar cell.

[0004] In addition, in order to achieve a better passivation effect of TOPcon cells, the doping concentration of the polysilicon thin layer in the passivation contact structure is generally high. High doping concentration can also reduce surface recombination and interface recombination, but higher doping concentration will also cause more parasitic absorption and reduce the utilization rate of light. Therefore, how to optimize TOPCon cells, not only to maintain its existing cell advantages, but also to overcome the above-mentioned electrode contact, parasitic absorption and other deficiencies has become an urgent problem to be solved. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a solar cell and a preparation method thereof, so as to reduce parasitic absorption, improve light utilization and optimize electrode contact.

[0006] To solve the above technical problems, in a first aspect, the present invention provides a solar cell, comprising: a substrate; a first surface of the substrate having a tunneling layer, a doped polysilicon stack and a first passivation anti-reflection layer in sequence; the doped polysilicon stack comprises a plurality of first doped polysilicon layers, and the doping concentration of the first doped polysilicon layers far from the substrate is higher than the doping concentration of the first doped polysilicon layers close to the substrate, and the crystallization rate of the first doped polysilicon layers far from the substrate is lower than the crystallization rate of the first doped polysilicon layers close to the substrate; a first electrode, the first electrode is located on the first surface of the substrate, and passes through the first passivation anti-reflection layer and is connected to the doped polysilicon stack.

[0007] Optionally, the crystallization rate of the first doped polysilicon layer closest to the substrate is 90%-100%, and the crystallization rate of the first doped polysilicon layer farthest from the substrate is 50%-70%.

[0008] Optionally, the doped polysilicon stack is a stack having three first doped polysilicon layers.

[0009] Optionally, the crystallization rate of the first doped polysilicon layer located in the middle layer is 70%-90%.

[0010] Optionally, the first electrode is connected to a first doped polysilicon layer in the doped polysilicon stack that is closest to the substrate.

[0011] Optionally, the second surface of the substrate has a second doped polysilicon layer, an aluminum oxide dielectric layer and a second passivation anti-reflection layer in sequence; and also includes a second electrode, which is located on the second surface of the substrate, passes through the aluminum oxide dielectric layer and the second passivation anti-reflection layer and is connected to the second doped polysilicon layer, wherein the doped conductivity type of the second doped polysilicon layer is opposite to the doped conductivity type of the first doped polysilicon layer.

[0012] Optionally, the substrate is an n-type silicon substrate, the first doped polysilicon layer is an n-type doped polysilicon layer, and the second doped polysilicon layer is a p-type doped polysilicon layer.

[0013] Optionally, the material of the tunneling layer is one of the following materials: SiO 2 、Al 2 O 3 and SiC.

[0014] Optionally, the material of the first passivation anti-reflection layer and / or the second passivation anti-reflection layer is one or more of the following materials: SiN x 、SiO x N y 、SiO x、Al 2 O 3 / SiN x Laminated, SiO x N y / SiN x Overlay.

[0015] Optionally, the second surface of the substrate is suede.

[0016] In a second aspect, the present invention provides a method for preparing a solar cell, comprising: providing a substrate; sequentially preparing a tunneling layer and a doped polysilicon stack on a first surface of the substrate; wherein when preparing the doped polysilicon stack, sequentially preparing each first doped polysilicon layer, each first doped polysilicon layer forms the doped polysilicon stack, and the doping concentration of the first doped polysilicon layer far from the substrate is higher than the doping concentration of the first doped polysilicon layer close to the substrate, and the crystallization rate of the first doped polysilicon layer far from the substrate is lower than the crystallization rate of the first doped polysilicon layer close to the substrate; preparing a second doped polysilicon layer on the second surface of the substrate, wherein the doping conductivity type of the second doped polysilicon layer is opposite to that of the first doped polysilicon layer; preparing an aluminum oxide dielectric layer on the second doped polysilicon layer; preparing a first passivation anti-reflection layer and a second passivation anti-reflection layer on the first surface and the second surface of the substrate respectively; preparing a first electrode and a second electrode, so that the first electrode is connected to the doped polysilicon stack, and the second electrode is connected to the second doped polysilicon layer.

[0017] Optionally, in the step of sequentially preparing each first doped polysilicon layer to form the doped polysilicon stack, PECVD is used to deposit each first doped polysilicon layer, and / or laser is used to crystallize each first doped polysilicon layer at high temperature.

[0018] Compared with the prior art, the present invention has the following advantages: the first surface of the battery substrate has a tunneling layer, a doped polysilicon stack and a first passivation anti-reflection layer in sequence; the doped polysilicon stack includes several layers of first doped polysilicon layers, and the doping concentration of the first doped polysilicon layer far from the substrate is higher than the doping concentration of the first doped polysilicon layer close to the substrate, and the crystallization rate of the first doped polysilicon layer far from the substrate is lower than the crystallization rate of the first doped polysilicon layer close to the substrate; the first electrode is located on the first surface of the substrate, passes through the first passivation anti-reflection layer and is connected to the doped polysilicon stack, which is beneficial to electrode contact, reduces parasitic absorption, and improves light utilization. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The accompanying drawings are included to provide a further understanding of the present application. They are included and constitute a part of the present application. The accompanying drawings illustrate embodiments of the present application and together with the present specification serve to explain the principles of the present application. In the accompanying drawings:

[0020] Figure 1 is a schematic structural diagram of a solar cell according to an embodiment of the present invention;

[0021] Figure 2 yes Figure 1 Schematic diagram of the structure of the doped polysilicon stack;

[0022] Figure 3 It is a schematic diagram of a process of preparing a solar cell according to an embodiment of the present invention.

[0023] The numbers in the figure are:

[0024] 110 - base;

[0025] 120- tunneling layer;

[0026] 130-doped polysilicon stack, 131-doped polysilicon inner layer, 132-doped polysilicon middle layer, 133-doped polysilicon outer layer;

[0027] 140-a first passivation anti-reflection layer;

[0028] 150- a first electrode;

[0029] 160-a second doped polysilicon layer;

[0030] 170-aluminum oxide dielectric layer;

[0031] 180-second passivation anti-reflection layer;

[0032] 190 - second electrode. DETAILED DESCRIPTION

[0033] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for the description of the embodiments. Obviously, the drawings described below are only some examples or embodiments of the present application. For ordinary technicians in this field, the present application can also be applied to other similar scenarios based on these drawings without creative work. Unless it is obvious from the language environment or otherwise explained, the same reference numerals in the figures represent the same structure or operation.

[0034] As shown in this application and claims, unless the context clearly indicates an exception, the words "a", "an", "an" and / or "the" do not refer to the singular and may also include the plural. Generally speaking, the terms "include" and "comprise" only indicate the inclusion of the steps and elements that have been clearly identified, and these steps and elements do not constitute an exclusive list. The method or device may also include other steps or elements.

[0035] In addition, it should be noted that the use of words such as "first" and "second" to define components is only for the convenience of distinguishing the corresponding components. If not otherwise stated, the above words have no special meaning and cannot be understood as limiting the scope of protection of this application. In addition, although the terms used in this application are selected from well-known and commonly used terms, some terms mentioned in the specification of this application may be selected by the applicant at his or her discretion, and their detailed meanings are explained in the relevant parts of the description of this article. In addition, it is required to understand this application not only by the actual terms used, but also by the meaning implied by each term.

[0036] Flowcharts are used in the present application to illustrate the operations performed by the system according to the embodiments of the present application. It should be understood that the preceding or following operations are not necessarily performed accurately in order. On the contrary, various steps may be processed in reverse order or simultaneously. At the same time, other operations may be added to these processes, or one or more operations may be removed from these processes.

[0037] Figure 1 is a schematic diagram of the structure of a solar cell according to an embodiment of the present invention, Figure 1 As shown, the battery of this embodiment includes a substrate 110, and the first surface (bottom surface or back surface in the figure) of the substrate 110 has a tunneling layer 120, a doped polysilicon stack 130 and a first passivation anti-reflection layer 140 in sequence, wherein the doped polysilicon stack 130 includes a plurality of first doped polysilicon layers, and the doping concentration of the first doped polysilicon layer far from the substrate 110 is higher than that of the first doped polysilicon layer close to the substrate 110, and the crystallization rate of the first doped polysilicon layer far from the substrate 110 is lower than that of the first doped polysilicon layer close to the substrate 110. Reference Figure 1 and Figure 2As shown, the direction of arrow A represents the direction away from the substrate 110. It can be seen that along the A direction outward, the doping concentration of each first doped polysilicon layer increases successively, while the crystallization rate of each first doped polysilicon layer decreases successively. It can be understood that due to the different crystallization rates of different first doped polysilicon layers, that is, the content of crystalline silicon and amorphous silicon in different doped polysilicon layers is different, although amorphous silicon is also contained in crystalline silicon, this embodiment is still called a polysilicon layer, which does not affect the expression of the substantial content of the doped layer. The battery of this embodiment also includes a first electrode 150, which is located on the first surface of the substrate 110, and passes through the first passivation anti-reflection layer 140 and is connected to the doped polysilicon stack 130.

[0038] In TOPcon cells, the doping concentration of the polysilicon layer has a direct impact on the passivation effect. When the doping concentration in the polysilicon layer reaches a certain level, the passivation effect can be significantly improved, thereby improving the efficiency of the solar cell. Regarding the degree of crystallization of the polysilicon layer, generally speaking, the higher the degree of crystallization, the lower the defect density in the polysilicon layer. Defects are recombination centers that promote the recombination of carriers and reduce the efficiency of solar cells. Therefore, increasing the degree of crystallization helps reduce defects and reduce the recombination rate.

[0039] In this embodiment, a polysilicon layer structure with a double gradient is constructed on the back of the TOPcon cell, and the doping concentration gradually increases from the inside to the outside (along the direction of arrow A), and the crystallization rate gradually decreases, so that the doped polysilicon layer has the advantages of both amorphous silicon and polycrystalline silicon, ensuring that the doped polysilicon layer has a large density and can ensure that the doped silicon layer has a strong electron transmission ability. In this way, a good electrode contact can be formed, the carrier collection ability is guaranteed, parasitic absorption is reduced, and the light utilization rate is improved, resulting in a solar cell with higher efficiency.

[0040] In one example, the crystallization rate of the first doped polysilicon layer closest to the substrate 110 is 90%-100%, and the crystallization rate of the first doped polysilicon layer farthest from the substrate 110 is 50%-70%.

[0041] In one example, the doped polysilicon stack 130 is a stack having three first doped polysilicon layers. Further, the crystallization rate of the first doped polysilicon layer located in the middle layer is 70%-90%.

[0042] refer to Figure 1 and Figure 2As shown, along the direction of arrow A (from inside to outside), the doped polysilicon stack 130 is composed of first doped polysilicon layers stacked in sequence. Each first doped polysilicon layer is a doped polysilicon inner layer 131, a doped polysilicon middle layer 132, and a doped polysilicon outer layer 133. The crystallization rate of the doped polysilicon inner layer 131 is 90%-100%, and the best way to dope the polysilicon layer is to fully crystallize it. The crystallization rate of the doped polysilicon middle layer 132 is 70%-90%, and the crystallization rate of the doped polysilicon outer layer 133 is 50%-70%. Of course, the doping concentration relationship of each doped polysilicon layer is still doped polysilicon inner layer 131 < doped polysilicon middle layer 132 < doped polysilicon outer layer 133.

[0043] In one example, the first electrode 150 is connected to the first doped polysilicon layer in the doped polysilicon stack 130 that is closest to the substrate 110 .

[0044] For example, please refer to Figure 1 and Figure 2 As shown in the figure, the doped polysilicon stack 130 has three first doped polysilicon layers, which are a doped polysilicon inner layer 131 , a doped polysilicon middle layer 132 and a doped polysilicon outer layer 133 from the inside to the outside, and the first electrode 150 is connected to the innermost doped polysilicon inner layer 131 .

[0045] In this embodiment, the first electrode 150 is connected to the doped polysilicon stack 130 and is close to the tunneling layer 120, which can achieve efficient carrier collection and transmission. Specifically, the tunneling layer 120 effectively prevents the recombination of minority carriers, while the doped polysilicon stack 130 serves as a carrier collection layer, and the two work together to reduce energy loss. The first electrode 150 is close to the tunneling layer 120 to shorten the carrier transmission path, reduce the recombination loss of carriers during the transmission process, and enable the carriers after tunneling to be quickly collected and exported, thereby optimizing the carrier transmission path. In addition, the close contact between the first electrode 150 and the doped polysilicon stack 130 also reduces the contact resistance, so that the obstacles encountered by the carriers during the transmission process are smaller, thereby increasing the current output of the solar cell.

[0046] In one example, the second surface ( Figure 1The second doped polysilicon layer 160, the aluminum oxide dielectric layer 170 and the second passivation anti-reflection layer 180 are sequentially provided on the top surface or the front surface of the substrate 110; the battery of this embodiment also includes a second electrode 190, which is located on the second surface of the substrate 110, and passes through the aluminum oxide dielectric layer 170 and the second passivation anti-reflection layer 180 and is connected to the second doped polysilicon layer 160. The doped conductivity type of the second doped polysilicon layer 160 is opposite to the doped conductivity type of the doped polysilicon stack 130 (or each first doped polysilicon layer). For example, if the conductivity type of the doped polysilicon stack 130 is n, the conductivity type of the second doped polysilicon layer 160 is p.

[0047] In this embodiment, the aluminum oxide dielectric layer 170 mainly plays a passivation role and has a good inhibitory effect on the surface recombination of the substrate 110. The aluminum oxide dielectric layer 170 contains a large amount of fixed negative charges, which induces a large amount of fixed positive charges to be distributed at the interface of the substrate 110 / aluminum oxide dielectric layer 170, producing a field passivation effect.

[0048] In one example, the substrate 110 is an n-type silicon substrate, the first doped polysilicon layer is an n-type doped polysilicon layer, and the second doped polysilicon layer 160 is a p-type doped polysilicon layer.

[0049] Donor impurities (such as phosphorus) are doped into the n-type silicon substrate, so that the free electron concentration in the n-type silicon is higher, thereby having a higher electron mobility. The TOPCon cell of this embodiment uses n-type silicon as the substrate 110, and forms a p-type doped region on its surface to form a pn junction. This dual doping structure helps to effectively separate and collect photogenerated electrons and holes, thereby improving the photoelectric conversion efficiency of the cell.

[0050] In one example, the material of the tunneling layer 120 is one of the following materials: SiO 2 、Al 2 O 3 And SiC. In this embodiment, SiO 2 .

[0051] The material of the tunneling layer 120 directly affects the performance and stability of the solar cell. 2 It is the most commonly used tunneling layer material. It has good passivation performance on the surface of n-type silicon substrate and can significantly improve the open circuit voltage and fill factor of the battery. 2 In addition, other substances such as Al 2 O 3 、SiC、ZrO 2 The materials may also be used as the tunneling layer 120 material. These materials have different electrical properties and passivation effects and can be selected according to specific needs. No specific limitation is made here.

[0052] In one example, the material of the first passivation anti-reflection layer 140 and / or the second passivation anti-reflection layer 180 is one or more of the following materials: SiN x 、SiO x N y 、SiO x 、Al 2 O 3 / SiN x Laminated, SiO x N y / SiN x Overlay.

[0053] In this embodiment, the passivation anti-reflection layer has both passivation and anti-reflection functions. It can achieve the above two functions by using one material, or different materials can achieve the passivation and anti-reflection functions respectively, and then combine them to play a role. The passivation function is to reduce the composite loss on the surface of the substrate 110 and improve the photoelectric conversion efficiency and stability of the solar cell. For example, SiO 2 、Alumina Al 2 O 3 The anti-reflection function is to reduce the reflection of light on the surface of solar cells and improve the light absorption efficiency, such as ZnO. Materials that have both passivation and anti-reflection functions, such as silicon nitride SiN x 。SiN x It can passivate the defects on the surface and in the body of polysilicon and reduce the recombination loss of carriers. x It has excellent anti-reflection performance. By controlling its refractive index and thickness, an anti-reflection film can be formed on the surface of the solar cell to reduce the reflectivity of light on the cell surface and improve the light absorption efficiency. In one implementation, solar cells often use double-layer SiN x The anti-reflection film layer of the film is first deposited with a layer of high refractive index SiN x , to better passivate the solar cell surface, and then grow low-refractive-index SiN x , used to reduce the reflectivity of the solar cell surface and effectively improve the photoelectric conversion efficiency of the solar cell.

[0054] In one example, the second surface of the substrate 110 is a velvet surface. Based on this, after the second doped polysilicon layer 160, the aluminum oxide dielectric layer 170 and the second passivation anti-reflection layer 180 are sequentially prepared on the substrate 110, the front side of the solar cell is still a velvet surface. With the velvet structure, the light is reflected and scattered multiple times on the uneven surface, thereby increasing the propagation path of the light inside the substrate 110. This effect enables the velvet solar cell to capture sunlight more effectively and convert it into electrical energy. In addition, the velvet structure also increases the surface area of ​​the substrate 110, so the area of ​​the PN junction will also be increased in the subsequent diffusion process. The PN junction is a key part of the solar cell, and the increase in its area helps to improve the current output and overall efficiency of the battery.

[0055] In the TOPCon battery of this embodiment, the velvet structure can also improve the adhesion performance of subsequent coatings (such as the aluminum oxide dielectric layer 170). The improvement of adhesion performance helps to reduce interface defect states and further improve the performance and stability of the battery.

[0056] The solar cell of the present embodiment has a tunneling layer, a doped polysilicon stack and a first passivation anti-reflection layer on the first surface of the substrate of the cell in sequence; the doped polysilicon stack includes a plurality of first doped polysilicon layers, and the doping concentration of the first doped polysilicon layer far from the substrate is higher than that of the first doped polysilicon layer close to the substrate, and the crystallization rate of the first doped polysilicon layer far from the substrate is lower than that of the first doped polysilicon layer close to the substrate; the first electrode is located on the first surface of the substrate, passes through the first passivation anti-reflection layer and is connected to the doped polysilicon stack, which is beneficial to electrode contact, reduces parasitic absorption, and improves light utilization.

[0057] Another embodiment of the present invention provides a method for preparing a solar cell, which can be used to prepare the solar cell in the above embodiment, but is not limited thereto. Figure 3 As shown, the method 300 mainly includes:

[0058] S310, providing a substrate; S320, sequentially preparing a tunneling layer and a doped polysilicon stack on the first surface of the substrate; wherein when preparing the doped polysilicon stack, sequentially preparing each first doped polysilicon layer, each first doped polysilicon layer forming the doped polysilicon stack, and the doping concentration of the first doped polysilicon layer far from the substrate is higher than the doping concentration of the first doped polysilicon layer close to the substrate, and the crystallization rate of the first doped polysilicon layer far from the substrate is higher than the crystallization rate of the first doped polysilicon layer close to the substrate. The crystallization rate of the silicon layer is lower; S330, preparing a second doped polysilicon layer on the second surface of the substrate, wherein the doping conductivity type of the second doped polysilicon layer is opposite to that of the first doped polysilicon layer; S340, preparing an aluminum oxide dielectric layer on the second doped polysilicon layer; S350, preparing a first passivation anti-reflection layer and a second passivation anti-reflection layer on the first surface and the second surface of the substrate respectively; S360, preparing a first electrode and a second electrode, so that the first electrode is connected to the doped polysilicon stack, and the second electrode is connected to the second doped polysilicon layer.

[0059] In one example, in the steps of sequentially preparing each first doped polysilicon layer to form a doped polysilicon stack, PECVD (Plasma Enhance Chemical Vapour Deposition) can be used to deposit each first doped polysilicon layer, and / or laser can be used to crystallize each first doped polysilicon layer at high temperature.

[0060] Exemplarily, the method of this embodiment is used to prepare the aforementioned solar cell, including the following steps: 1. Texturing the front side of the substrate 110; 2. Boron diffusion treatment is performed on the front side of the substrate 110 after texturing to form a PN junction; 3. Oxidation treatment is performed on the front side of the cell after step 2 to reduce the surface concentration; 4. Secondary texturing is performed to remove the boron diffusion layer on the back side while retaining the BSG (borosilicate glass) layer on the front side; 5. SiO is deposited by PECVD. 2 The doped polysilicon stack 130 is formed by tunneling layers and step-by-step deposition, that is, the doped polysilicon stack 130 is formed by depositing each first doped polysilicon layer, and the doping concentration of the first doped polysilicon layer far from the substrate 110 is higher than the doping concentration of the first doped polysilicon layer close to the substrate 110, and the crystallization rate of the first doped polysilicon layer far from the substrate 110 is lower than the crystallization rate of the first doped polysilicon layer close to the substrate 110; 6. The polysilicon and the PSG (phosphorus silicon glass) layer on the front and edge are etched away by RCA cleaning; 7. The front AlO is prepared by ALD (Atomic Layer Deposition) x layer, passivation boron diffusion layer; 8. Deposition of SiN by PECVDx Front and back films; 9. Print electrodes on the front and back of the battery, and form front and back grid line electrodes through sintering and annealing processes.

[0061] The preparation method of this embodiment constructs a doped polysilicon stacked structure with a double gradient on the back of the solar cell. From the inside to the outside, the doping concentration of each doped polysilicon layer gradually increases, and the crystallization rate gradually decreases. A layer of polysilicon doped with a lower concentration of phosphorus is deposited on the innermost layer, and its crystallization degree is the highest. Subsequently, a layer with a higher phosphorus doping concentration than the inner layer and a lower crystallization rate than the inner layer is deposited thereon. The outermost polysilicon layer has the highest phosphorus doping concentration and the lowest crystallization degree. Such a structure is not only conducive to forming better electrode contact, but also can reduce parasitic absorption and improve light utilization.

[0062] The solar cell preparation method of the present embodiment has a passivation contact structure of the prepared TOPcon cell having a doped polysilicon stack 130, wherein the doping concentration of each doped polysilicon layer from the inside to the outside of the doped polysilicon stack 130 gradually increases, and the crystallization rate gradually decreases; in addition, the first electrode is located on the first surface of the substrate, passes through the first passivation anti-reflection layer and is connected to the doped polysilicon stack, which is beneficial to electrode contact, reduces parasitic absorption, and improves light utilization.

[0063] The basic concepts have been described above. Obviously, for those skilled in the art, the above invention disclosure is only used as an example and does not constitute a limitation of the present application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and amendments to the present application. Such modifications, improvements and amendments are suggested in the present application, so such modifications, improvements and amendments still belong to the spirit and scope of the exemplary embodiments of the present application.

[0064] At the same time, the present application uses specific words to describe the embodiments of the present application. For example, "one embodiment", "an embodiment", and / or "some embodiments" refer to a certain feature, structure or characteristic related to at least one embodiment of the present application. Therefore, it should be emphasized and noted that "one embodiment" or "an embodiment" or "an alternative embodiment" mentioned twice or more in different positions in this specification does not necessarily refer to the same embodiment. In addition, some features, structures or characteristics in one or more embodiments of the present application can be appropriately combined.

[0065] Similarly, it should be noted that in order to simplify the description of the disclosure of this application and thus help understand one or more embodiments of the invention, in the above description of the embodiments of this application, multiple features are sometimes combined into one embodiment, figure or description thereof. However, this disclosure method does not mean that the features required by the object of this application are more than the features mentioned in the claims. In fact, the features of the embodiments are less than all the features of the single embodiment disclosed above.

[0066] Although the present application has been described with reference to the current specific embodiments, ordinary technicians in this technical field should recognize that the above embodiments are only used to illustrate the present application, and various equivalent changes or substitutions may be made without departing from the spirit of the present application. Therefore, as long as the changes and modifications to the above embodiments are within the essential spirit of the present application, they will fall within the scope of the claims of the present application.

Claims

1. A solar cell, characterized in that: include: A substrate; the first surface of the substrate has a tunneling layer, a doped polysilicon stack and a first passivation anti-reflection layer in sequence; The doped polysilicon stack includes a plurality of first doped polysilicon layers, and the doping concentration of the first doped polysilicon layers far from the substrate is higher than that of the first doped polysilicon layers close to the substrate, and the crystallization rate of the first doped polysilicon layers far from the substrate is lower than that of the first doped polysilicon layers close to the substrate; A first electrode is located on a first surface of the substrate, passes through the first passivation anti-reflection layer and is connected to the doped polysilicon stack.

2. The solar cell according to claim 1, wherein: The crystallization rate of the first doped polysilicon layer closest to the substrate is 90%-100%, and the crystallization rate of the first doped polysilicon layer farthest from the substrate is 50%-70%.

3. The solar cell according to claim 2, characterized in that The doped polysilicon stack is a stack having three first doped polysilicon layers.

4. The solar cell according to claim 3, characterized in that The crystallization rate of the first doped polysilicon layer located in the middle layer is 70%-90%.

5. The solar cell according to claim 1, wherein: The first electrode is connected to a first doped polysilicon layer in the doped polysilicon stack that is closest to the substrate.

6. The solar cell according to claim 1, wherein: The second surface of the substrate has a second doped polysilicon layer, an aluminum oxide dielectric layer, and a second passivation anti-reflection layer in sequence; It also includes a second electrode, which is located on the second surface of the substrate, passes through the aluminum oxide dielectric layer and the second passivation anti-reflection layer and is connected to the second doped polysilicon layer, wherein the doped conductivity type of the second doped polysilicon layer is opposite to the doped conductivity type of the first doped polysilicon layer.

7. The solar cell according to claim 6, characterized in that The substrate is an n-type silicon substrate, the first doped polysilicon layer is an n-type doped polysilicon layer, and the second doped polysilicon layer is a p-type doped polysilicon layer.

8. The solar cell according to claim 7, wherein: The material of the tunneling layer is one of the following materials: SiO2, Al2O3 and SiC.

9. The solar cell according to claim 6, wherein: The material of the first passivation anti-reflection layer and / or the second passivation anti-reflection layer is one or more of the following materials: SiN x 、SiO x N y 、SiO x 、Al2O3 / SiN x Laminated, SiO x N y / SiN x Overlay.

10. The solar cell according to claim 6, wherein: The second surface of the substrate is a suede surface.

11. A method for preparing a solar cell, characterized in that: include: providing a substrate; A tunneling layer and a doped polysilicon stack are sequentially prepared on the first surface of the substrate; wherein when preparing the doped polysilicon stack, each first doped polysilicon layer is sequentially prepared, each first doped polysilicon layer forms the doped polysilicon stack, and the doping concentration of the first doped polysilicon layer far from the substrate is higher than the doping concentration of the first doped polysilicon layer close to the substrate, and the crystallization rate of the first doped polysilicon layer far from the substrate is lower than the crystallization rate of the first doped polysilicon layer close to the substrate; Prepare a second doped polysilicon layer on the second surface of the substrate, wherein the doping conductivity type of the second doped polysilicon layer is opposite to that of the first doped polysilicon layer; Preparing an aluminum oxide dielectric layer on the second doped polysilicon layer; Prepare a first passivation anti-reflection layer and a second passivation anti-reflection layer on the first surface and the second surface of the substrate respectively; A first electrode and a second electrode are prepared, wherein the first electrode is connected to the doped polysilicon stack, and the second electrode is connected to the second doped polysilicon layer.

12. The method for preparing a solar cell according to claim 11, characterized in that: In the step of sequentially preparing each first doped polysilicon layer to form the doped polysilicon stack, PECVD is used to deposit each first doped polysilicon layer, and / or laser is used to crystallize each first doped polysilicon layer at high temperature.