Voltage modulator with reduced transient voltage drop

Abstract

The present application relates to the technical field of voltage modulator, particularly relates to a voltage modulator with reduced transient voltage drop; the voltage modulator of the present application, transistor M5, M13, and resistance R3, R4, capacitor C2, C3 realize the function of reducing transient voltage drop.When the output voltage VOUT drops rapidly, the change is coupled to node V1 through capacitor C2, so that V1 also follows the drop, the current of transistor M5 increases, this current flows through transistor M13, so that the voltage of node V2 increases, and then is coupled to the gate node V3 of transistor M11 through capacitor C3, the current of transistor M11 increases, this current discharges the gate node V4 of transistor M4 through transistor M7, increases the current of transistor M4, and this current is used to pull back the output voltage VOUT, so that the function of reducing transient voltage drop is realized.

Description

Technical Field

[0001] This invention relates to the field of voltage modulator technology, and in particular to a voltage modulator that reduces transient voltage drop. Background Technology

[0002] A voltage modulator is an electronic modulator whose main function is to convert analog signals into digital signals for data transmission in digital communication, thus achieving signal modulation. The voltage modulator takes the original input signal, uses a voltage modulation chip to modulate the digital signal, and finally outputs a modulated voltage signal. Its main functions include improving the speed and accuracy of voltage signal transmission, thereby achieving more efficient and accurate voltage data transmission. The working principle of a voltage modulator is to modulate the original input signal using a voltage modulation chip. The specific process includes: input signal processing: processing the input analog signal; modulation processing: performing digital modulation processing on the signal using the voltage modulation chip; output modulated signal: finally outputting the modulated digital signal.

[0003] In existing technologies, voltage modulators generally use a two-stage structure. The first stage is an error amplifier, and the second stage is a flipped source follower (FVF). The dominant pole is at the output of the first-stage amplifier, which provides the gain. The FVF in the second stage enables a fast response to changes in the output voltage. When the output voltage drops rapidly, the gate of the power transistor is quickly pulled low, and the power transistor quickly turns on, pulling the output voltage back up. However, when the output voltage drops rapidly, the current of the following PMOS decreases, and the gate of the power transistor discharges through an N-type current source. For power consumption considerations, the current of the N-type current source is usually not large, so its ability to discharge the gate of the power transistor is not strong, resulting in insufficient response to the output voltage. Summary of the Invention

[0004] In view of this, the present invention proposes a voltage modulator with reduced transient voltage drop, used to quickly pull the output voltage back.

[0005] To achieve the above objective, a voltage modulator with reduced transient voltage drop is provided, comprising:

[0006] The circuit includes an error amplifier AMP, transistors M3, M4, M7, M11, M12, and M14, transistors M1, M2, M6, M8, M9, M10, M5, and M13, capacitors C1, C2, and C3, and resistors R1 and R2. Transistors M3, M4, M7, M11, M12, and M14 form a flip-type source follower, while transistors M1, M2, M6, M8, M9, and M10 form a bias circuit. The power supply... The input (VDD) is connected to the drains of transistors M3 and M4. The positive input of the error amplifier (AMP) is connected to the reference voltage (VREF), and the negative input is connected to the feedback voltage (VFB). The output of the error amplifier (AMP) is connected to the gate of transistor M2. The source of transistor M1 is grounded (GND), and the drain of transistor M1 is connected to the gate of M2. The drain of transistor M2 is connected to the gates of transistors M3 and M4. The sources of transistors M3 and M4 are connected together. The drain of transistor M5 is connected to the sources of transistors M3 and M4, and the gate of transistor M5 is connected to VDD.

[0007] Preferably, transistor M6 and transistor M7 form a current mirror, the drain of transistor M6 is connected to the source of transistor M2, and the drain of transistor M7 is connected to the gate of transistor M14.

[0008] Preferably, transistors M8 and M9 form a pull-down network, with the drain of transistor M8 connected to the source of transistor M6 and the drain of transistor M9 connected to ground (GND).

[0009] Preferably, transistors M10 and M11 form a current mirror, the drain of transistor M10 is connected to the source of transistor M8, and the drain of transistor M11 is connected to the gate of M12.

[0010] Preferably, transistors M12 and M13 form a pull-down network, with the drain of transistor M12 connected to the source of transistor M10 and the drain of transistor M13 connected to ground (GND).

[0011] Preferably, resistors R1 and R2 are connected between the output voltage (VOUT) and the feedback voltage (VFB), respectively, to achieve voltage division.

[0012] Preferably, capacitor C1 is connected between the drain of transistor M6 and ground for filtering; capacitor C2 is connected between the source of transistors M3 and M4 and ground for filtering; and capacitor C3 is connected between the drain of transistor M11 and ground for filtering.

[0013] Preferably, diode V1 is connected between the drain and source of transistor M5, diode V2 is connected between the drain and source of transistor M12, diode V3 is connected between the source of transistor M11 and the drain of transistor M12, and diodes V4 and V5 are respectively connected between the source of transistor M3 and the source of transistor M4 and ground to prevent reverse current.

[0014] Preferably, the voltage modulator further includes a resistor R5, which is disposed between the gate and drain of the transistor M13.

[0015] The advantages and beneficial effects of this invention are as follows:

[0016] The voltage modulator of this invention uses transistors M5 and M13, resistors R3 and R4, and capacitors C2 and C3 to reduce transient voltage drops. When the output voltage VOUT drops rapidly, the change is coupled to node V1 through capacitor C2, causing V1 to drop as well. The current in transistor M5 increases, and this current flows through transistor M13, increasing the voltage at node V2. This voltage then couples to the gate node V3 of transistor M11 through capacitor C3, increasing the current in transistor M11. This current discharges through transistor M7 and the gate node V4 of transistor M4, increasing the current in transistor M4. This current is used to pull back the output voltage VOUT, thereby reducing transient voltage drops. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of this invention or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of a voltage modulator with reduced transient voltage drop provided in Embodiment 1 of the present invention;

[0019] Figure 2 This is a schematic diagram of a voltage modulator that reduces transient voltage drop according to Embodiment 2 of the present invention. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] Appendix Figure 1 A schematic diagram of a voltage modulator with reduced transient voltage drop is shown in the attached figure. Figure 1 As shown, a voltage modulator with reduced transient voltage drop includes:

[0022] The circuit includes an error amplifier AMP, transistors M3, M4, M7, M11, M12, and M14, transistors M1, M2, M6, M8, M9, M10, M5, and M13, capacitors C1, C2, and C3, and resistors R1 and R2. Transistors M3, M4, M7, M11, M12, and M14 form a flip-type source follower, while transistors M1, M2, M6, M8, M9, and M10 form a bias circuit. The power supply... The input (VDD) is connected to the drains of transistors M3 and M4. The positive input of the error amplifier (AMP) is connected to the reference voltage (VREF), and the negative input is connected to the feedback voltage (VFB). The output of the error amplifier (AMP) is connected to the gate of transistor M2. The source of transistor M1 is grounded (GND), and the drain of transistor M1 is connected to the gate of M2. The drain of transistor M2 is connected to the gates of transistors M3 and M4. The sources of transistors M3 and M4 are connected together. The drain of transistor M5 is connected to the sources of transistors M3 and M4, and the gate of transistor M5 is connected to VDD.

[0023] In this configuration, transistors M6 and M7 form a current mirror, with the drain of transistor M6 connected to the source of transistor M2 and the drain of transistor M7 connected to the gate of transistor M14.

[0024] In this configuration, transistors M8 and M9 form a pull-down network, with the drain of transistor M8 connected to the source of transistor M6 and the drain of transistor M9 connected to ground (GND).

[0025] In this configuration, transistors M10 and M11 form a current mirror, with the drain of transistor M10 connected to the source of transistor M8 and the drain of transistor M11 connected to the gate of M12.

[0026] In this configuration, transistors M12 and M13 form a pull-down network, with the drain of transistor M12 connected to the source of transistor M10 and the drain of transistor M13 connected to ground (GND).

[0027] The resistors R1 and R2 are connected between the output voltage (VOUT) and the feedback voltage (VFB) respectively to achieve voltage division.

[0028] Specifically, capacitor C1 is connected between the drain of transistor M6 and ground for filtering; capacitor C2 is connected between the source of transistors M3 and M4 and ground for filtering; and capacitor C3 is connected between the drain of transistor M11 and ground for filtering.

[0029] In this configuration, diode V1 is connected between the drain and source of transistor M5, diode V2 is connected between the drain and source of transistor M12, diode V3 is connected between the source of transistor M11 and the drain of transistor M12, and diodes V4 and V5 are connected between the source of transistor M3 and the source of transistor M4 and ground, respectively, to prevent reverse current.

[0030] In this embodiment, transistors M5 and M13, along with resistors R3 and R4, and capacitors C2 and C3, reduce transient voltage drops. When the output voltage VOUT drops rapidly, the change is coupled to node V1 via capacitor C2, causing V1 to drop as well. This increases the current in transistor M5, which flows through transistor M13, increasing the voltage at node V2. This voltage then couples to the gate node V3 of transistor M11 via capacitor C3, increasing the current in transistor M11. This current then discharges through transistor M7 and the gate node V4 of transistor M4, increasing the current in transistor M4. This current pulls back the output voltage VOUT, thus reducing transient voltage drops. Simultaneously, the current mirror and pull-down network ensure circuit stability and response speed. The combination of capacitors and resistors reduces voltage fluctuations and noise.

[0031] Example 2, Appendix Figure 2 A schematic diagram of another voltage modulator with reduced transient voltage drop is shown in the attached figure. Figure 2As shown, a voltage modulator with reduced transient voltage drop in this embodiment includes: an error amplifier AMP, transistors M3, M4, M7, M11, M12, and M14, transistors M1, M2, M6, M8, M9, M10, M5, and M13, capacitors C1, C2, and C3, and resistors R1 and R2. Specifically, transistors M3, M4, M7, M11, M12, and M14 constitute a flip-flop source follower, and transistors M1, M2, M6, M8, M9, and M14... A bias circuit is formed; wherein, the power input (VDD) is connected to the drains of transistors M3 and M4, the positive input of the error amplifier (AMP) is connected to the reference voltage (VREF), the negative input is connected to the feedback voltage (VFB), and the output of the error amplifier (AMP) is connected to the gate of transistor M2; the source of transistor M1 is grounded (GND), the drain of transistor M1 is connected to the gate of M2, the drain of transistor M2 is connected to the gates of transistors M3 and M4, and the sources of transistors M3 and M4 are connected together; the drain of transistor M5 is connected to the sources of transistors M3 and M4, and the gate of transistor M5 is connected to VDD;

[0032] Meanwhile, the voltage modulator also includes a resistor R5, which is disposed between the gate and drain of the transistor M13. The increase of the resistor R5 can more quickly pull up the voltage of node V2 when the current of transistor M5 increases, thereby more efficiently coupling the output change to transistor M11 and responding to the change of output voltage more quickly, thereby reducing the transient voltage drop.

[0033] Those skilled in the art will understand that the embodiments described herein can be provided as methods, apparatus (devices), or computer program products. Therefore, this document may take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. This includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and is accessible by a computer. Furthermore, it is well known to those skilled in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

[0034] This document is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (devices), and computer program products according to embodiments herein. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0035] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0036] The embodiments and / or implementation methods described above are merely preferred embodiments and / or implementation methods for implementing the technology of the present invention, and are not intended to limit the implementation methods of the present invention in any way. Any person skilled in the art can make some modifications or alterations to other equivalent embodiments without departing from the scope of the technical means disclosed in the present invention, but these should still be considered as technologies or embodiments substantially the same as the present invention. Note that the above are merely preferred embodiments and the technical principles applied in the present invention. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A voltage modulator with reduced transient voltage droop, characterized by, Comprise: error amplifier AMP, transistor M3, transistor M4, transistor M7, transistor M11, transistor M12, transistor M14, transistor M1, transistor M2, transistor M6, transistor M8, transistor M9, transistor M10, transistor M5, transistor M13, capacitor C1, capacitor C2, capacitor C3, resistor R1, resistor R2; wherein the transistor M3, the transistor M4, the transistor M7, the transistor M11, the transistor M12, the transistor M14 constitute a flip source follower, the transistor M1, the transistor M2, the transistor M6, the transistor M8, the transistor M9, the transistor M10 constitute a bias circuit; wherein, the power input (VDD) is connected to the drain of the transistor M3 and transistor M4, the positive input of the error amplifier (AMP) is connected to the reference voltage (VREF), the negative input is connected to the feedback voltage (VFB), the output of the error amplifier (AMP) is connected to the gate of the transistor M2; the source of the transistor M1 is grounded (GND), the drain of the transistor M1 is connected to the gate of the M2, the drain of the transistor M2 is connected to the gate of the transistor M3 and the transistor M4, the source of the transistor M3 and the transistor M4 is connected together; the drain of the transistor M5 is connected to the source of the transistor M3 and the transistor M4, the gate of the transistor M5 is connected to the power input (VDD).

2. The voltage modulator with reduced transient voltage droop of claim 1, wherein, The transistor M6 and the transistor M7 constitute a current mirror, the drain of the transistor M6 is connected to the source of the transistor M2, and the drain of the transistor M7 is connected to the gate of the transistor M14.

3. The voltage modulator with reduced transient voltage droop of claim 1, wherein, The transistor M8 and the transistor M9 constitute a pull-down network, the drain of the transistor M8 is connected to the source of the transistor M6, and the drain of the transistor M9 is connected to the ground.

4. The voltage modulator with reduced transient voltage droop of claim 1, wherein, The transistor M10 and the transistor M11 constitute a current mirror, the drain of the transistor M10 is connected to the source of the transistor M8, and the drain of the transistor M11 is connected to the gate of M12.

5. The voltage modulator with reduced transient voltage droop of claim 1, wherein, The transistor M12 and M13 constitute a pull-down network, the drain of the transistor M12 is connected to the source of the transistor M10, and the drain of the transistor M13 is connected to the ground (GND).

6. The voltage modulator with reduced transient voltage droop of claim 1, wherein, The resistor R1 and the resistor R2 are connected between the output voltage (VOUT) and the feedback voltage (VFB) respectively.

7. The voltage modulator with reduced transient voltage droop of claim 1, wherein, The capacitor C1 is connected between the drain of the transistor M6 and the ground for filtering, the capacitor C2 is connected between the source of the transistor M3 and the transistor M4 and the ground for filtering, and the capacitor C3 is connected between the drain of the transistor M11 and the ground.

8. The voltage modulator with reduced transient voltage droop of claim 1, wherein, Diodes V1 are connected between the drain and the source of the transistor M5, diodes V2 are connected between the drain and the source of the transistor M12, diodes V3 are connected between the source of the transistor M11 and the drain of the transistor M12, and diodes V4 and V5 are connected between the source of the transistor M3 and the source of the transistor M4 and the ground, respectively.

9. The voltage modulator with reduced transient voltage droop according to any one of claims 1 to 7, characterized in that, The voltage modulator further comprises a resistor R5 disposed between the gate and the drain of the transistor M13.

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