Linear Hall chip suitable for three-mode keyboard and application device thereof
By designing a three-mode linear Hall chip based on sleep and wake-up pin control, the existing keyboard detection solutions have solved the shortcomings in high-speed response and low power consumption, and achieved the effects of high-speed response, low-power operation, multi-chip collaboration and synchronous wake-up, which are suitable for application scenarios such as three-mode keyboards.
Patent Information
- Application Number
- CN202510317600.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-18
- Publication Date
- 2025-04-18
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
The existing keyboard detection solutions have shortcomings in high-speed response and low power consumption, especially when connected wirelessly, which consumes a high energy consumption, which limits the battery power usage time, and there are signal conflicts and delay problems in multi-chip rank-and-sequence scanning applications, which limits the scalability and stability of matrix design.
A three-mode linear Hall chip based on sleep and wake-up pin control is designed to support operating mode, sleep mode and wake-up mode. Through different signal combinations of the sleep pin and the wake-up pin, the chip's automatic wake-up and energy consumption management are achieved, energy consumption is reduced, and external magnetic field changes are detected in the low-frequency sampling state to achieve rapid wake-up.
It realizes the advantages of high-speed response, low-power operation, multi-chip collaboration and synchronous wake-up, and is especially suitable for three-mode keyboard application scenarios that support wired, wireless and low-power standby switching.
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Figure CN119847850A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of electronic equipment, and in particular to a linear Hall chip suitable for a three-mode keyboard and an application device thereof. Background Art
[0002] In the prior art, keyboard detection solutions usually use traditional mechanical switches or simple Hall sensors. Traditional mechanical switches are limited by the life of physical contact, prone to key jitter, and cannot meet the requirements of low-latency or long-life applications; and although the existing Hall sensor solutions have achieved non-contact detection, they are mostly single-mode, unable to take into account both high-speed response and low power consumption, especially when the keyboard is wirelessly connected, the main control unit cannot be put into sleep mode, and its energy consumption is high, limiting the battery-powered use time. In addition, in multi-chip row and column scanning applications, signal conflicts and delays limit the scalability and stability of the matrix design. Summary of the invention
[0003] The present application provides a micro-power consumption control device which is designed to be able to automatically wake up from a sleep state while significantly reducing energy consumption.
[0004] The present application provides a three-mode linear Hall chip based on sleep and wake-up pin control, wherein the chip includes: Sleep pin, used to receive sleep signal; Wake-up pin, used to receive the on-off signal of the analog output control, or output the wake-up signal; The chip supports the following three modes according to different signal combinations received by the sleep pin and the wake-up pin: Working mode: The wake-up pin switches the chip between normal output and high-impedance output according to the received high level or low level; Sleep mode: The sleep pin causes the chip to enter or exit sleep mode according to the high level or low level received.
[0005] Wake-up mode: When the sleep pin puts the chip into sleep mode for more than a preset time, the chip enters a low-frequency sampling state to detect changes in the external magnetic field, and when it is detected that the external magnetic field changes exceed the set threshold, a low-level wake-up signal is output through the wake-up pin.
[0006] Optionally, in the working mode, when the sleep pin is at a low level and the wake-up pin is at a high level, the chip outputs signals normally; when the sleep pin is at a low level and the wake-up pin is at a low level, the chip stops outputting signals and outputs a high-impedance state.
[0007] Optionally, in the sleep mode, when the sleep pin is at a high level, the chip enters the sleep mode; when the sleep pin is at a low level, the chip exits the sleep mode and enters the working mode.
[0008] Optionally, the chip further includes: A sensing unit, used for detecting external magnetic field signals and converting them into electrical signals; A clock unit, connected to the sensing unit, for providing a low-frequency timing in a wake-up mode to support the detection of an external magnetic field signal; An analog switch, connected to the sensing unit and the wake-up pin, for dynamically controlling the signal output state of the chip in different modes; In the working mode, the analog switch is turned on or off according to the high or low level signal received by the wake-up pin, thereby switching the output state of the electrical signal, so that the chip switches between normal output and high-impedance output; In the wake-up mode, the chip enters a low-frequency sampling state to detect changes in external magnetic field signals, and when it is detected that the changes in the external magnetic field signals exceed a set threshold, the wake-up pin outputs a low-level wake-up signal.
[0009] Optionally, the chip further includes: A signal processing unit, connected to the sensing unit, the clock unit and the analog switch, and configured to process the electrical signal output by the sensing unit or the electrical signal under the low-frequency timing; a power management unit, connected to the sensing unit, the clock unit, and the signal processing unit, and configured to supply power to the sensing unit, the clock unit, and the signal processing unit; An open-drain output tube, with a gate connected to the output end of the signal processing unit, a source connected to the ground, and a drain connected between the analog switch and the wake-up pin; A pull-up resistor, one end of which is connected to the power supply end, and the other end of which is connected between the drain of the open-drain output tube and the wake-up pin; When the processed electrical signal is greater than a preset voltage, the open-drain output tube is turned on and grounded, so that the wake-up pin outputs a low-level wake-up signal; When the processed electrical signal is less than a preset voltage, the open-drain output tube is turned off, and the pull-up resistor switches the wake-up pin from a low level to a high level.
[0010] The present application also provides an application device, which includes: At least one linear Hall chip as described above; A main control unit, connected to each chip; The device implements the following three modes through the sleep pin and wake-up pin of the chip: High-speed mode: the main control unit is in a normal state, and the output state of the chip is adjusted by controlling the wake-up pin of the chip to receive a high-level or low-level signal, so that the device detects and responds to external input signals; When the sleep pin receives a low-level signal and the wake-up pin receives a high-level signal, the chip is in a normal output signal state, and outputs the detected external input signal to the main control unit; When the sleep pin receives a low level signal and the wake-up pin receives a low level signal, the chip stops outputting signals and outputs a high impedance state; Medium speed mode: the main control unit is in normal working state, and enters sleep mode by controlling the sleep pin of at least one target chip to be low level and the sleep pins of the other chips to be high level; Low-frequency sleep wake-up mode: The main control unit enters the sleep state, the chip switches to the low-frequency sampling state, detects changes in the external magnetic field, and when it detects that the external magnetic field changes exceed the set threshold, the chip outputs a low-level signal through the wake-up pin to wake up the main control unit from the sleep state to the working state.
[0011] Optionally, the wake-up pin of the chip supports parallel connection of multiple chips, and realizes coordinated signal output through unified wake-up pin control; when any chip detects that the external magnetic field change exceeds the set threshold, the chip outputs a low-level signal through its wake-up pin to wake up the main control unit, thereby realizing the wake-up of the device.
[0012] The linear Hall chip and its application device for a three-mode keyboard provided by the present application. Among them, the chip realizes at least three modes based on a sleep pin and a wake-up pin. In the working mode, the sleep pin remains at a low level and the chip works normally. At this time, the output state of the chip can be switched through the wake-up pin, and the external input signal can be detected in real time and the main control unit can be responded to to realize high-speed data transmission. When the wake-up pin is at a low level, the output of the chip is in a high-impedance state, and when the wake-up pin is at a high level, the output of the chip is in a normal output state. The switching time of the wake-up pin is less than 100ns, so that the high-speed response requirements are met. In the sleep mode, the chip reduces the power consumption of the application device by turning off non-essential modules. When the sleep pin is set to a high level, the chip enters the sleep mode and outputs a high-impedance state. When the sleep pin is reset to a low level, the chip resumes the working mode and can resume outputting a valid signal within 5us. In the wake-up mode, the chip detects changes in the external magnetic field under low-frequency sampling state. When the change exceeds the set threshold, a low-level signal is output through the wake-up pin to realize the rapid resumption of work of the main control unit. The present invention has the advantages of high-speed response, low-power operation, multi-chip coordination and synchronous wake-up, and is particularly suitable for a three-mode keyboard application scenario that supports wired, wireless and low-power standby switching.
[0013] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] Figure 1 Shown is a structural block diagram of a linear Hall chip suitable for a three-mode keyboard provided in this application.
[0015] Figure 2 The figure shows the level change waveform of the output, sleep pin and wake-up pin of a linear Hall chip suitable for a three-mode keyboard provided by the present application in working mode.
[0016] Figure 3 The figure shows a waveform diagram of the level changes of the output and sleep pins of a linear Hall chip suitable for a three-mode keyboard provided by the present application in sleep mode.
[0017] Figure 4 Shown is a waveform diagram of external magnetic field changes, output, sleep pin and wake-up pin level changes in a linear Hall chip suitable for a three-mode keyboard provided by the present application in wake-up mode.
[0018] Figure 5 Shown is a circuit block diagram of a linear Hall chip suitable for a three-mode keyboard provided in the present application.
[0019] Figure 6 Shown is a circuit block diagram of another linear Hall chip suitable for a three-mode keyboard provided in the present application.
[0020] Figure 7 Shown is a circuit block diagram of another linear Hall chip suitable for a three-mode keyboard provided in the present application.
[0021] Figure 8 Shown is a specific circuit diagram of a linear Hall chip suitable for a three-mode keyboard provided in this application.
[0022] Fig. 9 Shown is a structural block diagram of an application device provided by the present application.
[0023] Fig.10 The figure shows a level change waveform diagram of all sleep ports of a main control unit, a wake-up port corresponding to the target chip, and a wake-up port corresponding to the other chips in an application device provided by the present application in high-speed mode.
[0024] Fig.11 The figure shows a waveform diagram of the level changes of the sleep port outputted by the main control unit to the target chip and the sleep port outputted to the other chips in the medium-speed mode of an application device provided by the present application.
[0025] Fig.12The figure shows a waveform diagram of the level changes of the sleep port and the wake-up port of the main control unit in a low-frequency sampling wake-up mode of an application device provided by the present application. DETAILED DESCRIPTION
[0026] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices consistent with some aspects of the present application as detailed in the appended claims.
[0027] The terms used in this application are only for the purpose of describing specific embodiments and are not intended to limit this application. Unless otherwise defined, the technical terms or scientific terms used in this application should be understood by people with ordinary skills in the field to which the present invention belongs. The words "first", "second" and similar words used in the specification and claims of this application do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one" or "one" do not indicate a quantitative limit, but indicate that there is at least one. If it only refers to "one", it will be explained separately. "Multiple" or "several" means two or more. Unless otherwise specified, similar words such as "front", "rear", "lower" and / or "upper" are only for the convenience of explanation and are not limited to one position or one spatial orientation. Similar words such as "include" or "comprise" mean that the elements or objects appearing in front of "include" or "comprise" cover the elements or objects listed after "include" or "comprise" and their equivalents, and do not exclude other elements or objects. "Connected" or "connected" and similar words are not limited to physical or mechanical connections, and may include electrical connections, whether direct or indirect. The singular forms "a", "said" and "the" used in this specification and the appended claims are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more associated listed items.
[0028] like Figure 1 As shown, the present application provides a linear Hall chip suitable for a three-mode keyboard. Figure 1 As shown, the chip includes: The sleep pin SLEEP is used to receive a sleep signal; The wake-up pin AWAKE is used to receive the on-off signal of the analog output control, or output the wake-up signal; The chip supports the following three modes according to different signal combinations received by the sleep pin SLEEP and the wake-up pin AWAKE: Working mode: The wake-up pin AWAKE switches the chip between normal output and high-impedance output according to the received high level or low level; Sleep mode: The sleep pin SLEEP causes the chip to enter or exit the sleep mode according to the high level or low level sleep signal received.
[0029] Wake-up mode: When the sleep pin SLEEP continuously receives a high level, causing the chip to enter sleep mode for more than a preset time, the chip enters a low-frequency sampling state to detect changes in the external magnetic field. When it is detected that the external magnetic field changes exceed the set threshold, a low-level wake-up signal is output through the wake-up pin AWAKE.
[0030] In this embodiment, the chip implements at least three modes based on the sleep pin SLEEP and the wake-up pin AWAKE. Figure 2 As shown, in the working mode, the sleep pin SLEEP keeps a low level and the chip works normally. At this time, the output state of the chip can be switched through the wake-up pin AWAKE, and the external input signal can be detected in real time and respond to the external main control unit, such as the external MCU, to achieve high-speed data transmission. When the wake-up pin AWAKE is low, the output of the chip is in a high-impedance state. When the wake-up pin AWAKE is high, the output of the chip is in a normal output state. The switching time of the wake-up pin AWAKE is less than 100ns, thus meeting the high-speed response requirements. Figure 3 As shown in the figure, in sleep mode, the chip reduces the power consumption of the application device by shutting down non-essential modules. When the sleep pin SLEEP is set to a high level, the chip enters sleep mode and the output is in a high impedance state. When the sleep pin SLEEP is set to a low level again, the chip resumes working mode and can resume outputting valid signals within 5us. Figure 4 As shown, in the wake-up mode, the chip detects changes in the external magnetic field under low-frequency sampling. When the change exceeds the set threshold, the external main control unit quickly resumes work by multiplexing the wake-up pin AWAKE. The present invention has the advantages of high-speed response, low-power operation, multi-chip coordination and synchronous wake-up, and is particularly suitable for three-mode keyboard application scenarios that support wired, wireless and low-power standby switching.
[0031] In some embodiments, in the working mode, when the sleep pin SLEEP is at a low level and the wake-up pin AWAKE is at a high level, the chip outputs signals normally; when the sleep pin SLEEP is at a low level and the wake-up pin AWAKE is at a low level, the chip stops outputting signals and outputs a high-impedance state.
[0032] In this embodiment, when the chip is in working mode, the sleep pin SLEEP always maintains a low level. At this time, when the wake-up pin AWAKE receives an external control signal at a high level, the chip will normally output a valid signal; when the wake-up pin AWAKE receives an external control signal at a low level, the chip output is in a high impedance state and stops outputting a valid signal. Since the switching speed through the wake-up pin AWAKE is very fast, usually less than 0.1us, it is very suitable for analog high-speed bus applications with multiple chips output in parallel. In addition, the chip can enter a low-power mode when it does not need to work, effectively reducing energy consumption.
[0033] In some embodiments, in the sleep mode, when the sleep pin SLEEP is at a high level, the chip enters the sleep mode; when the sleep pin SLEEP is at a low level, the chip exits the sleep mode and enters the working mode.
[0034] In this embodiment, in order to reduce power consumption, by setting the sleep mode, the sleep pin SLEEP can be used to switch the chip between sleep mode and working mode, ensuring that the average current consumption is kept at a low level to reduce the system-level power consumption target. When the sleep pin SLEEP is set to a high level, its operating current can be as low as 1.5uA, and when the sleep pin SLEEP is set to a low level, the chip can exit the sleep mode, and the chip output can achieve a fast response to the external magnetic field within 5us. In this embodiment, by setting the high and low levels of the sleep pin SLEEP to achieve the switching of the chip sleep mode and working mode, the average power consumption of the system can be minimized.
[0035] In some embodiments, Figure 5 As shown, the chip also includes: The sensing unit 4 is used to detect the external magnetic field signal and convert it into an electrical signal; A clock unit 5, connected to the sensing unit 4, for providing a low-frequency timing in a wake-up mode to support the detection of an external magnetic field signal; An analog switch 6, connected to the sensing unit 4 and the wake-up pin AWAKE, is used to dynamically control the signal output state of the chip in different modes; In the working mode, the analog switch 6 is turned on or off according to the high or low level signal received by the wake-up pin AWAKE, thereby switching the output state of the electrical signal, so that the chip switches between normal output and high impedance output; In the wake-up mode, the chip enters a low-frequency sampling state to detect changes in external magnetic field signals, and when it is detected that the changes in the external magnetic field signals exceed a set threshold, the wake-up pin AWAKE outputs a low-level wake-up signal.
[0036] In this embodiment, in the working mode, the external magnetic field signal is sensed and detected by the sensing unit 4, and converted into an electrical signal output accordingly, and the wake-up pin AWAKE turns on or off the analog switch 6 according to the received high and low level signals. Specifically, when the wake-up pin AWAKE receives a high level, the analog switch 6 is turned on, thereby transmitting the electrical signal output by the sensing unit 4, so that the chip outputs normally. When the wake-up pin AWAKE receives a low level, the analog switch 6 is turned off, thereby blocking the sensing unit 4 from outputting the electrical signal, so that the chip outputs in a high impedance state.
[0037] In the wake-up mode, the chip detects changes in the external magnetic field signal in a low-frequency sampling state. When the external magnetic field signal changes, the wake-up pin AWAKE outputs a low-level wake-up signal, thereby waking up the external master control.
[0038] In this embodiment, through the cooperation of the sensing unit 4, the clock unit 5 and the analog switch 6, the chip can switch between normal output and high-impedance output, so that the chip can output in a low-power state, effectively reducing the average power consumption of the chip, and also realizing the wake-up of the external master control.
[0039] like Figure 6 As shown, in some embodiments, the chip further includes: A signal processing unit 7, connected to the sensing unit 4, the clock unit 5 and the analog switch 6, for processing the electrical signal output by the sensing unit 4 or processing the electrical signal under the low-frequency timing; A power management unit 8, connected to the sensing unit 4, the clock unit 5, and the signal processing unit 7, and used to supply power to the sensing unit 4, the clock unit 5, and the signal processing unit 7; An open-drain output tube 9, with a gate connected to the output end of the signal processing unit 7, a source connected to the ground, and a drain connected between the analog switch 6 and the wake-up pin AWAKE; A pull-up resistor 10, one end of which is connected to the power supply end, and the other end of which is connected between the drain of the open-drain output tube 9 and the wake-up pin AWAKE; When the processed electrical signal is greater than a preset voltage, the open-drain output tube 9 is turned on and grounded, so that the wake-up pin AWAKE outputs a low-level wake-up signal; When the processed electrical signal is less than a preset voltage, the open-drain output tube 9 is turned off, and the pull-up resistor switches the wake-up pin AWAKE from a low level to a high level.
[0040] In this embodiment, the signal processing unit 7 performs different processing operations in different modes. When in the working mode, the signal processing unit 7 is used to amplify the electrical signal output by the sensing unit 4.
[0041] When in the wake-up mode, the signal processing unit is first used to amplify the electrical signal output by the sensing unit 4 at a low frequency timing, and further compares the electrical signal with a preset voltage, so as to control the subsequent open-drain output tube 9 to be turned on or off according to the comparison result.
[0042] Further, when the comparison result is that the electrical signal is greater than the preset voltage, it indicates that the external magnetic field signal has changed, so that the open-drain output tube 9 is turned on and connected to the ground potential, so that the wake-up pin AWAKE outputs a low-level wake-up signal. When the comparison result is that the electrical signal is less than the preset voltage, it indicates that the external magnetic field signal has not changed, so that the open-drain output tube 9 is turned off. At this time, the output of the open-drain output tube 9 is in a high-impedance state, and under the action of the pull-up resistor 10, the wake-up pin AWAKE is maintained at a high level. In this way, through the cooperation of the open-drain output tube 9 and the pull-up resistor 10, the wake-up pin AWAKE can switch between high and low level outputs and realize the line-and function.
[0043] like Figure 7 As shown, in some embodiments, the signal processing unit 7 may further include a signal analog amplification unit 70 and a signal amplification comparison unit 71. The signal analog amplification unit is connected between the sensing unit and the analog switch to amplify the electrical signal. The signal amplification comparison unit is connected to the sensing unit, the clock unit and the wake-up pin to amplify the electrical signal under the low-frequency timing, and compare the amplified electrical signal under the low-frequency timing with a preset voltage. When the electrical signal is greater than the preset voltage, the wake-up pin outputs a low-level wake-up signal, or, when the electrical signal is less than the preset voltage, the wake-up pin outputs a high level to trigger the analog switch to turn on, so that the chip can output normally under the low-frequency timing.
[0044] like Figure 8 As shown, in some embodiments, the signal analog amplification unit 70 includes an offset compensator 700, a first amplifier A1 and a second amplifier A2. The input end of the offset compensator is connected to the output end of the sensing unit. The positive phase input end and the negative phase input end of the first amplifier are both connected to the output end of the offset compensator. The positive phase input end of the second amplifier is connected to the output end of the first amplifier, the negative phase input end of the second amplifier is short-circuited with its output end, and its output end is connected to the analog switch.
[0045] In some embodiments, the signal amplification and comparison unit 71 includes a third amplifier A3, a comparator 711 and a latch 712. Among them, the positive input terminal and the negative input terminal of the third amplifier A3 are both connected to the output terminal of the sensing unit and the clock unit. The positive input terminal and the negative input terminal of the comparator are correspondingly connected to the positive input terminal and the negative input terminal of the third amplifier A3, and the clock unit. The input terminal of the latch is connected to the output terminal of the comparator and the clock unit, and the output terminal of the latch is connected to the gate of the open-drain output tube 9.
[0046] The present invention also provides an application device 1, such as Fig. 9 As shown, the application device 1 includes at least one linear Hall chip 2. Each linear Hall chip 2 includes a sleep pin SLEEP and an awake pin AWAKE. The sleep pin SLEEP is used to receive a sleep signal; the awake pin AWAKE is used to receive a control on / off signal, or output an awake signal; The main control unit 3 is connected to each linear Hall chip 2, and includes a sleep port SLEEP', an awakening port AWAKE' and a sampling port 30. The sleep port SLEEP' is connected to the sleep pin SLEEP, the awakening port AWAKE' is connected to the awakening pin AWAKE, and the sampling port 30 is connected to the output terminal VOUT of the linear Hall chip 2.
[0047] The device 1 realizes the following three modes through the sleep pin SLEEP and the wake-up pin AWAKE of the chip 2: High-speed mode: the main control unit 3 is in a normal state, and the output state of the chip is adjusted by controlling the wake-up pin AWAKE of the linear Hall chip 2 to receive a high level or a low level, so that the application device detects and responds to external input signals; When the sleep pin SLEEP receives a low-level signal and the wake-up pin AWAKE receives a high-level signal, the chip is in a normal output state and outputs the detected external input signal to the main control unit; when the sleep pin SLEEP receives a low-level signal and the wake-up pin AWAKE receives a low-level signal, the chip outputs a high-impedance state and stops outputting signals; Medium speed mode: the main control unit is in normal working state, and enters sleep mode by controlling the sleep pin SLEEP of at least one target linear Hall chip to be low level and the sleep pins SLEEP of other chips to be high level; Low-frequency sampling wake-up mode: The main control unit enters the sleep state, and the linear Hall chip switches to the low-frequency sampling state to detect changes in the external magnetic field. When the external magnetic field change is detected to exceed the set threshold, the chip outputs a low-level signal through the wake-up pin AWAKE to wake up the main control unit from the sleep state to the working state.
[0048] The application device of the present invention is not limited to the three-mode keyboard, but covers a wide range of device types, including but not limited to game console handles, joysticks and other application devices. This diverse application range enables the control device to adapt to different usage scenarios and meet the needs of various users for low power consumption and fast response.
[0049] Specifically, the application device includes at least one linear Hall chip and a main control unit. The main control unit is connected to each linear Hall chip. The application device realizes the high-speed mode, medium-speed mode and low-frequency sampling wake-up mode of the device through the sleep pin SLEEP and wake-up pin AWAKE of the chip. Among them, Fig.10 As shown, in high-speed mode, the sleep port SLEEP` output of the main control unit 3 remains at a low level, and all chips are in normal working state. The main control unit 3 controls the output of each chip through the wake-up port AWAKE` control. When it is necessary to collect data from the target chip, the main control unit 3 outputs a high level to the wake-up pin AWAKE of the corresponding target chip, and the wake-up pin AWAKE outputs of the remaining chips remain at a low level. Since the wake-up pin AWAKE of the chip can directly switch the corresponding output of the chip, sampling can be performed without waiting after scanning and switching, and high-speed data collection can be achieved. This mode is used in wired mode, such as when the user is playing games.
[0050] like Fig.11 As shown, in the medium-speed mode, the main control unit 3 controls the output state of each chip by controlling the sleep pin SLEEP of the chip. When the data of the target chip needs to be collected, the sleep pin SLEEP of the target chip is low, and the sleep pins SLEEP of the other chips are high. The data collection of all chips can be completed by switching in sequence. Compared with the above-mentioned high-speed mode, this mode has a lower response speed, but the power consumption is significantly reduced, and it is more suitable for wireless mode, such as when the user is in office.
[0051] like Fig.12 As shown, in the low-frequency sampling wake-up mode, before the system enters the low-power mode, the sleep port SLEEP` of the main control unit 3 is set to a high-level output, and the wake-up port AWAKE` is set to an interrupt wake-up input. At this time, all chips enter the low-frequency signal acquisition mode, and all chips will detect the change of the external magnetic field once at an interval of 12.5ms. If any chip detects that the change in the external magnetic field is greater than the set threshold, the chip will change the output of the wake-up pin AWAKE from a high level to a low level, so that after the main control chip 3 receives the wake-up signal output by the chip, the system resumes work. Compared with the above-mentioned medium-speed mode, this mode has a lower response speed, but the power consumption is significantly reduced, which effectively reduces the power consumption of the device and ensures that the device can be quickly awakened when necessary.
[0052] It should be noted that the interval time and the set threshold in this embodiment can be programmable according to actual applications.
[0053] In some embodiments, the wake-up pins of multiple linear Hall chips support parallel connection, and are controlled by a unified wake-up pin AWAKE to achieve coordinated signal output; when any linear Hall chip detects that the external magnetic field change exceeds a set threshold, the chip outputs a low-level signal through its wake-up pin AWAKE to wake up the main control unit, thereby waking up the device.
[0054] In this embodiment, by connecting the wake-up pins AWAKE of multiple linear Hall chips in parallel, multiple linear Hall chips can achieve coordinated signal output. When any chip detects that the external magnetic field changes beyond the set threshold, the chip outputs a low-level signal through its wake-up pin AWAKE to wake up the main control unit, thereby waking up the device. In this way, the system's rapid response and collaborative working capabilities in a multi-chip environment are ensured, which is particularly suitable for application scenarios that require multi-point, high-precision magnetic field detection.
[0055] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.
Claims
1. A linear Hall chip suitable for a three-mode keyboard, characterized in that: The chip comprises: Sleep pin, used to receive sleep signal; Wake-up pin, used to receive the on-off signal of the analog output control, or output the wake-up signal; The chip supports the following three modes according to different signal combinations received by the sleep pin and the wake-up pin: Working mode: The wake-up pin switches the chip between normal output and high-impedance output according to the received high level or low level; Sleep mode: The sleep pin causes the chip to enter or exit sleep mode according to the high level or low level received; Wake-up mode: When the sleep pin puts the chip into sleep mode for more than a preset time, the chip enters a low-frequency sampling state to detect changes in the external magnetic field, and when it is detected that the external magnetic field changes exceed the set threshold, a low-level wake-up signal is output through the wake-up pin.
2. The chip according to claim 1, characterized in that: In the working mode, when the sleep pin is at a low level and the wake-up pin is at a high level, the chip outputs signals normally; when the sleep pin is at a low level and the wake-up pin is at a low level, the chip stops outputting signals and outputs a high-impedance state.
3. The chip according to claim 1, characterized in that: In the sleep mode, when the sleep pin is at a high level, the chip enters the sleep mode; when the sleep pin is at a low level, the chip exits the sleep mode and enters the working mode.
4. The chip according to claim 1, characterized in that: The chip further comprises: A sensing unit, used for detecting external magnetic field signals and converting them into electrical signals; A clock unit, connected to the sensing unit, for providing a low-frequency timing in a wake-up mode to support the detection of an external magnetic field signal; An analog switch, connected to the sensing unit and the wake-up pin, for dynamically controlling the signal output state of the chip in different modes; In the working mode, the analog switch is turned on or off according to the high or low level signal received by the wake-up pin, thereby switching the output state of the electrical signal, so that the chip switches between normal output and high-impedance output; In the wake-up mode, the chip enters a low-frequency sampling state to detect changes in external magnetic field signals, and when it is detected that the changes in the external magnetic field signals exceed a set threshold, the wake-up pin outputs a low-level wake-up signal.
5. The chip according to claim 4, characterized in that: The chip further comprises: A signal processing unit, connected to the sensing unit, the clock unit and the analog switch, and configured to process the electrical signal output by the sensing unit or the electrical signal under the low-frequency timing; a power management unit, connected to the sensing unit, the clock unit, and the signal processing unit, and configured to supply power to the sensing unit, the clock unit, and the signal processing unit; An open-drain output tube, with a gate connected to the output end of the signal processing unit, a source connected to the ground, and a drain connected between the analog switch and the wake-up pin; A pull-up resistor, one end of which is connected to the power supply end, and the other end of which is connected between the drain of the open-drain output tube and the wake-up pin; When the processed electrical signal is greater than a preset voltage, the open-drain output tube is turned on and grounded, so that the wake-up pin outputs a low-level wake-up signal; When the processed electrical signal is less than a preset voltage, the open-drain output tube is turned off, and the pull-up resistor switches the wake-up pin from a low level to a high level.
6. An application device, characterized in that: include: At least one linear Hall chip as described in any one of claims 1 to 5; A main control unit, connected to each chip; The device implements the following three modes through the sleep pin and wake-up pin of the chip: High-speed mode: the main control unit is in a normal state, and the output state of the chip is adjusted by controlling the wake-up pin of the chip to receive a high-level or low-level signal, so that the device detects and responds to external input signals; When the sleep pin receives a low-level signal and the wake-up pin receives a high-level signal, the chip is in a normal output signal state, and outputs the detected external input signal to the main control unit; When the sleep pin receives a low level signal and the wake-up pin receives a low level signal, the chip stops outputting signals and outputs a high impedance state; Medium speed mode: the main control unit is in normal working state, and enters sleep mode by controlling the sleep pin of at least one target chip to be low level and the sleep pins of the other chips to be high level; Low-frequency sleep wake-up mode: The main control unit enters the sleep state, the chip switches to the low-frequency sampling state, detects changes in the external magnetic field, and when it detects that the external magnetic field changes exceed the set threshold, the chip outputs a low-level signal through the wake-up pin to wake up the main control unit from the sleep state to the working state.
7. The device according to claim 6, characterized in that The wake-up pin of the chip supports parallel connection of multiple chips, and realizes coordinated signal output through unified wake-up pin control; when any chip detects that the external magnetic field change exceeds the set threshold, the chip outputs a low-level signal through its wake-up pin to wake up the main control unit, thereby realizing the wake-up of the device.
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