Host Expansion Method, Device, Equipment and Storage Medium Based on RS485 Bus

Abstract

The present application relates to the technical field of host expansion, and discloses a host expansion method, device, equipment and storage medium based on the RS485 bus. The method includes: performing parameter configuration on the RS485 bus host interface to obtain an independently configured RS485 host interface group; constructing a 5-level data stack structure for the RS485 host interface group to obtain a host data frame management unit; performing host interaction task processing on the host data frame management unit and storing the host data frame into the corresponding data frame buffer area; performing scheduling task processing on the host data frame in the host data frame management unit to obtain a data forwarding result; performing task scheduling timing processing based on the data forwarding result to obtain a task scheduling sequence; inputting the task scheduling sequence into the human-computer interaction task module for status monitoring to obtain a system operation status record, thereby enabling multiple host devices to simultaneously monitor and control slave devices, and improving the accuracy and reliability of data transmission.

Description

Technical Field

[0001] This application relates to the technical field of host expansion, and in particular, to a host expansion method, device, equipment and storage medium based on the RS485 bus. Background Art

[0002] The RS485 bus is widely used in various control systems due to its strong anti-interference ability and long transmission distance. Traditional RS485 bus communication adopts the master-slave mode, where one host controls multiple slave devices, and this mode operates well in simple control systems. However, with the expansion of the system scale and the increase of control requirements, the processing capacity of a single host gradually fails to meet the needs of complex control systems.

[0003] In the current RS485 bus network, multiple host devices cannot be simultaneously connected to the same bus for communication, which limits the scalability and flexibility of the system. In practical applications, it is often necessary for multiple controllers to monitor and control different slave devices simultaneously, while the traditional single-host mode is difficult to achieve such complex control requirements. In addition, the processing capacity of a single host is limited, and when a large amount of data interaction needs to be processed, communication delays and data loss are likely to occur. Summary of the Invention

[0004] This application provides a host expansion method, device, equipment and storage medium based on the RS485 bus, thereby enabling multiple host devices to simultaneously monitor and control slave devices, and improving the accuracy and reliability of data transmission.

[0005] In the first aspect of this application, a host expansion method based on the RS485 bus is provided. The host expansion method based on the RS485 bus includes:

[0006] Configure parameters for the RS485 bus host interface to obtain an independently configured RS485 host interface group, where the RS485 host interface group includes baud rate parameters, data bit parameters, stop bit parameters, and parity bit parameters;

[0007] Construct a 5-level data stack structure for the RS485 host interface group. Each level of the data stack includes a data frame buffer, a data frame length counter, and a data frame status register to obtain a host data frame management unit;

[0008] Perform host interaction task processing on the host data frame management unit. Obtain the host data frame by monitoring the receive flag of the RS485 bus host interface, and store the host data frame in the corresponding data frame buffer;

[0009] Perform scheduling task processing on the host data frames in the host data frame management unit, and when the RS485 slave bus is idle, send the data frames to be sent to the target slave through the RS485 slave interface to obtain a data forwarding result;

[0010] Based on the data forwarding result, perform task scheduling timing processing, allocate a fixed time slice for each host interaction task, set the data transmission time and task priority, and obtain a task scheduling sequence;

[0011] Input the task scheduling sequence into the human-computer interaction task module for status monitoring, record the number of online hosts, the data stack usage rate, and the data transmission success rate, and obtain a system operation status record.

[0012] The second aspect of this application provides a host expansion device based on the RS485 bus. The host expansion device based on the RS485 bus includes:

[0013] A parameter configuration module for configuring parameters of the RS485 bus host interface to obtain an independently configured RS485 host interface group, where the RS485 host interface group includes baud rate parameters, data bit parameters, stop bit parameters, and parity bit parameters;

[0014] A construction module for constructing a 5-level data stack structure for the RS485 host interface group. Each level of the data stack includes a data frame buffer, a data frame length counter, and a data frame status register, and obtains a host data frame management unit;

[0015] An interaction task processing module for performing host interaction task processing on the host data frame management unit, obtaining host data frames by monitoring the receive flag of the RS485 bus host interface, and storing the host data frames in the corresponding data frame buffer;

[0016] A scheduling task processing module for performing scheduling task processing on the host data frames in the host data frame management unit, and when the RS485 slave bus is idle, sending the data frames to be sent to the target slave through the RS485 slave interface to obtain a data forwarding result;

[0017] A scheduling timing processing module for performing task scheduling timing processing based on the data forwarding result, allocating a fixed time slice for each host interaction task, setting the data transmission time and task priority, and obtaining a task scheduling sequence;

[0018] A status monitoring module for inputting the task scheduling sequence into the human-computer interaction task module for status monitoring, recording the number of online hosts, the data stack usage rate, and the data transmission success rate, and obtaining a system operation status record.

[0019] A third aspect of the present application provides an electronic device, including: a memory and at least one processor, wherein instructions are stored in the memory; the at least one processor calls the instructions in the memory to enable the electronic device to execute the above-mentioned host expansion method based on the RS485 bus.

[0020] A fourth aspect of the present application provides a computer-readable storage medium, in which instructions are stored. When the instructions run on a computer, the computer is enabled to execute the above-mentioned host expansion method based on the RS485 bus.

[0021] Compared with the prior art, the present application has the following beneficial effects: It realizes the function of a single RS485 bus network supporting multi-host access, significantly improves the scalability and flexibility of the system, and enables multiple host devices to monitor and control slave devices simultaneously. Through the design of a 5-level data stack structure, an independent data cache space is provided for each host interface, effectively avoiding data congestion and loss problems and improving the reliability of data interaction. By adopting a time-slot-based task scheduling mechanism, the communication resources of the host are reasonably allocated to ensure the real-time performance and fairness of multi-host data interaction. A complete data verification and protection mechanism is designed, including functions such as data frame integrity detection, check code comparison, and overflow protection, significantly improving the accuracy and reliability of data transmission. It realizes a flexible parameter configuration function, supports independent configuration of communication parameters for each RS485 interface, and meets the communication requirements of different application scenarios. It provides a comprehensive status monitoring function, real-time monitors the system operation status, including indicators such as host online status, data stack usage, and transmission success rate, facilitating system maintenance and fault diagnosis. Description of the Drawings

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained according to these drawings.

[0023] The structures, ratios, sizes, etc. shown in the drawings of this specification are only used to cooperate with the content disclosed in the specification for those who are familiar with this technology to understand and read, and are not used to limit the limited conditions under which the present invention can be implemented. Therefore, they do not have technical essential significance. Any modification of the structure, change of the proportional relationship, or adjustment of the size, without affecting the effects that the present invention can produce and the purposes that can be achieved, should still fall within the scope that can be covered by the technical content disclosed by the present invention.

[0024] Figure 1It is a schematic flowchart of a host expansion method based on the RS485 bus provided by an embodiment of the present invention;

[0025] Figure 2 It is a schematic block diagram of the structure of a host expansion device based on the RS485 bus provided by an embodiment of the present invention;

[0026] Figure 3 It is a schematic block diagram of the structure of an electronic device provided by an embodiment of the present invention. Detailed implementation manners

[0027] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0028] The flowchart shown in the accompanying drawings is only an example illustration, and does not necessarily include all contents and operations / steps, nor does it necessarily need to be executed in the described order. For example, some operations / steps can also be decomposed, combined, or partially merged, so the actual execution order may be changed according to the actual situation.

[0029] It should also be understood that the terms used in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. As used in the specification of this application and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an", and "the" are intended to include the plural forms.

[0030] It should be further understood that the term " / and" as used in the specification of this application and the appended claims refers to any combination and all possible combinations of one or more of the related listed items, and includes these combinations. Please refer to Figure 1 , an embodiment of the host expansion method based on the RS485 bus in the embodiments of this application includes:

[0031] Step 100: Configure parameters for the RS485 bus host interface to obtain an independently configured RS485 host interface group, and the RS485 host interface group includes baud rate parameters, data bit parameters, stop bit parameters, and parity bit parameters;

[0032] It can be understood that the execution subject of this application can be a host expansion device based on the RS485 bus, or a terminal or a server, and specific limitations are not made here. In this embodiment of the application, the server is used as the execution subject for illustration.

[0033] Specifically, connect the UART port of the single-chip microcomputer to the relevant pins of the RS485 transceiver to achieve data transmission, reception, and direction control. Connect the TX pin of the single-chip microcomputer's UART port to the DI pin of the RS485 transceiver to form a data transmission channel. At the same time, connect the RX pin of the UART port to the RO pin of the RS485 transceiver to form a data reception channel. To achieve the control of the data transmission direction of the RS485 bus, connect a GPIO control pin of the single-chip microcomputer to the DE and RE pins of the RS485 transceiver, and control the data transmission and reception directions through logical high and low levels. After the hardware connection is completed, configure the communication parameters to form an independent RS485 host interface group. Set the baud rate parameter of the transmission channel and configure it within the range of 1200bps to 115200bps. By selecting an appropriate baud rate value, meet the communication rate requirements of specific application scenarios. This step is achieved through the UART baud rate register of the single-chip microcomputer. Configure the data bit parameter of the reception channel and set it to a fixed 8 bits. This configuration is completed through the UART configuration register of the single-chip microcomputer, which is used to define the effective bit length of each frame of data to ensure the consistency of the data format between the host and the slave. Set the stop bit parameter of the reception channel and configure the stop bit to 1 bit or 2 bits according to the actual communication requirements. The setting of this parameter is also achieved through the UART configuration register of the single-chip microcomputer, which is used to define the end identification length of each frame of data and provide synchronization support for the receiving device. At the same time, select an appropriate parity mode for the reception channel to improve the reliability of data communication. In scenarios without special parity requirements, set the parity mode to the no-parity mode; while in scenarios with higher requirements for communication error detection, select the odd parity or even parity mode. The specific configuration of the parity mode is completed through the parity bit register of the UART module of the single-chip microcomputer, aiming to perform parity calculation on the received data, thereby providing error detection capabilities during the communication process. Write the baud rate configuration data, data bit configuration data, stop bit configuration data, and parity bit configuration data into the non-volatile memory of the single-chip microcomputer to ensure the persistence and reusability of the parameters. By writing the above configuration parameters into the non-volatile memory of the single-chip microcomputer, such as EEPROM or Flash memory, directly load these configurations during system power-on initialization, avoiding the problem of reconfiguration required each time the system starts, thereby significantly improving the startup efficiency and stability of the system. The writing process calls the memory writing interface of the single-chip microcomputer, stores the configuration data in the specified storage unit through a specific command sequence, and performs data verification after writing to ensure that the stored data is consistent with the original configuration. Through the above steps, an independently configured RS485 host interface group is obtained.

[0034] Step 200: Construct a 5-level data stack structure for the RS485 host interface group. Each level of the data stack includes a data frame buffer, a data frame length counter, and a data frame status register, thus obtaining a host data frame management unit;

[0035] Specifically, configure the data communication format of the RS485 host interface group. By defining the start bit, data bits, parity bit, and stop bit of the data frame, the communication format of the data frame is standardized. During this process, standardize the parameters according to the actual application requirements. For example, select a fixed start bit length, 8 data bits, 1 or 2 stop bits, and no parity, odd parity, or even parity to ensure that the data frame transmitted between the host and the slave can be correctly parsed. Perform storage allocation on the single-chip microcomputer RAM space. By reasonably planning the memory resources of the single-chip microcomputer, allocate a fixed storage space of 256 bytes for each data stack to construct a data frame storage area. The purpose of the allocation is to provide sufficient and independent storage resources for each level of the data stack, avoid resource competition between different data frames, and ensure the stability and efficiency of memory utilization. Partition the data frame storage area into 5 levels and construct 5 independent data frame buffers according to the first-in, first-out principle to form a cache structure with distinct levels and orderly operations. At the same time, to facilitate the efficient management of the 5-level data cache area, set read and write pointers for it. By setting the read pointer to indicate the data read position and the write pointer to indicate the data write position, precise positioning and operation of the data in the cache area are achieved. The pointer mechanism ensures that the access of data frames in the stack follows the strict first-in, first-out rule, avoiding data disorder and conflict problems. Count the length of the data frame pointed to by the data access pointer to record the actual number of bytes of each data frame. By introducing a data frame length counter, the value of the counter directly reflects the size of the data frame. Mark the status of the data frame corresponding to the data frame length counter. Configure a status register for each data frame, and the content of the register includes information such as whether the data frame has been received completely, whether it has been processed, and whether it needs to be forwarded, etc., to achieve comprehensive monitoring of the data frame life cycle. To enhance the robustness of the 5-level data cache area, design an overflow protection mechanism for it. By setting the upper overflow protection value and lower overflow protection value of the cache area, effectively prevent system anomalies caused by too much or too little data. For example, when the data in the cache area exceeds its allocated storage range, the upper overflow protection mechanism will trigger corresponding alarms or discard the redundant data; when the data in the cache area is too little, the lower overflow protection mechanism alleviates the problem by pausing the current task or requesting more data. Through the overflow protection mechanism, the stability and fault tolerance of the cache area are significantly enhanced. Integrate the overflow protection mechanism into the 5-level data cache area and combine it with the data frame length counter and the data frame status register to form a host data frame management unit with perfect functions and reasonable structure.

[0036] Step 300: Perform host interaction tasks on the host data frame management unit. Obtain the host data frame by monitoring the reception flag of the RS485 bus host interface, and store the host data frame in the corresponding data frame buffer area;

[0037] It should be noted that through the external interrupt or polling mechanism of the single-chip microcomputer or controller, the data reception flag of the RS485 bus host interface is monitored in real time. By detecting the reception flag bit, it is judged whether there is new data from the host, so as to determine the host communication status. In this process, combining the start flag bit and the end flag bit of data reception, data integrity detection is carried out to ensure that the received data frame is complete. If the received flag bit does not indicate that the data frame is complete, the incomplete data is discarded and waiting for a new data frame to arrive continues. Through this mechanism, invalid data caused by interference or errors is effectively filtered out. After successfully receiving a complete data frame, the host received data is verified. Based on the check bit parameters in the communication protocol, the check code of the received data frame is calculated and compared with the check code attached during the transmission process to judge the correctness of the data frame. According to the preset verification rules, such as odd parity or even parity, the corresponding check code is generated and then compared with the check field in the received data frame. If the verification passes, the data frame is marked as valid data; if the verification fails, the data frame needs to be marked as invalid, and it is decided whether to record an error log or trigger an error handling process according to the application scenario. For the data frame marked as valid, it is stored in the 5-level data buffer area of the host data frame management unit. By allocating a storage location pointer, a buffer storage location is allocated for the valid data frame. This storage location pointer points to a specific location in the 5-level data buffer area to ensure that each data frame can find a unique storage area in the buffer. When allocating the storage location, the buffer is managed according to the first-in, first-out principle, so that the earliest entered frame is processed first, avoiding data accumulation or delay. The valid data frame is written into the buffer pointed to by the storage location pointer, and at the same time, the write pointer position is updated to prepare for the storage of the next frame of data. While storing the data frame, the data frames in the buffer are counted, and the total number of data frames currently stored and the length of each data frame are recorded. The data frame counting is achieved by adding a counter, which increases with the writing of each frame of data, and at the same time records the single-frame length for subsequent analysis and processing. The data of the counter provides real-time feedback on the communication volume for the system, which helps to evaluate the usage of the bus and the system load status. These statistical data are combined with the specific data frames stored in the buffer and encapsulated according to the preset data structure to generate a complete host data frame. The encapsulated host data frame contains the content, length, count, and related flag information of the data frame, forming a standardized structure. The encapsulated host data frame is stored in the corresponding data frame buffer area.

[0038] Step 400: Perform scheduling task processing on the host data frames in the host data frame management unit, and when the RS485 slave bus is idle, send the data frames to be sent to the target slave through the RS485 slave interface to obtain a data forwarding result;

[0039] Specifically, periodically scan the data frame buffer in the host data frame management unit to check the data storage status at different levels in the buffer. By scanning the status registers of each level of the buffer, the marks in the status registers can indicate whether there are unprocessed data frames currently, the priority of the data frames, and whether the data frames have been assigned as send tasks. Through scanning, the storage status of the current buffer is obtained, thereby generating a buffer scan result. Based on the buffer scan result, prioritize the data frames in the buffer. The basis for sorting is the mark information in the data frame status register, including the urgency of the task, the order of data frame reception, and whether there is a retransmission requirement, etc. Through these mark information, an ordered data processing queue is constructed, and the data frames with higher priority will be sent first. Validate the effectiveness of the data frames in the data processing queue. By checking the integrity and check status of the data frames again, the invalid data frames caused by interference or other reasons are filtered out. The integrity check is based on the head and tail identifiers of the data frame, and the check status is determined by recalculating the checksum of the data frame and comparing it with the original checksum. Mark the data frames that pass the verification as data frames to be sent. Detect the status of the slave bus for the data frames to be sent to determine whether the RS485 slave bus is idle. The bus status detection depends on the bus control signal or the status register of the transceiver. If the bus is busy, the system will suspend the send task temporarily and wait for the next detection. When the bus status mark shows idle, the system immediately starts the send operation and sends the data frames to be sent to the target slave through the RS485 slave interface. During the data sending process, a data sending record is generated simultaneously, including information such as the send time, target address, and data frame content. After successfully sending the data frame, monitor the response data frame of the slave in real time. This operation captures the response by listening to the data returned by the slave and saves the captured response data frame as the slave response data. The slave response data includes the confirmation information, error information, or other application layer feedback of the target slave. After receiving the slave response data, the system performs address resolution on it and determines the corresponding target host according to the address information carried in the data frame. The extraction of the target address information depends on the parsing of the response data frame format, including the source address, target address, and other identification fields, so as to ensure the accuracy of the forwarding path. Forward the slave response data to the data frame buffer of the corresponding host based on the target address information. After completing the forwarding operation, encapsulate the result of the entire process as a data forwarding result and record the detailed information of each step in the communication.

[0040] Step 500: Perform task scheduling timing processing based on the data forwarding result, allocate a fixed time slice for each host interaction task, set the data transmission time and task priority, and obtain the task scheduling sequence;

[0041] Specifically, analyze each data frame in the data forwarding result, determine the amount of communication resources it occupies by calculating the transmission time of the data frame. According to the length of the data frame and the communication rate of the RS485 bus, obtain the transmission period of a single frame. The calculation formula for the transmission period is that the transmission time is equal to the data frame length multiplied by the transmission time per bit, where the transmission time per bit is determined by the reciprocal of the bus baud rate. Divide the data transmission period into time slices according to the number of hosts, allocate a fixed time period for each host interaction task, and form a time slice allocation table. The core principle of time slice allocation is to ensure that the communication tasks of the host are completed within the specified time, and at the same time, try to avoid the overlap or waste of time slices. To achieve this goal, divide the transmission period into multiple small time slices and allocate them to different tasks according to the importance of the host tasks and the amount of resources required, so that each task has a clear execution window. Set the priority for the tasks in the time slice allocation table to optimize the execution order of the tasks. The basis for priority setting is mainly the urgency of data transmission and the importance of the tasks. For example, tasks with high real-time requirements will be given higher priorities, while ordinary tasks will be executed later. By comprehensively evaluating the urgency of the tasks, generate a task priority table and input it into the scheduling control unit. In the scheduling control unit, allocate the execution time of the tasks in the order of priority to generate an ordered task execution sequence. Set a timeout threshold for the task execution sequence to ensure that the execution time of the tasks does not exceed the expected range. The setting of the timeout threshold is based on the data transmission period and the importance of the tasks, including setting the maximum execution time for each task. Through this step, effectively avoid the overall timing disorder caused by a certain task taking too long to execute. The application of task timeout parameters runs through the task execution process. The system will record the start time and end time of each task in real time and save this information as a task execution record, including the actual running time, execution result, and whether a timeout occurs for the task. Perform time analysis on the task execution record to calculate the deviation between the actual execution time and the preset time. Through statistical analysis of the deviation data, obtain the timing adjustment value. The timing adjustment value reflects potential problems existing in the task scheduling process, such as insufficient time slice allocation, unreasonable priority setting, or some tasks taking too long to execute. Based on the timing adjustment value, perform dynamic optimization on the task scheduling, update the time slice allocation table and task priority setting, and generate an optimized task scheduling sequence.

[0042] Step 600: Input the task scheduling sequence into the human-computer interaction task module for status monitoring, record the number of online hosts, data stack usage rate, and data transmission success rate, and obtain the system operation status record.

[0043] Specifically, by detecting the host communication status in the task scheduling sequence, the response situation of each host is counted to obtain the host online record. According to the time slice and data interaction task assigned to each host in the task scheduling sequence, it is monitored in real time whether the host responds as expected. For the host that does not return a response within the set time slice, it is recorded as a response timeout status, and it is further determined whether the host is in an offline state according to the number of response timeouts or the duration. Through this step, dynamic statistical data of the number of online hosts is obtained, and the online situation of the hosts in the current system is intuitively reflected. The capacity of the 5-level data buffer in the host data frame management unit is counted. By calculating the ratio of the used space of each level of the buffer to the total space, the stack utilization rate is generated. The calculation of the stack utilization rate is based on the real-time state of the buffer, continuously monitors the writing and reading of data frames, and updates the statistical results according to the current occupancy of the buffer. Through real-time monitoring, the usage status of each level of the buffer is dynamically reflected, and problems of insufficient resources or space waste are identified. All statistical results are summarized into a storage status report. At the same time, in order to comprehensively evaluate the communication quality of the system, the success rate of data forwarding results is counted. By calculating the ratio of the number of successfully transmitted data frames to the total number of transmitted data frames, the data transmission success rate is obtained. The transmission success rate reflects the reliability and stability of the RS485 bus in the current communication environment. For the statistical result of the transmission success rate, it is compared with a preset threshold. When the transmission success rate is lower than the threshold, an alarm message is automatically generated to indicate the existing communication anomaly or performance bottleneck. At the same time, the communication quality report records the success rate, failure reason and fault location information of each task. The number of online hosts, the storage status report and the communication quality report are integrated to form the system operation status data, and a status monitoring record is generated. Based on the status monitoring record, an operation status report is regularly generated, recording various key index parameters of the system operation. The operation status report includes basic indicators such as the number of online hosts, the data stack utilization rate and the data transmission success rate, and provides trend analysis and prediction functions in combination with the historical operation data of the system. For example, by comparing historical data, the report points out whether there is a risk of overload in the stack utilization rate, whether there is a continuous downward trend in the transmission success rate, or whether the online status of the host is affected by the external environment.

[0044] In the embodiments of the present application, the function of a single RS485 bus network supporting multi-host access is realized, significantly improving the scalability and flexibility of the system, enabling multiple host devices to simultaneously monitor and control slave devices. Through the design of a 5-level data stack structure, an independent data cache space is provided for each host interface, effectively avoiding data congestion and loss problems and improving the reliability of data interaction. A time-slicing-based task scheduling mechanism is adopted to reasonably allocate the communication resources of the host, ensuring the real-time performance and fairness of multi-host data interaction. A complete data verification and protection mechanism is designed, including functions such as data frame integrity detection, check code comparison, and overflow protection, significantly improving the accuracy and reliability of data transmission. A flexible parameter configuration function is realized, supporting independent configuration of the communication parameters of each RS485 interface to meet the communication requirements of different application scenarios. A comprehensive status monitoring function is provided to real-time monitor the system operation status, including indicators such as host online status, data stack usage, and transmission success rate, facilitating system maintenance and fault diagnosis.

[0045] In a specific embodiment, the process of executing step 100 may specifically include the following steps:

[0046] Connect the UART port of the single-chip microcomputer, connect the TX pin to the DI end of the RS485 transceiver to obtain a transmission channel, and connect the UART port of the single-chip microcomputer, connect the RX pin to the RO end of the RS485 transceiver to obtain a reception channel;

[0047] Connect the control port of the single-chip microcomputer, connect the control pin to the DE end and RE end of the RS485 transceiver to obtain a direction control channel;

[0048] Set the baud rate parameter of the transmission channel within the range of 1200 bps to 115200 bps to obtain baud rate configuration data;

[0049] Set the data bit parameter of the reception channel to a fixed 8 bits to obtain data bit configuration data;

[0050] Set the stop bit parameter of the reception channel to 1 bit or 2 bits to obtain stop bit configuration data;

[0051] Set the parity mode of the reception channel to one of no parity, odd parity, or even parity to obtain parity bit configuration data;

[0052] Write the baud rate configuration data, data bit configuration data, stop bit configuration data, and parity bit configuration data into the non-volatile memory of the single-chip microcomputer to obtain an independently configured RS485 host interface group.

[0053] Specifically, connect the transmit pin (usually the TX pin) in the UART port of the single-chip microcomputer to the data input pin (DI terminal) of the RS485 transceiver to ensure that the digital signal transmitted by the single-chip microcomputer through the TX pin can correctly enter the RS485 transceiver for transmission to the RS485 bus. At the same time, connect the receive pin (usually the RX pin) in the UART port of the single-chip microcomputer to the data output pin (RO terminal) of the RS485 transceiver, so that the data received from the RS485 bus is transmitted to the RX pin of the single-chip microcomputer through the RS485 transceiver. To achieve dynamic control of the communication direction, connect the direction control pin of the RS485 transceiver. Connect a control port pin of the single-chip microcomputer to both the drive enable pin (DE terminal) and the receive enable pin (RE terminal) of the RS485 transceiver at the same time. The RS485 transceiver switches between the transmit and receive modes by controlling the high and low level states of the DE and RE pins. When the DE pin is at a high level and the RE pin is at a low level, the RS485 transceiver is in the transmit mode; when the DE pin is at a low level and the RE pin is at a high level, the transceiver is in the receive mode. By configuring the logical state of the control port pin of the single-chip microcomputer, the function of the direction control channel is dynamically realized. After completing the hardware connection, configure the communication parameters of the UART port of the single-chip microcomputer to ensure the correctness of the communication. Configure the baud rate. The baud rate defines the number of bits transmitted per second, and its formula is:

[0054] where represents the baud rate, which defines the transmission rate of the communication; represents the clock frequency of the single-chip microcomputer, which is the basic clock for the operation of the UART module; represents the value of the baud rate register, which is an important parameter for controlling the baud rate. By adjusting value, the baud rate meets the communication requirements. Configure the data bit parameter. The data bit is the number of valid bits contained in each data frame, usually 8 bits. This parameter is set through the UART control register to ensure that the data frame formats for transmission and reception are consistent and avoid communication failures. Set the stop bit. The stop bit is used to identify the end of each frame of data. The stop bit length is 1 bit or 2 bits. The longer the length, the stronger the anti-interference ability of the communication, but the transmission efficiency will be reduced accordingly. The configuration of the stop bit is completed through the UART control register. To ensure the reliability of the communication, set the parity method. The parity method is no parity, odd parity or even parity. The purpose of parity is to detect errors during the communication process. For example, for odd parity, the setting of the parity bit needs to ensure that the total number of "1"s in all data bits in the data frame is odd. The logical representation of parity is: ;

[0055] where represents the value of the parity bit, which is 0 or 1; Indicates the th data bit in the data frame, with a value of 0 or 1; Indicates the total number of data bits in the data frame; mod represents the modulo operation used to calculate parity. After completing all the above configurations, parameters such as baud rate, data bits, stop bits, and parity mode are written into the non-volatile memory (such as EEPROM or Flash) of the microcontroller. Non-volatile memory is a storage medium that can preserve data after power-off, used to ensure the persistence of communication parameters. The writing process includes specifying the storage address, loading parameter data, and performing the write operation. Finally, an independently configured RS485 host interface group is obtained.

[0056] In a specific embodiment, the process of executing step 200 may specifically include the following steps:

[0057] Configure the data communication format of the RS485 host interface group, divide the start bit, data bits, parity bit, and stop bit of the data frame to obtain the data frame format standard;

[0058] Perform storage allocation for the microcontroller RAM space, allocate a fixed storage space of 256 bytes for each data stack to obtain the data frame storage area;

[0059] Perform a 5-level partition on the data frame storage area, construct 5 independent data frame buffer areas according to the first-in-first-out principle to obtain a 5-level data buffer area, and set read and write pointers for the 5-level data buffer area. The read pointer indicates the data read position, and the write pointer indicates the data write position to obtain the data access pointer;

[0060] Count the length of the data frame pointed to by the data access pointer, record the actual number of bytes of each data frame to obtain the data frame length counter, and perform status marking on the data frame corresponding to the data frame length counter to mark the processing status of the data frame to obtain the data frame status register;

[0061] Perform overflow protection settings on the 5-level data buffer area, set the upper overflow protection value and lower overflow protection value of the buffer area to obtain the overflow protection mechanism;

[0062] Apply the overflow protection mechanism to the 5-level data buffer area, integrate the data frame buffer area, data frame length counter, and data frame status register to obtain the host data frame management unit.

[0063] Specifically, configure the data communication format of the RS485 host interface group. By configuring the start bit, data bits, parity bit, and stop bit of the data frame, define the basic format of the data frame to ensure the consistency and reliability of data exchange between the host and the slave. The start bit is used to identify the start of the data frame, which is a low-level signal, and its length is represented as one bit time, that is:

[0064] Among them, represents the time length of the start bit; represents the baud rate. The data bit is the core part of each data frame, defining the valid information to be transmitted. The data bit length is set to 8 bits, and each bit represents binary "0" or "1". Guided by the start bit, the receiving device can synchronously parse the data bits. After receiving the complete 8-bit data, the parity bit verifies the integrity of the data frame through the parity check algorithm. The calculation formula for the parity bit is:

[0065] Among them, represents the value of the parity bit, which is 0 or 1; represents the th data bit value; represents the total number of data bits; mod represents the modulo operation, used to determine the parity. The stop bit identifies the end of the data frame, and its length is usually 1 bit or 2 bits, and the time length is:

[0066] Among them, represents the stop bit time length; represents the number of stop bits (1 or 2). After completing the standard definition of the data frame format, storage allocation is performed on the RAM space of the single-chip microcomputer to support data frame management. According to requirements, a fixed-size storage space, such as 256 bytes, is allocated for each data stack to form a unified data frame storage area. Assuming the total RAM size of the system is , the number of allocable storage stacks is , then the space size of each stack satisfies the relationship:

[0067] This storage allocation ensures memory isolation between different tasks and avoids conflicts. After the storage area is divided, it is divided into 5-level data buffer areas. Each buffer area independently manages a group of data frames and operates according to the first-in, first-out principle. To implement the first-in, first-out mechanism, read and write pointers are set for each buffer area to indicate the read position and write position of the data respectively. Assuming the total size of the buffer area is , the current write pointer position is , the read pointer position is , the condition for writing data is: ;

[0068] The condition for reading data is: ;

[0069] In this way of circular buffering, the data flow in the buffer is effectively managed. To record the specific information of each data frame, the frame pointed to by the data access pointer is counted for length and marked for status. The length counter of the data frame is used to record the number of bytes of the data frame. Assuming the current frame contains bytes, the value of the counter is:

[0070] ;

[0071] Among them, represents the data frame length; is the number of valid bytes in the data frame. At the same time, the status register will mark the processing status of the data frame, including whether it has been received, whether the verification has passed, whether it is waiting to be sent, etc. These marks serve as the basis for subsequent task scheduling. To enhance the robustness of the buffer, an overflow protection mechanism is set for it. When the data volume in the buffer exceeds the capacity limit, the system will trigger the overflow protection value ; when the buffer is empty, the underflow protection value is triggered. The conditions for overflow protection and underflow protection are respectively: ;

[0072] Among them, represents the used space of the current buffer; and are the upper and lower limit thresholds of the buffer respectively. The overflow protection mechanism is applied to all 5-level data buffers, and the data frame buffer, length counter and status register are integrated to form a complete host data frame management unit.

[0073] In a specific embodiment, the process of executing step 300 may specifically include the following steps:

[0074] Monitor the data reception flag of the RS485 bus host interface, judge the reception status of the host data, obtain the host communication status, and perform data integrity detection on the host communication status. Confirm the reception of the complete data frame through the reception flag bit to obtain the host received data;

[0075] Verify the host received data, generate a verification code according to the verification bit parameters and compare it with the received verification code to obtain the data verification result, and screen the data verification result. Mark the data that passes the verification as a valid data frame to obtain a valid data mark;

[0076] Allocate a buffer for the data frame corresponding to the valid data mark, determine the storage location in the 5-level data buffer to obtain a storage location pointer, and write the data frame pointed to by the storage location pointer into the corresponding data frame buffer. Complete data storage according to the first-in, first-out principle to obtain the buffered data frame;

[0077] Count the cached data frames, record the total number of data frames and the length of each single frame to obtain the data frame statistical value, combine and encapsulate the data frame statistical value with the cached data frames, generate the host data frame according to the preset data structure, and store the host data frame into the corresponding data frame buffer area.

[0078] Specifically, through the hardware interrupt or software polling mechanism, the data reception flag of the RS485 host interface is monitored in real time. When the data sent by the host arrives at the receiving device, the reception flag bit of the UART module will be set, indicating that there is a new data frame waiting to be processed. The logical state of the reception flag is described by the following formula:

[0079] ;

[0080] Among them, represents the state of the reception flag, 1 means data arrives, 0 means no data; this flag bit is automatically set by the hardware and is used to trigger data reading. When , the system reads the received data frame and performs integrity detection on it. The data integrity detection is judged by verifying the existence of the frame header and frame tail flag bits. If the received frame header matches the frame tail flag, the data frame is considered complete. For example, assume the frame header flag is and the frame tail flag is , the integrity condition is expressed as:

[0081] Integrity detection ;

[0082] The data frame that passes the integrity detection is marked as the host received data. Verify the host received data. Generate a check code according to the check bit parameter in the communication protocol and compare it with the received check code carried in the data frame. The generation of the check code adopts the parity check method, and its formula is:

[0083] Among them, represents the generated check code; represents the th data bit in the data frame, with a value of 0 or 1; represents the total number of data bits; mod is the modulo operation, which is used to determine the parity of the check bit. If the generated check code is equal to the check code in the received data frame, the check passes; otherwise the check fails. The data frame that passes the check is marked as a valid data frame. For the valid data frame, store it in the 5-level data buffer area. Determine the storage location of the data frame by allocating a storage location pointer. Assume the capacity of each buffer area is , and the write pointer position of the current buffer area is , then the update formula for the storage location pointer is:

[0084] ;

[0085] Among them, represents the position of the write pointer; the mod operation is used to cyclically update the write pointer to ensure that it is always within the buffer range. The data frames are stored according to the first-in, first-out principle. After the storage operation is completed, the read and write pointers are updated to maintain the dynamic management of the buffer. After the data storage is completed, the cached data frames are counted to record the total number of data frames and the length of each frame. The counter formula for the total number of data frames is: ;

[0086] Among them, represents the total number of data frames stored in the buffer. The record of the length of each frame is calculated according to the number of bytes of the data frame. Assuming the length of the data frame is , then its calculation is: ;

[0087] Among them, is the number of bytes in the current data frame. After the counting and length recording are completed, the data frame statistical values are combined and encapsulated with the cached data frames, and the host data frame is generated according to the preset data structure, including the frame header, data bits, check bits, frame tail, and length information. The encapsulated data frame is stored in the corresponding data frame buffer for subsequent task scheduling and data forwarding.

[0088] In a specific embodiment, the process of executing step 400 may specifically include the following steps:

[0089] Scan the data frame buffer in the host data frame management unit, check the data storage status of each level of buffer, obtain the buffer scan result, and sort the data frames in the buffer scan result by priority, and determine the processing order according to the mark of the data frame status register to obtain the data processing queue;

[0090] Verify the validity of the data frames in the data processing queue, confirm the integrity and check status of the data frames, obtain the data frames to be sent, and detect the status of the slave bus for the data frames to be sent to determine whether the RS485 slave bus is in an idle state to obtain the bus status mark;

[0091] Send the data frame based on the bus status mark, send the data frame to the target slave through the RS485 slave interface to obtain the data sending record, and monitor the response of the data sending record to receive the response data frame returned by the slave to obtain the slave response data;

[0092] Resolve the address of the slave response data, determine the target host according to the address information in the data frame to obtain the target address information;

[0093] Forward the slave response data to the corresponding host data frame buffer based on the target address information, complete the data forwarding, and obtain the data forwarding result.

[0094] Specifically, scan the data frame buffer in the host data frame management unit. By traversing the storage states at all levels of the buffer, obtain the data frame information stored in the current system, and determine its processing priority in combination with the data frame attributes marked by the status register. The data frame status register contains flag fields such as "to be sent", "processing", or "completed", and these flags provide a basis for sorting the data frames. The scanning operation traverses each buffer in a cyclic manner, and the scanning process of the current buffer is described by the following formula:

[0095] Among them, represents the cache scan result; represents the total number of cache areas; is the data frame counter in the th cache area, indicating the number of stored frames; is the priority weight of the th cache area, used to distinguish the importance of different buffer levels; is a function that generates a sorting score for the cache area based on the counter and the priority weight. By calculating the scan results of all cache areas, classify the current data frame status and generate a data processing queue according to the priority. After the data processing queue is generated, perform validity verification on each data frame in the queue to ensure that its integrity and check status meet the requirements. The integrity of the data frame is determined by the frame header and frame tail markers, and the check status is achieved by recalculating the checksum and comparing it with the check field carried in the data frame. Assume that a data frame contains data bits, and the formula for the checksum is:

[0096] Among them is the rd data bit, with a value of 0 or 1; mod represents the modulo operation, used to calculate the parity of the check bit. If the calculated checksum is the same as the checksum carried in the data frame, the check passes, and the data frame is marked as a frame to be sent. Detect the slave bus status of the data frame to be sent to determine whether the RS485 slave bus is in an idle state. The slave bus status is indicated by the status register of the hardware interface. Assume that the bus idle state is marked as , and its definition is as follows: ;

[0097] When When the condition is met, the system allows the transmission of data frames; otherwise, the system will wait for the bus to be released. After the bus becomes idle, the data frames are sent to the target slave via the RS485 slave interface, and a data transmission record is generated. The transmission record contains information such as the transmission time, target address, and data length, which is used to track the communication process. After the data transmission is completed, the response data returned by the slave is monitored and received. The reception of the response data is achieved by monitoring the frame header marker returned by the slave, and the complete response data frame is parsed according to the protocol. Assume the length of the response data is , then its reception time is expressed as:

[0098] Among them, represents the reception time; represents the total length of the response data frame; is the baud rate. After successfully receiving the slave response data, address parsing is performed on it. Address parsing determines the target host of the response data based on the target address field carried in the response data frame. Assume the target address field is , and its value is obtained through the data frame parsing function : ;

[0099] Among them, represents the complete content of the response data frame; is a parsing function used to extract the target address. After parsing out the target address, the response data frame is forwarded to the data frame buffer area of the corresponding host, and data storage is completed according to the first-in-first-out principle. The integrity and order of the forwarding operation are maintained by the read and write pointers of the target host buffer. The update formula for the write pointer is: ;

[0100] Among them, is the position of the write pointer in the target host buffer; represents the total capacity of the buffer. After the data forwarding process is completed, a complete data forwarding result is generated, including the forwarding success status, target host address, and data frame content, providing a record for the subsequent communication process.

[0101] Before performing task scheduling timing processing based on data forwarding results, it further includes: extracting timing features from historical data frame transmission records, calculating feature parameters such as data frame length distribution, average transmission delay, and packet loss rate fluctuation based on a sliding time window, establishing a feature vector matrix, and performing data normalization processing on the feature vector matrix to obtain data transmission feature vectors; inputting the data transmission feature vectors into a sparse Bayesian learning model, establishing a prior probability distribution using the variational inference method, optimizing the model parameters by maximizing the marginal likelihood function, setting L1 regularization constraints to control the model complexity, and obtaining an initial prediction model; decomposing the parameters of the initial prediction model, constructing a unitary matrix transformation using the Schmidt orthogonalization method, projecting the prediction parameters onto an orthogonal subspace, dividing the prediction tasks according to the principle of computational complexity balance to obtain N independent estimators, and allocating corresponding feature subsets and computing resources to each estimator to obtain an estimator group; constructing a message passing network based on the estimator group, designing a message update rule based on the expectation propagation algorithm, transmitting probability distribution information between estimators through an iterative calculation process to achieve collaborative optimization of parameters, setting convergence conditions to control the number of iterations, and obtaining an optimized estimator group; weighting and fusing the output results of the optimized estimator group according to preset weights, adopting an ensemble learning strategy to eliminate the prediction bias of individual estimators, constructing a comprehensive evaluation index system including predicted values of transmission delay, packet loss rate, and bandwidth utilization, and obtaining a performance evaluation result; establishing a multi-level dynamic threshold mechanism for the performance evaluation result, dynamically adjusting the alarm thresholds and tolerance ranges of each index using a fuzzy control algorithm according to real-time state parameters such as system load rate and network congestion degree, and obtaining performance monitoring thresholds; constructing a real-time evaluation module based on the performance monitoring thresholds, continuously monitoring the change trend of performance indicators using a sliding window method, and when a performance degradation trend or an indicator lower than the threshold is detected, starting a hierarchical optimization strategy, generating an optimization instruction including the optimization level and trigger time, and obtaining an optimization trigger signal; performing correlation analysis on the optimization trigger signal and the current transmission state data, selecting the optimal scheduling scheme from a preset optimization strategy library using a decision tree algorithm, determining the adjustment step size of the optimization parameters according to the degree of performance degradation, and generating a scheduling optimization instruction including a time slice reallocation scheme, a priority adjustment scheme, and a buffer configuration scheme, and obtaining scheduling optimization parameters.

[0102] In a specific embodiment, the process of executing step 500 may specifically include the following steps:

[0103] Calculating the transmission time of the data frames in the data forwarding result, obtaining the data transmission period according to the data frame length and the RS485 communication rate, and dividing the data transmission period into time slices according to the number of hosts, and allocating a fixed time period for each host interaction task to obtain a time slice allocation table;

[0104] Set priorities for the tasks in the time slice allocation table, set the processing order according to the urgency of data transmission, obtain the task priority table, and input the task priority table into the scheduling control unit to allocate execution time in the order of priorities to obtain the task execution sequence;

[0105] Set timeout thresholds for the task execution sequence, set the maximum execution time according to the data transmission cycle, obtain the task timeout parameters, and apply the task timeout parameters to the task execution process, record the start time and end time of the task to obtain the task execution record;

[0106] Conduct time analysis on the task execution record, calculate the deviation between the actual execution time and the preset time to obtain the timing adjustment value, and optimize the task scheduling based on the timing adjustment value, update the time slice allocation and priority setting to obtain the task scheduling sequence.

[0107] Specifically, calculate the transmission time of the data frames in the data forwarding result. The transmission time of the data frame depends on the length of the data frame and the RS485 communication rate , and its calculation formula is:

[0108] where, represents the transmission time of the data frame; represents the length of the data frame; represents the communication rate of RS485; the total number of bits of the data frame is obtained by multiplying the byte length by 8 bits per byte. After calculating the transmission time of each frame of data, divide these time periods according to the number of hosts to ensure that each host interaction task is assigned a fixed time period. Assume that the total available time is the sum of the transmission times of all data frames, then the average time slice for each host is expressed as:

[0109] where, is the sum of the transmission cycles of all data frames in the system; is the number of hosts participating in the task scheduling; is the basic time slice assigned to each host task. Based on the result of the time slice division, set priorities for the tasks to determine the execution order of the tasks. The priority setting is based on the urgency of data transmission and is determined by comprehensively evaluating the importance and timeliness of the tasks. Assume that the urgency of each task is represented by , the higher its value, the higher the task priority, and the sorting of the task queue is expressed as: ;

[0110] Among them, represents the priority weight of the th task; Sort is a function for sorting in descending order of priority; the priority sorting result determines the execution order of tasks within a time slice. After inputting the priority queue into the scheduling control unit, the execution time of tasks is allocated in sequence according to the priority, generating a task execution sequence. Each task in the task execution sequence needs to set a timeout threshold , to prevent a certain task from exceeding the expected time and affecting the overall scheduling of the system. The setting of the timeout threshold is related to the data transmission cycle, and its formula is: ;

[0111] Among them, is the maximum execution time of the task; is the timeout factor, used to adjust the tolerance range (for example, 1.1 means allowing 10% extra time). The actual execution process of the task needs to record its start time and end time , and the record can be expressed as:

[0112] Task execution time ;

[0113] This record provides data support for subsequent time analysis. After the task execution is completed, time analysis is performed on the task execution record to calculate the deviation between the actual execution time and the preset time. The deviation is calculated by the formula: ;

[0114] Among them, is the actual execution time of the task; is the preset execution time of the task. Based on the deviation value , the task scheduling is optimized. For example, when the actual execution time of some tasks significantly exceeds the expectation, the time slice allocation is readjusted, allocating more time slices to the tasks that take longer, while reducing the time slices of other tasks. This optimization is completed by updating the time slice allocation table and priority settings, generating a new task scheduling sequence.

[0115] In a specific embodiment, the process of executing step 600 may specifically include the following steps:

[0116] Detect the host communication status in the task scheduling sequence, count the response situation of the host, obtain the host online record, and analyze the host online record. Determine the online status by judging the host response timeout to obtain the number of online hosts;

[0117] Perform capacity statistics on the 5 - level data buffer in the host data frame management unit, calculate the proportion of the used space to the total space to obtain the stack usage rate, record and analyze the stack usage rate, and update the usage status of each level of data buffer in real - time to obtain a storage status report;

[0118] Perform success rate statistics on the data forwarding results, calculate the ratio of the number of successfully transmitted data frames to the total number of transmitted data frames to obtain the transmission success rate, and perform threshold judgment on the transmission success rate. When it is lower than the preset threshold, generate an alarm message to obtain a communication quality report;

[0119] Integrate the number of online hosts, the storage status report, and the communication quality report to form system operation status data and obtain a status monitoring record;

[0120] Generate an operation status report based on the status monitoring record, record various index parameters of the system operation to obtain a system operation status record.

[0121] Specifically, detect the communication status of the hosts in the task scheduling sequence to count the response situation of the hosts. By listening whether valid response data frames are received within the communication window of each host task, record the online status of the hosts. Assume the host response time is , and the communication timeout threshold is , then the response status of the host is defined as: ;

[0122] Among them, represents the online status of the host, 1 means online, 0 means offline; is the actual response time of the host; is the maximum allowable response time of the system. By counting the of all hosts, obtain the number of online hosts :

[0123] Among them, is the total number of hosts; is for the th host's online status. Perform capacity statistics on the 5 - level data buffer in the host data frame management unit to calculate the proportion of the used space to the total space to obtain the stack usage rate. Assume the total capacity of each level of buffer is , the used space is , and the stack usage rate is expressed as:

[0124] Among them, represents the total space of the buffer; represents the currently used space; is the stack usage rate. By updating in real time the value, a storage status report of each level of data buffer is generated, including the current usage rate, remaining space, and possible overflow risks. After completing the buffer statistics, the success rate of data forwarding results is statistically analyzed to evaluate the reliability and efficiency of communication. The data transmission success rate is defined as the number of successfully transmitted data frames and the total number of transmitted data frames ratio:

[0125] Among them, represents the number of successfully transmitted data frames; represents the total number of data frames to be transmitted; is the data transmission success rate, in percentage. To ensure communication quality, is compared with the preset threshold . When , a communication quality warning message is generated to indicate the existing link abnormality or device failure. After integrating the number of online hosts, buffer status report, and communication quality report, a running status data set is generated, that is, a status monitoring record. This record includes indicators such as the online situation of hosts, buffer usage, and data transmission success rate. Based on the status monitoring record, a running status report is generated, which records the statistical data, trend analysis, and abnormal warnings of key indicators.

[0126] The above describes the host expansion method based on the RS485 bus in the embodiment of the present application. Next, the host expansion device 10 based on the RS485 bus in the embodiment of the present application will be described. Please refer to Figure 2 , an embodiment of the host expansion device 10 based on the RS485 bus in the embodiment of the present application includes:

[0127] A parameter configuration module 11, configured to configure parameters for the RS485 bus host interface to obtain an independently configured RS485 host interface group, and the RS485 host interface group includes baud rate parameters, data bit parameters, stop bit parameters, and parity bit parameters;

[0128] A construction module 12, configured to construct a 5-level data stack structure for the RS485 host interface group. Each level of data stack includes a data frame buffer, a data frame length counter, and a data frame status register, to obtain a host data frame management unit;

[0129] An interaction task processing module 13, configured to perform host interaction task processing on the host data frame management unit, obtain host data frames by monitoring the receive flag of the RS485 bus host interface, and store the host data frames into the corresponding data frame buffers;

[0130] The scheduling task processing module 14 is used to perform scheduling task processing on the host data frames in the host data frame management unit, and when the RS485 slave bus is idle, send the data frames to be sent to the target slave through the RS485 slave interface to obtain a data forwarding result;

[0131] The scheduling timing processing module 15 is used to perform task scheduling timing processing based on the data forwarding result, allocate a fixed time slice for each host interaction task, set the data transmission time and task priority, and obtain a task scheduling sequence;

[0132] The status monitoring module 16 is used to input the task scheduling sequence into the human-computer interaction task module for status monitoring, record the number of online hosts, the data stack usage rate, and the data transmission success rate, and obtain a system operation status record.

[0133] Through the collaborative cooperation of the above-mentioned various components, the function of a single RS485 bus network supporting multi-host access is realized, significantly improving the scalability and flexibility of the system, enabling multiple host devices to monitor and control slave devices simultaneously. Through the design of a 5-level data stack structure, an independent data cache space is provided for each host interface, effectively avoiding data congestion and loss problems, and improving the reliability of data interaction. By adopting a time-slice-based task scheduling mechanism, the communication resources of the host are reasonably allocated, ensuring the real-time performance and fairness of multi-host data interaction. A complete data verification and protection mechanism is designed, including functions such as data frame integrity detection, check code comparison, and overflow protection, significantly improving the accuracy and reliability of data transmission. The flexible parameter configuration function is realized, supporting independent configuration of the communication parameters of each RS485 interface to meet the communication requirements of different application scenarios. A comprehensive status monitoring function is provided, real-time monitoring the system operation status, including indicators such as the online status of the host, the data stack usage situation, and the transmission success rate, facilitating system maintenance and fault diagnosis.

[0134] Please refer to Figure 3 , Figure 3 which is a schematic block diagram of the structure of the electronic device 300 provided by the embodiment of the present application. The electronic device 300 includes a processor 301 and a memory 302. The processor 301 and the memory 302 are connected through a device bus 303. Among them, the memory 302 may include a non-volatile storage medium and an internal memory.

[0135] The non-volatile storage medium can store a computer program. The computer program includes program instructions. When the program instructions are executed by the processor 301, the processor 301 can be made to execute any one of the above-mentioned host extension methods based on the RS485 bus.

[0136] The processor 301 is used to provide computing and control capabilities to support the operation of the entire electronic device 300.

[0137] The internal memory provides an environment for the operation of a computer program in a non-volatile storage medium. When the computer program is executed by the processor 301, the processor 301 can be caused to execute any of the above host extension methods based on the RS485 bus.

[0138] Those skilled in the art can understand that Figure 3 The structure shown in is only a block diagram of some structures related to the solution of this application, and does not constitute a limitation on the electronic device 300 involved in the solution of this application. The specific electronic device 300 may include more or fewer components than those shown in the figure, or combine some components, or have different component arrangements.

[0139] It should be understood that the processor 301 may be a central processing unit (CPU), and the processor 301 may also be other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Among them, the general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0140] It should be noted that those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working process of the above-described electronic device 300 can refer to the corresponding process of the foregoing host extension method based on the RS485 bus, and will not be elaborated herein.

[0141] This application embodiment also provides a computer-readable storage medium storing a computer program, and when the computer program is executed by one or more processors, the one or more processors are caused to implement the host extension method based on the RS485 bus provided by this application embodiment.

[0142] Among them, the computer-readable storage medium may be an internal storage unit of the electronic device 300 in the foregoing embodiment, such as the hard disk or memory of the electronic device 300. The computer-readable storage medium may also be an external storage device of the electronic device 300, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. equipped with the electronic device 300.

[0143] Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working processes of the systems, devices, and units described above can refer to the corresponding processes in the foregoing method embodiments and will not be elaborated herein.

[0144] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to enable an electronic device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The foregoing storage medium includes: various media that can store program codes such as USB flash drives, mobile hard disks, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs.

[0145] As described above, the above embodiments are only used to illustrate the technical solutions of this application and are not intended to limit them; although this application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the various embodiments of this application.

Claims

1. A host expansion method based on the RS485 bus, characterized in that, The method includes: Configuring parameters for the RS485 bus host interface to obtain an independently configured RS485 host interface group, where the RS485 host interface group includes baud rate parameters, data bit parameters, stop bit parameters, and parity bit parameters; Constructing a 5-level data stack structure for the RS485 host interface group, with each level of the data stack including a data frame buffer, a data frame length counter, and a data frame status register, to obtain a host data frame management unit; Performing host interaction task processing on the host data frame management unit, obtaining the host data frame by monitoring the receive flag of the RS485 bus host interface, and storing the host data frame in the corresponding data frame buffer; specifically including: monitoring the data receive flag of the RS485 bus host interface, judging the receive status of the host data to obtain the host communication status, and performing data integrity detection on the host communication status, confirming the reception of the complete data frame through the receive flag bit to obtain the host received data; verifying the host received data, generating a check code according to the parity bit parameters and comparing it with the received check code to obtain the data verification result, and screening the data verification result, marking the data passing the verification as a valid data frame to obtain a valid data mark; allocating a buffer area for the data frame corresponding to the valid data mark, determining the storage location in the 5-level data buffer to obtain a storage location pointer, and writing the data frame pointed to by the storage location pointer into the corresponding data frame buffer, completing data storage according to the first-in-first-out principle to obtain a buffered data frame; counting the buffered data frame, recording the total number of data frames and the length of a single frame to obtain a data frame statistical value, and combining and encapsulating the data frame statistical value with the buffered data frame, generating a host data frame according to a preset data structure, and storing the host data frame in the corresponding data frame buffer; Performing scheduling task processing on the host data frames in the host data frame management unit, and sending the data frame to be sent to the target slave through the RS485 slave interface when the RS485 slave bus is idle to obtain a data forwarding result; Performing task scheduling timing processing based on the data forwarding result, allocating a fixed time slice for each host interaction task, setting the data transmission time and task priority to obtain a task scheduling sequence; Inputting the task scheduling sequence into the human-computer interaction task module for status monitoring, recording the number of online hosts, the data stack utilization rate, and the data transmission success rate to obtain a system operation status record.

2. The host extension method based on the RS485 bus according to claim 1, wherein, The configuring parameters for the RS485 bus host interface to obtain an independently configured RS485 host interface group, where the RS485 host interface group includes baud rate parameters, data bit parameters, stop bit parameters, and parity bit parameters, includes: Connecting the UART port of the single-chip microcomputer, connecting the TX pin to the DI end of the RS485 transceiver to obtain a transmission channel, and connecting the UART port of the single-chip microcomputer, connecting the RX pin to the RO end of the RS485 transceiver to obtain a reception channel; Connect to the control port of the single-chip microcomputer, and connect the control pin to the DE and RE terminals of the RS485 transceiver to obtain a direction control channel; Set the baud rate parameter of the sending channel within the range of 1200 bps to 115200 bps to obtain baud rate configuration data; Set the data bit parameter of the receiving channel to a fixed 8 bits to obtain data bit configuration data; Set the stop bit parameter of the receiving channel to 1 bit or 2 bits to obtain stop bit configuration data; Set the parity mode of the receiving channel to one of no parity, odd parity, or even parity to obtain parity bit configuration data; Write the baud rate configuration data, the data bit configuration data, the stop bit configuration data, and the parity bit configuration data into the non-volatile memory of the single-chip microcomputer to obtain an independently configured RS485 host interface group.

3. The host extension method based on the RS485 bus according to claim 1, characterized in that, Construct a 5-level data stack structure for the RS485 host interface group. Each level of the data stack includes a data frame buffer, a data frame length counter, and a data frame status register to obtain a host data frame management unit, including: Configure the data communication format of the RS485 host interface group, and divide the start bit, data bit, parity bit, and stop bit of the data frame to obtain a data frame format standard; Perform storage allocation on the RAM space of the single-chip microcomputer, and allocate a fixed storage space of 256 bytes for each data stack to obtain a data frame storage area; Perform a 5-level partition on the data frame storage area, and construct 5 independent data frame buffers according to the first-in, first-out principle to obtain a 5-level data buffer. Set read and write pointers for the 5-level data buffer, and use the read pointer to indicate the data read position and the write pointer to indicate the data write position to obtain data access pointers; Count the length of the data frame pointed to by the data access pointer, record the actual number of bytes of each data frame to obtain a data frame length counter, and mark the status of the data frame corresponding to the data frame length counter to mark the processing status of the data frame to obtain a data frame status register; Set overflow protection for the 5-level data buffer, and set the upper overflow protection value and lower overflow protection value of the buffer to obtain an overflow protection mechanism; Apply the overflow protection mechanism to the 5-level data buffer, and integrate the data frame buffer, the data frame length counter, and the data frame status register to obtain a host data frame management unit.

4. The host extension method based on the RS485 bus according to claim 1, wherein Perform scheduling task processing on the host data frames in the host data frame management unit, and send the data frames to be sent to the target slave through the RS485 slave interface when the RS485 slave bus is idle to obtain a data forwarding result, including: Scan the data frame buffer in the host data frame management unit, check the data storage status of each level of the buffer to obtain a buffer scan result, and sort the data frames in the buffer scan result by priority, and determine the processing order according to the mark of the data frame status register to obtain a data processing queue; Validate the data frames in the data processing queue to confirm the integrity and check status of the data frames, obtain the data frames to be sent, and detect the slave bus status of the data frames to be sent to determine whether the RS485 slave bus is in an idle state, obtaining a bus status flag; Send the data frames based on the bus status flag, send the data frames to the target slave through the RS485 slave interface, obtain a data transmission record, and monitor the response of the data transmission record to receive the response data frames returned by the slave, obtaining slave response data; Resolve the address of the slave response data, determine the target host according to the address information in the data frame, obtaining target address information; Forward the slave response data to the data frame buffer area of the corresponding host based on the target address information, complete the data forwarding, obtaining a data forwarding result.

5. The host extension method based on the RS485 bus according to claim 1, characterized in that, Perform task scheduling timing processing based on the data forwarding result, allocate fixed time slices for each host interaction task, set the data transmission time and task priorities, obtaining a task scheduling sequence, including: Calculate the transmission time of the data frames in the data forwarding result, obtain the data transmission period according to the data frame length and the RS485 communication rate, and divide the data transmission period into time slices according to the number of hosts to allocate a fixed time period for each host interaction task, obtaining a time slice allocation table; Set the priorities of the tasks in the time slice allocation table, set the processing order according to the urgency of data transmission, obtaining a task priority table, and input the task priority table into the scheduling control unit to allocate execution time according to the priority order, obtaining a task execution sequence; Set a timeout threshold for the task execution sequence, set the maximum execution time according to the data transmission period, obtaining task timeout parameters, and apply the task timeout parameters to the task execution process, record the start time and end time of the task, obtaining a task execution record; Perform time analysis on the task execution record, calculate the deviation between the actual execution time and the preset time, obtaining a timing adjustment value, and optimize the task scheduling based on the timing adjustment value, update the time slice allocation and priority settings, obtaining a task scheduling sequence.

6. The host expansion method based on the RS485 bus according to claim 1, wherein Input the task scheduling sequence into the human-computer interaction task module for status monitoring, record the number of online hosts, the data stack usage rate, and the data transmission success rate, obtaining a system operation status record, including: Detect the host communication status in the task scheduling sequence, count the response situations of the hosts, obtaining a host online record, and analyze the host online record to determine the online status by judging the host response timeout, obtaining the number of online hosts; Count the capacity of the 5-level data buffer area in the host data frame management unit, calculate the proportion of the used space in the total space, obtaining the stack usage rate, and record and analyze the stack usage rate, and update the usage situations of each level of data buffer area in real time, obtaining a storage status report; Statistically analyze the success rate of the data forwarding result, calculate the ratio of the number of successfully transmitted data frames to the total number of transmissions to obtain the transmission success rate, and perform a threshold judgment on the transmission success rate. When it is lower than the preset threshold, generate an alarm message to obtain a communication quality report; Integrate the number of online hosts, the storage status report, and the communication quality report to form system operation status data and obtain a status monitoring record; Generate an operation status report based on the status monitoring record, record various index parameters of the system operation, and obtain a system operation status record.

7. A host expansion device based on the RS485 bus, characterized in that, For executing the host expansion method based on the RS485 bus according to any one of claims 1-6, the host expansion device based on the RS485 bus includes: A parameter configuration module for configuring parameters of the RS485 bus host interface to obtain an independently configured RS485 host interface group, and the RS485 host interface group includes baud rate parameters, data bit parameters, stop bit parameters, and parity bit parameters; A construction module for constructing a 5-level data stack structure for the RS485 host interface group. Each level of data stack includes a data frame buffer, a data frame length counter, and a data frame status register to obtain a host data frame management unit; An interaction task processing module for processing host interaction tasks for the host data frame management unit, obtaining host data frames by monitoring the reception flag of the RS485 bus host interface, and storing the host data frames into the corresponding data frame buffers; A scheduling task processing module for processing scheduling tasks for the host data frames in the host data frame management unit, and sending the data frames to be sent to the target slave through the RS485 slave interface when the RS485 slave bus is idle to obtain a data forwarding result; A scheduling timing processing module for performing task scheduling timing processing based on the data forwarding result, allocating a fixed time slice for each host interaction task, setting the data transmission time and task priority to obtain a task scheduling sequence; A status monitoring module for inputting the task scheduling sequence into the human-computer interaction task module for status monitoring, recording the number of online hosts, the data stack usage rate, and the data transmission success rate to obtain a system operation status record.

8. An electronic device, characterized in that, The electronic device includes: a memory and at least one processor, and instructions are stored in the memory; The at least one processor calls the instructions in the memory so that the electronic device executes the host expansion method based on the RS485 bus according to any one of claims 1-6.

9. A computer-readable storage medium having instructions stored thereon, characterized in that, When the instructions are executed by the processor, the host expansion method based on the RS485 bus according to any one of claims 1-6 is implemented.

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