Display device

Abstract

A display device includes a display panel and a driving controller that receives an image signal and a control signal, drives a first display area of the display panel at a first driving frequency, and drives a second display area at a second driving frequency. The drive controller counts a first stress time of each first horizontal line and calculates a first operation time of each first horizontal line based on the first stress time and the first drive frequency, counting a second stress time of each second horizontal line and calculating a second operation time of each second horizontal line based on the second stress time and a second driving frequency, and outputs an image data signal obtained by compensating stress of the image signal based on the image signal, the first operation time, and the second operation time.

Description

Technical Field

[0001] This application claims priority to Korean Patent Application No. 10-2023-0137656, filed on October 16, 2023, and all rights arising therefrom, the entire contents of which are incorporated herein by reference. Background Art

[0002] Embodiments of the present disclosure described herein relate to a display device.

[0003] The display device includes pixels connected to data lines and scan lines. Each pixel includes an emission element and a pixel circuit that controls the emission element. The pixel circuit can provide a current corresponding to a data signal to the emission element. In this case, light with a specific brightness corresponding to the current flowing through the emission element can be generated.

[0004] The characteristics of each pixel can be changed according to the operating environment. Summary of the invention

[0005] Embodiments of the present disclosure provide a display device capable of reducing power consumption.

[0006] Embodiments of the present disclosure provide a display device capable of compensating for variations in characteristics of pixels.

[0007] According to an embodiment, a display device includes: a display panel, the display panel includes a first display area and a second display area; and a driving controller, the driving controller receives an image signal and a control signal, outputs an image data signal to be provided to the display panel, drives the first display area of ​​the display panel at a first driving frequency and drives the second display area at a second driving frequency different from the first driving frequency, the display panel includes first horizontal lines corresponding to the first display area and second horizontal lines corresponding to the second display area, and the driving controller counts a first stress time of each first horizontal line and calculates a first operation time of each first horizontal line based on the first stress time and the first driving frequency, counts a second stress time of each second horizontal line and calculates a second operation time of each second horizontal line based on the second stress time and the second driving frequency, and outputs an image data signal obtained by compensating for the stress of the image signal based on the image signal, the first operation time, and the second operation time.

[0008] According to an embodiment, the driving controller may output an image data signal obtained by compensating for stress of an image signal corresponding to the first horizontal line based on the image signal and the first operation time of each first horizontal line.

[0009] According to an embodiment, the driving controller may output an image data signal obtained by compensating for stress of an image signal corresponding to a second horizontal line based on the image signal and a second operation time of each second horizontal line.

[0010] According to an embodiment, the driving controller may include: a stress time calculation unit, which counts the first stress time of each first horizontal line and counts the second stress time of each second horizontal line; a memory, which stores previous stress data of a previous frame; and a compensation unit, which calculates stress data of a current frame based on an image signal, previous stress data, a first operation time, and a second operation time, and outputs an image data signal corresponding to the image signal based on the stress data, and the stress data from the compensation unit can be stored in the memory as previous stress data for subsequent frames.

[0011] According to an embodiment, the stress time calculation unit may include: a first counter, which corresponds to the first horizontal line and is used to output the first stress time; a second counter, which corresponds to the second horizontal line and is used to output the second stress time; and a counter controller, which controls the first counter and the second counter in response to a control signal.

[0012] According to an embodiment, the control signal may include a start signal indicating a start of each frame, and the stress time calculation unit may control the first counter and the second counter in response to the start signal.

[0013] According to an embodiment, the frame may include a full-drive frame for driving the first and second horizontal lines and a mask-enable frame for driving only the first horizontal line of the first and second horizontal lines.

[0014] According to an embodiment, the counter controller may control the first counter to count during the full-driving frame and the mask enable frame, and control the second counter to count during the mask enable frame.

[0015] According to an embodiment, each first counter may be reset when a corresponding horizontal line among the first horizontal lines is driven, and each second counter may be reset when a corresponding horizontal line among the second horizontal lines is driven.

[0016] According to an embodiment, a display device includes: a display panel, the display panel includes a first display area and a second display area; and a driving controller, the driving controller receives an image signal and a control signal, outputs an image data signal to be provided to the display panel, drives the first display area of ​​the display panel at a first driving frequency in a multi-frequency mode and drives the second display area at a second driving frequency different from the first driving frequency in the multi-frequency mode, the display panel includes first horizontal lines corresponding to the first display area and second horizontal lines corresponding to the second display area, and in the multi-frequency mode, the driving controller can count a first stress time of each first horizontal line and calculate a first operation time of each first horizontal line based on the first stress time and the first driving frequency, count a second stress time of each second horizontal line and calculate a second operation time of each second horizontal line based on the second stress time and the second driving frequency, and output an image data signal obtained by compensating for the stress of the image signal based on the image signal, the first operation time, and the second operation time.

[0017] According to an embodiment, in the multi-frequency mode, the driving controller may compensate for the stress of the image signal corresponding to the first horizontal line based on the image signal and the first operation time of each first horizontal line, and output an image data signal obtained by compensating for the stress of the image signal corresponding to the second horizontal line based on the image signal and the second operation time of each second horizontal line.

[0018] According to an embodiment, in a single-frequency mode, the driving controller may count a third stress time of each of the first horizontal line and the second horizontal line and calculate a third operation time of each of the first horizontal line and the second horizontal line based on the third stress time and the first driving frequency, and output an image data signal obtained by compensating for the stress of the image signal based on the image signal and the third operation time.

[0019] According to an embodiment, the driving controller may include: a stress time calculation unit, which counts the first stress time of each first horizontal line and counts the second stress time of each second horizontal line; a memory, which stores previous stress data of a previous frame; and a compensation unit, which calculates stress data of a current frame based on an image signal, previous stress data, a first operation time, and a second operation time, and outputs an image data signal corresponding to the image signal based on the stress data, and the stress data from the compensation unit can be stored in the memory as previous stress data for subsequent frames.

[0020] According to an embodiment, the stress time calculation unit may include: a first counter, which corresponds to the first horizontal line and is used to output the first stress time; a second counter, which corresponds to the second horizontal line and is used to output the second stress time; and a counter controller, which controls the first counter and the second counter in response to a control signal.

[0021] According to an embodiment, the control signal may include a start signal indicating a start of each frame, and the stress time calculation unit may control the first counter and the second counter in response to the start signal.

[0022] According to an embodiment, a frame may include: a full-drive frame, which is used to drive a first horizontal line and a second horizontal line; and a mask-enable frame, which is used to drive only the first horizontal line of the first horizontal line and the second horizontal line, and the counter controller may control the first counter to count during the full-drive frame and the mask-enable frame, and control the second counter to count during the mask-enable frame.

[0023] According to an embodiment, a display device includes: a display panel, the display panel includes a first display area and a second display area; and a driving controller, the driving controller receives an image signal and a control signal, outputs an image data signal to be provided to the display panel, drives the first display area of ​​the display panel at a first driving frequency and drives the second display area at a second driving frequency different from the first driving frequency, the display panel includes a first horizontal line corresponding to the first display area and a second horizontal line corresponding to the second display area, the driving controller includes: a stress time calculation unit, the stress time calculation unit counts a first stress time for each first horizontal line and counts a second stress time for each second horizontal line; a memory, the memory stores previous stress data of a previous frame; and a compensation unit, the compensation unit calculates stress data of a current frame based on the image signal, the previous stress data, the first operation time, and the second operation time, and outputs an image data signal corresponding to the image signal based on the stress data, and the stress data from the compensation unit is stored in the memory as previous stress data for a subsequent frame.

[0024] According to an embodiment, the stress time calculation unit may include: a first counter, which corresponds to the first horizontal line and is used to output the first stress time; a second counter, which corresponds to the second horizontal line and is used to output the second stress time; and a counter controller, which controls the first counter and the second counter in response to a control signal.

[0025] According to an embodiment, the control signal may include a start signal indicating a start of each frame, and the stress time calculation unit may control the first counter and the second counter in response to the start signal.

[0026] According to an embodiment, a frame may include: a full-drive frame, which is used to drive a first horizontal line and a second horizontal line; and a mask-enable frame, which is used to drive only the first horizontal line of the first horizontal line and the second horizontal line, and the counter controller may control the first counter to count during the full-drive frame and the mask-enable frame, and control the second counter to count during the mask-enable frame. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The above and other aspects and features of the present disclosure will become more apparent by describing in detail the embodiments of the present disclosure with reference to the accompanying drawings.

[0028] Figure 1 A display device according to an embodiment of the present disclosure is shown.

[0029] Figure 2 An image displayed on a display device according to an embodiment of the present disclosure is shown.

[0030] Figure 3A and Figure 3B is a perspective view showing a display device according to an embodiment of the present disclosure.

[0031] Figure 4A is a view showing the operation of the display device in a single frequency mode.

[0032] Figure 4B is a view showing the operation of the display device in the multi-frequency mode.

[0033] Figure 5 is a block diagram of a display device according to an embodiment of the present disclosure.

[0034] Figure 6 is a circuit diagram of a pixel according to an embodiment of the present disclosure.

[0035] Fig. 7A Shows from Figure 5 The scan driving circuit shown in FIG. 1 outputs a scan signal for a single frequency mode.

[0036] Figure 7B Shows from Figure 5 The scan driving circuit shown in FIG. 1 outputs a scan signal for a multi-frequency mode.

[0037] Figure 8 is a block diagram of a drive controller according to an embodiment of the present disclosure.

[0038] Fig. 9A is a view showing the operation of the stress time calculation unit when the operation mode is the single frequency mode.

[0039] Fig. 9B is a view showing the operation of the stress time calculation unit when the operation mode is the multi-frequency mode.

[0040] Fig. 10A is a timing diagram showing signals used in the display device when the operation mode is the single frequency mode.

[0041] Fig. 10B is a timing diagram showing signals used in the display device when the operation mode is the multi-frequency mode.

[0042] Fig.11 is a flowchart showing the operation of the stress time calculation unit when the operation mode is the multi-frequency mode.

[0043] Fig.12 is a view showing the operation of the stress time calculation unit when the operation mode is the multi-frequency mode. DETAILED DESCRIPTION

[0044] In the specification, the expression that a first component (or region, layer, portion, part, etc.) is “on”, “connected to”, or “coupled to” a second component means that the first component is directly on, directly connected to, or directly coupled to the second component, or that a third component is interposed between the first and second components.

[0045] The same reference numerals will be assigned to the same components. In addition, in the drawings, the thickness, proportion and size of the components may be exaggerated to effectively describe the technical features. The term "and / or" includes any and all combinations of one or more of the associated components.

[0046] Although the terms "first," "second," etc., may be used to describe various components, the components should not be construed as being limited by the terms. The terms are used only to distinguish one component from another. For example, a first component may be referred to as a second component, and similarly, a second component may be referred to as a first component, without departing from the scope and spirit of the present disclosure. Unless the context clearly indicates otherwise, the singular is intended to include the plural.

[0047] In addition, the terms "below", "at the lower part", "above", "upper" are used to describe the relationship between the components shown in the drawings. The terms are relative and are described with reference to the directions indicated in the drawings.

[0048] It should be further understood that the terms “comprises,” “comprising,” “includes,” or “including,” or “having” specify the presence of stated features, numbers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, numbers, steps, operations, components, parts, and / or combinations thereof.

[0049] Unless otherwise defined, all terms (including technical terms and scientific terms) used in the specification have the same meaning as those generally understood by those skilled in the art to which the present disclosure belongs. Furthermore, terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with the meaning in the context of the relevant technology, and should not be interpreted in an idealized or overly formal sense unless clearly defined herein.

[0050] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0051] Figure 1 2 is a view showing a display device DD according to an embodiment of the present disclosure.

[0052] refer to Figure 1 According to an embodiment of the present disclosure, a portable terminal is shown as an example of a display device DD. The portable terminal may include a tablet PC, a smart phone, a personal digital assistant ("PDA"), a portable multimedia player ("PMP"), a game console, and a wristwatch-type electronic device. However, the present disclosure is not limited thereto. In addition to large electronic equipment such as a television or an outside billboard, the present disclosure may also be used for small and medium-sized electronic devices, such as a personal computer (e.g., a notebook computer), an information kiosk, a car navigation unit, and a camera. The above examples are provided only as embodiments, and it is apparent that the display device DD may be applied to any other electronic device without departing from the concept of the present disclosure.

[0053] like Figure 1 As shown in the figure, the display surface for displaying the first image IM1 and the second image IM2 is parallel to the plane defined by the first direction DR1 and the second direction DR2. The display device DD includes a plurality of areas divided on the display surface. The display surface includes a display area DA, on which the first image IM1 and the second image IM2 are displayed, and a non-display area NDA, which is adjacent to the display area DA. The non-display area NDA may be referred to as a border area. For example, the display area DA may have a rectangular shape. The non-display area NDA surrounds the display area DA. In addition, although not shown, the display device DD may include a partially curved shape.

[0054] The display area DA of the display device DD includes a first display area DA1 and a second display area DA2. In a specific application, a first image IM1 may be displayed in the first display area DA1, and a second image IM2 may be displayed in the second display area DA2. For example, the first image IM1 may be an image with a shorter change cycle (e.g., a video), and the second image IM2 may be an image with a longer change cycle (e.g., a still image such as a picture or text information).

[0055] The operating modes of the display device DD may include a single frequency mode SFM (see Figure 4A ) and Multi-Frequency Mode MFM (see Figure 4B ). The display device DD may drive the first display area DA1 and the second display area DA2 at a basic frequency in the single-frequency mode SFM. According to an embodiment, in the multi-frequency mode MFM, the display device DD may drive the first display area DA1 for displaying the first image IM1 at a first driving frequency and drive the second display area DA2 for displaying the second image IM2 at a second driving frequency. According to an embodiment, the first driving frequency may be higher than or equal to the basic frequency. According to an embodiment, the second driving frequency may be lower than the first driving frequency. The display device DD may reduce power consumption by lowering the driving frequency of the second display area DA2.

[0056] The size of each of the first display area DA1 and the second display area DA2 may be a preset size and may be changed by an application program.

[0057] According to an embodiment, when a still image is displayed on the first display area DA1 and a video is displayed on the second display area DA2, the first display area DA1 may be driven at a second driving frequency lower than a basic frequency, and the second display area DA2 may be driven at a first driving frequency higher than or equal to the basic frequency.

[0058] Furthermore, the display area DA may be divided into three or more display areas. The driving frequency of each display area may be determined according to the type of image (still image or video) displayed in each display area.

[0059] Figure 2 is a view showing an image displayed on the display device DD according to an embodiment of the present disclosure.

[0060] refer to Figure 2, the display area DA of the display device DD includes a first display area DA1, a second display area DA2, and a third display area DA3. In a specific application, a first image IM1 may be displayed on the first display area DA1, a second image IM2 may be displayed on the second display area DA2, and a third image IM3 may be displayed on the third display area DA3. According to an embodiment, for example, the first image IM1 and the third image IM3 may be images with a shorter change cycle (e.g., a video), and the second image IM2 may be an image with a longer change cycle (e.g., a still image such as a picture or text information).

[0061] In the single frequency mode SFM, the display device DD may drive the first display area DA1, the second display area DA2, and the third display area DA3 at a basic frequency. According to an embodiment, in the multi-frequency mode MFM, the display device DD may drive the first display area DA1 for displaying the first image IM1 and the third display area DA3 for displaying the third image IM3 at a first driving frequency and drive the second display area DA2 for displaying the second image IM2 at a second driving frequency. According to an embodiment, the first driving frequency may be equal to or higher than the basic frequency. According to an embodiment, the second driving frequency may be lower than the first driving frequency. The display device DD may reduce power consumption by lowering the driving frequency for the second display area DA2.

[0062] The size of each of the first display area DA1 , the second display area DA2 , and the third display area DA3 may be a preset size and may be changed through an application program.

[0063] According to an embodiment, when a still image is displayed on the first display area DA1 and a video is displayed on the second display area DA2, the first display area DA1 may be driven at a driving frequency lower than a basic frequency, and the second display area DA2 may be driven at a driving frequency higher than or equal to the basic frequency.

[0064] Figure 3A and Figure 3B is a perspective view showing a display device DD2 according to an embodiment of the present disclosure. Figure 3A The unfolded state of the display device DD2 is shown, and Figure 3B The folded state of the display device DD2 is shown.

[0065] like Figure 3A and Figure 3BAs shown in , the display device DD2 includes a display area DA and a non-display area NDA. The display device DD2 may display an image through the display area DA. When the display device DD2 is in an unfolded state, the display area DA may include a plane defined by a first direction DR1 and a second direction DR2. The thickness direction of the display device DD2 may be parallel to a third direction DR3 intersecting the first direction DR1 and the second direction DR2. Accordingly, the front surface (or top surface) and the rear surface (or bottom surface) of the components constituting the display device DD2 may be defined in the third direction DR3. The non-display area NDA may be referred to as a frame area. For example, the display area DA may be in a rectangular shape. The non-display area NDA surrounds the display area DA.

[0066] The display area DA may include a first non-folding area NFA1, a folding area FA, and a second non-folding area NFA2. The folding area FA may be bent around a folding axis FX extending in the first direction DR1.

[0067] When the display device DD2 is folded, the first non-folding area NFA1 and the second non-folding area NFA2 may face each other. Accordingly, when the display device DD2 is fully folded, the display area DA may not be exposed to the outside, which may be referred to as an "inward folding" operation. However, this is provided only for illustrative purposes, and the operation of the display device DD2 is not limited thereto.

[0068] According to an embodiment of the present disclosure, when the display device DD2 is folded, the first non-folding area NFA1 and the second non-folding area NFA2 may face each other. Accordingly, when the display device DD2 is folded, the first non-folding area NFA1 may be exposed to the outside, which may be referred to as an "outward folding" operation.

[0069] The display device DD2 may perform only one of the inward folding operation and the outward folding operation. Alternatively, the display device DD2 may perform both the inward folding operation and the outward folding operation. In this case, the same area of ​​the display device DD2 (e.g., the folding area FA) may be folded inward and outward. Alternatively, a specific area of ​​the display device DD2 may be folded inward, and another area of ​​the display device DD2 may be folded outward.

[0070] exist Figure 3A and Figure 3B One folding region and two non-folding regions are shown in FIG. 1 , but the number of folding regions and the number of non-folding regions are not limited thereto. For example, the display device DD2 may include more than two non-folding regions and a plurality of folding regions between adjacent non-folding regions.

[0071] Figure 3A and Figure 3BThe folding axis FX is shown to be parallel to the shorter axis of the display device DD2. However, the present disclosure is not limited thereto. For example, the folding axis FX may extend in a direction (eg, the second direction DR2) parallel to the longer axis of the display device DD2.

[0072] Figure 3A and Figure 3B It is shown that the first non-folding area NFA1, the folding area FA and the second non-folding area NFA2 can be arranged in sequence in the second direction DR2. However, the present disclosure is not limited thereto. For example, the first non-folding area NFA1, the folding area FA and the second non-folding area NFA2 can be arranged in sequence in the first direction DR1.

[0073] A plurality of display areas DA1 and DA2 may be defined in the display area DA of the display device DD2. Figure 3A Two display areas DA1 and DA2 are shown, however, the number of the display areas DA1 and DA2 is not limited thereto.

[0074] The plurality of display areas DA1 and DA2 may include a first display area DA1 and a second display area DA2. For example, the first display area DA1 may be an area for displaying a first image IM1, and the second display area DA2 may be an area for displaying a second image IM2. For example, the first image IM1 may be a video, and the second image IM2 may be a still image.

[0075] The display device DD2 according to the embodiment may perform different operations according to the operation mode. The operation mode of the display device DD2 may include a single-frequency mode SFM and a multi-frequency mode MFM. In the single-frequency mode SFM, the display device DD2 may drive the first display area DA1 and the second display area DA2 at a basic frequency. According to the embodiment, in the multi-frequency mode MFM, the display device DD2 may drive the first display area DA1 for displaying the first image IM1 at a first driving frequency and drive the second display area DA2 for displaying the second image IM2 at a second driving frequency. According to the embodiment, the first driving frequency may be equal to or higher than the basic frequency, and the second driving frequency may be lower than the first driving frequency.

[0076] The size of each of the first display area DA1 and the second display area DA2 may be a preset size and may be changed by an application. According to an embodiment, the first display area DA1 may correspond to the first non-folding area NFA1, and the second display area DA2 may correspond to the second non-folding area NFA2. In addition, a first portion of the folding area FA may correspond to the first display area DA1, and a second portion of the folding area FA may correspond to the second display area DA2.

[0077] According to an embodiment, the entire portion of the folding area FA may correspond to only any one of the first display area DA1 and the second display area DA2.

[0078] According to an embodiment, the first display area DA1 may correspond to the first portion of the first non-folding area NFA1, and the second display area DA2 may correspond to the second portion of the first non-folding area NFA1, the folding area FA, and the second non-folding area NFA2. In other words, the area of ​​the second display area DA2 may be wider than that of the first display area DA1.

[0079] According to an embodiment, the first display area DA1 may correspond to the first non-folding area NFA1, the folding area FA, and a first portion of the second non-folding area NFA2, and the second display area DA2 may correspond to a second portion of the second non-folding area NFA2. In other words, the area of ​​the first display area DA1 may be wider than that of the second display area DA2.

[0080] like Figure 3B As shown in FIG, when the folding area FA is in the folded state, the first display area DA1 may correspond to the first non-folding area NFA1, and the second display area DA2 may correspond to the folding area FA and the second non-folding area NFA2.

[0081] although Figure 3A and Figure 3B A display device DD2 including one folding area is shown, however, the present disclosure is not limited thereto. For example, the present disclosure may be applied to a display device having two or more folding areas, a rollable display device, or a slidable display device.

[0082] Figure 4A is a view showing the operation of the display device DD in the single frequency mode SFM. Figure 4B is a view showing the operation of the display device DD in the multi-frequency mode MFM.

[0083] refer to Figure 4A , the first image IM1 displayed on the first display area DA1 is a video, and the second image IM2 displayed on the second display area DA2 may be a still image or an image with a longer change cycle (for example, a keyboard image for game processing). Figure 4A The first image IM1 displayed on the first display area DA1 shown in FIG. Figure 4A The second image IM2 displayed on the second display area DA2 shown in FIG. 1 is provided only for illustrative purposes, and various images may be displayed on the display device DD.

[0084] In the single frequency mode SFM, each of the first display area DA1 and the second display area DA2 of the display device DD may be driven at a basic frequency. For example, the basic frequency may be 120 Hz. In the single frequency mode SFM, images of the first frame F1 to the 120th frame F120 may be sequentially displayed on each of the first display area DA1 and the second display area DA2 of the display device DD for one second.

[0085] refer to Figure 4B In the multi-frequency mode MFM, the display device DD may set the driving frequency of the first display area DA1 for displaying the first image IM1 (i.e., video) to the first driving frequency and may set the driving frequency of the second display area DA2 for displaying the second image IM2 (i.e., still image) to the second driving frequency lower than the first driving frequency. The first driving frequency may be 120 Hz, and the second driving frequency may be 1 Hz. The first driving frequency and the second driving frequency may be variously changed.

[0086] In the multi-frequency mode MFM, when the first driving frequency is 120 Hz and the second driving frequency is 1 Hz, a data signal corresponding to the first image IM1 may be provided to the first display area DA1 of the display device DD during each of the first frame F1 to the 120th frame F120 for one second. A data signal corresponding to the second image IM2 may be provided to the second display area DA2 only during the first frame F1. In other words, during the second frame F2 to the 120th frame F120, no new data signal is provided to the second display area DA2. Accordingly, the second image IM2 identical to the second image IM2 of the first frame F1 may be displayed during the second frame F2 to the 120th frame F120.

[0087] although Figure 4B It is shown that the first driving frequency in the multi-frequency mode MFM is 120 Hz and the second driving frequency is 1 Hz, however, the present disclosure is not limited thereto. The second driving frequency may be variously changed to a frequency lower than the first driving frequency (eg, 60 Hz, 30 Hz, and 10 Hz).

[0088] Figure 5 is a block diagram of a display device DD according to an embodiment of the present disclosure.

[0089] refer to Figure 5 , the display device DD includes a display panel DP, a driving controller 100 , a data driving circuit 200 and a voltage generator 300 .

[0090] The driving controller 100 receives the image signal RGB and the control signal CTRL. The driving controller 100 converts the image signal RGB into the image data signal DS and outputs the conversion result. The driving controller 100 can output the scanning control signal SCS, the data control signal DCS, the emission control signal ECS and the voltage control signal VCS.

[0091] The data driving circuit 200 receives a data control signal DCS and an image data signal DS from the driving controller 100. The data driving circuit 200 converts the image data signal DS into a data signal, and then outputs the data signal to a plurality of data lines DL1 to DLm to be described later. Herein, m may be a natural number greater than 0.

[0092] The voltage generator 300 generates voltages for operation of the display panel DP in response to a voltage control signal VCS from the driving controller 100. According to an embodiment, the voltage generator 300 generates a first driving voltage ELVDD, a second driving voltage ELVSS, a first initialization voltage VINT1, and a second initialization voltage VINT2.

[0093] The display panel DP includes scan lines GIL1 to GILn, GCL1 to GCLn and GWL1 to GWLn+1, emission control lines EML1 to EMLn, data lines DL1 to DLm and pixels PX. Herein, n may be a natural number greater than 0. The display panel DP may further include a scan drive circuit SDC and an emission drive circuit EDC. According to an embodiment, the scan drive circuit SDC may be disposed at a first side of the display panel DP. The scan lines GIL1 to GILn, GCL1 to GCLn and GWL1 to GWLn+1 extend from the scan drive circuit SDC in a first direction DR1.

[0094] The emission driving circuit EDC is disposed at the second side of the display panel DP. The emission control lines EML1 to EMLn extend from the emission driving circuit EDC in a direction opposite to the first direction DR1.

[0095] The scan lines GIL1 to GILn, GCL1 to GCLn, and GWL1 to GWLn+1 and the emission control lines EML1 to EMLn are arranged to be spaced apart from each other in the second direction DR2. The data lines DL1 to DLm extend from the data driving circuit 200 in a direction opposite to the second direction DR2 and may be arranged to be spaced apart from each other in the first direction DR1.

[0096] according to Figure 5In the embodiment shown in FIG. 1 , the scan drive circuit SDC and the emission drive circuit EDC are arranged to face each other, and the pixel PX is interposed between the scan drive circuit SDC and the emission drive circuit EDC. However, the present disclosure is not limited thereto. For example, the scan drive circuit SDC and the emission drive circuit EDC may be arranged to be adjacent to each other in the non-display area NDA of the display panel DP. According to an embodiment, the scan drive circuit SDC and the emission drive circuit EDC may be integrally implemented into one circuit.

[0097] A plurality of pixels PX are electrically connected to scan lines GIL1 to GILn, GCL1 to GCLn and GWL1 to GWLn+1, emission control lines EML1 to EMLn and data lines DL1 to DLm. Each of the plurality of pixels PX may be electrically connected to four scan lines and one emission control line. For example, as shown in FIG. 4 , the pixels PX in the first row may be connected to scan lines GIL1, GCL1, GWL1 and GWL2 and an emission control line EML1. In addition, the pixels PX in the i-th row may be connected to scan lines GILi, GCLi, GWLi and GWLi+1 and an emission control line EMLi. In this article, i may be a natural number greater than 0 and less than or equal to n.

[0098] Each of the plurality of pixels PX includes a light emitting element ED (see Figure 6 ) and a pixel circuit PXC (see Figure 6 ). The pixel circuit PXC may include at least one transistor and at least one capacitor. The scan driving circuit SDC and the emission driving circuit EDC may include transistors formed by the same process as that for the pixel circuit PXC.

[0099] Each of the plurality of pixels PX receives a first driving voltage ELVDD, a second driving voltage ELVSS, a first initialization voltage VINT1 , and a second initialization voltage VINT2 from the voltage generator 300 .

[0100] The scan driving circuit SDC receives a scan control signal SCS from the driving controller 100. The scan driving circuit SDC may output scan signals to the scan lines GIL1 to GILn, GCL1 to GCLn, and GWL1 to GWLn+1 in response to the scan control signal SCS.

[0101] According to an embodiment, the driving controller 100 may determine the operation mode based on information included in the control signal CTRL. According to an embodiment, the driving controller 100 may determine the operation mode as the single frequency mode SFM based on mode information included in the control signal CTRL (see Figure 4A ) and Multi-Frequency Mode MFM (see Figure 4B) in one of the above. However, the present disclosure is not limited thereto. The driving controller 100 may determine the operation mode in response to a mode signal provided from the outside (e.g., an application processor, a graphics processor, or a main processor). The mode signal provided from the outside may indicate the operation mode of the display device DD among the single-frequency mode SFM and the multi-frequency mode MFM.

[0102] The driving controller 100 may determine the first display area DA1 (see FIG. 1 ) of the display panel DP according to the determined operation mode. Figure 1 ) and the second display area DA2 (see Figure 1 ) in each of the driving frequencies.

[0103] According to the implementation mode, Figure 4A As shown in FIG. 1 , when the determined operation mode is the single frequency mode SFM, the driving controller 100 drives the first display area DA1 and the second display area DA2 at a basic frequency (eg, 120 Hz).

[0104] When the determined operation mode is the multi-frequency mode MFM, the driving controller 100 may divide the display panel DP into the first display area DA1 and the second display area DA2 and may set a driving frequency for each of the first display area DA1 and the second display area DA2. For example, in the multi-frequency mode MFM, the driving controller 100 may drive the first display area DA1 at a first driving frequency (e.g., 120 Hz) and may drive the second display area DA2 at a second driving frequency (e.g., 1 Hz).

[0105] According to an embodiment of the present disclosure, the driving controller 100 may accumulate stress data based on the image signal RGB, and may output an image data signal DS obtained by compensating the image signal RGB according to the accumulated stress data. The operation of the driving controller 100 will be described in detail later.

[0106] Figure 6 is a circuit diagram of a pixel PX according to an embodiment of the present disclosure.

[0107] Figure 6 shows the connection to the data lines DL1 to DLm (see Figure 5 ), the j-th data line DLj (hereinafter, also referred to as the data line DLj), the scan lines GIL1 to GILn, GCL1 to GCLn, and GWL1 to GWLn+1 (see Figure 5 ) among the i-th scan line GILi, GCLi and GWLi and the (i+1)-th scan line GWLi+1 (hereinafter, also referred to as the scan lines GILi, GCLi, GWLi and GWLi+1), and the emission control lines EML1 to EMLn (see Figure 5) in the pixel PX of the i-th emission control line EMLi (hereinafter, also referred to as the emission control line EMLi).

[0108] Figure 5 Each pixel PX shown in FIG. 1 may have Figure 6 The circuit configuration of the equivalent circuit diagram of the pixel PX shown in FIG.

[0109] refer to Figure 6 According to an embodiment, a pixel PX of a display device includes a pixel circuit PXC and at least one light emitting element ED. According to an embodiment, the light emitting element ED may be a light emitting diode. According to an embodiment, as an example, one pixel PX includes one light emitting element ED. The pixel circuit PXC includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, and a capacitor Cst.

[0110] According to an embodiment, the third transistor T3 and the fourth transistor T4 among the first transistor T1 to the seventh transistor T7 are N-type transistors including an oxide semiconductor used as a semiconductor layer. Each of the first transistor T1, the second transistor T2, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 is a P-type transistor including a low-temperature polycrystalline silicon ("LTPS") semiconductor layer. However, the present disclosure is not limited thereto, and all of the first transistor T1 to the seventh transistor T7 may be P-type transistors or N-type transistors. According to an embodiment, at least one of the first transistor T1 to the seventh transistor T7 may be an N-type transistor, and the remaining transistors may be P-type transistors. In addition, the circuit configuration of the pixel according to an embodiment of the present disclosure is not limited to Figure 6 The circuit configuration shown in FIG. Figure 6 The pixel circuit PXC shown in FIG. 1 is provided for illustrative purposes only. For example, the configuration of the pixel circuit PXC may be changed and implemented.

[0111] The scan lines GILi, GCLi, GWLi, and GWLi+1 may transmit scan signals GIi, GCi, GWi, and GWi+1, respectively, and the emission control line EMLi may transmit an emission control signal EMi. The data line DLj transmits a data signal Dj. The data signal Dj may have the same value as the image signal RGB (see Figure 5 ) The first driving voltage line VL1, the second driving voltage line VL2, the third driving voltage line VL3 and the fourth driving voltage line VL4 can respectively send the first driving voltage ELVDD, the second driving voltage ELVSS, the first initialization voltage VINT1 and the second initialization voltage VINT2.

[0112] The first transistor T1 includes a first electrode connected to the first driving voltage line VL1 through the fifth transistor T5, a second electrode electrically connected to the anode of the light emitting element ED through the sixth transistor T6, and a gate electrode connected to one terminal of the capacitor Cst. The first transistor T1 can receive the data signal Dj transmitted through the data line DLj according to the switching operation of the second transistor T2 and can supply the driving current Id to the light emitting element ED.

[0113] The second transistor T2 includes a first electrode connected to the data line DLj, a second electrode connected to the first electrode of the first transistor T1, and a gate electrode connected to the scan line GWLi. The second transistor T2 can be turned on in response to the scan signal GWi transmitted through the scan line GWLi and can transmit the data signal Dj transmitted through the data line DLj to the first electrode of the first transistor T1.

[0114] The third transistor T3 includes a first electrode connected to the gate electrode of the first transistor T1, a second electrode connected to the second electrode of the first transistor T1, and a gate electrode connected to the scan line GCLi. The third transistor T3 can be turned on in response to a scan signal GCi sent through the scan line GCLi, and connects the gate electrode of the first transistor T1 to the second electrode, so that the first transistor T1 is diode-connected.

[0115] The fourth transistor T4 includes a first electrode connected to the gate electrode of the first transistor T1, a second electrode connected to the third driving voltage line VL3 for transmitting the first initialization voltage VINT1, and a gate electrode connected to the scan line GILi. The fourth transistor T4 can be turned on in response to the scan signal GIi received through the scan line GILi to perform an initialization operation for transmitting the first initialization voltage VINT1 to the gate electrode of the first transistor T1 to initialize the voltage of the gate electrode of the first transistor T1.

[0116] The fifth transistor T5 may include a first electrode connected to the first driving voltage line VL1, a second electrode connected to the first electrode of the first transistor T1, and a gate electrode connected to the emission control line EMLi.

[0117] The sixth transistor T6 includes a first electrode connected to the second electrode of the first transistor T1, a second electrode connected to the anode of the light emitting element ED, and a gate electrode connected to the emission control line EMLi.

[0118] The fifth transistor T5 and the sixth transistor T6 may be simultaneously turned on in response to the emission control signal EMi received through the emission control line EMLi. Accordingly, the first driving voltage ELVDD may be compensated by the first transistor T1 as a diode-connected transistor and may be transmitted to the light emitting element ED.

[0119] The seventh transistor T7 includes a first electrode connected to the second electrode of the sixth transistor T6, a second electrode connected to the fourth driving voltage line VL4, and a gate electrode connected to the scan line GWLi+1. The seventh transistor T7 is turned on in response to the scan signal GWi+1 received through the scan line GWLi+1 and bypasses the current applied to the anode of the light emitting element ED to the fourth voltage line VL4.

[0120] As described above, one terminal of the capacitor Cst is connected to the gate electrode of the first transistor T1, and the other terminal of the capacitor Cst is connected to the first driving voltage line VL1. The cathode of the light emitting element ED may be connected to the second driving voltage line VL2 transmitting the second driving voltage ELVSS. According to the embodiment, the structure of the pixel PX according to the embodiment is not limited to Figure 6 For example, various modifications may be made to the number of transistors included in one pixel PX, the number of capacitors included in the pixel PX, and the connection relationship between the transistors and the capacitors.

[0121] Fig. 7A shows the single frequency mode SFM from Figure 5 The scan driving circuit SDC shown in FIG. 1 outputs scan signals GL1 to GLn and scan signals GC1 to GCn.

[0122] Figure 7B shows the multi-frequency mode MFM from Figure 5 The scan driving circuit SDC shown in FIG. 1 outputs scan signals GL1 to GLn and scan signals GC1 to GCn.

[0123] refer to Fig. 7A and Figure 7B ,assumed Figure 1 The first display area DA1 shown in FIG. 1 may correspond to the scan signals GI1 to GIk and the scan signals GC1 to GCk, and the second display area DA2 may correspond to the scan signals GIk+1 to GIn and the scan signals GCk+1 to GCn. Herein, k may be a natural number greater than 0 and less than or equal to n. Various changes may be made to the number of scan signals corresponding to the first display area DA1 and the second display area DA2.

[0124] First, refer to Figure 5 and Fig. 7A, the scan control signal SCS may include a start signal FLM. The start signal FLM may be a signal indicating the start of one frame. The start signal FLM may be turned into an activation level (e.g., a high level) in each of the first frame F1, the second frame F2, the third frame F3, ..., and the 120th frame F120.

[0125] The scan driving circuit SDC generates scan signals GI1 to GIn and scan signals GC1 to GCn in response to the start signal FLM. When the driving frequency is the first driving frequency (e.g., 120 Hz) in the single frequency mode SFM, the scan driving circuit SDC sequentially activates the scan signals GI1 to GIn to a high level in each of the first frame F1, the second frame F2, the third frame F3, ... and the 120th frame F120, and sequentially activates the scan signals GC1 to GCn to a high level. Although Fig. 7A Scan signals GI1 to GIn and scan signals GC1 to GCn are shown, however, the scan driving circuit SDC may generate scan signals GW1 to GWn+1 (not shown) provided to the scan lines GWL1 to GWLn+1. The emission driving circuit EDC may generate emission control signals EM1 to EMn (not shown) provided to the emission control lines EML1 to EMLn.

[0126] In the single frequency mode SFM, the scan signals GW1 to GWn+1 and the emission control signals EM1 to EMn may also be sequentially activated to a low level in each of the first frame F1, the second frame F2, the third frame F3, . . . , and the 120th frame F120.

[0127] As described above, the frequency of each of the scan signals GI1 to GIn and the scan signals GC1 to GCn in the single frequency mode SFM may be the first driving frequency (eg, 120 Hz).

[0128] refer to Figure 5 and Figure 7B , when the driving frequency is the second driving frequency (e.g., 1 Hz) in the multi-frequency mode MFM, the scan driving circuit SDC sequentially activates the scan signals GI1 to GIn and the scan signals GC1 to GCn to a high level during the first frame F1. The scan driving circuit SDC sequentially activates the scan signals GI1 to GIk to a high level during each of the second frame F2, the third frame F3, ..., and the 120th frame F120, and maintains the scan signals GIk+1 to GIn at an inactive level (e.g., a low level).

[0129] The scan driving circuit SDC sequentially activates the scan signals GC1 to GCk to a high level in each of the second frame F2, the third frame F3, . . . , and the 120th frame F120, and maintains the scan signals GCk+1 to GCn at an inactive level (eg, a low level).

[0130] In the multi-frequency mode MFM, the first frame F1 may be referred to as a full-driving frame FDF for driving both the first display area DA1 and the second display area DA2 (see Fig. 10B ). In addition, in the multi-frequency mode MFM, the second frame F2, the third frame F3, . . . , and the 120th frame F120 may be referred to as mask-enabled frames driven only in the first display area DA1.

[0131] although Figure 7B Although not shown, however, in the multi-frequency mode MFM, the scanning signals GW1 to GWn+1 may be sequentially activated to a low level in each of the second frame F2, the third frame F3, ..., and the 120th frame F120. Similarly, in the multi-frequency mode MFM, the emission control signals EM1 to EMn may be sequentially activated to a low level in each of the second frame F2, the third frame F3, ..., and the 120th frame F120.

[0132] As described above, in the multi-frequency mode MFM, the frequency of each of the scan signals GIk+1 to GIn and the scan signals GCk+1 to GCn may be a second driving frequency (eg, 1 Hz) lower than the first driving frequency (eg, 120 Hz).

[0133] Since the scan signals GIk+1 to GIn and the scan signals GCk+1 to GCn are maintained at an inactive level, i.e., a low level, in each of the second frame F2, the third frame F3, ..., and the 120th frame F120 in the multi-frequency mode MFM, the second display area DA2 of the display panel DP is driven at a frequency lower than the basic frequency. The display device DD can reduce power consumption by lowering the driving frequency for the second display area DA2.

[0134] Figure 8 is a block diagram illustrating a driving controller 100 according to an embodiment of the present disclosure.

[0135] refer to Figure 8 The driving controller 100 includes a compensation unit 110 , a stress time calculation unit 120 and a memory 130 .

[0136] The compensation unit 110 calculates stress data STR_DAT based on the image signal RGB and the control signal CTRL provided from the outside, the previous stress data PSTR_DAT provided from the memory 130, and the first stress time ST1 and the second stress time ST2 provided from the stress time calculation unit 120. The compensation unit 110 outputs an image data signal DS corresponding to the image signal RGB based on the stress data STR_DAT, and stores the stress data STR_DAT in the memory 130.

[0137] Figure 6 The light emitting element ED in the pixel PX shown in FIG. 1 and the first transistor T1 to the seventh transistor T7 in the pixel PX may degrade according to the operation time. Such degradation may change the characteristics of the pixel PX. In addition, the degradation of the pixel PX may change according to the image signal RGB. For example, as the brightness of the image signal RGB increases, the degradation rate of the pixel PX may increase. In addition, the degradation of the pixel PX may change according to the operation time of the pixel PX.

[0138] The compensation unit 110 may store compensation values ​​in advance according to the image signal RGB, the first stress time ST1, and the second stress time ST2. The compensation unit 110 may store stress data STR_DAT based on compensation values ​​corresponding to the image signal RGB, the first stress time ST1, and the second stress time ST2.

[0139] The memory 130 may store the stress data STR_DAT calculated by the compensation unit 110 and provide the stored stress data STR_DAT to the compensation unit 110 as previous stress data PSTR_DAT for a subsequent frame.

[0140] The stress time calculation unit 120 may determine the operation mode of the display device DD based on the control signal CTRL. According to an embodiment, the stress time calculation unit 120 may determine the operation mode to be one of the single frequency mode SFM and the multi-frequency mode MFM based on the control signal CTRL.

[0141] When the operation mode is multi-frequency mode MFM and the current frame is a mask-enabled frame MEF (see Fig. 10B ), the stress time calculation unit 120 calculates the stress time of the first display area DA1 (reference Figure 1 ) is counted in each horizontal line of the stress time. As used herein, a "horizontal line" may be a line of pixels in the same row, and a "stress time" may be the number of times each horizontal line is to be operated per second.

[0142] When the operation mode is multi-frequency mode MFM and the current frame is a full drive frame FDF (see Fig. 10B ), the stress time calculation unit 120 calculates the stress time of the second display area DA2 (reference Figure 1 ) are counted in each horizontal line.

[0143] The stress time calculation unit 120 can calculate the time of the display panel DP (see Figure 5 ) is provided to the compensation unit 110. According to an embodiment, the first stress time ST1 may be the stress time of each horizontal line set in the first display area DA1, and the second stress time ST2 may be the stress time of each horizontal line set in the second display area DA2.

[0144] The compensation unit 110 may receive an image signal (hereinafter referred to as a 'line signal') of the image signal RGB corresponding to each horizontal line of the display panel DP and calculate stress data STR_DAT corresponding to each horizontal line of the display panel DP based on the first stress time ST1 and the second stress time ST2.

[0145] Although the following description will be made in which the compensation unit 110 calculates the stress data STR_DAT corresponding to the horizontal line of the display panel DP, the present disclosure is not limited thereto.

[0146] For example, the compensation unit 110 may calculate the stress data STR_DAT for every at least two horizontal lines of the display panel DP. In this case, the stress time calculation unit 120 may calculate a first stress time ST1 corresponding to each of at least two horizontal lines in the first display area DA1 of the display panel DP and a second stress time ST2 corresponding to each of at least two horizontal lines in the second display area DA2 of the display panel DP.

[0147] Fig. 9A is a view showing the operation of the stress time calculation unit 120 when the operation mode is the single frequency mode. Fig. 9B is a view showing the operation of the stress time calculation unit 120 when the operation mode is the multi-frequency mode.

[0148] Fig. 10A is a timing diagram showing signals used in the display device when the operation mode is the single frequency mode SFM. Fig. 10B is a timing chart showing signals used in the display device when the operation mode is the multi-frequency mode MFM.

[0149] Fig.11 : is a flowchart showing the operation of the stress time calculation unit when the operation mode is the multi-frequency mode MFM.

[0150] The driving controller 100 (see Figure 5) can be divided into a first operation when the operation mode is the single frequency mode SFM, a second operation when the operation mode is the multi-frequency mode MFM and the current frame is the mask enable frame MEF, and a third operation when the operation mode is the multi-frequency mode MFM and the current frame is the full-drive frame FDF.

[0151] When the operation mode is the single frequency mode SFM (ie, in the first operation), the display device DD operates as follows.

[0152] refer to Figure 5 , Figure 8 , Fig. 9A as well as Fig. 10A , the stress time calculation unit 120 includes counters CNT1 to CNT14 and a counter controller 121 .

[0153] The counters CNT1 to CNT14 may include first counters CNT1 to CNT8 and second counters CNT9 to CNT14. The first counters CNT1 to CNT8 and the second counters CNT9 to CNT14 may correspond to the horizontal lines L1 to L14 of the display panel DP.

[0154] The counter controller 121 of the stress time calculation unit 120 determines the operation mode of the display device DD in response to the control signal CTRL. The stress time calculation unit 120 determines whether the operation mode is the multi-frequency mode MFM (S110). When the operation mode is not the multi-frequency mode MFM, that is, when the operation mode is the single-frequency mode SFM (that is, in the first operation), the stress time calculation unit 120 may calculate as follows Fig. 9A The first stress time ST1 is shown in FIG.

[0155] The scan control signal SCS provided from the drive controller 100 to the scan driving circuit SDC may include a start signal FLM. The start signal FLM may be a signal indicating the start of one frame. The start signal FLM may be turned into an activation level (e.g., a high level) in each of the first frame F1, the second frame F2, the third frame F3, ..., and the 120th frame F120.

[0156] The scan driving circuit SDC may sequentially activate the scan signals GI1 to GIn to a high level in response to the start signal FLM in each of the first frame F1, the second frame F2, the third frame F3, ..., and the 120th frame F120. Each of the first frame F1, the second frame F2, the third frame F3, ..., and the 120th frame F120 may be a full-driving frame FDF in the single frequency mode SFM.

[0157] The control signal CTRL received by the driving controller 100 may include a data enable signal DE. The data enable signal DE may be a signal that is converted to an activation level in each horizontal line when a valid image signal RGB is received. For example, when the pixels PX provided in the display panel DP are provided on 14 horizontal lines L1 to L14, the data enable signal DE is converted to an activation level fourteen times in the single frequency mode SFM. In other words, no matter when each of the horizontal lines L1 to L14 is driven, the data enable signal DE may be converted to an activation level in the single frequency mode SFM.

[0158] According to an embodiment, the counter controller 121 may control each of the counters CNT1 to CNT14 to count by providing a counter control signal CTRLC to each of the counters CNT1 to CNT14 in response to the start signal FLM in the single frequency mode SFM.

[0159] For example, when the start signal FLM turns to the activation level in the first frame F1, the compensation unit 110 may calculate the stress for the horizontal line L1. In this case, each of the counters CNT1 to CNT14 counts. In this case, the count value of the counter CNT1 corresponding to the horizontal line L1 is reset after being provided to the compensation unit 110 as the first stress time ST1. In other words, when the horizontal line L1 corresponding to the counter CNT1 is driven, the counter CNT1 may be reset.

[0160] When the start signal FLM turns to the active level in the second frame F2, each of the counters CNT1 to CNT14 counts. In this case, the count value of the counter CNT2 corresponding to the horizontal line L2 is reset after being provided to the compensation unit 110 as the first stress time ST1.

[0161] Similarly, when the start signal FLM turns to the active level in the 14th frame F14, the horizontal line L14 of the display panel DP is driven, and the counters CNT1 to CNT14 count. In this case, the count value of the counter CNT14 corresponding to the horizontal line L14 is reset after being provided to the compensation unit 110 as the first stress time ST1.

[0162] When the start signal FLM turns to the active level in the 15th frame F15, each of the counters CNT1 to CNT14 counts. In this case, the count value of the counter CNT1 corresponding to the horizontal line L1, that is, '14', is reset after being provided to the compensation unit 110 as the first stress time ST1. The compensation unit 110 may calculate the operation time of the horizontal line L1 based on the first stress time ST1 corresponding to the horizontal line L1 and the frequency of the display panel DP in the single frequency mode SFM.

[0163] For example, when the driving frequency of the single frequency mode SFM is 120 Hz, the operation time of the horizontal line L1 can be calculated by the following equation 1:

[0164] <Equation 1>

[0165] Operation time = first stress time ST1 / driving frequency of single frequency mode SFM

[0166] like Fig. 9A As shown in , since the first stress time ST1 is '14' and the driving frequency of the single frequency mode SFM is 120 Hz, the operation time is 14 / 120=116.7 milliseconds (ms).

[0167] The compensation unit 110 may calculate stress data STR_DAT for the horizontal line L1 based on the line image signal of the image signal RGB corresponding to the horizontal line L1 and the operation time, that is, 116.7 ms.

[0168] When the start signal FLM turns to the active level in the 16th frame F16, each of the counters CNT1 to CNT14 counts. In this case, the count value of the counter CNT2 corresponding to the horizontal line L2, ie, '14', is reset after being provided to the compensation unit 110 as the first stress time ST1.

[0169] The compensation unit 110 may calculate stress data STR_DAT for the horizontal line L2 based on the line image signal of the image signal RGB corresponding to the horizontal line L2 and the operation time, that is, 116.7 ms.

[0170] When the start signal FLM turns to the active level in the 17th frame F17, each of the counters CNT1 to CNT14 counts. In this case, the count value of the counter CNT3 corresponding to the horizontal line L3, ie, '14', is reset after being provided to the compensation unit 110 as the first stress time ST1.

[0171] The compensation unit 110 may calculate stress data STR_DAT for the horizontal line L3 based on the line image signal of the image signal RGB corresponding to the horizontal line L3 and the operation time, that is, 116.7 ms.

[0172] When the operation mode is the multi-frequency mode MFM, and when the current frame is the mask enable frame MEF (ie, in the second operation), the operation of the driving controller 100 in the display device DD is as follows.

[0173] refer to Figure 8 , Fig. 9B , Fig. 10B as well as Fig.11, when the operation mode is the multi-frequency mode MFM ( S110 ), the stress time calculation unit 120 determines whether the current frame is a masking enable frame MEF ( S120 ).

[0174] The data enable signal DE is a signal that turns to an active level in each horizontal line when receiving a valid image signal RGB. Accordingly, when the second display area DA2 is driven in the multi-frequency mode MFM, the data enable signal DE may be maintained at an inactive level (eg, a low level).

[0175] The stress time calculation unit 120 may determine a frame including a section in which the data enable signal DE is maintained at an inactive level as the mask enable frame MEF. Fig. 9B As shown in the figure, each of the first frame F1, the fifth frame F5, the ninth frame F9, the thirteenth frame F13 and the seventeenth frame F17 is a full-drive frame FDF, and each of the second frame F2, the third frame F3, the fourth frame F4, the sixth frame F6, the seventh frame F7, the eighth frame F8, the tenth frame F10, the eleventh frame F11, the twelfth frame F12, the fourteenth frame F14, the fifteenth frame F15 and the sixteenth frame F16 is a mask enable frame MEF.

[0176] In an embodiment, if Fig. 9B As shown in FIG. 1 , the 14 horizontal lines L1 to L14 of the display panel DP include first horizontal lines L1 to L8 corresponding to the first display area DA1 and second horizontal lines L9 to L14 corresponding to the second display area DA2.

[0177] The first counters CNT1 to CNT8 correspond to the first horizontal lines L1 to L8 , respectively, and the second counters CNT9 to CNT14 correspond to the second horizontal lines L9 to L14 , respectively.

[0178] When the current frame is the mask enable frame MEF, the counter controller 121 of the stress time calculation unit 120 controls the first counters CNT1 to CNT8 corresponding to the first display area DA1 to count by supplying a counter control signal CTRLC to each of the first counters CNT1 to CNT8 ( S130 ).

[0179] When the current frame is not the mask enable frame MEF, that is, when the current frame is the full drive frame FDF, the counter controller 121 of the stress time calculation unit 120 controls the first counters CNT1 to CNT8 corresponding to the first display area DA1 and the second counters CNT9 to CNT14 corresponding to the second display area DA2 to count by providing a counter control signal CTRLC to each of the counters CNT1 to CNT14 (S140).

[0180] According to an embodiment, when the current frame is the mask enable frame MEF in the multi-frequency mode MFM, the counter controller 121 may control each of the first counters CNT1 to CNT8 corresponding to the first display area DA1 to count in response to the start signal FLM.

[0181] For example, when the start signal FLM turns to the active level in the second frame F2, the compensation unit 110 may calculate the stress for the horizontal line L1. In this case, each of the counters CNT1 to CNT8 counts. In this case, the count value of the counter CNT1 corresponding to the horizontal line L1 is reset after being provided to the compensation unit 110 as the first stress time ST1.

[0182] When the start signal FLM turns to the active level in the third frame F3, each of the counters CNT1 to CNT8 counts. In this case, the count value of the counter CNT2 corresponding to the horizontal line L2 is reset after being provided to the compensation unit 110 as the first stress time ST1.

[0183] Similarly, when the start signal FLM turns to the active level in the 11th frame F11, the horizontal line L8 of the display panel DP is driven and each of the counters CNT1 to CNT8 counts. In this case, the count value of the counter CNT8 corresponding to the horizontal line L8 is reset after being provided to the compensation unit 110 as the first stress time ST1.

[0184] When the operation mode is the multi-frequency mode MFM, and when the current frame is the full driving frame FDF (ie, in the third operation), the operation of the driving controller 100 in the display device is as follows.

[0185] refer to Figure 8 , Fig. 9B , Fig. 10B as well as Fig.11 When the current frame is the full-driving frame FDF in the multi-frequency mode MFM, the counter controller 121 may control the counters CNT1 to CNT14 corresponding to the first display area DA1 and the second display area DA2 to count in response to the start signal FLM.

[0186] For example, when the start signal FLM turns to the active level in the first frame F1, the compensation unit 110 may calculate the stress for the horizontal line L9. In this case, each of the counters CNT1 to CNT14 counts. In this case, the count value of the counter CNT9 corresponding to the horizontal line L9 is reset after being provided to the compensation unit 110 as the second stress time ST2.

[0187] When the start signal FLM turns to the active level in the fifth frame F5, each of the counters CNT1 to CNT14 counts. In this case, the count value of the counter CNT10 corresponding to the horizontal line L10 is reset after being provided to the compensation unit 110 as the second stress time ST2.

[0188] When the start signal FLM turns to the active level in the ninth frame F9, the horizontal line L11 of the display panel DP is driven, and each of the counters CNT1 to CNT14 counts. In this case, the count value of the counter CNT11 corresponding to the horizontal line L11 is reset after being provided to the compensation unit 110 as the second stress time ST2.

[0189] Similarly, when the stress time calculation unit 120 operates, the stress with respect to the horizontal line L1 of the display panel DP may be calculated in the 25th frame F25 (not shown). In this case, the count value of the counter CNT1 is '6'.

[0190] For example, in the multi-frequency mode MFM, when the second driving frequency of the second display area DA2 is 30 Hz, the operation time of the horizontal line L1 is 6 / 30=200 milliseconds.

[0191] As described in S140 , when the current frame is the full-driving frame FDF, the counters CNT1 to CNT14 corresponding to the first display area DA1 and the second display area DA2 count.

[0192] When the start signal FLM is turned to the activation level in the 12th frame F12 as the mask enable frame, each of the counters CNT1 to CNT8 counts. In this case, the count value of the counter CNT1 corresponding to the horizontal line L1 becomes '10'. The counter CNT1 counts even in the fifth frame F5 and the ninth frame F9 as the full-drive frames except the third frame F3, the fourth frame F4, the sixth frame F6, the seventh frame F7, the eighth frame F8, the tenth frame F10, the eleventh frame F11 and the twelfth frame F12.

[0193] The compensation unit 110 may calculate the operation time of the horizontal line L1 based on the first stress time ST1 corresponding to the horizontal line L1 and the first driving frequency of the first display area DA1 in the multi-frequency mode MFM of the display panel DP.

[0194] For example, when the first driving frequency of the first display area DA1 in the multi-frequency mode MFM is 120 Hz, the operation time of the horizontal line L1 is 10 / 120=83.3 ms.

[0195] The compensation unit 110 may calculate stress data STR_DAT for the horizontal line L1 based on the line image signal of the image signal RGB corresponding to the horizontal line L1 and the operation time, that is, 83.3 ms.

[0196] When the start signal FLM turns to the active level in the 14th frame F14, each of the counters CNT1 to CNT8 counts. In this case, the count value of the counter CNT2 corresponding to the horizontal line L2, ie, '10', is reset after being provided to the compensation unit 110 as the first stress time ST1.

[0197] The compensation unit 110 may calculate stress data STR_DAT for the horizontal line L2 based on the line image signal of the image signal RGB corresponding to the horizontal line L2 and the operation time, that is, 83.3 ms.

[0198] When the start signal FLM turns to the active level in the 15th frame F15, each of the counters CNT1 to CNT8 counts. In this case, the count value of the counter CNT3 corresponding to the horizontal line L3, ie, '10', is reset after being provided to the compensation unit 110 as the first stress time ST1.

[0199] The compensation unit 110 may calculate stress data STR_DAT for the horizontal line L3 based on the line image signal of the image signal RGB corresponding to the horizontal line L3 and the operation time, that is, 83.3 ms.

[0200] As described above, the stress time calculation unit 120 includes the counters CNT1 to CNT14 corresponding to the horizontal lines L1 to L14 of the display panel DP, thereby counting the first stress time ST1 of each of the horizontal lines L1 to L14.

[0201] Accordingly, even if the first driving frequency of the first display area DA1 and the second driving frequency of the second display area DA1 are different from each other, the compensation unit 110 may accurately calculate the operation time of each of the horizontal lines L1 to L14.

[0202] Fig.12 is a diagram showing the operation of the stress time calculation unit when the operation mode is the multi-frequency mode MFM.

[0203] refer to Figure 5 , Figure 8 as well as Fig.12 , the counter controller 121 of the stress time calculation unit 120 may determine the operation mode of the display device DD based on the control signal CTRL.

[0204] When the operation mode is the multi-frequency mode MFM, the counter controller 121 of the stress time calculation unit 120 controls the first counters CNT1 to CNT8 and the second counters CNT9 to CNT14 to count during the full driving frame FDF. Fig.12 As shown in FIG. 2 , each of the first frame F1 , the fifth frame F5 , the ninth frame F9 , the 13th frame F13 , the 17th frame F17 , . . . , the 33rd frame F33 , and the 37th frame F37 is a full-drive frame FDF.

[0205] When the operation mode is the multi-frequency mode MFM, and when the current frame is the masking enable frame MEF, the first counters CNT1 to CNT8 and the second counters CNT9 to CNT14 of the stress time calculation unit 120 cannot operate. Fig.12 As shown in FIG. 4 , each of the second frame F2 , the third frame F3 , the fourth frame F4 , the sixth frame F6 , the seventh frame F7 , and the eighth frame F8 is a masking enable frame MEF.

[0206] When the display panel DP includes 14 horizontal lines L1 to L14 , and when the count value of each of the first counters CNT1 to CNT8 is '14', the count value may be reset after being provided to the compensation unit 110 as the first stress time ST1 .

[0207] When the count value of each of the second counters CNT9 to CNT14 is '14', the count value may be reset after being provided to the compensation unit 110 as the first stress time ST1.

[0208] For example, when the second driving frequency of the second display area DA2 is 30 Hz in the multi-frequency mode MFM, the operation time of the horizontal line L1 is 14 / 30=466.7 ms.

[0209] The compensation unit 110 may calculate stress data STR_DAT for the horizontal line L1 based on the line image signal of the image signal RGB corresponding to the horizontal line L1 and the operation time, that is, 466.7 ms.

[0210] In the same manner, the display device DD may calculate stress data STR_DAT for each of the 14 horizontal lines L1 to L14 of the display panel DP.

[0211] The display device with this configuration can operate in a multi-frequency mode, in which the first display area is driven at a first driving frequency and the second display area is driven at a second driving frequency lower than the first driving frequency. Since the driving frequency of the second display area is reduced, the power consumption of the display device can be reduced.

[0212] In addition, in the multi-frequency mode, the display device calculates stress data for the first display area in the mask enable frame and calculates stress data for the second display area in the full drive frame. The stress duration with respect to each line can be calculated using a counter corresponding to the line of the display panel.

[0213] The driving controller of the display device can perform a stress compensation operation based on the stress data and stress duration of each line of the display panel. Accordingly, the change of the characteristics of the pixel can be compensated. Accordingly, the image quality of the display device can be effectively improved.

[0214] Although the embodiments of the present disclosure have been described for illustrative purposes, those skilled in the art will recognize that various modifications and substitutions are possible without departing from the scope and essence of the present invention as disclosed in the appended claims. Accordingly, the technical scope of the present disclosure is not limited to the detailed description of this specification, but should be defined by the claims.

[0215] While the present disclosure has been described with reference to the embodiments thereof, it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the disclosure as set forth in the appended claims.

Claims

1. A display device, comprising: A display panel, the display panel comprising a first display area and a second display area; as well as a drive controller configured to receive an image signal and a control signal, output an image data signal to be provided to the display panel, drive the first display area of ​​the display panel at a first drive frequency and drive the second display area at a second drive frequency different from the first drive frequency, The display panel includes a first horizontal line corresponding to the first display area and a second horizontal line corresponding to the second display area, and Wherein, the drive controller is configured as: counting a first stress time of each of the first horizontal lines, and calculating a first operation time of each of the first horizontal lines based on the first stress time and the first driving frequency, counting a second stress time for each of the second horizontal lines, and calculating a second operation time for each of the second horizontal lines based on the second stress time and the second driving frequency, and The image data signal obtained by compensating for the stress of the image signal based on the image signal, the first operation time, and the second operation time is output.

2. The display device according to claim 1, wherein: The drive controller is configured to: The image data signal obtained by compensating for the stress of the image signal corresponding to the first horizontal line based on the image signal and the first operation time of each of the first horizontal lines is output.

3. The display device according to claim 1, wherein: The drive controller is configured to: The image data signal obtained by compensating for the stress of the image signal corresponding to the second horizontal line based on the image signal and the second operation time of each of the second horizontal lines is output.

4. The display device according to claim 1, wherein: The drive controller comprises: a stress time calculation unit configured to count the first stress time of each of the first horizontal lines and count the second stress time of each of the second horizontal lines; a memory configured to store previous stress data of a previous frame; and a compensation unit configured to calculate stress data of a current frame based on the image signal, the previous stress data, the first operation time, and the second operation time, and output the image data signal corresponding to the image signal based on the stress data, and Wherein, the stress data from the compensation unit is stored in the memory as the previous stress data for a subsequent frame.

5. The display device according to claim 4, wherein: The stress time calculation unit comprises: a first counter corresponding to the first horizontal line and configured to output the first stress time; a second counter corresponding to the second horizontal line and configured to output the second stress time; and A counter controller is configured to control the first counter and the second counter in response to the control signal.

6. The display device according to claim 5, wherein: The control signal includes a start signal indicating the start of each frame, and The stress time calculation unit controls the first counter and the second counter in response to the start signal.

7. The display device according to claim 6, wherein: The frame includes: a full drive frame, the full drive frame being used to drive the first horizontal line and the second horizontal line; and A mask enable frame is used to drive only the first horizontal line of the first horizontal line and the second horizontal line.

8. The display device according to claim 7, wherein: The counter controller is configured to: The first counter is controlled to count during the full-drive frame and the mask enable frame, and the second counter is controlled to count during the mask enable frame.

9. The display device according to claim 8, wherein: Each of the first counters is reset when a corresponding horizontal line among the first horizontal lines is driven, and Wherein, each of the second counters is reset when a corresponding horizontal line among the second horizontal lines is driven.

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