Manufacturing method of substrate and substrate structure

Abstract

The invention provides a substrate manufacturing method and a substrate structure, and the manufacturing method comprises the steps: providing a substrate, and forming a copper interconnection layer on the upper surface of the substrate; laying a dry film on the substrate, and enabling the dry film to cover the copper interconnection layer and the upper surface of the substrate; after exposure and development, openings are formed in the periphery of the copper interconnection layer, and the copper interconnection layer is completely exposed; forming a metal layer on the copper interconnection layer, and enabling the metal layer to fill the opening and cover the copper interconnection layer; and after the residual dry film is removed, an insulating layer is formed on the substrate, and the insulating layer completely covers the metal layer and the upper surface of the substrate. According to the invention, the metal titanium is sprayed on the periphery of the copper interconnection layer to form the metal layer, so that the problem of product failure caused by copper ion migration due to bias voltage in a super-accelerated life test is effectively solved; the substrate product sprayed with the metallic titanium can keep good performance under various environmental conditions, and the reliability and stability of the substrate product are remarkably improved.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and in particular relates to a method for manufacturing a substrate and a substrate structure. Background Art

[0002] In the construction of modern electronic devices, the substrate plays a vital role. It is not only a stable support for electronic components, but also a platform for interconnection between components. The manufacturing and processing technology level of the substrate is directly related to and profoundly affects the overall performance and operational reliability of electronic equipment. As electronic equipment evolves towards high performance, miniaturization, and multi-functions, the performance requirements for substrates are becoming increasingly stringent. Not only does the electrical performance need to meet high standards, but it also needs to demonstrate excellent reliability and stability under changing environmental conditions.

[0003] In the existing technology, the substrate needs to undergo a series of complex reliability tests after packaging to ensure its durability and stability in actual applications. These tests include high-pressure cooking test, temperature cycle test, thermal shock test, temperature and humidity bias life test, high-temperature storage test and ultra-accelerated life test. These test items are designed to comprehensively evaluate the reliability and expected life of the substrate in a simulated actual use environment.

[0004] However, despite the existing technology has made many efforts to improve the reliability of the substrate, some problems are still exposed during the test process. In particular, in the ultra-accelerated life test, since a bias voltage needs to be applied to the substrate, this process is very likely to cause copper ion migration (see Figure 1 ), causing the metal interconnects to open or short, which in turn causes product failure, increasing the risk of project failure and potentially seriously delaying project progress. In addition, traditional substrate manufacturing processes have certain limitations in improving product reliability and stability, and it is difficult to fully meet the high standards of current electronic equipment for substrate performance.

[0005] Therefore, it is necessary to provide an improved technical solution to address the above-mentioned deficiencies in the prior art. Summary of the invention

[0006] In view of the shortcomings of the prior art described above, an object of the present invention is to provide a substrate manufacturing method and a substrate structure, which are used to solve the problem in the prior art that applying a bias voltage to the substrate causes copper ion migration, resulting in product failure, and the problem that the substrate manufacturing process in the prior art has certain limitations in improving product reliability and stability.

[0007] To achieve the above-mentioned object and other related objects, the present invention provides a method for manufacturing a substrate, the method comprising:

[0008] S1. providing a substrate, wherein a copper interconnection layer is formed on the upper surface of the substrate;

[0009] S2, laying a dry film on the substrate, and making the dry film cover the copper interconnect layer and the upper surface of the substrate;

[0010] S3, after exposure and development, openings are formed at the periphery of the copper interconnect layer, and the copper interconnect layer is completely exposed;

[0011] S4, forming a metal layer on the copper interconnect layer, so that the metal layer fills the opening and covers the copper interconnect layer;

[0012] S5. After removing the remaining dry film, an insulating layer is formed on the substrate, wherein the insulating layer completely covers the metal layer and the upper surface of the substrate.

[0013] Preferably, the thickness of the substrate is 25 μm to 30 μm.

[0014] Preferably, the substrate is made of ABF resin or bismaleimide triazine resin.

[0015] Preferably, the openings include a first opening located directly above the copper interconnect layer, and second openings located at both sides of the copper interconnect layer, and the width of the second openings is 0.05-0.15 μm.

[0016] Preferably, the material of the metal layer includes titanium.

[0017] Preferably, the thickness of the metal layer located above the copper interconnect layer is 0.05 μm to 0.15 μm.

[0018] Preferably, the metal layer is formed by a spraying process, the temperature during the spraying process is 150° C. to 250° C., the pressure is 0.08 MPa to 0.15 MPa, and the spraying time is 10 min to 30 min.

[0019] In addition, the present invention further provides a substrate structure, which includes:

[0020] a substrate and a copper interconnect layer located above the substrate;

[0021] A titanium metal layer, the titanium metal layer covering the periphery of the copper interconnection layer;

[0022] An insulating layer is located on the upper surface of the substrate and covers the titanium metal layer.

[0023] Preferably, the thickness of the titanium metal layer located above the copper interconnect layer is 0.05-0.15 μm.

[0024] Preferably, the width of the titanium metal layer on both sides of the copper interconnect layer is 0.05-0.15 μm.

[0025] As described above, the substrate manufacturing method and substrate structure of the present invention have the following beneficial effects:

[0026] The present invention forms a metal layer by spraying metal titanium on the periphery of the copper interconnect layer, thereby effectively solving the problem of copper ion migration caused by bias voltage in ultra-accelerated life test, thereby causing product failure; metal titanium has excellent thermal stability, conductivity and oxidation resistance, and the substrate product after spraying metal titanium can maintain good performance under various environmental conditions, significantly improving the reliability and stability of the substrate product; after the reliability of the substrate of the present invention is improved, it performs outstandingly in the reliability test, especially in the high-pressure cooking test, temperature cycle test, hot and cold shock test, temperature and humidity bias life test, high-temperature storage test, etc., providing a higher level of guarantee for the quality of the substrate product. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a schematic diagram showing the migration of copper ions caused by the substrate in the prior art.

[0028] Figure 2 Shown is a schematic diagram of the manufacturing process flow of the substrate of the present invention.

[0029] Figure 3 It is a schematic structural diagram showing the structure after executing step S2 in the method for manufacturing the substrate of the present invention.

[0030] Figure 4 It is a schematic structural diagram showing the structure after executing step S3 in the method for manufacturing the substrate of the present invention.

[0031] Figure 5 It is a schematic structural diagram showing the structure after executing step S4 in the method for manufacturing the substrate of the present invention.

[0032] Figure 6 It is a schematic structural diagram showing the structure after executing step S6 in the method for manufacturing the substrate of the present invention.

[0033] Component number description

[0034] 100 Substrate

[0035] 200 copper interconnect layers

[0036] 300 dry film

[0037] 400 Open

[0038] 401 First Opening

[0039] 402 Second Opening

[0040] 500 metal layer, titanium layer

[0041] 600 Insulation DETAILED DESCRIPTION

[0042] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0043] Before further describing the specific embodiments of the present invention, it should be understood that the scope of protection of the present invention is not limited to the specific embodiments described below; it should also be understood that the terms used in the examples of the present invention are intended to describe specific embodiments, rather than to limit the scope of protection of the present invention. The test methods in the following examples without specifying specific conditions are generally carried out under conventional conditions or under conditions recommended by the manufacturers.

[0044] When the embodiments give numerical ranges, it should be understood that, unless otherwise specified in the present invention, both endpoints of each numerical range and any numerical value between the two endpoints can be selected. Unless otherwise defined, all technical and scientific terms used in the present invention have the same meaning as those generally understood by those skilled in the art. In addition to the specific methods, equipment, and materials used in the embodiments, according to the grasp of the prior art by those skilled in the art and the record of the present invention, any methods, equipment, and materials of the prior art similar or equivalent to the methods, equipment, and materials described in the embodiments of the present invention can also be used to realize the present invention.

[0045] See also Figures 1 to 6 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0046] In the prior art, a bias voltage is applied to the substrate during a reliability test, especially during an ultra-accelerated life test, thereby causing copper ions in the copper interconnect layer in the substrate to migrate (see Figure 1 ), which may cause the effective width of the interconnect to become narrower, or even break or short-circuit, thereby causing product failure and project delays; in addition, traditional substrate manufacturing processes have certain limitations in improving the reliability and stability of substrate products.

[0047] See also Figure 2 The present invention provides a method for manufacturing a substrate, the method comprising:

[0048] S1, providing a substrate, the substrate comprising a substrate 100 and a copper interconnect layer 200 located on the upper surface of the substrate 100;

[0049] S2, laying a dry film 300 on the substrate 100, and making the dry film 300 cover the copper interconnect layer 200 and the upper surface of the substrate 100;

[0050] S3, after exposure and development, openings 400 are formed on both sides of the copper interconnect layer 200, and the copper interconnect layer 200 is completely exposed;

[0051] S4, forming a metal layer 500 on the copper interconnect layer 200, so that the metal layer 500 fills the opening 400 and covers the copper interconnect layer 200;

[0052] S5 . After removing the remaining dry film 300 , an insulating layer 600 is formed on the substrate. The insulating layer 600 completely covers the metal layer 500 and the upper surface of the substrate 100 .

[0053] First, step S1 is performed: providing a substrate, the substrate comprising a substrate 100 and a copper interconnect layer 200 located on the upper surface of the substrate 100. As an example, the thickness of the substrate 100 is 25 μm to 30 μm.

[0054] Specifically, the thickness of the substrate 100 may include values ​​within any range such as 25 μm, 26 μm, 27 μm, 28 μm, 29 μm, 30 μm, etc.

[0055] As an example, the material of the substrate 100 is ABF resin or bismaleimide triazine resin.

[0056] Specifically, ABF resin, the full name of Ajinomoto Build-up Film, is a highly insulating resin-based synthetic material that is combined with organic epoxy resin, hardener and inorganic microparticle filler to form a thermosetting film with high durability, low thermal expansion and easy processing. Then, refer to Figure 3 , performing step S2: laying a dry film 300 on the substrate 100 , and making the dry film 300 cover the copper interconnect layer 200 and the upper surface of the substrate 100 .

[0057] Specifically, the dry film 300 is a photosensitive material, a solvent-free thin film material, made of polymer or digital. There are no excessive restrictions on its specific material composition, as long as it can meet the actual use requirements; before laying the dry film 300 on the substrate 100, pre-treatment is required, including degreasing, water washing, drying and other processes to increase the adhesion of the dry film 300 on the surface of the copper interconnect layer; there are no excessive restrictions on the specific method of laying the dry film 300, as long as the dry film 300 is well bonded with the copper interconnect layer 200 and the upper surface of the substrate 100.

[0058] Then, see Figure 4 , performing step S3: after exposure and development, openings 400 are formed around the periphery of the copper interconnection layer 200, and the copper interconnection layer 200 is completely exposed.

[0059] Specifically, the exposure makes a part of the pattern of the dry film 300 sensitive to light, so that the pattern is transferred, and then the unexposed part is developed with a developer to retain the exposed pattern.

[0060] As an example, the opening 400 includes a first opening 401 located directly above the copper interconnect layer 200 and second openings 402 located on both sides of the copper interconnect layer 200 . The width of the second opening 402 is 0.05-0.15 μm.

[0061] Specifically, after exposure and development, the copper interconnect layer 200 is completely exposed, and second openings 402 are formed on both sides of the copper interconnect layer. The width of the second openings 402 may include any value within a range of 0.05 μm, 0.08 μm, 0.1 μm, 0.02 μm, 0.14 μm, 0.15 μm, etc.

[0062] Then, see Figure 5 , performing step S4: forming a metal layer 500 on the copper interconnect layer 200 , so that the metal layer 500 fills the opening and covers the copper interconnect layer 200 .

[0063] As an example, the material of the metal layer 500 includes titanium.

[0064] Specifically, since titanium has no oxidation resistance, high stability and good conductivity, a metal titanium layer is formed on the copper interconnect layer 200 as a protective film, which can effectively avoid product failure caused by copper ion migration during the reliability test of the substrate, thereby significantly improving the reliability and stability of the substrate product, enabling it to maintain good performance under various environmental conditions, and meeting the requirements of modern electronic equipment for high performance, miniaturization and multi-functionality for substrates.

[0065] As an example, the thickness of the metal layer 500 located above the copper interconnect layer 200 is 0.05 μm to 0.15 μm.

[0066] Specifically, the thickness of the metal layer 500 located above the copper interconnect layer 200 may include values ​​within any range such as 0.05 μm, 0.08 μm, 0.1 μm, 0.02 μm, 0.14 μm, and 0.15 μm.

[0067] As an example, the metal layer 500 is formed by a spraying process, wherein the temperature during the spraying process is 150° C. to 250° C., the pressure is 0.08 MPa to 0.15 MPa, and the spraying time is 10 min to 30 min.

[0068] Specifically, high-purity titanium target material is usually used as the spraying material during the spraying process. In order to improve the coating quality and performance of the sprayed metal titanium, the temperature during the spraying process may include any value within the range of 150°C, 180°C, 200°C, 220°C, 250°C, etc., the pressure may include 0.08Mpa, 0.1Mpa, 0.12Mpa, 0.15Mpa, etc., and the spraying time may include any value within the range of 10min, 15min, 20min, 25min, 30min, etc. The specific equipment used in the spraying process is not overly restricted here, as long as it can meet the actual use requirements.

[0069] Finally, see Figure 6 , executing step S5: after removing the remaining dry film 300 , forming an insulating layer 600 on the substrate, the insulating layer 600 completely covers the metal layer 500 and the upper surface of the substrate 100 .

[0070] Also, see Figure 6 The present invention also provides a substrate structure, which includes:

[0071] A substrate 100 and a copper interconnect layer located above the substrate 100;

[0072] A titanium metal layer 500 , wherein the titanium metal layer 500 is coated on the periphery of the copper interconnect layer 200 ;

[0073] The insulating layer 600 is located on the upper surface of the substrate 100 and covers the titanium metal layer 500 .

[0074] Specifically, the present invention forms a protective film by spraying metal titanium on the surface and both sides of the copper interconnect layer 200 of the substrate, thereby effectively avoiding the problem of Cu ion migration caused by bias in the ultra-accelerated life test, thereby reducing the risk of product failure; metal titanium has good thermal stability and good conductivity, and overspraying the metal titanium protective film can significantly improve the reliability and stability of the substrate product, so that it can maintain good performance under various environmental conditions.

[0075] As an example, the thickness of the titanium metal layer 500 located above the copper interconnect layer is 0.05-0.15 μm.

[0076] Specifically, the thickness of the titanium metal layer 500 located above the copper interconnect layer may include values ​​within any range such as 0.05 μm, 0.08 μm, 0.1 μm, 0.02 μm, 0.14 μm, and 0.15 μm.

[0077] As an example, the width of the titanium metal layer 500 on both sides of the copper interconnect layer 200 is 0.05-0.15 μm.

[0078] Specifically, the width of the titanium metal layer 500 on both sides of the copper interconnect layer 200 may include values ​​within any range such as 0.05 μm, 0.08 μm, 0.1 μm, 0.02 μm, 0.14 μm, and 0.15 μm.

[0079] In order to better understand the manufacturing method and substrate structure of the substrate in the present invention, the manufacturing method and substrate structure of the substrate in the present invention are described below with reference to specific embodiments. It should be noted that these embodiments are merely descriptive and do not limit the present invention in any way.

[0080] Example 1

[0081] This embodiment provides a method for manufacturing a substrate, the method comprising:

[0082] S1. Provide a substrate, the substrate comprising a substrate 100 and a copper interconnect layer 200 located on the upper surface of the substrate 100; wherein the substrate 100 is made of ABF resin with a thickness of 25 μm;

[0083] S2, laying a dry film 300 on the substrate 100, and making the dry film 300 cover the copper interconnect layer 200 and the upper surface of the substrate 100;

[0084] S3, after exposure and development, a second opening 402 of 0.1 μm is formed on both sides of the copper interconnection layer 200, and the copper interconnection layer 200 is completely exposed;

[0085] S4, forming a titanium metal layer 500 on the copper interconnect layer 200, so that the titanium metal layer 500 fills the second opening 402 and covers the copper interconnect layer 200, and forming a titanium metal layer 500 with a thickness of 0.1 μm directly above the copper interconnect layer 200; wherein the titanium metal layer 500 is formed by a spraying process, the temperature during the spraying process is 200° C., the pressure is controlled at 0.1 MPa, and the spraying time is 30 minutes;

[0086] S5 . After removing the remaining dry film 300 , an insulating layer 600 is formed on the substrate. The insulating layer 600 completely covers the metal layer 500 and the upper surface of the substrate 100 .

[0087] This embodiment further provides a substrate structure, which is formed by the method for manufacturing a substrate in this embodiment, and includes:

[0088] A substrate 100 of ABF resin and a copper interconnect layer located above the substrate 100;

[0089] A titanium metal layer 500 is coated on the periphery of the copper interconnect layer 200 , and a titanium metal layer 500 with a width of 0.1 μm is formed on both sides of the copper interconnect layer 200 , and a titanium metal layer 500 with a thickness of 0.1 μm is formed directly above the copper interconnect layer 200 ;

[0090] The insulating layer 600 is located on the upper surface of the substrate 100 and covers the titanium metal layer 500 .

[0091] Performance Test:

[0092] The substrate structure in this embodiment was put into an ultra-accelerated life test device for testing. During the test, the applied voltage was 1.68V and the test time was 264 hours. After the test was completed, the substrate structure was inspected and it was found that the copper ions in the substrate did not migrate and the product did not fail.

[0093] Then, the substrate structure is subjected to reliability tests, including high pressure cooking test, temperature cycle test, thermal shock test, temperature and humidity bias life test, high temperature storage test, etc. The test results show that the product has good reliability, and the yield and stability meet the requirements. That is, in this embodiment, the titanium metal layer 500 is formed by spraying on the periphery of the copper interconnect layer 200, which effectively solves the problem of copper ions in the substrate migrating in the ultra-accelerated life test, thereby causing product failure, and the limitations of the traditional substrate manufacturing process in improving the reliability and stability of the substrate product. At the same time, it also solves other problems existing in the prior art during the test process, such as the problem that the high pressure cooking test, temperature cycle test, thermal shock test, temperature and humidity bias life test, high temperature storage test, etc. may cause product failure.

[0094] In summary, the present invention effectively solves the problem of copper ion migration caused by bias voltage in ultra-accelerated life test, thereby causing product failure, by spraying metal titanium on the periphery of the copper interconnect layer to form a metal layer; metal titanium has excellent thermal stability, conductivity and oxidation resistance, and the substrate product after spraying metal titanium can maintain good performance under various environmental conditions, significantly improving the reliability and stability of the substrate product; after improving the reliability, the substrate of the present invention performs outstandingly in the reliability test, especially in the high-pressure cooking test, temperature cycle test, hot and cold shock test, temperature and humidity bias life test, high-temperature storage test, etc., providing a higher level of guarantee for the quality of the substrate product. Therefore, the present invention effectively overcomes the various shortcomings of the prior art and has a high industrial utilization value.

[0095] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for manufacturing a substrate, characterized in that: The production method comprises: Providing a substrate, wherein a copper interconnection layer is formed on the upper surface of the substrate; Laying a dry film on the substrate, and making the dry film cover the copper interconnect layer and the upper surface of the substrate; After exposure and development, openings are formed at the periphery of the copper interconnect layer, and the copper interconnect layer is completely exposed; forming a metal layer on the copper interconnect layer, so that the metal layer fills the opening and covers the copper interconnect layer; After removing the remaining dry film, an insulating layer is formed on the substrate, and the insulating layer completely covers the metal layer and the upper surface of the substrate.

2. The method for manufacturing a substrate according to claim 1, characterized in that: The thickness of the substrate is 25 μm to 30 μm.

3. The method for manufacturing a substrate according to claim 1, wherein: The substrate is made of ABF resin or bismaleimide triazine resin.

4. The method for manufacturing a substrate according to claim 1, characterized in that: The openings include a first opening located directly above the copper interconnect layer and second openings located at both sides of the copper interconnect layer, and the width of the second openings is 0.05-0.15 μm.

5. The method for manufacturing a substrate according to claim 1, characterized in that: The material of the metal layer includes titanium.

6. The method for manufacturing a substrate according to claim 1, characterized in that: The thickness of the metal layer located above the copper interconnect layer is 0.05 μm to 0.15 μm.

7. The method for manufacturing a substrate according to claim 5, characterized in that: The metal layer is formed by a spraying process, wherein the temperature during the spraying process is 150° C. to 250° C., the pressure is 0.08 MPa to 0.15 MPa, and the spraying time is 10 min to 30 min.

8. A substrate structure, characterized in that: The substrate structure comprises: a substrate and a copper interconnect layer located above the substrate; A titanium metal layer, the titanium metal layer covering the periphery of the copper interconnection layer; An insulating layer is located on the upper surface of the substrate and covers the titanium metal layer.

9. The substrate structure according to claim 8, characterized in that: The thickness of the titanium metal layer located above the copper interconnect layer is 0.05-0.15 μm.

10. The substrate structure according to claim 8, characterized in that: The width of the titanium metal layer located on both sides of the copper interconnection layer is 0.05-0.15 μm.

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