A message error injection method and device based on an IB protocol

Abstract

The application provides a message error injection method and device based on an IB protocol, and the method comprises the following steps: configuring an error injection mode in an error injection register according to a test target; when the error injection mode is configured as a free error injection mode, configuring an error injection switch, an error injection randomness and an error injection message domain segment value, and configuring the error injection switch as starting; when the error injection mode is configured as a protocol error injection mode or a retransmission check mode, directly configuring the error injection switch as starting; based on the configuration information of the error injection register, performing error injection test on a detected IB message, and reading the error injection register after the error injection is completed to query error injection test execution information. The scheme provided by the application improves the convenience and authenticity of message error injection.

Description

TECHNICAL FIELD

[0001] The application belongs to the field of message testing, and particularly relates to a message error injection method and device based on an IB protocol. BACKGROUND

[0002] In the field of high-performance computing, the InfiniBand (IB) protocol, as a leading computer network communication standard, is widely used due to its outstanding performance. The protocol is designed to provide lossless data transmission, ultra-low latency, and high-bandwidth characteristics, suitable for efficient communication within a small connection domain. In particular, its lossless feature ensures data integrity and reliability through a complex retransmission mechanism, which can maintain stable data flow even in the case of transient network problems.

[0003] In the development of IB protocol-based network cards, it is crucial to verify the effectiveness of this retransmission mechanism. Traditional testing methods rely on waiting for actual errors to occur to evaluate the system's response and recovery capabilities, but this method is inefficient and difficult to control. To more effectively test the rationality and correctness of the retransmission mechanism, the industry generally adopts a more proactive method, known as the "error injection" technology. This technology allows developers or testers to intentionally introduce specific types of errors into the system, thereby observing and analyzing the system's response to these pre-set abnormal conditions. However, how to ensure the accuracy of IB error injection testing has become a problem that needs to be solved by technical personnel in the field. SUMMARY

[0004] The purpose of the present application is to provide a message error injection method and device based on an IB protocol, aiming to ensure the accuracy of IB error injection testing and improve the convenience and authenticity of message error injection.

[0005] According to a first aspect of the present application, a message error injection method based on an IB protocol is provided, comprising:

[0006] According to the test target, an error injection register is configured with an error injection mode. When the error injection mode is configured as a free error injection mode, an error injection switch, an error injection randomness, and an error injection message domain segment value are configured, and the error injection switch is configured as enabled.

[0007] When the error injection mode is configured as a protocol error injection mode or a retransmission verification mode, the error injection switch is directly configured as enabled.

[0008] Based on the configuration information of the error injection register, the detected IB message is subjected to error injection testing, and after the error injection is completed, the error injection register is read to query the error injection test execution information.

[0009] The configuring the error injection switch, the error injection randomness and the error injection message field segment value when the error injection mode is configured as the free error injection mode further comprises:

[0010] The error injection is performed on the message of any one or more combinations of the preset QPN, the preset PSN or the preset opcode by software selection, so as to configure the error injection switch.

[0011] In an optional implementation, the configuring the error injection switch, the error injection randomness and the error injection message field segment value when the error injection mode is configured as the free error injection mode further comprises:

[0012] The error injection randomness is configured by software selection of random error injection, time interval error injection or message interval error injection.

[0013] In an optional implementation, in the random error injection, error injection is performed by system time or software configured error injection enabling; in the time interval error injection, message error injection is performed after a software preset time interval; and in the message interval error injection, message error injection is performed after a software preset packet quantity interval.

[0014] In an optional implementation, the querying error injection test execution information further comprises:

[0015] The error injection register is read by software to query the number of error injections, the information of the first error injection message and the information of the last error injection message, or the relevant information of the chip is read by software to obtain the current chip execution state.

[0016] According to a second aspect of the present application, a message error injection device based on an IB protocol is provided, comprising:

[0017] A first configuration unit is configured to configure an error injection mode in an error injection register according to a test target, and when the error injection mode is configured as a free error injection mode, an error injection switch, an error injection randomness and an error injection message field segment value are configured, and the error injection switch is configured to be started.

[0018] A second configuration unit is configured to configure the error injection switch to be started when the error injection mode is configured as a protocol error injection mode or a retransmission check mode.

[0019] A message error injection unit is configured to perform error injection test on detected IB messages based on configuration information of the error injection register, and read the error injection register after the error injection is completed to query error injection test execution information.

[0020] Compared with the related art, the technical solution of the present application has the following advantages:

[0021] The application can simulate the exception message scenario listed in the IB protocol on a real chip only by software configuration, without external fault injection equipment, to achieve the purpose of verifying the implementation of the chip IB protocol, and realize the convenience and authenticity of message fault injection. The combination of multiple fault injection modes and fault injection switches meets the verification of simple to complex fault injection scenarios, fully tests the chip, and improves the scalability of message fault injection.

[0022] Other features and advantages of the present application will be set forth in the following description, and in part will become apparent to those skilled in the art from the description, or can be learned by practice of the present application. The objects and other advantages of the present application can be realized and achieved by the structures and processes indicated in the specification and drawings. BRIEF DESCRIPTION OF DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technical solutions, the following will briefly introduce the drawings needed to be used in the embodiment or related technical description. Obviously, the drawings described below are some embodiments of the present application, and those skilled in the art can also obtain other drawings according to these drawings without creative labor.

[0024] Figure 1 is a schematic diagram of related fault injection means according to the related art.

[0025] Figure 2 is a schematic diagram of IB message-based fault injection architecture according to an exemplary embodiment of the present application.

[0026] Figure 3 is a flowchart of the IB protocol-based message fault injection method according to the present application.

[0027] Figure 4 is a schematic diagram of the fault injection process according to an exemplary embodiment of the present application.

[0028] Figure 5 is a judgment logic diagram of the IB message fault injection device satisfying the fault injection condition according to an exemplary embodiment of the present application.

[0029] Figure 6 is a message interval calculation strategy diagram of the IB message fault injection device according to an exemplary embodiment of the present application.

[0030] Figure 7 is a time interval calculation strategy diagram of the IB message fault injection device according to an exemplary embodiment of the present application.

[0031] Figure 8 is a packet header validity check diagram according to an exemplary embodiment of the present application. DETAILED DESCRIPTION

[0032] In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts should fall into the scope of the present application.

[0033] The related error injection means is generally divided into two kinds. One is to inject errors in the simulation platform by using the simulation model. The shortcoming of this error injection is that the simulation system lacks complexity and reality. The other error injection method is to externally connect an error injection device to the chip. However, this error injection method is expensive, and it is difficult to find a device that conforms to the protocol, such as Figure 1 In addition, there is no message error injection device based on the IB protocol in the prior art. Therefore, how to make the error injection test more consistent with the actual situation of the IB protocol, reduce the test cost, and ensure the accuracy of the IB error injection test has become a problem to be solved in the field.

[0034] Based on the above analysis, the present application exemplarily provides a message error injection method and device based on the IB protocol, as shown in Figure 2 According to the check rules and exception handling strategies specified in the IB protocol, the corresponding IB message error injection means (protocol check mode) is customized, and the mode (retransmission check mode) for testing the completeness of the IB retransmission (key function) of the testable chip is customized, and the implementation of the chip protocol logic is verified. On the basis of the above two modes, the free error injection mode (a plurality of error injection switches are added, which are configured freely by software) is added, and a more complete and effective IB error injection scheme is provided, so that the error injection message is more randomized and close to the actual scene.

[0035] Referring to the flowchart of Figure 3 Exemplarily, the message error injection method based on the IB protocol provided by the present application comprises the following steps:

[0036] Step 301: According to the test target, the error injection mode is configured in the error injection register. When the error injection mode is configured as the free error injection mode, the error injection switch, the error injection randomness and the error injection message domain segment value are configured, and the error injection switch is configured to be started.

[0037] Exemplarily, the detailed flowchart shown in Figure 4 mainly includes software configuration of the error injection register, error injection device start, then error injection judgment, error injection completion and record. First, the software configures the error injection register according to the test target.

[0038] In a further embodiment, the configuring of the error injection switch, the error injection randomness, and the error injection message field segment value further comprises: configuring the error injection switch by software selection of error injection on any one or more combinations of a predetermined QPN, a predetermined PSN, or a predetermined opcode of a message.

[0039] Exemplarily, if the free error injection mode (mode 3) is configured, the configuration specifies the error injection switch. The software can select any one or more combinations of a specified queue number QPN of the IB message, a specified packet sequence number PSN of the IB message, and a specified opcode opcode of the IB message for register configuration to perform error injection on the specified message, or the configuration does not specify error injection.

[0040] In a further embodiment, the configuring of the error injection switch, the error injection randomness, and the error injection message field segment value further comprises: configuring the error injection randomness by software selection of random error injection, time interval error injection, or message interval error injection.

[0041] Exemplarily, when the error injection randomness is configured, the software can select three error injection randomnesses, including random error injection, time interval error injection, and message interval error injection. The random error injection is performed by system time or software configuration of a random error injection switch. The time interval error injection is performed after a software pre-set time interval. The message interval error injection is performed after a software pre-set packet quantity interval.

[0042] Further, the software configures the pre-defined error injection message field segment and the corresponding error injection value according to the test requirement.

[0043] After the software completes the configuration of the error injection register, the error injection device is started.

[0044] Step 302: When the error injection mode is configured as the protocol error injection mode or the retransmission check mode, the error injection switch is directly configured as started.

[0045] If the error injection register is configured as the protocol error injection mode (mode 1) or the retransmission check mode (mode 2), the error injection switch is directly configured. That is, after the software configures the error injection register, the error injection switch is configured to start. Exemplarily, according to the test scenario shown in Table 1, the error injection code shown in Table 1 can be directly configured for error injection testing.

[0046] Step 303: Based on the configuration information of the error injection register, the detected IB message is subjected to error injection testing, and after the error injection is completed, the error injection register is read to query the error injection test execution information.

[0047] It is determined whether the error injection condition is met. According to the configured error injection register, when the target message is detected, error injection is performed. Exemplarily, as shown in Table 1, the error injection register is configured as the protocol error injection mode (mode 1), and the error injection switch is directly configured as started. Figures 5-7As shown, first, the error injection randomness judgment is performed, and then the specified message judgment is performed, and when the error injection condition is met, the error injection is completed and recorded.

[0048] In the case of message interval error injection, the current message interval cnt is started to count, if the current time interval cnt >= cfg software configuration interval, or the current time interval cnt < cfg software configuration interval but the current message meets the error injection condition, it is judged whether the current message is successfully injected with error, if yes, the message interval cnt is cleared to 0, otherwise, it is continuously waited; if the current time interval cnt < cfg software configuration interval and the current time does not meet the error injection condition, the time interval cnt + 1 is cleared.

[0049] In the case of time interval error injection, the current time interval T is started to count, if the current time interval cnt >= cfg software configuration interval, or the current time interval cnt < cfg software configuration interval but the current time meets the error injection condition, it is judged whether the current message is successfully injected with error, if yes, the time interval T is cleared to 0, otherwise, it is continuously waited; if the current time interval cnt < cfg software configuration interval and the current time does not meet the error injection condition, the time interval T + software specified time plus is cleared.

[0050] After the error injection is completed, the software can read the error injection register to query the number of error injections, the first and the latest error injection message information, etc. And the software can read the relevant information of the chip to obtain whether the current chip execution state meets the expectation.

[0051] The message check processing rules of the IB mainly include the packet header validity check, the request side exception check and the response side exception check.

[0052] For the packet header validity check, as shown in Figure 8 the message corresponding to the message domain segment check that does not pass is silently discarded, and the request cannot be sensed by the message receiving end. According to the characteristics of the inbound check, the software can select the exception error injection code, the hardware can perform the error injection, and it is checked whether the receiving end is correctly executed, and the error injection configuration is shown in Table 1.

[0053] Exemplarily, if the software needs to test whether the chip can process the packet with BTH TVer field not equal to 0 as expected (query table 1, columns 2 and 3), the error injection coding register can be configured as 1 (query table 1, column 1), and the BTH TVer field not equal to 0 packet in the protocol error injection mode is selected as the error injection test (query table 1, column 6). The error injection device automatically identifies the IB packet with opcode matching the opcode of the error injection target packet configured by the software and qpn matching the qpn of the error injection target packet configured by the software as the target error injection packet (query table 1, column 7). The error injection device judges that the packet interval is met (query table 1, column 8), and then rewrites the tver domain segment of the target packet as 1 (query table 1, column 9), and then continues to send the rewritten packet to the downstream according to the original process. The software can query whether the chip processes the packet as expected according to columns 4 and 5 of table 1.

[0054] Exemplarily, when the BTH TVer field is not equal to 0, it is silently discarded, no ACK / NAK is generated, the responding client is not notified, the error injection mode is set as protocol verification, the error injection switch is specified as specified OPCODE = software configuration value, the error injection switch is specified as specified QPN = software configuration value, the error injection randomness is packet interval error injection, and the error injection domain segment is bth_Tver = non-0 value. When the destination QP specified in BTH does not exist, or is not in the correct state of receiving data packet, or is inconsistent with the requested service configuration, it is silently discarded, no ACK / NAK is generated, the responding client is not notified, the error injection mode is set as protocol verification, the error injection switch is specified as specified OPCODE = software configuration value, the error injection switch is specified as specified QPN = software configuration value, the error injection randomness is packet interval error injection, and the error injection domain segment is bth_dqpn = software configuration value. When BTH: P Key does not match the value associated with the receiving queue or EE-Context, it is silently discarded, no ACK / NAK is generated, the responding client is not notified, the error injection mode is set as protocol verification, the error injection switch is specified as specified OPCODE = software configuration value, the error injection switch is specified as specified QPN = software configuration value, the error injection randomness is packet interval error injection, and the error injection domain segment is bth_pkey = software configuration value.

[0055] Table 1

[0056]

[0057]

[0058]

[0059]

[0060]

[0061] For the request-side exception check, when the message is parsed and executed at the request end, if an exception is detected, the queue pair (QP) will trigger the behavior of silent discard, exception or retransmission, etc. The exception error code can be configured by software to error the destination message domain segment, and check whether the response end correctly executes the exception reporting or sends the expected response, etc. For example, the opposite end processing message can be obtained by querying the opposite end register, as shown in Table 2.

[0062] Exemplarily, if the software needs to test whether the chip can process the request message of NAK-Sequence Error PSN error (not exceeding the retransmission limit) as expected (Table 2, columns 2 and 3), the error code register can be configured as 18 (Table 2, column 1), and the NAK-Sequence Error PSN error (not exceeding the retransmission limit) error code test of the retransmission check mode (Table 2, column 6) is selected. The error code device will automatically identify the IB message with opcode as ack and the psn matching the message sequence number of the error code target message configured by the software as the target error code message (Table 2, column 7). After the error code device judges that the packet interval is met (Table 2, column 8), the aeth_syndrome domain segment of the target message is rewritten as psn_Sequence Error (Table 2, column 9), and then the rewritten message is continuously sent to the downstream according to the original process. The software can query whether the chip processing the message meets the expectation according to Table 2, columns 4 and 5.

[0063] Exemplarily, when the local ACK timer times out and no ACK response is received within the time interval, the request is retransmitted and the retransmission counter is decremented. The error code mode is set to protocol check, the error code switch is specified as specified opcode=ack, the error code randomness is message interval error, and the error code domain segment is bth_Tver=non-0 value. When the NAK-Sequence Error PSN error, the response detects that the PSN of the request packet is greater than ePSN, the request is retransmitted, and the retransmission counter is decremented. The error code mode is set to retransmission check, the error code switch is specified as specified opcode=ack and specified psn, the error code randomness is time interval error, and the error code domain segment is aeth_syndrome=psn_Sequence Error.

[0064] Table 2

[0065]

[0066]

[0067]

[0068]

[0069]

[0070]

[0071]

[0072]

[0073]

[0074]

[0075] Exemplarily, the response party exception verification is shown in Table 3.

[0076] Exemplarily, if the software needs to test whether the chip can meet the expected request message (columns 2 and 3 in Table 3) in which the PSN is not in the valid area of the response party PSN, the error injection coding register can be configured as 25 (column 1 in Table 3), and the request packet PSN disorder message error injection test (column 6 in Table 3) in the protocol error injection mode is selected. The error injection device automatically identifies the IB message in which the psn (message sequence number) matches the message sequence number of the error injection target message configured by the software as the target error injection message (column 7 in Table 3). The error injection device judges that the packet interval is met (column 8 in Table 3), and the bth_psn domain segment of the target message is rewritten as the original message psn+8M. Then the rewritten message is continuously sent to the downstream according to the original process. The software can query whether the processing of the chip on the message meets the expectation according to columns 4 and 5 in Table 3.

[0077] For example, when a request packet PSN out-of-order event occurs, the request packet PSN is not in the valid area of the response PSN, the previous request must be executed and completed before the NAK, and a NAK-Sequence Error is returned, all other requests except the expected request and the repeated request are ignored, and the NAK cannot be returned to respond to the repeated request. The error injection mode is protocol check, the error injection switch is specified as the specified Psn, the error injection randomness is message interval error injection, and the error injection domain segment is bth_psn=original message Psn+8M. When an input SEND request message exceeds the valid buffer space of the response party, the previous request must be executed and completed before the NAK, and a NAK-Invalid Request is returned, the QP is converted into an Error state, all WQE are Completed Flushedin Error, the error is related to a specific QP, but not related to a specific RQ WQE: the error is reported to be related to a specific WQE through Affiliated AsynchronousError, or the WQE must be Completed in Error. The error injection mode is protocol check, the error injection switch is specified as the specified OPCODE=SEND ONLY, the error injection randomness is message interval error injection, and the error injection domain segment is 4B of 0 data added to the payload.

[0078] Table 3

[0079]

[0080]

[0081]

[0082]

[0083]

[0084]

[0085]

[0086]

[0087]

[0088]

[0089]

[0090] It can be seen that the message error injection method based on the IB protocol provided in the application has the following advantages compared with the related art:

[0091] The IB protocol exception message scenario listed can be simulated on a real chip only by software configuration, without external fault injection devices, so as to achieve the purpose of verifying the IB protocol implementation of the chip, and the convenience and authenticity of message fault injection are realized. The combination of various fault injection modes and fault injection switches meets the verification of simple to complex fault injection scenarios, so that the chip is fully tested, and the scalability of message fault injection is improved.

[0092] Correspondingly, the second aspect of the present application provides a message fault injection device based on an IB protocol, comprising:

[0093] A first configuration unit is configured to configure a fault injection mode in a fault injection register according to a test target, and when the fault injection mode is configured as a free fault injection mode, a fault injection switch, a fault injection randomness and a fault injection message domain segment value are configured, and the fault injection switch is configured as enabled;

[0094] A second configuration unit is configured to directly configure the fault injection switch as enabled when the fault injection mode is configured as a protocol fault injection mode or a retransmission check mode;

[0095] A message fault injection unit is configured to perform fault injection testing on the detected IB message based on the configuration information of the fault injection register, and read the fault injection register after completing the fault injection to query the fault injection test execution information.

[0096] In an optional embodiment, the first configuration unit is further configured to:

[0097] The fault injection is performed on any one or more combinations of the preset QPN, the preset PSN or the preset opcode by software selection, so as to configure the fault injection switch.

[0098] In an optional embodiment, the first configuration unit is further configured to:

[0099] The fault injection randomness is configured by software selection of random fault injection, time interval fault injection or message interval fault injection.

[0100] In an optional embodiment, in the random fault injection, the fault injection is enabled by system time or software configuration, in the time interval fault injection, the message fault injection is performed after a software pre-set time interval, and in the message interval fault injection, the message fault injection is performed after a software pre-set packet quantity interval.

[0101] In an optional embodiment, the message fault injection unit is further configured to:

[0102] The fault injection register is read by software to query the information of the number of fault injections, the first fault injection message and the latest fault injection message, or the relevant information of the chip is read by software to obtain the current chip execution state.

[0103] The device can be implemented by the IB protocol-based message error injection method provided by the embodiments of the first aspect, and the specific implementation manner can be referred to the description in the embodiments of the first aspect, which will not be described here.

[0104] It can be understood that the device structures, names and parameters described in the above embodiments are only examples. Those skilled in the art can also make easy combinations and adjustments of the structural features of the above multiple embodiments according to the use needs, and the concept of the present application should not be limited to the specific details of the above examples.

[0105] Although the present application is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can be modified, or some technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A message error annotation method based on the IB protocol, characterized in that, The method is executed on a chip and includes: Configure the error injection mode in the error injection register according to the test target. When the error injection mode is configured as a free error injection mode, the error injection switch, error injection randomness, and error injection message segment value are configured, and the error injection switch is configured to be enabled. The free error injection mode adds a variety of error injection switches for software to configure freely. The various error injection switches are configured freely by the software, including selecting to inject errors into messages of any one or more combinations of preset QPN, preset PSN, or preset opcode, in order to configure the error injection switch. When the error injection mode is configured as protocol error injection mode or retransmission verification mode, the error injection switch is directly configured to start; protocol error injection mode is to customize the corresponding IB message error injection method according to the verification rules and exception handling strategy specified by the IB protocol. Based on the configuration information of the error injection register, error injection tests are performed on the detected IB messages, and after the error injection is completed, the error injection register is read to query the error injection test execution information.

2. The message error annotation method based on the IB protocol according to claim 1, characterized in that, When the error injection mode is configured as a free error injection mode, the configuration of the error injection switch, the error injection randomness, and the error injection message segment value further includes: The randomness of the error injection can be configured by selecting random error injection, time interval error injection, or message interval error injection through software.

3. The message error annotation method based on the IB protocol according to claim 2, characterized in that, In the random error injection, a random error injection switch is configured by software. In the time interval error injection, message error is injected after a pre-set time interval. In the message interval error injection, message error is injected after a pre-set packet volume.

4. The message error annotation method based on the IB protocol according to claim 1, characterized in that, The query error test execution information further includes: The error register can be read by software to query the number of errors already made, the information of the first error message, and the information of the most recent error message, or the relevant information of the chip can be read by software to obtain the current chip execution status.

5. A message error-checking device based on the IB protocol, characterized in that, The device is disposed within the chip, and the device includes: The first configuration unit is used to configure the error injection mode in the error injection register according to the test target. When the error injection mode is configured as the free error injection mode, the error injection switch, the error injection randomness, and the error injection message segment value are configured, and the error injection switch is configured to be enabled. The free error injection mode adds a variety of error injection switches for the software to configure freely. The specified variety of error injection switches includes specifying that any one or more combinations of the following three values ​​are equal to the software configuration value: the queue number QPN to which the IB message belongs, the packet sequence number PSN of the IB message, and the opcode of the IB message. The second configuration unit is used to directly configure the error injection switch to start when the error injection mode is configured as protocol error injection mode or retransmission verification mode; the protocol error injection mode is to customize the corresponding IB message error injection method according to the verification rules and exception handling strategy specified by the IB protocol. The message error injection unit is used to perform error injection tests on detected IB messages based on the configuration information of the error injection register, and read the error injection register after the error injection is completed to query the error injection test execution information.

6. The message error injection device based on the IB protocol according to claim 5, characterized in that, The first configuration unit is further configured to: The randomness of the error injection can be configured by selecting random error injection, time interval error injection, or message interval error injection through software.

7. The message error injection device based on the IB protocol according to claim 6, characterized in that, In the random error injection, a random error injection switch is configured by software. In the time interval error injection, message error is injected after a pre-set time interval. In the message interval error injection, message error is injected after a pre-set packet volume.

8. The message error injection device based on the IB protocol according to claim 5, characterized in that, The message error correction unit is further used for: The error register can be read by software to query the number of errors already made, the information of the first error message, and the information of the most recent error message, or the relevant information of the chip can be read by software to obtain the current chip execution status.

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