Display control method, device and equipment and computer equipment

Abstract

The invention relates to a display control method, a display control device, display control equipment, computer equipment, a computer readable storage medium and a computer program product, and the method comprises the steps: obtaining a resolution switching instruction, calling a preset reset signal based on the resolution switching instruction, and transmitting the preset reset signal to a chip controller, and under the condition that the video conversion chip finishes resetting, outputting an image data signal to the video conversion chip. Wherein the chip controller is connected with the video conversion chip and is used for controlling the video conversion chip to reset, and the video conversion chip is used for controlling the display of the display screen. When the resolution of the display picture is switched, the preset reset signal is called to control the video conversion chip to reset, so that the video conversion chip can control the display output of the display screen again based on the image data signal after resetting, the splash screen phenomenon during resolution switching is reduced, and the reliability of display control is improved.

Description

Technical Field

[0001] The present application relates to the field of display control technology, and in particular to a display control method, a display control apparatus, a display control device, a computer device, a computer-readable storage medium, and a computer program product. Background Art

[0002] With the development of computer technology, there are more and more types and models of chips and various accessories on the market. When using, different types of accessories can be matched to combine and obtain computers with different performances.

[0003] However, some models of components in the accessories are not compatible with each other, and when they are combined to realize functions, display failures may occur due to poor compatibility. For example, when the processor controls the video conversion chip to realize the display screen output, if the resolution is switched, the video conversion chip may flicker due to insufficient model compatibility, resulting in abnormal display output and reduced display reliability. Summary of the invention

[0004] Based on this, it is necessary to provide a display control method, a display control apparatus, a display control device, a computer device, a computer-readable storage medium and a computer program product that can improve display reliability in response to the above technical problems.

[0005] In a first aspect, the present application provides a display control method, the method comprising:

[0006] Get the resolution switching instruction;

[0007] Based on the resolution switching instruction, a preset reset signal is called, and the preset reset signal is sent to a chip controller; the chip controller is connected to a video conversion chip, and is used to control the reset of the video conversion chip, and the video conversion chip is used to control the display of the display screen;

[0008] When the video conversion chip completes resetting, an image data signal is output to the video conversion chip.

[0009] In one embodiment, calling a preset reset signal based on the resolution switching instruction and sending the preset reset signal to a chip controller includes:

[0010] Calling a preset reset signal in a memory based on the resolution switching instruction; the preset reset signal includes a reset response time and a reset control signal;

[0011] When the chip operation time of the video conversion chip reaches the reset response time, the reset control signal is sent to the chip controller.

[0012] In one embodiment, the preset reset signal also includes a reset completion time, and when the video conversion chip completes the reset, outputting the image data signal to the video conversion chip includes:

[0013] When the chip operation time reaches the reset completion time, the image data signal is output to the video conversion chip.

[0014] In one embodiment, when the video conversion chip completes resetting, outputting the image data signal to the video conversion chip includes:

[0015] Obtaining the working status of the video conversion chip;

[0016] When the working state of the video conversion chip indicates that the reset is completed, outputting an image data signal to the video conversion chip;

[0017] In the case that the working status representation of the video conversion chip has not been reset, the step of obtaining the working status of the video conversion chip is performed after delaying a preset inspection time.

[0018] In a second aspect, the present application further provides a display control device, the device comprising:

[0019] Switching startup module, used to obtain resolution switching instructions;

[0020] A switching reset module, used for calling a preset reset signal based on the resolution switching instruction, and sending the preset reset signal to a chip controller; the chip controller is connected to a video conversion chip, used for controlling the reset of the video conversion chip, and the video conversion chip is used for controlling the display screen display;

[0021] The control module is used to output an image data signal to the video conversion chip when the video conversion chip completes resetting.

[0022] In the third aspect, the present application also provides a display control device, which includes a control device, a video conversion chip and a chip controller, the control device is connected to the video conversion chip and the chip controller, the chip controller is connected to the video conversion chip, the video conversion chip is connected to a display screen, and the control device is used to perform display control on the display screen based on the above-mentioned method.

[0023] In one embodiment, the control device includes a processor and a set of chips, the processor is connected to the set of chips and the chip controller, and the set of chips is connected to the video conversion chip.

[0024] In one embodiment, the processor includes an operating system and a memory, the operating system is connected to the memory, the chip controller and the chip set, and the memory is used to store a preset reset signal.

[0025] In one embodiment, the chip controller is a CPLD.

[0026] In a fourth aspect, the present application further provides a computer device, comprising a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the following steps are implemented:

[0027] Get the resolution switching instruction;

[0028] Based on the resolution switching instruction, a preset reset signal is called, and the preset reset signal is sent to a chip controller; the chip controller is connected to a video conversion chip, and is used to control the reset of the video conversion chip, and the video conversion chip is used to control the display of the display screen;

[0029] When the video conversion chip completes resetting, an image data signal is output to the video conversion chip.

[0030] In a fifth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the following steps are implemented:

[0031] Get the resolution switching instruction;

[0032] Based on the resolution switching instruction, a preset reset signal is called, and the preset reset signal is sent to a chip controller; the chip controller is connected to a video conversion chip, and is used to control the reset of the video conversion chip, and the video conversion chip is used to control the display of the display screen;

[0033] When the video conversion chip completes resetting, an image data signal is output to the video conversion chip.

[0034] In a sixth aspect, the present application further provides a computer program product, including a computer program, which implements the following steps when executed by a processor:

[0035] Get the resolution switching instruction;

[0036] Based on the resolution switching instruction, a preset reset signal is called, and the preset reset signal is sent to a chip controller; the chip controller is connected to a video conversion chip, and is used to control the reset of the video conversion chip, and the video conversion chip is used to control the display of the display screen;

[0037] When the video conversion chip completes resetting, an image data signal is output to the video conversion chip.

[0038] The above-mentioned display control method, display control device, display control equipment, computer equipment, computer-readable storage medium and computer program product include obtaining a resolution switching instruction, calling a preset reset signal based on the resolution switching instruction, and sending the preset reset signal to the chip controller, and outputting an image data signal to the video conversion chip when the video conversion chip completes the reset. Among them, the chip controller is connected to the video conversion chip and is used to control the reset of the video conversion chip, and the video conversion chip is used to control the display of the display screen. By calling the preset reset signal to control the reset of the video conversion chip when switching the resolution of the display screen, the video conversion chip can re-control the display output of the display screen based on the image data signal after resetting, thereby reducing the screen flickering phenomenon during resolution switching, which is conducive to improving the reliability of display control. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0040] Figure 1 A schematic diagram showing the structure of a control device in one embodiment;

[0041] Figure 2 A schematic diagram showing a flow chart of a control method in an embodiment;

[0042] Figure 3 A flowchart of the steps of calling a preset reset signal based on a resolution switching instruction and sending the preset reset signal to a chip controller in one embodiment;

[0043] Figure 4 A schematic flow chart showing a control method in another embodiment;

[0044] Figure 5 It is a flowchart of the steps of outputting image data signals to the video conversion chip when the video conversion chip completes resetting in one embodiment;

[0045] Figure 6 It is a schematic diagram showing the structure of a control device in another embodiment;

[0046] Figure 7 A flowchart showing a control method in another embodiment;

[0047] Figure 8 A structural block diagram showing a control device in one embodiment;

[0048] Fig. 9 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0049] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0050] It is understood that the terms "first", "second", etc. used in this application may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0051] It can be understood that the “connection” in the following embodiments should be understood as “electrical connection”, “communication connection”, etc. if the connected circuits, modules, units, etc. have electrical signals or data transmission between each other.

[0052] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the relevant listed items.

[0053] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0054] The display control method provided in the embodiment of the present application can be applied to Figure 1 In the application environment shown in FIG. 1 , a display control device controls the display screen so that the display screen can display different screen images. To this end, the present application provides a display control device such as Figure 1As shown, the display control device includes a control device 102, a video conversion chip 104 and a chip controller 106. The control device 102 is connected to the video conversion chip 104 and the chip controller 106. The chip controller 106 is connected to the video conversion chip 104. The video conversion chip 104 is connected to the display screen. The control device 102 is used to control the display screen based on the methods described in the embodiments of the present application.

[0055] The control device 102 may be a chip of different models or an integrated body of multiple chips, capable of data storage, processing, calculation, and image generation and display, and capable of outputting signals to the video conversion chip 104 and the chip controller 106 respectively, and performing corresponding control. The image displayed on the display screen is also determined by the image data stored in the control device 102. The chip controller 106 may be a programmable logic device, capable of receiving the signal sent by the control device 102 and performing corresponding conversion or processing, and adjusting the working state of the video conversion chip 104 according to the signal, for example, controlling the video conversion chip 104 to reset. The video conversion chip 104 can transcode and process the signal output by the control device 102, convert it into corresponding image display data, and transmit it to the display screen for display.

[0056] Further, in one embodiment, the control device 102 includes a processor and a chip set, the processor is connected to the chip set and the chip controller 106, and the chip set is connected to the video conversion chip 104. The processor can be a processing chip of different models, capable of data processing and calculation, such as a miniaturized device of multiple electronic components and circuits integrated on a semiconductor chip, a central processing unit, a memory chip, etc. A chip set refers to encapsulating multiple different components or functional modules in an integral housing, which has the characteristics of high integration, easy installation and maintenance, strong scalability, and quick assembly, low cost, and easy maintenance. Exemplarily, the processor may include a Feiteng series CPU, and the chip set may be a corresponding Feiteng series chip set CPU, such as an X100 chip set processor. The Feiteng series CPU and the chip set CPU establish a communication connection through a high-speed communication bus interface of PCIE3.0 (Peripheral Component Interconnect Express, the third generation high-speed serial computer expansion bus) to achieve data interaction and commonality.

[0057] The chip set can send the image data signal to the video conversion chip 104 through the DP (Display Port, digital video interface) interface. The video conversion chip 104 has the ability to transcode the received image data signal. After obtaining the corresponding image data, it transmits the image data to the display screen through the HDMI (High Definition Multimedia Interface, high-definition multimedia interface or high-definition video interface) interface or LVDS (Low Voltage Differential Signaling, low voltage differential signal, this application specifically refers to the transmission interface of the video signal) interface, and the corresponding picture is displayed on the display screen.

[0058] In one embodiment, the chip controller 106 is a CPLD. CPLD (Complex Programmable Logic Device) is an integrated circuit chip that can implement various circuit designs and logic processing through internal logic programming. It generally has multiple physical interface modules such as IO BANK to complete signal transmission and reception. The chip controller 106 can generate a corresponding reset level according to a preset reset signal sent by the processor to control the video conversion chip 104 to reset. Optionally, the chip controller 106 and the processor establish a communication connection through a GPIO (General Purpose Input / Output, a general purpose input / output interface, a form of interface for the processor) interface.

[0059] Furthermore, in one of the embodiments, the processor includes an operating system and a memory, the operating system is connected to the memory, the chip controller 106 and the chip set, and the memory is used to store a preset reset signal. The operating system refers to a software programmable system, which is usually carried on a chip with software programmability to work, such as the Feiteng series CPU, which meets the characteristics of full spectrum, high performance, complete ecology, high degree of autonomy, etc., and has high adaptability and compatibility. The memory refers to a device that can store data content, such as FLASH flash memory, which is a flash memory chip that can save program files. On the basis of the FLASH flash memory being configured with UEFI (Unified Extensible Firmware Interface, which provides an interface connecting the operating system and hardware), it is connected to the UEFI interface of the Feiteng series CPU through SPI (Serial Peripheral Interface, a physical bus interface), so that the Feiteng series CPU can output corresponding signals according to the program in the FLASH flash memory.

[0060] In an exemplary embodiment, Figure 2As shown, a display control method is provided, which is applied to Figure 1 The control device 102 in FIG. 1 is taken as an example to illustrate the method, which includes the following steps 202 to 206. Among them:

[0061] Step 202: Obtain a resolution switching instruction.

[0062] The resolution switching instruction refers to the instruction to switch the resolution of the picture displayed on the display screen. The corresponding signal needs to be sent from the control device's chip set to the video conversion chip, and then transmitted to the display screen by the video conversion chip. During the resolution switching process, due to compatibility issues between the control device's chip set and the chip conversion chip, the screen may flicker, affecting the user experience and reducing the reliability of display control.

[0063] In order to solve this problem, the control device will obtain the resolution switching instruction output by the chip set. Specifically, in the past, when switching the resolution, the chip set will directly generate image data signals of different resolutions and send them directly to the video conversion chip. In this embodiment, the chip set will first interact with the processor. After the resolution switching instruction is generated, it will be sent to the processor first. The processor will obtain the resolution switching instruction and execute subsequent steps to complete the display control.

[0064] Step 204: calling a preset reset signal based on the resolution switching instruction, and sending the preset reset signal to the chip controller.

[0065] The chip controller is connected to the video conversion chip and is used to control the reset of the video conversion chip, which is used to control the display screen. The chip controller is connected to the video conversion chip and can control the reset of the video conversion chip according to a preset reset signal. The video conversion chip can parse the image data signal to obtain the image data and transmit it to the display screen for display.

[0066] Specifically, after the control device receives the resolution switching instruction, that is, after the chip set needs to switch the resolution, it is necessary to disconnect the chip set and the video conversion chip to prevent the video conversion chip from erroneously obtaining image data due to incompatibility with the chip set, thereby causing the display screen to display erroneously and cause a flickering screen. The method of disconnecting the chip set and the video conversion chip is not limited. In this embodiment, the control device will call a preset reset signal when receiving the resolution switching instruction, and send the preset reset signal to the chip controller, and the chip controller will control the video conversion chip to reset to temporarily disconnect the data communication between the chip set and the video conversion chip to reduce the triggering of the flickering screen.

[0067] The preset reset signal is a pre-set data stored in the control device, specifically stored in the memory of the processor of the control device, that is, in the FLASH flash memory. The preset reset signal can be a preset IO level signal. In an exemplary embodiment, Figure 3 As shown, step 204 includes steps 302 to 304. Among them:

[0068] Step 302: Call a preset reset signal in a memory based on a resolution switching instruction.

[0069] Among them, the preset reset signal includes a reset response time and a reset control signal. The reset response time refers to the resolution switching time point set in the chip set. Some chips will switch the resolution at a specific time point during operation. Therefore, a reset response time can be set in the preset reset signal to ensure reliable control of the display process. The reset control signal is a signal that controls the video conversion chip to reset. Here, it can be an IO signal, which can be sent by the processor to the chip controller through the GPIO interface. Specifically, after receiving the resolution switching instruction, the control device will call the preset reset signal in the memory, including the reset response time and the reset control signal.

[0070] Step 304: When the chip operation time of the video conversion chip reaches the reset response time, a reset control signal is sent to the chip controller.

[0071] Specifically, since the control device controls the chip controller and the video conversion chip, the control device can record the chip operation time of the video conversion chip, and in essence, the chip operation time of the video conversion chip is the operation time of the set of chips in this operation. The reset response time can indicate that the set of chips needs to switch the resolution at a specific moment in this operation. Combined with the resolution switching instruction that has been received, when the chip operation time of the video conversion chip reaches the reset response time, it indicates that the set of chips needs to switch the resolution at this time. In order to reduce the screen flicker caused by compatibility issues, a reset control signal needs to be sent to the chip controller to disconnect the data interaction between the video conversion chip and the set of chips.

[0072] Optionally, the resolution switching instructions of the chip set may be different resolution switches, and thus the determined preset reset signal is also different. It can be determined based on the actual chip set model or the time required for resolution switching. For example, the reset response time in the preset reset signal changes with the change of the resolution switching instruction.

[0073] Step 206: When the video conversion chip is reset, output the image data signal to the video conversion chip.

[0074] Specifically, the control device can continue to output image data signals to the video conversion chip when the video conversion chip completes the reset. Optionally, the set of chips in the control device can also continue to output image data signals when the video conversion chip is reset. However, since the video conversion chip is being reset at this time, it will not respond to the image data signal, so the image data signal sent during the reset of the video conversion chip is equivalent to an invalid signal. Therefore, after the video conversion chip completes the reset, the resolution switching of the set of chips is usually completed, and the data interaction between the video conversion chip and the set of chips can be restored. The set of chips in the control device can output image data signals to the video conversion chip, so that the video conversion chip can continue to control the display screen to display the image.

[0075] The judgment on whether the reset of the video conversion chip is completed may be obtained by interacting with the chip controller, directly interacting with the video conversion chip, or analyzing according to a set reset condition or state.

[0076] In an exemplary embodiment, due to the different models, types and working parameters of the video conversion chip, the required reset time is also different. The preset reset signal may also include the reset completion time. Figure 4 As shown, step 206 also includes step 402: when the chip operation time reaches the reset completion time, outputting the image data signal to the video conversion chip.

[0077] When the video conversion chip is reset, it is necessary to analyze whether the reset of the video conversion chip is completed. If the preset reset signal also includes the reset completion time, the control device only needs to analyze whether the video conversion chip is reset in place according to the reset completion time in the preset reset signal: when the chip operation time reaches the reset completion time, the control device continues to interact with the video conversion chip and outputs an image data signal to the video conversion chip. Among them, since the chip operation time refers to the operation time of the video conversion chip, and the preset reset signal includes the reset response time, the time required for the video conversion chip to reset can be determined based on the model, type and working parameters of the video conversion chip. Combining the above two, the reset completion time can be obtained.

[0078] The above display control method includes obtaining a resolution switching instruction, calling a preset reset signal based on the resolution switching instruction, and sending the preset reset signal to the chip controller, and outputting an image data signal to the video conversion chip when the video conversion chip completes the reset. The chip controller is connected to the video conversion chip and is used to control the reset of the video conversion chip, and the video conversion chip is used to control the display of the display screen. By calling the preset reset signal to control the reset of the video conversion chip when switching the resolution of the display screen, the video conversion chip can re-control the display output of the display screen based on the image data signal after reset, thereby reducing the screen flickering phenomenon when the resolution is switched, which is conducive to improving the reliability of display control.

[0079] In an exemplary embodiment, Figure 5 As shown, step 206 includes steps 502 to 506 .

[0080] Step 502, obtaining the working status of the video conversion chip.

[0081] Specifically, in one embodiment, the detection of whether the video conversion chip has been reset can be determined based on the working state of the video conversion chip, and the processor of the control device can obtain the working state of the video conversion chip through the chip controller, such as whether the level generated by the chip controller based on the preset reset signal has been sent, or whether the chip controller has received a feedback signal from the video conversion chip, etc. Or the processor can directly interact with the video conversion chip to obtain its working state.

[0082] Step 504: when the working state of the video conversion chip indicates that the resetting is completed, output the image data signal to the video conversion chip.

[0083] Specifically, the control device analyzes whether the video conversion chip has been reset based on the working status of the video conversion chip. When the reset is completed, the video conversion chip can continue to convert the received image data signal and control the display screen. Optionally, the set of chips of the control device can stop outputting image data to the video conversion chip when the chip conversion chip is reset, and the set of chips of the control device can also continue to output image data signals when the video conversion chip is reset. However, it should be noted that when the video conversion chip is being reset, the video conversion chip will not respond to the image data signal, so the image data signal sent during the reset of the video conversion chip is equivalent to an invalid signal.

[0084] Step 506 , when the working status representation of the video conversion chip is not reset, after delaying a preset inspection time, obtaining the working status of the video conversion chip is executed.

[0085] If the working status of the video conversion chip indicates that the reset has not been completed, it may be considered that the reset completion time has not yet arrived, or the reset time of the video conversion chip is long, then step 502 can be re-executed after delaying the preset detection time. The preset detection time can be set according to the range of the reset time, and is not limited to a numerical value.

[0086] Based on the same technical concept, the present application also provides a display control device, such as Figure 1 As shown, the display control device includes a control device 102, a video conversion chip 104 and a chip controller 106. The control device 102 is connected to the video conversion chip 104 and the chip controller 106. The chip controller 106 is connected to the video conversion chip 104. The video conversion chip 104 is connected to the display screen. The control device 102 is used to control the display screen based on the methods described in the embodiments of the present application.

[0087] The control device 102 may be a chip of different models or an integrated body of multiple chips, capable of data storage, processing and calculation, and capable of outputting signals to the video conversion chip 104 and the chip controller 106 respectively, and performing corresponding control. The picture displayed on the display screen is also determined by the image data stored in the control device 102. The chip controller 106 may be a programmable logic device, capable of receiving the signal sent by the control device 102 and performing corresponding conversion or processing, and adjusting the working state of the video conversion chip 104 according to the signal, for example, controlling the video conversion chip 104 to reset. The video conversion chip 104 can transcode and process the signal output by the control device 102, convert it into corresponding image display data, and transmit it to the display screen for display.

[0088] Further, in one embodiment, the control device 102 includes a processor and a chip set, the processor is connected to the chip set and the chip controller 106, and the chip set is connected to the video conversion chip 104. The processor can be a processing chip of different models, capable of data processing and calculation, such as a miniaturized device of multiple electronic components and circuits integrated on a semiconductor chip, a central processing unit, a memory chip, etc. A chip set refers to encapsulating multiple different components or functional modules in an integral housing, which has the characteristics of high integration, easy installation and maintenance, strong scalability, and quick assembly, low cost, and easy maintenance. Exemplarily, the processor may include a Feiteng series CPU, and the chip set may be a corresponding Feiteng series chip set CPU, such as an X100 chip set processor. The Feiteng series CPU and the chip set CPU establish a communication connection through a high-speed communication bus interface of PCIE3.0 (Peripheral Component Interconnect Express, the third generation high-speed serial computer expansion bus) to achieve data interaction and commonality.

[0089] The chip set can send the image data signal to the video conversion chip 104 through the DP (Display Port, digital video interface) interface. The video conversion chip 104 has the ability to transcode the received image data signal. After obtaining the corresponding image data, it transmits the image data to the display screen through the HDMI (High Definition Multimedia Interface, high-definition multimedia interface or high-definition video interface) interface or LVDS (Low Voltage Differential Signaling, low voltage differential signal, this application specifically refers to the transmission interface of the video signal) interface, and the corresponding picture is displayed on the display screen.

[0090] In one embodiment, the chip controller 106 is a CPLD. CPLD (Complex Programmable Logic Device) is an integrated circuit chip that can implement various circuit designs and logic processing through internal logic programming. It generally has multiple physical interface modules such as IO BANK to complete signal transmission and reception. The chip controller 106 can generate a corresponding reset level according to a preset reset signal sent by the processor to control the video conversion chip 104 to reset. Optionally, the chip controller 106 and the processor establish a communication connection through a GPIO (General Purpose Input / Output, a general purpose input / output interface, a form of interface for the processor) interface.

[0091] Furthermore, in one of the embodiments, the processor includes an operating system and a memory, the operating system is connected to the memory, the chip controller 106 and the chip set, and the memory is used to store a preset reset signal. The operating system refers to a software programmable system, which is usually carried on a chip with software programmability to work, such as the Feiteng series CPU, which meets the characteristics of full spectrum, high performance, complete ecology, high degree of autonomy, etc., and has high adaptability and compatibility. The memory refers to a device that can store data content, such as FLASH flash memory, which is a flash memory chip that can save program files. On the basis of the FLASH flash memory being configured with UEFI (Unified Extensible Firmware Interface, which provides an interface connecting the operating system and hardware), it is connected to the UEFI interface of the Feiteng series CPU through SPI (Serial Peripheral Interface, a physical bus interface), so that the Feiteng series CPU can output corresponding signals according to the program in the FLASH flash memory.

[0092] In order to better understand the above scheme, combined with Figure 1 The application scenario shown is explained in detail below in conjunction with a specific embodiment.

[0093] In an exemplary embodiment, Figure 6 As shown, the display control device includes Feiteng series CPU processor, Feiteng X100 chip processor, video conversion chip, FLASH and CPLD. Feiteng series processor is equipped with operating system and connected to FLASH in SPI mode through UEFI interface. It is also connected to IO BANK of CPLD through GPIO interface. IO BANK of CPLD is also connected to IO interface of video conversion chip. Data exchange is carried out between Feiteng series CPU processor and chip processor through PCIE3.0. Chip processor is connected to video conversion chip through DP interface. Video conversion chip is connected to display screen through HDMI interface or LVDS.

[0094] The display control process of the display screen is as follows Figure 7 As shown, at the beginning of startup, the program stored in FLASH is modified first, the UEFI program is modified, and the UEFI firmware with IO level control is pre-added therein, that is, the preset reset signal, and saved in FLASH. Then each device or equipment is powered on to maintain power supply. When resolution switching is required, the Feiteng series CPU processor loads the data stored in FLASH through the SPI interface, including the UEFI firmware previously saved in FLASH, that is, the preset reset signal. After loading the UEFI firmware, according to the preset time and IO level in the preset reset signal in the firmware, the reset (control) signal is output to the CPLD through the GPIO interface. The CPLD receives the reset signal from the Feiteng CPU processor and resets the video conversion chip, that is, outputs the corresponding IO level to the video conversion chip to reset the video conversion chip. After the video conversion chip is reset, the chip processor has also completed the resolution switching. The video conversion chip can re-convert the DP video signal from the Feiteng X100 chip processor, and the converted HDMI or LVDS signal is output to the display to complete the image display.

[0095] In this embodiment, IO control signals and CPLD timing (preset reset signal) are pre-added through the UEFI firmware of the Feiteng CPU processor, and the video conversion chip is reset before the screen flickering problem occurs when the resolution of the chipset in the computer platform is switched. This enables the video conversion chip to reconvert and output the DP video signal of the Feiteng X100 chipset processor, successfully solving the screen flickering problem when the resolution of the computer platform based on the Feiteng processor is switched.

[0096] It should be understood that, although the various steps in the flowcharts involved in the above-mentioned embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-mentioned embodiments can include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0097] Based on the same inventive concept, the embodiment of the present application also provides a display control device for implementing the display control method involved above. The implementation solution provided by the device to solve the problem is similar to the implementation solution recorded in the above method, so the specific limitations in one or more display control device embodiments provided below can refer to the limitations of the display control method above, and will not be repeated here.

[0098] In an exemplary embodiment, Figure 8 As shown, a display control device is provided, including: a switching start module 820, a switching reset module 840 and a control module 860, wherein:

[0099] A switching start module 820 is used to obtain a resolution switching instruction;

[0100] The switching reset module 840 is used to call a preset reset signal based on the resolution switching instruction and send the preset reset signal to the chip controller; the chip controller is connected to the video conversion chip to control the reset of the video conversion chip, and the video conversion chip is used to control the display of the display screen;

[0101] The control module 860 is used to output an image data signal to the video conversion chip when the video conversion chip completes resetting.

[0102] In one embodiment, the switching reset module 840 is further used to call a preset reset signal in the memory based on the resolution switching instruction, wherein the preset reset signal includes a reset response time and a reset control signal. When the chip operation time of the video conversion chip reaches the reset response time, a reset control signal is sent to the chip controller.

[0103] In one embodiment, the preset reset signal also includes a reset completion time, and the control module 860 is further configured to output an image data signal to the video conversion chip when the chip operation time reaches the reset completion time.

[0104] In one embodiment, the control module 860 is further used to obtain the working state of the video conversion chip. When the working state of the video conversion chip indicates that the reset is completed, the image data signal is output to the video conversion chip; when the working state of the video conversion chip indicates that the reset is not completed, the working state of the video conversion chip is obtained after a preset inspection time delay.

[0105] Each module in the above display control device can be implemented in whole or in part by software, hardware or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute operations corresponding to each module.

[0106] In an exemplary embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as shown in FIG. Fig. 9 As shown. The computer device includes a processor, a memory, an input / output interface, a communication interface, a display unit and an input device. The processor, the memory and the input / output interface are connected through a system bus, and the communication interface, the display unit and the input device are connected to the system bus through the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be implemented through WIFI, a mobile cellular network, near field communication (NFC) or other technologies. When the computer program is executed by the processor, a display control method is implemented. The display unit of the computer device is used to form a visually visible picture, which can be a display screen, a projection device or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device can be a touch layer covering the display screen, or a button, trackball or touchpad set on the computer device shell, or an external keyboard, touchpad or mouse.

[0107] Those skilled in the art will understand that Fig. 9 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0108] In an exemplary embodiment, a computer device is provided, including a memory and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, the following steps are implemented:

[0109] Get the resolution switching instruction;

[0110] Based on the resolution switching instruction, a preset reset signal is called, and the preset reset signal is sent to the chip controller; the chip controller is connected to the video conversion chip to control the reset of the video conversion chip, and the video conversion chip is used to control the display of the display screen;

[0111] When the video conversion chip completes resetting, an image data signal is output to the video conversion chip.

[0112] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0113] Based on the resolution switching instruction, a preset reset signal in the memory is called, the preset reset signal includes a reset response time and a reset control signal. When the chip operation time of the video conversion chip reaches the reset response time, a reset control signal is sent to the chip controller.

[0114] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0115] The preset reset signal also includes a reset completion time. When the chip operation time reaches the reset completion time, an image data signal is output to the video conversion chip.

[0116] In one embodiment, when the processor executes the computer program, the processor further implements the following steps:

[0117] Obtain the working status of the video conversion chip. When the working status of the video conversion chip indicates that the reset is complete, output the image data signal to the video conversion chip; when the working status of the video conversion chip indicates that the reset is not complete, after delaying the preset inspection time, obtain the working status of the video conversion chip.

[0118] In one embodiment, a computer readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

[0119] Get the resolution switching instruction;

[0120] Based on the resolution switching instruction, a preset reset signal is called, and the preset reset signal is sent to the chip controller; the chip controller is connected to the video conversion chip to control the reset of the video conversion chip, and the video conversion chip is used to control the display of the display screen;

[0121] When the video conversion chip completes resetting, an image data signal is output to the video conversion chip.

[0122] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0123] Based on the resolution switching instruction, a preset reset signal in the memory is called, the preset reset signal includes a reset response time and a reset control signal. When the chip operation time of the video conversion chip reaches the reset response time, a reset control signal is sent to the chip controller.

[0124] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0125] The preset reset signal also includes a reset completion time. When the chip operation time reaches the reset completion time, an image data signal is output to the video conversion chip.

[0126] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0127] Obtain the working status of the video conversion chip. When the working status of the video conversion chip indicates that the reset is complete, output the image data signal to the video conversion chip; when the working status of the video conversion chip indicates that the reset is not complete, after delaying the preset inspection time, obtain the working status of the video conversion chip.

[0128] In one embodiment, a computer program product is provided, comprising a computer program, which, when executed by a processor, implements the following steps:

[0129] Get the resolution switching instruction;

[0130] Based on the resolution switching instruction, a preset reset signal is called, and the preset reset signal is sent to the chip controller; the chip controller is connected to the video conversion chip to control the reset of the video conversion chip, and the video conversion chip is used to control the display of the display screen;

[0131] When the video conversion chip completes resetting, an image data signal is output to the video conversion chip.

[0132] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0133] Based on the resolution switching instruction, a preset reset signal in the memory is called, the preset reset signal includes a reset response time and a reset control signal. When the chip operation time of the video conversion chip reaches the reset response time, a reset control signal is sent to the chip controller.

[0134] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0135] The preset reset signal also includes a reset completion time. When the chip operation time reaches the reset completion time, an image data signal is output to the video conversion chip.

[0136] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented:

[0137] Obtain the working status of the video conversion chip. When the working status of the video conversion chip indicates that the reset is complete, output the image data signal to the video conversion chip; when the working status of the video conversion chip indicates that the reset is not complete, after delaying the preset inspection time, obtain the working status of the video conversion chip.

[0138] A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, an artificial intelligence (AI) processor, etc., but are not limited to this.

[0139] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0140] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A display control method, characterized in that: The method comprises: Get the resolution switching instruction; Based on the resolution switching instruction, a preset reset signal is called, and the preset reset signal is sent to a chip controller; the chip controller is connected to a video conversion chip, and is used to control the reset of the video conversion chip, and the video conversion chip is used to control the display of the display screen; When the video conversion chip completes resetting, an image data signal is output to the video conversion chip.

2. The method according to claim 1, characterized in that The method of calling a preset reset signal based on the resolution switching instruction and sending the preset reset signal to a chip controller includes: Calling a preset reset signal in a memory based on the resolution switching instruction; the preset reset signal includes a reset response time and a reset control signal; When the chip operation time of the video conversion chip reaches the reset response time, the reset control signal is sent to the chip controller.

3. The method according to claim 2, characterized in that The preset reset signal also includes a reset completion time, and when the video conversion chip completes the reset, outputting an image data signal to the video conversion chip includes: When the chip operation time reaches the reset completion time, the image data signal is output to the video conversion chip.

4. The method according to claim 1, characterized in that: When the video conversion chip completes resetting, outputting an image data signal to the video conversion chip comprises: Obtaining the working status of the video conversion chip; When the working state of the video conversion chip indicates that the reset is completed, outputting an image data signal to the video conversion chip; In the case that the working status representation of the video conversion chip has not been reset, the step of obtaining the working status of the video conversion chip is performed after delaying a preset inspection time.

5. A display control device, characterized in that: The device comprises: Switching startup module, used to obtain resolution switching instructions; A switching reset module, used for calling a preset reset signal based on the resolution switching instruction, and sending the preset reset signal to a chip controller; the chip controller is connected to a video conversion chip, used for controlling the reset of the video conversion chip, and the video conversion chip is used for controlling the display screen display; The control module is used to output an image data signal to the video conversion chip when the video conversion chip completes resetting.

6. A display control device, characterized in that: The display control device includes a control device, a video conversion chip and a chip controller, the control device is connected to the video conversion chip and the chip controller, the chip controller is connected to the video conversion chip, the video conversion chip is connected to a display screen, and the control device is used to perform display control on the display screen based on the method described in any one of claims 1 to 4.

7. The display control device according to claim 6, characterized in that: The control device comprises a processor and a set of chips, wherein the processor is connected to the set of chips and the chip controller, and the set of chips is connected to the video conversion chip.

8. The display control device according to claim 7, characterized in that: The processor includes an operating system and a memory, the operating system is connected to the memory, the chip controller and the chip set, and the memory is used to store a preset reset signal.

9. The display control device according to claim 6, characterized in that: The chip controller is CPLD.

10. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 4 are implemented.

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