Video acceleration processing method under distributed computing framework

Abstract

The invention discloses a video acceleration processing method under a distributed computing framework, which belongs to the technical field of video processing, and specifically comprises the following steps of: analyzing coding parameters of an input video stream, identifying an original GOP (Group of Picture) structure, reconstructing a GOP by inserting a supplementary key frame, and generating a block unit starting from the key frame and containing a complete GOP; collecting a real-time resource state of each node in the distributed cluster; optimizing a task allocation strategy based on an improved genetic algorithm; calling a corresponding parallel processing mode according to the coding format of the block unit, inputting the blocks into a distributed reasoning cluster, and performing multi-node collaborative reasoning through model segmentation; performing timestamp calibration on a processing result of each node based on a global clock server, and compensating time offset during block splicing through linear interpolation; checking a block processing state according to a set period if a node fails or is overtime; and redistributing the uncompleted blocks to the standby nodes, and continuing processing by inheriting an intermediate calculation result of the original nodes.

Description

Technical Field

[0001] The present invention relates to the technical field of video processing, and in particular to a video acceleration processing method under a distributed computing framework. Background Art

[0002] With the explosive growth of video data, especially the popularity of 4K / 8K ultra-high-definition video, real-time live streaming, and large-scale surveillance video, the limitations of traditional stand-alone video processing solutions have become increasingly apparent. For example, when a stand-alone system processes 4K / 8K ultra-high-definition video, due to the huge amount of video data, the processing power of a single CPU or GPU is difficult to meet the needs of efficient transcoding, real-time analysis, and low-latency distribution. In large-scale surveillance video scenarios, stand-alone systems are unable to cope with the storage and processing of massive video data. Therefore, traditional stand-alone solutions can no longer meet the efficiency, real-time, and low-latency requirements of modern video processing, and distributed video processing architecture has become a key direction for solving these problems.

[0003] The distributed video processing architecture can effectively cope with the processing needs of large-scale video data by distributing tasks to multiple computing nodes for parallel processing. It also supports horizontal expansion and can flexibly increase or decrease computing nodes according to business needs.

[0004] Traditional distributed video processing mostly uses fixed-length blocks, but the GOP (Group of Pictures) structure of video encoding usually starts with a key frame, and subsequent frames rely on the decoding of the previous frame. Fixed blocks may destroy the integrity of the GOP, resulting in dependency breaks at the block boundaries, requiring additional decoding and re-encoding to repair the dependency chain, making it difficult to achieve a true linear acceleration ratio. In addition, existing scheduling strategies do not fully consider the differentiated computing power of heterogeneous hardware such as GPUs, CPUs, and FPGAs, resulting in the coexistence of idle resources and bottlenecks. Summary of the invention

[0005] The purpose of the present invention is to provide a video acceleration processing method under a distributed computing framework to solve the following technical problems: Traditional distributed video processing has poor block independence and low parallel efficiency, making it difficult to achieve a true linear acceleration ratio. In addition, the overall cluster throughput is limited and the return on hardware investment is low.

[0006] The purpose of the present invention can be achieved through the following technical solutions: A video acceleration processing method under a distributed computing framework comprises the following steps: S1, parsing the encoding parameters of the input video stream and identifying the original GOP structure; if the original GOP length is greater than a preset threshold or there is an incomplete GOP sequence, reconstructing the GOP by inserting a supplementary key frame, generating a block unit starting with a key frame and containing a complete GOP, and generating metadata for each block unit; S2. Collect the real-time resource status of each node in the distributed cluster; optimize the task allocation strategy based on the improved genetic algorithm, and prioritize the block units to the nodes with local storage and matching idle computing power. The objective function is to minimize the global processing delay; S3. Call the corresponding parallel processing mode according to the encoding format of the block unit, input the block into the distributed reasoning cluster, and perform multi-node collaborative reasoning through model segmentation; S4. Based on the global clock server, the processing results of each node are timestamped and compensated for the time offset during block splicing through linear interpolation; the audio stream is resampled to eliminate the phase error and generate audio and video synchronization marks; S5. Check the block processing status according to the set period. If the node fails or times out, locate the unfinished blocks according to the metadata; reallocate the unfinished blocks to the backup node, and inherit the intermediate calculation results of the original node to continue processing.

[0007] As a further solution of the present invention: the specific process of S1 is: Analyze the encoding structure of the video stream through the probesize and analyzeduration parameters of FFmpeg to detect the starting position and length of the original GOP; If it is detected that the GOP length exceeds the preset threshold or there is a block boundary that does not start with a key frame, the force_key_frames parameter is called to force the insertion of a supplementary key frame at the block boundary, and the decoding dependency relationship of adjacent frames is reconstructed based on the inter-frame motion estimation algorithm; Generate structured metadata for each block unit, including resolution, bit rate, frame rate, quantization parameter, encoding format, start timestamp, end timestamp, block duration, key frame index of adjacent blocks and reference frame list; store the metadata in a distributed database, and bind it to the block video stream after serialization through the Protobuf protocol; Decode and verify the generated block units. If there are unresolved inter-frame dependencies within the blocks, trigger the secondary block process and regenerate the blocks by adjusting the GOP length or increasing the key frame density. For highly dynamic scenes, shorten the block duration to the preset duration t; for static scenes, merge adjacent GOPs into the preset duration T. Block cutting and metadata generation are performed in parallel based on a multi-thread pool, with each thread processing a video segment independently. GPU-accelerated frame analysis is enabled for videos with resolutions exceeding a threshold, and the block results are output in real time.

[0008] As a further solution of the present invention: the specific process of S2 is: The real-time resource status of each node in the distributed cluster is abstracted into a multidimensional vector, which includes: the CUDA core utilization of the GPU, the number of idle cores of the CPU, the remaining logic unit ratio of the FPGA, the local storage status of the block data, the read and write bandwidth of the SSD / HDD, the transmission delay between nodes, the available bandwidth and the packet loss rate; the multidimensional vector is converted into a chromosome gene sequence using a binary coding method, and each gene segment corresponds to a resource status; Define the fitness function based on node processing delay, network transmission overhead and energy consumption cost, and dynamically adjust the weights of node processing delay, network transmission overhead and energy consumption cost according to the task type; N groups of chromosomes are randomly generated, N ≥ 100, and each group represents a node allocation scheme; each generation of evolution uses the roulette wheel selection method to retain the individuals with the top 20% fitness; single-point crossover is performed on the selected individuals, and the crossover probability is dynamically adjusted with the number of iterations; the mutation probability is set to randomly flip the gene sequence, and the simulated annealing algorithm is used to avoid local optimality. The evolution is terminated when the optimal fitness changes by less than 1% for 5 consecutive generations or the maximum number of iterations is reached; During the task execution process, Prometheus is used to collect changes in node resource status in real time. If it is detected that the node performance has dropped beyond the threshold, dynamic rescheduling is triggered to suspend the current node task and save the intermediate status to distributed storage. The genetic algorithm is re-run based on the latest resource status to generate a new allocation plan. The task is migrated to the new node and execution is resumed.

[0009] As a further solution of the present invention: in S2, for the block unit stored in the local node, a weighted gain of 20% of its fitness value is given; if the local node resources are insufficient, the neighboring nodes in the same rack or with available bandwidth greater than the set value are preferentially selected.

[0010] As a further solution of the present invention: the specific process of S3 is: For the block unit of H.264 / HEVC encoding, the GPU's NVENC hardware encoder is enabled, and a multi-channel parallel pipeline is set up for processing; for the block unit of VP9 / AV1 encoding, the CPU's AVX-512 instruction set is used to optimize the intra-frame prediction algorithm, and the slice encoding technology is used to divide a single frame into multiple regions for parallel processing; Pre-burn the H.265 encoding pipeline on the FPGA node; enable the TensorRT acceleration engine on the GPU node to perform layer fusion and precision quantization on the deep learning model.

[0011] As a further solution of the present invention: the specific process of S4 is: Deploy NTP servers in distributed clusters, add local timestamps to the processing results of each block unit, and calibrate them to global timestamps through NTP servers; perform weighted averaging of overlapping areas of timestamps at block boundaries to eliminate splicing jitter caused by differences in node processing speeds; Resampling technology is used for audio streams to dynamically adjust the audio sampling rate according to the display timestamp of the video frame to eliminate the phase offset caused by block processing; synchronization marks are inserted at the audio and video splicing points to align the time of the audio and video streams; for multi-channel audio, inter-channel interpolation is used to compensate for the delay differences between channels.

[0012] As a further solution of the present invention: S4 also includes: The block units processed by each node are sorted according to the global timestamp and merged into a complete video stream through a streaming splicing algorithm; the block boundaries are smoothed between frames, and a weighted average algorithm is used to eliminate visual jumps at the splicing points; for high-dynamic scenes, motion compensation technology is enabled to restore the motion continuity of the block boundaries based on optical flow estimation.

[0013] As a further solution of the present invention: the specific process of S5 is: Prometheus and Grafana are used to periodically collect the operating status of each node, and preset hardware failure thresholds and task timeout thresholds. When a threshold is triggered, the node is automatically marked as "abnormal" and an alarm is pushed to the management platform. For unfinished blocks on abnormal nodes, the intermediate data is directly migrated to the standby node through RDMA to avoid transfer through the CPU; during the migration process, the task lock is maintained; for blocks that failed to be encoded, the error log is parsed through FFmpeg's ffprobe tool to locate the location of the damaged frame; for abnormal analysis task results, low confidence areas are filtered based on the confidence threshold; For video encoding tasks, only the damaged frames and their subsequent dependent frames are re-encoded, including P frames and B frames, and normal frames are retained. For deep learning inference tasks, the fine-tuned sub-model is loaded on the spare node, and only the abnormal blocks are reprocessed.

[0014] Beneficial effects of the present invention: Compared with traditional polling / random scheduling, the present invention combines genetic algorithms with resource scheduling to solve the load balancing problem of heterogeneous clusters; the FPGA+GPU hybrid architecture of the hardware acceleration module takes into account both high throughput and low power consumption characteristics, and optimizes the entire link from GOP block preprocessing to timestamp synchronization, avoiding the performance bottleneck of the block-aggregation stage in the prior art; the dynamic retry mechanism is combined with intermediate state storage to reduce fault recovery time. Through Kubernetes CRD and SDN integration, elastic deployment across cloud / edge nodes is supported. The present invention can make full use of the resources of cluster nodes, avoid idle resources and excessive load, achieve efficient resource allocation, and greatly improve the overall speed of video processing. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The present invention will be further described below in conjunction with the accompanying drawings.

[0016] Figure 1 It is a schematic diagram of the process of the present invention. DETAILED DESCRIPTION

[0017] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0018] See also Figure 1 As shown, the present invention is a video acceleration processing method under a distributed computing framework, comprising the following steps: 1.1GOP integrity detection and key frame insertion: Use FFmpeg's avformat_open_input and avformat_find_stream_info functions to parse the input video stream and extract the following encoding parameters: a. GOP length: the number of frames between key frames (I frames); b. Frame type distribution: the number and location of I frames, P frames (forward prediction frames), and B frames (bidirectional prediction frames); c. Resolution and bit rate: video frame width, height and average bit rate; If it is detected that the GOP length exceeds a preset threshold (e.g., 250 frames) or there is a block boundary that does not start with an I frame, the key frame insertion process is triggered; Call the force_key_frames parameter of FFmpeg to forcibly insert additional key frames (I frames) at the block boundaries; for the block units after the I frame is inserted, the decoding dependency of adjacent frames is reconstructed through the inter-frame motion estimation (MotionEstimation) algorithm to ensure the independence of the frame sequence within the block; for the case where the B frame depends on the external frame, the reference frame remapping (ReferenceFrameRemapping) technology is used to replace the external reference frame with the I frame or P frame in the block; 1.2 Block metadata generation and storage: Generate structured metadata for each chunk unit, including: a. Coding parameters: resolution (Width × Height), bitrate, frame rate (FPS), quantization parameter (QP) and coding format (H.264 / HEVC / AV1); b. Time information: start timestamp (PTS), end timestamp, block duration (Duration); c. Dependency: I-frame index and reference frame list (ReferenceFrameList) of adjacent blocks; d. Block position: byte offset (ByteOffset) and size (Size) in the original video stream; Serialize metadata through the Protobuf protocol to generate a compact binary format (BinaryFormat) to reduce storage and transmission overhead; store in a distributed database (such as Apache Cassandra), establish secondary indexes by block ID and timestamp to support fast retrieval; in the task distribution stage, bind metadata to the block video stream for transmission to ensure that the computing nodes can correctly parse the block content; 1.3 Block verification and dynamic adjustment: Decode and verify the generated block units, use FFmpeg's avcodec_decode_video2 function to decode frame by frame, and check whether there are unresolved inter-frame dependencies (such as B frames referencing external frames); if dependency breaks are detected, trigger the secondary block process and regenerate blocks by adjusting the GOP length or increasing the I frame density; Dynamically adjust the block size according to the complexity of the video content: a. High-dynamic scenes (such as sports events): shorten the block length to 1-2 seconds to reduce the single-task load; b. Static scenes (such as surveillance videos): merge adjacent GOPs into larger blocks (such as 10 seconds) to reduce scheduling overhead; The scene classification model (SceneClassificationModel) is used to analyze video content in real time and dynamically adjust the segmentation strategy: a. Use the pre-trained ResNet-50 model to extract video frame features; b. Calculate the scene complexity score (ComplexityScore) based on the feature vector and dynamically adjust the block duration; 1.4 Parallel preprocessing acceleration: Use the thread pool to perform block cutting and metadata generation in parallel, with each thread processing a video segment independently. For ultra-high-definition videos (8K and above), enable GPU-accelerated frame analysis (such as NVIDIA Video Codec SDK) to output the block results in real time. Store the block units in a distributed file system (such as HDFS or Ceph), establish a directory structure based on the block ID and timestamp, and support efficient retrieval; cache the frequently accessed block units (such as the first few blocks of the live stream) in the local SSD or memory to reduce read latency; 1.5 Block preprocessing performance optimization: Enable hardware-accelerated frame analysis (such as NVIDIA NVDEC) for GPU nodes to increase the block cutting speed to real-time 8K@60fps; pre-burn the video analysis pipeline for FPGA nodes to support low-power block preprocessing; perform lossless compression on block units (such as Zstandard) to reduce network transmission overhead; for real-time streaming scenarios, enable chunked compression (ChunkedCompression) to compress and transmit at the same time.

[0019] 2.1 Multi-dimensional resource modeling and chromosome encoding: The resource status of each node in the distributed cluster is abstracted into a six-dimensional vector, including: Computing power indicators: GPU CUDA core utilization (0%-100%), CPU idle core number (integer), FPGA remaining logic unit (LUT) ratio (0%-100%); Storage indicators: block data local storage flag (Boolean value, 0 / 1), SSD / HDD read and write bandwidth (MB / s); Network indicators: inter-node transmission delay (ms), available bandwidth (Mbps); A hybrid coding strategy is used to convert resource vectors into chromosome gene sequences: Binary coding: GPU utilization (8 bits, 1% accuracy), number of CPU idle cores (4 bits, maximum support for 16 cores), FPGALUT ratio (8 bits); Real number coding: network delay (floating point number, retaining 2 decimal places), bandwidth (floating point number); Each chromosome represents a task allocation scheme with a length of M×N (M is the number of nodes and N is the number of blocks), and the gene bit marks the mapping relationship between blocks and nodes (for example, gene bit [i][j]=1 means that block j is allocated to node i).

[0020] 2.2 Dynamic weight fitness function design: The fitness function combines the following optimization objectives: ; Where: T p represents the node processing delay (maximum completion time); T n E represents the total network transmission overhead (data volume × transmission delay); p represents the total energy consumption of the cluster (GPU / FPGA power consumption × running time); C c Indicates the hardware usage cost (weighted by the node rental rate). α, β, γ, and δ are dynamic weight coefficients that are adjusted according to the task type: For real-time transcoding tasks: α=0.6, β=0.3, γ=0.1, δ=0 (prioritize latency and bandwidth); For offline analysis tasks: α=0.3, β=0.2, γ=0.4, δ=0.1 (balance energy consumption and cost).

[0021] Penalties are imposed on solutions that violate constraints (such as node memory limit or insufficient bandwidth) to reduce their fitness values.

[0022] 2.3 Population initialization and evolution iteration: The initial population (size ≥ 100) is randomly generated to ensure that each chromosome meets the following constraints: a. The number of blocks allocated to a single node does not exceed its maximum number of parallel tasks; b. When the local storage mark of the block data is 1, it must be allocated to the node storing the block; Adopting the elite retention strategy, directly retain the top 20% of individuals in fitness to the next generation; the remaining individuals are selected through the tournament selection method (Tournament Selection, 5 individuals are randomly selected from each group, and the best ones are retained); multi-point crossover is performed on the selected individuals, the crossover points are randomly selected, and the crossover probability Pc is dynamically adjusted: the initial Pc=0.85, decreasing by 1% each generation to a minimum of 0.6; arithmetic crossover is used for the real number coding part to generate the gene value of the offspring; bit flip mutation (BitFlip) is performed on the binary coding bit, and the mutation probability Pm=0.02; Gaussian mutation (GaussianMutation) is used for the real number coding part, and the standard deviation is set to 10% of the current population fitness variance; simulated annealing mechanism (SimulatedAnnealing) is introduced to allow a higher mutation rate in the early stage of evolution to avoid premature convergence; The algorithm is terminated when the optimal fitness changes by less than 1% for five consecutive generations or when the maximum number of iterations (500 generations) is reached.

[0023] 2.4 Real-time feedback and dynamic parameter adjustment: Prometheus is used to monitor node resource changes in real time, and the computing power and network indicators in the chromosome encoding are updated every 5 seconds. If the node load suddenly changes (such as a 30% drop in GPU utilization), local chromosome recoding is triggered. According to the urgency of the task queue (e.g., real-time streams have higher priority than offline tasks), the fitness function weight is dynamically adjusted (e.g., when there is a burst of high-priority tasks, α is increased to 0.8); If a decrease in population diversity is detected (such as genetic similarity > 80%), the mutation probability is temporarily increased to Pm=0.05; for task allocation plans that have not been optimized for a long time, the immigration strategy is enabled to inject random new individuals to maintain diversity.

[0024] 2.5 Scheduling result decoding and task distribution: Parse the optimal chromosome into a node-block mapping table, for example: Node3→Chunk1,Chunk5; Node7→Chunk2,Chunk3; For multiple blocks assigned to the same node, they are combined and transmitted according to the principle of data locality (such as packaging into a single data stream); zero-copy data transmission between GPU / FPGA nodes is achieved through RDMA (remote direct memory access) technology 3.1GPU accelerated encoding and pipeline optimization: For the block unit of H.264 / HEVC encoding, the NVIDIA NVENC hardware encoder is called and a multi-channel parallel pipeline is set up, with each channel independently processing a block unit; the intra-frame prediction and motion estimation algorithms are optimized through the CUDA kernel to increase the encoding speed to real-time 8K@60fps; the asynchronous transfer mode (AsyncMode) is enabled to directly transfer video frames from the host memory (HostMemory) to the GPU video memory (DeviceMemory), reducing the data copy overhead between the CPU and GPU; 3.2CPU multi-threaded coding and instruction set optimization: For VP9 / AV1 encoding blocks, the CPU's AVX-512 instruction set is used to optimize the Transform & Quantization and Entropy Coding modules, improving single-thread performance by 2-3 times. Tile Encoding technology is used to divide a single frame into multiple independent areas (such as 16x16 blocks) and distribute them to multi-core CPUs for simultaneous processing through the OpenMP parallel framework. For highly complex scenes (such as fast-moving or texture-rich areas), encoding parameters are dynamically adjusted (such as increasing the number of reference frames or reducing the quantization step size) to ensure output quality. 3.3FPGA hardware acceleration and pipeline customization: Pre-burn the H.265 encoding pipeline on the FPGA node to support real-time low-power processing of 8K video; generate a customized IP core through the Vivado HLS tool, optimize the inter-frame prediction (InterPrediction) and loop filter (LoopFilter) modules, and reduce the delay to milliseconds; enable dynamic frequency scaling (Dynamic Frequency Scaling) technology to adjust the FPGA operating frequency in real time according to the load to balance performance and power consumption; 3.4 Deep Learning Reasoning Acceleration: For video analysis tasks (such as object detection and scene classification), the blocks are input into the distributed inference cluster, and multi-node collaborative inference is achieved through model sharding. Enable the TensorRT acceleration engine on the GPU node to perform layer fusion (LayerFusion) and precision quantization (INT8) on the deep learning model, which significantly improves the inference speed; Deploy customized neural network accelerators (such as Xilinx DPU) on FPGA nodes to support low-latency inference of models such as YOLOv5 and ResNet; 3.5 Hybrid Hardware Co-scheduling: Dynamically allocate computing resources based on task type and hardware characteristics: a. Prioritize GPU nodes for encoding tasks; b. Prioritize FPGA nodes for inference tasks; c. Prioritize CPU nodes for metadata processing tasks; RDMA (remote direct memory access) technology is used to achieve zero-copy data transmission between GPU / FPGA nodes and reduce network latency.

[0025] 4.1 Global clock synchronization and timestamp calibration: Deploy high-precision NTP (Network Time Protocol) servers in distributed clusters to ensure that the clock error of each node is controlled within ±1ms; attach a local timestamp (Local Timestamp) to the processing result of each block unit and calibrate it to a global timestamp (Global Timestamp) through the NTP server; perform weighted averaging of overlapping areas of timestamps at block boundaries to eliminate splicing jitter caused by differences in node processing speeds; 4.2 Audio and video synchronization and resampling compensation: Resampling technology is used for audio streams to dynamically adjust the audio sampling rate according to the PTS (presentation timestamp) of the video frame to eliminate the phase offset caused by block processing; SyncMarker is inserted at the audio and video splicing point to ensure the time alignment of the audio and video streams; for multi-channel audio (such as 5.1 surround sound), inter-channel interpolation is used to compensate for the delay difference between channels; 4.3 Block result aggregation and streaming splicing: The block units processed by each node are sorted according to the global timestamp and merged into a complete video stream through the streaming stitching algorithm (Streaming Stitching Algorithm); frame smoothing (Frame Smoothing) is performed on the block boundaries, and the weighted average algorithm is used to eliminate the visual jump at the splicing point; for high-dynamic scenes (such as fast motion), motion compensation technology (Motion Compensation) is enabled to repair the motion continuity of the block boundaries based on optical flow estimation (Optical Flow Estimation); 4.4 Metadata integration and output packaging: Integrate the metadata of the block unit (such as resolution, bit rate, encoding format) into global metadata and write it into the file header (FileHeader) of the output file; optimize the packaging format (such as MP4, MKV), support multi-track (Multi-Track) synchronous packaging, and ensure the timing consistency of audio, video, subtitles and other additional data; For real-time streaming scenarios, segmented packaging (Segmented Packaging) generates segmented files in HLS (HTTP Live Streaming) or DASH (Dynamic Adaptive Streaming over HTTP) format, supporting adaptive bit rate switching; 4.5 Quality control and bug fixes: Perform quality control (QualityControl) on the output video stream to detect and repair the following problems: a. Timestamp anomaly: such as PTS / DTS disorder or missing, repaired by interpolation algorithm; b. Coding error: such as blocking artifact or chroma distortion (ChromaDistortion), repaired by post-processing filter (Post-ProcessingFilter); For detected erroneous blocks, local reprocessing (Local Reprocessing) is triggered to reprocess only the erroneous area to avoid global re-encoding.

[0026] 5.1 Block status monitoring and fault detection: Deploy the State Monitoring Module in the distributed cluster to collect the task execution status of each node in real time, including: a. Computing resources: GPU memory occupancy, CPU core utilization, FPGA logic unit load; b. Task progress: block encoding completion percentage, inference task frame rate; c. Network and storage: inter-node transmission delay, disk I / O throughput, and health status of distributed storage (such as Ceph); Preset hardware failure thresholds (such as GPU temperature ≥ 90°C, number of disk bad sectors ≥ 3) and task timeout thresholds (such as block processing time exceeding 200% of the average value); when the threshold is triggered, the node is automatically marked as "abnormal state" and an alarm is pushed to the management platform; 5.2 Intermediate state snapshot and distributed storage: For encoding tasks: periodically save the reference frame list, quantization parameter (QP) and motion vector (MotionVector) of the encoded frame; For analysis tasks: save the intermediate feature map (FeatureMap) and reasoning progress index of the deep learning model; Use DeltaSnapshot technology to only record state changes since the last snapshot, reducing storage usage; After the snapshot data is serialized through Protobuf, it is stored in a distributed database (such as Apache Cassandra), and a secondary index is established based on the block ID and timestamp. When resuming a task, the intermediate state is loaded from the most recent valid snapshot and the completed processing steps are skipped. 5.3 Dynamic task migration and priority scheduling: For unfinished blocks on abnormal nodes, the intermediate data is directly migrated to the standby node through RDMA (remote direct memory access) to avoid transfer through the CPU; during the migration process, the task lock (TaskLock) is maintained to prevent data competition; Give the highest priority to real-time tasks (such as live streaming segmentation), allowing non-real-time tasks (such as offline transcoding) to be interrupted to seize resources; dynamically adjust resource allocation through Kubernetes' Pod priority mechanism; 5.4 Partial reprocessing and error repair: For the blocks that failed to be encoded, the error log is parsed by FFmpeg's ffprobe tool to locate the damaged frames. For abnormal analysis task results (such as missed target detection), low-confidence areas are screened based on the confidence threshold. For video encoding tasks, only the damaged frames and their subsequent dependent frames (P / B frames) are re-encoded, and normal frames are retained; For deep learning inference tasks, the fine-tuned sub-model is loaded on the standby node, and only the abnormal blocks are reprocessed; 5.5 Resource recovery and fault tolerance performance optimization: Set a time to live (TTL) for snapshot data, and automatically clean it up after the timeout (for example, non-real-time task snapshots are retained for 24 hours); trigger the garbage collection (GarbageCollection) mechanism of distributed storage for completed intermediate state data; Based on historical fault data (such as node downtime frequency and network fluctuation cycle), the fault detection threshold is dynamically optimized (such as lowering the temperature threshold by 5°C in winter); for nodes with frequent faults, they are automatically isolated and the operation and maintenance personnel are notified for repair.

[0027] The above formulas are all dimensionless and numerical calculations. The formula is a formula for the most recent real situation obtained by collecting a large amount of data and performing software simulation. The preset parameters and thresholds in the formula are set by technicians in this field according to actual conditions.

[0028] The above embodiments may be implemented in whole or in part by software, hardware, firmware or any other combination thereof. When implemented by software, the above embodiments may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium, or may be transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from one website, computer, server or data center to another website, computer, server or data center by wired (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or data center that contains one or more available media sets. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium. The semiconductor medium may be a solid-state hard disk.

[0029] Those of ordinary skill in the art will appreciate that the modules and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0030] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and modules described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0031] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the modules is only a logical function division. There may be other division methods in actual implementation, such as multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0032] The modules described as separate components may or may not be physically separated, and the components shown as modules may or may not be physical modules, and may be located in one place or distributed on multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0033] In addition, each functional module in each embodiment of the present application may be integrated into one processing module, or each module may exist physically separately, or two or more modules may be integrated into one module.

[0034] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk, and other media that can store program codes.

[0035] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

[0036] Finally: The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A video acceleration processing method under a distributed computing framework, characterized in that: The following steps are involved: S1, parsing the encoding parameters of the input video stream and identifying the original GOP structure; if the original GOP length is greater than a preset threshold or there is an incomplete GOP sequence, reconstructing the GOP by inserting a supplementary key frame, generating a block unit starting with a key frame and containing a complete GOP, and generating metadata for each block unit; S2. Collect the real-time resource status of each node in the distributed cluster; optimize the task allocation strategy based on the improved genetic algorithm, and prioritize the block units to the nodes with local storage and matching idle computing power. The objective function is to minimize the global processing delay; S3. Call the corresponding parallel processing mode according to the encoding format of the block unit, input the block into the distributed reasoning cluster, and perform multi-node collaborative reasoning through model segmentation; S4. Calibrate the timestamp of the processing results of each node based on the global clock server, and compensate the time offset during block splicing through linear interpolation; Resampling technology is used on the audio stream to eliminate phase errors and generate audio and video synchronization markers; S5. Check the block processing status according to the set period. If the node fails or times out, locate the unfinished blocks according to the metadata. Redistribute the unfinished blocks to the backup nodes, and inherit the intermediate calculation results of the original nodes to continue processing.

2. The video acceleration processing method under a distributed computing framework according to claim 1, characterized in that: The specific process of S1 is as follows: Analyze the encoding structure of the video stream through the probesize and analyzeduration parameters of FFmpeg to detect the starting position and length of the original GOP; If it is detected that the GOP length exceeds the preset threshold or there is a block boundary that does not start with a key frame, the force_key_frames parameter is called to force the insertion of a supplementary key frame at the block boundary, and the decoding dependency relationship of adjacent frames is reconstructed based on the inter-frame motion estimation algorithm; Generate structured metadata for each block unit, including resolution, bit rate, frame rate, quantization parameter, encoding format, start timestamp, end timestamp, block duration, key frame index of adjacent blocks and reference frame list; store the metadata in a distributed database, and bind it to the block video stream after serialization through the Protobuf protocol; Decode and verify the generated block units. If there are unresolved inter-frame dependencies within the blocks, trigger the secondary block process and regenerate the blocks by adjusting the GOP length or increasing the key frame density. For high-dynamic scenes, shorten the block duration to the preset duration t; For static scenes, adjacent GOPs are merged into a preset duration T; Block cutting and metadata generation are performed in parallel based on a multi-thread pool, with each thread processing a video segment independently; Enable GPU-accelerated frame analysis for videos with resolution exceeding a threshold, and output segmentation results in real time.

3. The video acceleration processing method under a distributed computing framework according to claim 1, characterized in that: The specific process of S2 is: The real-time resource status of each node in the distributed cluster is abstracted into a multidimensional vector, which includes: the CUDA core utilization of the GPU, the number of idle cores of the CPU, the remaining logic unit ratio of the FPGA, the local storage status of the block data, the read and write bandwidth of the SSD / HDD, the transmission delay between nodes, the available bandwidth and the packet loss rate; the multidimensional vector is converted into a chromosome gene sequence using a binary coding method, and each gene segment corresponds to a resource status; Define the fitness function based on node processing delay, network transmission overhead and energy consumption cost, and dynamically adjust the weights of node processing delay, network transmission overhead and energy consumption cost according to the task type; N groups of chromosomes are randomly generated, N ≥ 100, and each group represents a node allocation scheme; each generation of evolution uses the roulette wheel selection method to retain the individuals with the top 20% fitness; single-point crossover is performed on the selected individuals, and the crossover probability is dynamically adjusted with the number of iterations; the mutation probability is set to randomly flip the gene sequence, and the simulated annealing algorithm is used to avoid local optimality. The evolution is terminated when the optimal fitness changes by less than 1% for 5 consecutive generations or the maximum number of iterations is reached; During the task execution process, Prometheus is used to collect changes in node resource status in real time. If it is detected that the node performance has dropped beyond the threshold, dynamic rescheduling is triggered to suspend the current node task and save the intermediate status to distributed storage. The genetic algorithm is re-run based on the latest resource status to generate a new allocation plan. The task is migrated to the new node and execution is resumed.

4. The video acceleration processing method under a distributed computing framework according to claim 1, characterized in that: In S2, a weighted gain of 20% of the fitness value is given to the block unit stored in the local node; if the local node resources are insufficient, the neighboring node in the same rack or with an available bandwidth greater than the set value is preferentially selected.

5. The video acceleration processing method under a distributed computing framework according to claim 1, characterized in that: The specific process of S3 is as follows: For the block unit of H.264 / HEVC encoding, the GPU's NVENC hardware encoder is enabled, and a multi-channel parallel pipeline is set up for processing; for the block unit of VP9 / AV1 encoding, the CPU's AVX-512 instruction set is used to optimize the intra-frame prediction algorithm, and the slice encoding technology is used to divide a single frame into multiple regions for parallel processing; Pre-burn the H.265 encoding pipeline on the FPGA node; enable the TensorRT acceleration engine on the GPU node to perform layer fusion and precision quantization on the deep learning model.

6. The video acceleration processing method under a distributed computing framework according to claim 1, characterized in that: The specific process of S4 is as follows: Deploy NTP servers in distributed clusters, add local timestamps to the processing results of each block unit, and calibrate them to global timestamps through NTP servers; perform weighted averaging of overlapping areas of timestamps at block boundaries to eliminate splicing jitter caused by differences in node processing speeds; Resampling technology is used for audio streams to dynamically adjust the audio sampling rate according to the display timestamp of the video frame to eliminate the phase offset caused by block processing; synchronization markers are inserted at the audio and video splicing points to align the time of the audio and video streams; For multi-channel audio, inter-channel interpolation is used to compensate for inter-channel delay differences.

7. The video acceleration processing method under a distributed computing framework according to claim 1, characterized in that: The S4 also includes: The block units processed by each node are sorted according to the global timestamp and merged into a complete video stream through a streaming splicing algorithm; the block boundaries are smoothed between frames, and a weighted average algorithm is used to eliminate visual jumps at the splicing points; for high-dynamic scenes, motion compensation technology is enabled to restore the motion continuity of the block boundaries based on optical flow estimation.

8. The video acceleration processing method under a distributed computing framework according to claim 1, characterized in that: The specific process of S5 is as follows: Prometheus and Grafana are used to periodically collect the operating status of each node, and preset hardware failure thresholds and task timeout thresholds. When a threshold is triggered, the node is automatically marked as "abnormal" and an alarm is pushed to the management platform. For unfinished blocks on abnormal nodes, the intermediate data is directly migrated to the standby node through RDMA to avoid transfer through the CPU; During the migration process, keep the task lock; For the blocks that failed to be encoded, FFmpeg's ffprobe tool is used to parse the error log and locate the damaged frames. For abnormal analysis results, filter low-confidence areas based on confidence thresholds; For video encoding tasks, only the damaged frames and their subsequent dependent frames are re-encoded, including P frames and B frames, and normal frames are retained; For deep learning inference tasks, the fine-tuned sub-model is loaded on the standby node, and only the abnormal blocks are reprocessed.

Images