A video acceleration processing method under a distributed computing framework

Abstract

The present invention discloses a video acceleration processing method under a distributed computing framework, which belongs to the field of video processing technology and specifically comprises the following steps: parsing the encoding parameters of an input video stream, identifying the original GOP structure, reconstructing the GOP by inserting supplementary key frames, and generating a block unit starting with the key frame and containing a complete GOP; collecting the real-time resource status of each node in a distributed cluster; optimizing the task allocation strategy based on an improved genetic algorithm; calling the corresponding parallel processing mode according to the encoding format of the block unit, inputting the block into a distributed inference cluster, and performing multi-node collaborative inference through model segmentation; performing timestamp calibration on the processing results of each node based on a global clock server, and compensating for the time offset during block splicing by linear interpolation; checking the block processing status according to a set period, and if a node fails or times out; reallocating the unfinished block to a spare node, and inheriting the intermediate calculation results of the original node for continued processing.

Description

Technical Field

[0001] The present invention relates to the field of video processing technology, and in particular to a video acceleration processing method under a distributed computing framework. Background Art

[0002] With the explosive growth of video data, especially with the prevalence of 4K / 8K ultra-high-definition video, live streaming, and large-scale surveillance recording, the limitations of traditional stand-alone video processing solutions have become increasingly apparent. For example, when processing 4K / 8K ultra-high-definition video, the sheer volume of video data makes it difficult for a single CPU or GPU to handle the demands of efficient transcoding, real-time analysis, and low-latency distribution. In large-scale surveillance recording scenarios, stand-alone systems struggle to store and process massive amounts of video data. Therefore, traditional stand-alone solutions are no longer able to meet the efficiency, real-time nature, and low-latency requirements of modern video processing. Distributed video processing architectures are becoming a key approach to addressing these challenges.

[0003] The distributed video processing architecture can effectively meet the processing needs of large-scale video data by distributing tasks to multiple computing nodes for parallel processing. It also supports horizontal expansion and can flexibly increase or decrease computing nodes according to business needs.

[0004] Traditional distributed video processing often uses fixed-length blocks. However, the GOP (Group of Pictures) structure of video encoding typically begins with a keyframe, and subsequent frames rely on the decoding of the preceding frame. Fixed blocks can disrupt GOP integrity, leading to broken dependencies at block boundaries. This requires additional decoding and re-encoding to repair dependency chains, making it difficult to achieve true linear speedup. Furthermore, existing scheduling strategies fail to fully account for the differentiated computing power of heterogeneous hardware such as GPUs, CPUs, and FPGAs, resulting in both idle resources and bottlenecks. Summary of the Invention

[0005] The purpose of the present invention is to provide a video acceleration processing method under a distributed computing framework to solve the following technical problems:

[0006] Traditional distributed video processing has poor block independence and low parallel efficiency, making it difficult to achieve a true linear acceleration ratio. In addition, the overall cluster throughput is limited, and the return on hardware investment is low.

[0007] The purpose of the present invention can be achieved through the following technical solutions:

[0008] A video acceleration processing method under a distributed computing framework comprises the following steps:

[0009] S1. Parse the encoding parameters of the input video stream and identify the original GOP structure. If the original GOP length is greater than a preset threshold or there is an incomplete GOP sequence, reconstruct the GOP by inserting additional key frames, generate a block unit starting with the key frame and containing the complete GOP, and generate metadata for each block unit.

[0010] S2. Collect the real-time resource status of each node in the distributed cluster; optimize the task allocation strategy based on the improved genetic algorithm, and prioritize the scheduling of block units to nodes with local storage and matching idle computing power. The objective function is to minimize the global processing delay;

[0011] S3. Call the corresponding parallel processing mode according to the encoding format of the block unit, input the block into the distributed inference cluster, and perform multi-node collaborative inference through model segmentation;

[0012] S4. Based on the global clock server, the processing results of each node are timestamp-calibrated and the time offset during block splicing is compensated through linear interpolation. The audio stream is resampled to eliminate phase errors and generate audio and video synchronization markers.

[0013] S5. Check the block processing status according to the set period. If the node fails or times out, locate the unfinished blocks based on the metadata; reallocate the unfinished blocks to the backup node, and inherit the intermediate calculation results of the original node to continue processing.

[0014] As a further solution of the present invention: the specific process of S1 is:

[0015] Analyze the encoding structure of the video stream through FFmpeg's probesize and analyzeduration parameters to detect the starting position and length of the original GOP;

[0016] If it is detected that the GOP length exceeds the preset threshold or there is a block boundary that does not start a key frame, the force_key_frames parameter is called to force the insertion of supplementary key frames at the block boundary, and the decoding dependency relationship of adjacent frames is reconstructed based on the inter-frame motion estimation algorithm;

[0017] Generate structured metadata for each block unit, including resolution, bit rate, frame rate, quantization parameter, encoding format, start timestamp, end timestamp, block duration, key frame index of adjacent blocks, and reference frame list; store the metadata in a distributed database and serialize it via the Protobuf protocol before binding it to the block video stream for transmission;

[0018] The generated block units are decoded and verified. If there are unresolved inter-frame dependencies within the block, a secondary block process is triggered to regenerate the block by adjusting the GOP length or increasing the key frame density. For highly dynamic scenes, the block duration is shortened to a preset duration t; for static scenes, adjacent GOPs are merged to a preset duration T.

[0019] Block segmentation and metadata generation are performed in parallel based on a multi-thread pool, with each thread independently processing a video segment. GPU-accelerated frame analysis is enabled for videos with resolutions exceeding a threshold, and the block segmentation results are output in real time.

[0020] As a further solution of the present invention: the specific process of S2 is:

[0021] The real-time resource status of each node in the distributed cluster is abstracted into a multidimensional vector. The real-time resource status includes: GPU CUDA core utilization, number of idle CPU cores, FPGA remaining logic unit ratio, local storage status of block data, SSD / HDD read and write bandwidth, inter-node transmission delay, available bandwidth and packet loss rate. The multidimensional vector is converted into a chromosome gene sequence using binary encoding, with each gene segment corresponding to a resource status.

[0022] Define the fitness function based on node processing delay, network transmission overhead and energy consumption cost, and dynamically adjust the weights of node processing delay, network transmission overhead and energy consumption cost according to the task type;

[0023] N sets of chromosomes are randomly generated, with N ≥ 100, and each set represents a node allocation scheme. Roulette wheel selection is used for each evolutionary generation, retaining the top 20% of individuals in terms of fitness. Single-point crossover is performed on the selected individuals, with the crossover probability dynamically adjusted with the number of iterations. The gene sequence is randomly flipped with a set mutation probability, and a simulated annealing algorithm is used to avoid local optimality. Evolution is terminated when the optimal fitness changes by less than 1% for five consecutive generations or when the maximum number of iterations is reached.

[0024] During task execution, Prometheus is used to collect changes in node resource status in real time. If it is detected that the node performance has dropped beyond a threshold, dynamic rescheduling is triggered to suspend the current node task and save the intermediate status to distributed storage. The genetic algorithm is rerun based on the latest resource status to generate a new allocation plan. The task is then migrated to the new node and execution is resumed.

[0025] As a further solution of the present invention: in S2, a weighted gain of 20% of the fitness value is given to the block unit stored in the local node; if the local node resources are insufficient, the neighboring node in the same rack or with an available bandwidth greater than the set value is preferentially selected.

[0026] As a further solution of the present invention: the specific process of S3 is:

[0027] For H.264 / HEVC encoding, the GPU's NVENC hardware encoder is enabled, and a multi-channel parallel pipeline is set up for processing. For VP9 / AV1 encoding, the CPU's AVX-512 instruction set is used to optimize the intra-frame prediction algorithm, and tile coding technology is used to split a single frame into multiple regions for parallel processing.

[0028] Pre-burn the H.265 encoding pipeline on the FPGA node; enable the TensorRT acceleration engine on the GPU node to perform layer fusion and precision quantization on the deep learning model.

[0029] As a further solution of the present invention: the specific process of S4 is:

[0030] Deploy an NTP server in the distributed cluster, attach a local timestamp to the processing results of each block unit, and calibrate it to a global timestamp through the NTP server. Perform a weighted average of the overlapping timestamps at the block boundaries to eliminate splicing jitter caused by differences in node processing speeds.

[0031] Resampling technology is used for audio streams to dynamically adjust the audio sampling rate according to the display timestamp of the video frame to eliminate the phase offset caused by block processing; synchronization markers are inserted at the audio and video splicing points to align the time of the audio and video streams; for multi-channel audio, interpolation is used to compensate for the delay differences between channels.

[0032] As a further solution of the present invention: S4 further includes:

[0033] The block units processed by each node are sorted according to the global timestamp and merged into a complete video stream through a streaming splicing algorithm; the block boundaries are smoothed between frames, and a weighted average algorithm is used to eliminate visual jumps at the splicing points; for high-dynamic scenes, motion compensation technology is enabled to restore the motion continuity of the block boundaries based on optical flow estimation.

[0034] As a further solution of the present invention: the specific process of S5 is:

[0035] Prometheus and Grafana periodically collect the operating status of each node, presetting hardware failure thresholds and task timeout thresholds. When a threshold is triggered, the node is automatically marked as "abnormal" and an alert is pushed to the management platform.

[0036] For unfinished blocks on abnormal nodes, intermediate data is directly migrated to the backup node via RDMA to avoid CPU transfer. During the migration process, the task lock is maintained. For blocks that fail to encode, the error log is parsed using FFmpeg's ffprobe tool to locate the location of the damaged frame. For abnormal analysis task results, low-confidence areas are filtered based on the confidence threshold.

[0037] For video encoding tasks, only the damaged frames and their subsequent dependent frames are re-encoded, including P frames and B frames, while normal frames are retained. For deep learning inference tasks, the fine-tuned sub-model is loaded on the spare node, and only the abnormal blocks are reprocessed.

[0038] Beneficial effects of the present invention:

[0039] Compared with traditional polling / random scheduling, the present invention combines genetic algorithms with resource scheduling to solve the load balancing problem of heterogeneous clusters; the FPGA+GPU hybrid architecture of the hardware acceleration module takes into account both high throughput and low power consumption characteristics, and optimizes the entire link from GOP block preprocessing to timestamp synchronization, avoiding the performance bottleneck of the block-aggregation stage in the existing technology; the dynamic retry mechanism is combined with intermediate state storage to reduce fault recovery time. Through Kubernetes CRD and SDN integration, it supports elastic deployment across cloud / edge nodes. The present invention can fully utilize the resources of cluster nodes, avoid idle resources and excessive loads, achieve efficient resource allocation, and greatly improve the overall speed of video processing. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The present invention will be further described below with reference to the accompanying drawings.

[0041] Figure 1 It is a schematic flow diagram of the present invention. DETAILED DESCRIPTION

[0042] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.

[0043] See also Figure 1 As shown, the present invention is a video acceleration processing method under a distributed computing framework, comprising the following steps:

[0044] 1.1GOP integrity detection and key frame insertion:

[0045] Use FFmpeg's avformat_open_input and avformat_find_stream_info functions to parse the input video stream and extract the following encoding parameters:

[0046] a. GOP length: the number of frames between key frames (I frames);

[0047] b. Frame type distribution: the number and location of I-frames, P-frames (forward prediction frames), and B-frames (bidirectional prediction frames);

[0048] c. Resolution and bitrate: video frame width, height, and average bitrate;

[0049] If it is detected that the GOP length exceeds the preset threshold (e.g., 250 frames) or there is a block boundary that does not start at an I-frame, the key frame insertion process is triggered;

[0050] Call FFmpeg's force_key_frames parameter to forcibly insert additional key frames (I frames) at the block boundaries. For the block units after the I frame is inserted, the decoding dependency of adjacent frames is reconstructed through the inter-frame motion estimation algorithm to ensure the independence of the frame sequence within the block. In the case where B frames depend on external frames, the reference frame remapping technology is used to replace the external reference frame with the I frame or P frame within the block.

[0051] 1.2 Block metadata generation and storage:

[0052] Generate structured metadata for each chunk unit, including:

[0053] a. Coding parameters: resolution (Width × Height), bitrate, frame rate (FPS), quantization parameter (QP), and encoding format (H.264 / HEVC / AV1);

[0054] b. Time information: start timestamp (PTS), end timestamp, and block duration (Duration);

[0055] c. Dependency: I-frame index and reference frame list (ReferenceFrameList) of adjacent blocks; d. Block position: byte offset (ByteOffset) and size (Size) in the original video stream;

[0056] Metadata is serialized using the Protobuf protocol to generate a compact binary format (BinaryFormat), reducing storage and transmission overhead. It is then stored in a distributed database (such as Apache Cassandra), with secondary indexes established based on block IDs and timestamps to support fast retrieval. During task distribution, metadata is bundled with the block video stream for transmission, ensuring that compute nodes can correctly parse the block content.

[0057] 1.3 Block Verification and Dynamic Adjustment:

[0058] Decode and verify the generated tile units, using FFmpeg's avcodec_decode_video2 function to decode frame by frame and check for unresolved inter-frame dependencies (such as B frames referencing external frames). If a dependency break is detected, trigger the secondary tile process and regenerate the tiles by adjusting the GOP length or increasing the I-frame density.

[0059] Dynamically adjust the block size according to the complexity of the video content:

[0060] a. High-dynamic scenes (such as sports events): shorten the block length to 1-2 seconds to reduce the load of a single task;

[0061] b. Static scenes (such as surveillance videos): Merge adjacent GOPs into larger blocks (such as 10 seconds) to reduce scheduling overhead;

[0062] The scene classification model (SceneClassificationModel) is used to analyze video content in real time and dynamically adjust the segmentation strategy:

[0063] a. Extract video frame features using the pre-trained ResNet-50 model;

[0064] b. Calculate the scene complexity score (ComplexityScore) based on the feature vector and dynamically adjust the block duration;

[0065] 1.4 Parallel preprocessing acceleration:

[0066] Use a thread pool to parallelize segmentation and metadata generation, with each thread independently processing a video segment. For ultra-high-definition video (8K and above), enable GPU-accelerated frame analysis (such as NVIDIA Video Codec SDK) to output segmentation results in real time.

[0067] The block units are stored in a distributed file system (such as HDFS or Ceph), and a directory structure is established based on the block ID and timestamp to support efficient retrieval. Frequently accessed block units (such as the first few blocks of a live stream) are cached in a local SSD or memory to reduce read latency.

[0068] 1.5 Block preprocessing performance optimization:

[0069] Enable hardware-accelerated frame analysis (such as NVIDIA NVDEC) on GPU nodes to increase the block cutting speed to real-time 8K@60fps; pre-burn the video analysis pipeline on FPGA nodes to support low-power block preprocessing; perform lossless compression on block units (such as Zstandard) to reduce network transmission overhead; for real-time streaming scenarios, enable chunked compression (Chunked Compression) to compress and transmit simultaneously.

[0070] 2.1 Multi-dimensional resource modeling and chromosome encoding:

[0071] The resource status of each node in the distributed cluster is abstracted into a six-dimensional vector, including: computing power indicators: GPU CUDA core utilization (0%-100%), CPU idle core number (integer), FPGA remaining logic unit (LUT) ratio (0%-100%); storage indicators: block data local storage flag (Boolean value, 0 / 1), SSD / HDD read and write bandwidth (MB / s);

[0072] Network metrics: inter-node transmission delay (ms), available bandwidth (Mbps);

[0073] A hybrid coding strategy is used to convert resource vectors into chromosome gene sequences: binary coding: GPU utilization (8 bits, 1% accuracy), number of idle CPU cores (4 bits, supporting a maximum of 16 cores), FPGA LUT ratio (8 bits); real number coding: network latency (floating point number, retaining 2 decimal places), bandwidth (floating point number); each chromosome represents a task allocation scheme with a length of M×N (M is the number of nodes, N is the number of blocks), and the gene bit marks the mapping relationship between blocks and nodes (for example, gene bit [i][j]=1 means that block j is assigned to node i).

[0074] 2.2 Dynamic weight fitness function design:

[0075] The fitness function combines the following optimization objectives: ; Where: T p represents the node processing delay (maximum completion time); T n E represents the total network transmission overhead (data volume × transmission delay); p represents the total energy consumption of the cluster (GPU / FPGA power consumption × running time); C c Represents the hardware usage cost (weighted by the node rental rate). α, β, γ, and δ are dynamic weight coefficients that are adjusted according to the task type:

[0076] For real-time transcoding tasks: α=0.6, β=0.3, γ=0.1, δ=0 (prioritizing latency and bandwidth); for offline analysis tasks: α=0.3, β=0.2, γ=0.4, δ=0.1 (balancing energy consumption and cost).

[0077] Penalties are imposed on solutions that violate constraints (such as node memory excess or insufficient bandwidth) to reduce their fitness values.

[0078] 2.3 Population initialization and evolution iteration:

[0079] Randomly generate an initial population (size ≥ 100) to ensure that each chromosome meets the following constraints: a. The number of blocks allocated to a single node does not exceed its maximum number of parallel tasks; b. When the local storage flag of the block data is 1, it must be allocated to the node storing the block;

[0080] An elite retention strategy is adopted to directly retain the individuals with the top 20% fitness to the next generation; the remaining individuals are selected through the tournament selection method (5 individuals are randomly selected from each group and the best ones are retained); multi-point crossover is performed on the selected individuals, with the crossover points randomly selected and the crossover probability Pc dynamically adjusted: initially Pc = 0.85, decreasing by 1% each generation to a minimum of 0.6; arithmetic crossover is used for the real number coding part to generate the gene value of the offspring; bit flip mutation (BitFlip) is performed on the binary coding bits, with a mutation probability Pm = 0.02; Gaussian mutation is used for the real number coding part, with the standard deviation set to 10% of the current population fitness variance; simulated annealing mechanism is introduced to allow a higher mutation rate in the early stage of evolution to avoid premature convergence;

[0081] The process is terminated when the optimal fitness changes by less than 1% for five consecutive generations or when the maximum number of iterations (500 generations) is reached.

[0082] 2.4 Real-time feedback and dynamic parameter adjustment:

[0083] Prometheus is used to monitor node resource changes in real time, updating the computing power and network indicators in the chromosome encoding every 5 seconds. If the node load suddenly changes (such as a 30% drop in GPU utilization), local chromosome recoding is triggered.

[0084] Dynamically adjust the fitness function weight based on the urgency of the task queue (e.g., real-time streams take priority over offline tasks) (e.g., when there is a burst of high-priority tasks, increase α to 0.8);

[0085] If a decrease in population diversity is detected (e.g., genetic similarity > 80%), the mutation probability is temporarily increased to Pm = 0.05; for task allocation plans that have not been optimized for a long time, the immigration strategy is activated to inject random new individuals to maintain diversity.

[0086] 2.5 Scheduling result decoding and task distribution:

[0087] Parse the optimal chromosome into a node-block mapping table, for example:

[0088] Node3→Chunk1,Chunk5; Node7→Chunk2,Chunk3;

[0089] For multiple blocks assigned to the same node, they are combined and transmitted according to the principle of data locality (such as packaging into a single data stream); zero-copy data transmission between GPU / FPGA nodes is achieved through RDMA (remote direct memory access) technology

[0090] 3.1GPU accelerated encoding and pipeline optimization:

[0091] For H.264 / HEVC encoding block units, the NVIDIA NVENC hardware encoder is called and a multi-channel parallel pipeline is set up, with each channel independently processing a block unit. The CUDA kernel optimizes intra-frame prediction and motion estimation algorithms, increasing encoding speed to real-time 8K@60fps. Asynchronous transfer mode (AsyncMode) is enabled to transfer video frames directly from host memory (HostMemory) to GPU display memory (DeviceMemory), reducing data copy overhead between the CPU and GPU.

[0092] 3.2CPU multi-threaded coding and instruction set optimization:

[0093] For VP9 / AV1 encoding blocks, the CPU's AVX-512 instruction set is used to optimize the Transform & Quantization and Entropy Coding modules, improving single-thread performance by 2-3 times. Tile Encoding technology is used to divide a single frame into multiple independent regions (such as 16x16 blocks) and distribute them to multi-core CPUs for simultaneous processing via the OpenMP parallel framework. For highly complex scenes (such as fast motion or rich textures), encoding parameters are dynamically adjusted (such as increasing the number of reference frames or reducing the quantization step size) to ensure output quality.

[0094] 3.3FPGA hardware acceleration and pipeline customization:

[0095] The H.265 encoding pipeline is pre-programmed into the FPGA node to support real-time, low-power processing of 8K video. A customized IP core is generated using the Vivado HLS tool to optimize the inter-frame prediction (InterPrediction) and loop filter (LoopFilter) modules, reducing latency to milliseconds. Dynamic Frequency Scaling technology is enabled to adjust the FPGA operating frequency in real time based on load, balancing performance and power consumption.

[0096] 3.4 Deep Learning Inference Acceleration:

[0097] For video analysis tasks (such as object detection and scene classification), the blocks are input into the distributed inference cluster, and multi-node collaborative inference is achieved through model sharding.

[0098] Enable the TensorRT acceleration engine on GPU nodes to perform layer fusion (LayerFusion) and precision quantization (INT8) on deep learning models, significantly improving inference speed;

[0099] Deploy customized neural network accelerators (such as Xilinx DPU) on FPGA nodes to support low-latency inference of models such as YOLOv5 and ResNet;

[0100] 3.5 Hybrid Hardware Co-scheduling:

[0101] Dynamically allocate computing resources based on task type and hardware characteristics: a. Prioritize GPU nodes for encoding tasks; b. Prioritize FPGA nodes for inference tasks; c. Prioritize CPU nodes for metadata processing tasks;

[0102] RDMA (Remote Direct Memory Access) technology is used to achieve zero-copy data transmission between GPU / FPGA nodes, reducing network latency.

[0103] 4.1 Global clock synchronization and timestamp calibration:

[0104] A high-precision NTP (Network Time Protocol) server is deployed in the distributed cluster to ensure that the clock error of each node is controlled within ±1ms. A local timestamp is added to the processing result of each block unit and calibrated to a global timestamp through the NTP server. The timestamps at the block boundaries are weighted averaged in the overlapping area to eliminate splicing jitter caused by differences in node processing speed.

[0105] 4.2 Audio and video synchronization and resampling compensation:

[0106] Resampling technology is used for audio streams to dynamically adjust the audio sampling rate based on the PTS (presentation timestamp) of the video frame to eliminate phase offsets caused by block processing. Sync markers are inserted at the audio and video splicing points to ensure time alignment of the audio and video streams. For multi-channel audio (such as 5.1 surround sound), inter-channel interpolation is used to compensate for inter-channel delay differences.

[0107] 4.3 Block result aggregation and streaming splicing:

[0108] The block units processed by each node are sorted by global timestamp and merged into a complete video stream through the Streaming Stitching Algorithm. Frame smoothing is performed on the block boundaries, and a weighted average algorithm is used to eliminate visual jumps at the splicing points. For high-dynamic scenes (such as fast motion), motion compensation technology is enabled to restore the motion continuity of the block boundaries based on optical flow estimation.

[0109] 4.4 Metadata integration and output packaging:

[0110] Integrate the metadata of the block units (such as resolution, bit rate, and encoding format) into global metadata and write it to the file header (FileHeader) of the output file; optimize the packaging format (such as MP4 and MKV), support multi-track (Multi-Track) synchronous packaging, and ensure the timing consistency of audio, video, subtitles, and other additional data;

[0111] For real-time streaming scenarios, segmented packaging (Segmented Packaging) is used to generate segmented files in HLS (HTTP Live Streaming) or DASH (Dynamic Adaptive Streaming over HTTP) format, supporting adaptive bitrate switching;

[0112] 4.5 Quality Control and Bug Fixes:

[0113] Perform quality control (Quality Control) on the output video stream to detect and fix the following problems: a. Timestamp anomalies: such as PTS / DTS disorder or missing, which can be fixed through interpolation algorithms; b. Coding errors: such as blocking artifacts (Blocking Artifact) or chroma distortion (Chroma Distortion), which can be fixed through post-processing filters (Post-Processing Filter);

[0114] For detected erroneous blocks, local reprocessing is triggered to reprocess only the erroneous area to avoid global re-encoding.

[0115] 5.1 Block status monitoring and fault detection:

[0116] Deploy the State Monitoring Module in the distributed cluster to collect the task execution status of each node in real time, including:

[0117] a. Computing resources: GPU memory usage, CPU core utilization, and FPGA logic unit load;

[0118] b. Task progress: block encoding completion percentage, inference task frame rate; c. Network and storage: inter-node transmission latency, disk I / O throughput, and the health status of distributed storage (such as Ceph);

[0119] Preset hardware failure thresholds (e.g., GPU temperature ≥ 90°C, number of disk bad sectors ≥ 3) and task timeout thresholds (e.g., block processing time exceeding 200% of the average value); when a threshold is triggered, the node is automatically marked as "abnormal" and an alert is pushed to the management platform;

[0120] 5.2 Intermediate State Snapshot and Distributed Storage:

[0121] For encoding tasks: periodically save the reference frame list, quantization parameter (QP) and motion vector (MotionVector) of the encoded frame;

[0122] For analysis tasks: save the intermediate feature map (FeatureMap) of the deep learning model and the inference progress index;

[0123] Use DeltaSnapshot technology to only record state changes since the last snapshot, reducing storage usage;

[0124] Snapshot data is serialized using Protobuf and stored in a distributed database (such as Apache Cassandra). Secondary indexes are created based on the block ID and timestamp. When resuming a task, the intermediate state is loaded from the most recent valid snapshot and completed processing steps are skipped.

[0125] 5.3 Dynamic task migration and priority scheduling:

[0126] For unfinished blocks on abnormal nodes, intermediate data is directly migrated to the backup node via RDMA (Remote Direct Memory Access), avoiding CPU transfer. During the migration process, the task lock (TaskLock) is maintained to prevent data contention.

[0127] Give the highest priority to real-time tasks (such as live stream segmentation), allowing non-real-time tasks (such as offline transcoding) to be interrupted to preempt resources; dynamically adjust resource allocation through Kubernetes' Pod priority mechanism;

[0128] 5.4 Partial reprocessing and error repair:

[0129] For encoding failure blocks, FFmpeg's ffprobe tool is used to parse the error log and locate the damaged frames. For abnormal analysis task results (such as missed object detection), low-confidence areas are filtered based on the confidence threshold.

[0130] For video encoding tasks, only the damaged frame and its subsequent dependent frames (P / B frames) are re-encoded, and the normal frames are retained;

[0131] For deep learning inference tasks, the fine-tuned sub-model is loaded on the standby node, and only the abnormal blocks are reprocessed.

[0132] 5.5 Resource recovery and fault tolerance performance optimization:

[0133] Set a time-to-live (TTL) for snapshot data, and automatically clean it up after the timeout (for example, snapshots of non-real-time tasks are retained for 24 hours); trigger the garbage collection (Garbage Collection) mechanism of distributed storage for completed intermediate state data;

[0134] Based on historical fault data (such as node downtime frequency and network fluctuation period), the fault detection threshold is dynamically optimized (such as lowering the temperature threshold by 5°C in winter); for frequently faulty nodes, the system automatically isolates them and notifies operation and maintenance personnel for repair.

[0135] The above formulas are all dimensionless and numerical calculations. The formulas are obtained by collecting a large amount of data and performing software simulation to obtain the most recent real situation. The preset parameters and thresholds in the formulas are set by technicians in this field according to actual conditions.

[0136] The above embodiments can be implemented in whole or in part via software, hardware, firmware, or any other combination. When implemented using software, the above embodiments can be implemented in whole or in part in the form of a computer program product. The computer program product comprises one or more computer instructions or computer programs. When loaded or executed on a computer, the processes or functions described in the embodiments of this application are fully or partially performed. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired means (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium accessible by a computer or a data storage device such as a server or data center that contains a collection of one or more available media. The available medium can be magnetic media (e.g., floppy disks, hard disks, tapes), optical media (e.g., DVDs), or semiconductor media. The semiconductor media can be a solid-state drive.

[0137] Those skilled in the art will appreciate that the modules and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0138] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and modules described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0139] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the modules is only a logical function division. In actual implementation, there may be other division methods, such as multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0140] The modules described as separate components may or may not be physically separate, and the components shown as modules may or may not be physical modules, and may be located in one place or distributed across multiple network modules. Some or all of the modules may be selected to achieve the purpose of this embodiment according to actual needs.

[0141] In addition, each functional module in each embodiment of the present application may be integrated into one processing module, or each module may exist physically separately, or two or more modules may be integrated into one module.

[0142] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0143] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

[0144] Finally: The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A video acceleration processing method under a distributed computing framework, characterized in that: The following steps are involved: S1. Parse the encoding parameters of the input video stream and identify the original GOP structure. If the original GOP length is greater than a preset threshold or there is an incomplete GOP sequence, reconstruct the GOP by inserting additional key frames, generate a block unit starting with the key frame and containing the complete GOP, and generate metadata for each block unit. S2. Collect the real-time resource status of each node in the distributed cluster; optimize the task allocation strategy based on the improved genetic algorithm, and prioritize the scheduling of block units to nodes with local storage and matching idle computing power. The objective function is to minimize the global processing delay; S3. Call the corresponding parallel processing mode according to the encoding format of the block unit, input the block unit into the distributed inference cluster, and perform multi-node collaborative inference through model segmentation; S4. Based on the global clock server, the timestamp of the processing results of each node in the distributed cluster is calibrated, and the time offset when the block units are spliced ​​is compensated by linear interpolation; Resampling technology is used to eliminate phase errors in the audio stream and generate audio and video synchronization markers; S5. Check the processing status of the block units according to the set period. If there is a node failure or timeout in the distributed cluster, locate the unfinished block units based on the metadata; reallocate the unfinished block units to the backup node, and continue processing by inheriting the intermediate calculation results of the original node; The specific process of S3 is as follows: For H.264 / HEVC encoding, the GPU's NVENC hardware encoder is enabled, and a multi-channel parallel pipeline is set up for processing. For VP9 / AV1 encoding, the CPU's AVX-512 instruction set is used to optimize the intra-frame prediction algorithm, and tile coding technology is used to split a single frame into multiple regions for parallel processing. Pre-burn the H.265 encoding pipeline on the FPGA node; enable the TensorRT acceleration engine on the GPU node to perform layer fusion and precision quantization on the deep learning model.

2. The video acceleration processing method under a distributed computing framework according to claim 1, characterized in that: The specific process of S1 is: Analyze the encoding structure of the video stream through FFmpeg's probesize and analyzeduration parameters to detect the starting position and length of the original GOP; If it is detected that the GOP length exceeds the preset threshold or there is a block unit boundary that does not start a key frame, the force_key_frames parameter is called to force the insertion of supplementary key frames at the block unit boundary, and the decoding dependency relationship of adjacent frames is reconstructed based on the inter-frame motion estimation algorithm; Generate structured metadata for each block unit, including resolution, bit rate, frame rate, quantization parameter, encoding format, start timestamp, end timestamp, block unit duration, key frame index of adjacent block units, and reference frame list; store the metadata in a distributed database and serialize it via the Protobuf protocol before binding it to the block unit video stream for transmission; Decode and verify the generated block units. If there are unresolved inter-frame dependencies within the block units, trigger the secondary block process and regenerate the block units by adjusting the GOP length or increasing the key frame density. For highly dynamic scenes, the duration of the block unit is shortened to the preset duration t; for static scenes, adjacent GOPs are merged to the preset duration T; Block segmentation and metadata generation are performed in parallel based on a multi-thread pool, with each thread independently processing a video segment. Enable GPU-accelerated frame analysis for videos with resolutions exceeding a threshold, and output the results of the tile units in real time.

3. The video acceleration processing method under a distributed computing framework according to claim 1, characterized in that: The specific process of S2 is: The real-time resource status of each node in the distributed cluster is abstracted into a multidimensional vector. The real-time resource status includes: GPU CUDA core utilization, number of idle CPU cores, FPGA remaining logic unit ratio, local storage status of block unit data, SSD / HDD read and write bandwidth, inter-node transmission delay, available bandwidth and packet loss rate. The multidimensional vector is converted into a chromosome gene sequence using binary encoding, with each gene segment corresponding to a resource status. Define the fitness function based on node processing delay, network transmission overhead and energy consumption cost, and dynamically adjust the weights of node processing delay, network transmission overhead and energy consumption cost according to the task type; N sets of chromosomes are randomly generated, with N ≥ 100, and each set represents a node allocation scheme. Roulette wheel selection is used for each evolutionary generation, retaining the top 20% of individuals in terms of fitness. Single-point crossover is performed on the selected individuals, with the crossover probability dynamically adjusted with the number of iterations. The gene sequence is randomly flipped with a set mutation probability, and a simulated annealing algorithm is used to avoid local optimality. Evolution is terminated when the optimal fitness changes by less than 1% for five consecutive generations or when the maximum number of iterations is reached. During task execution, Prometheus is used to collect changes in node resource status in real time. If it is detected that the node performance has dropped beyond a threshold, dynamic rescheduling is triggered to suspend the current node task and save the intermediate status to distributed storage. The genetic algorithm is rerun based on the latest resource status to generate a new allocation plan. The task is then migrated to the new node and execution is resumed.

4. The video acceleration processing method under a distributed computing framework according to claim 1, characterized in that: In S2, a weighted gain of 20% of the fitness value is given to the block unit stored in the local node; if the local node resources are insufficient, the neighboring node in the same rack or with an available bandwidth greater than the set value is preferentially selected.

5. The video acceleration processing method under a distributed computing framework according to claim 1, characterized in that: The specific process of S4 is: Deploy an NTP server in the distributed cluster, attach a local timestamp to the processing results of each block unit, and calibrate it to a global timestamp through the NTP server. Perform a weighted average of the overlapping timestamps at the block unit boundaries to eliminate splicing jitter caused by differences in node processing speeds. Resampling technology is used for audio streams to dynamically adjust the audio sampling rate based on the display timestamp of the video frame to eliminate the phase offset caused by block unit processing; synchronization markers are inserted at the audio and video splicing points to align the time of the audio and video streams; For multi-channel audio, interpolation between channels is used to compensate for the delay differences between channels.

6. The video acceleration processing method under a distributed computing framework according to claim 1, characterized in that: Said S4 also includes: The block units processed by each node are sorted according to the global timestamp and merged into a complete video stream through a streaming splicing algorithm; the block unit boundaries are smoothed between frames, and a weighted average algorithm is used to eliminate visual jumps at the splicing points; for high-dynamic scenes, motion compensation technology is enabled to restore the motion continuity of the block unit boundaries based on optical flow estimation.

7. The video acceleration processing method under a distributed computing framework according to claim 1, characterized in that: The specific process of S5 is as follows: Prometheus and Grafana periodically collect the operating status of each node, presetting hardware failure thresholds and task timeout thresholds. When a threshold is triggered, the node is automatically marked as "abnormal" and an alert is pushed to the management platform. For unfinished block units on abnormal nodes, intermediate data is directly migrated to the backup node via RDMA, avoiding transfer through the CPU; During the migration process, the task lock is maintained; For the block units that failed to be encoded, FFmpeg's ffprobe tool was used to parse the error log and locate the damaged frame. For abnormal analysis results, filter low-confidence areas based on confidence thresholds; For video encoding tasks, only the damaged frame and its subsequent dependent frames are re-encoded, including P-frames and B-frames, while the normal frames are retained; For deep learning inference tasks, the fine-tuned sub-model is loaded on the standby node, and only the abnormal block units are reprocessed.

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