Pixel circuit, image sensor and camera

Abstract

The invention provides a pixel circuit, an image sensor and a camera, and relates to the technical field of pixel circuits, and the pixel circuit comprises a photodiode, a first switching device, a first capacitor, a second switching device, a second capacitor, a third switching device, a third capacitor and an output module. Photo-generated electrons of the photodiode overflow to the first capacitor after the photodiode is saturated, overflow to the second capacitor after the first capacitor is saturated, and overflow to the third capacitor after the second capacitor is saturated, so that a pixel circuit with three conversion gains is formed, and an MOS (Metal Oxide Semiconductor) tube does not need to be used as a capacitor in the pixel circuit; the stability of the capacitance value of the capacitor in the pixel circuit is improved, the stability of the dynamic range of the pixel circuit is further improved, and the problem that in the prior art, due to the fact that the pixel circuit uses the MOS tube as the capacitor to receive photo-induced electrons of the photodiode, the capacitance value of the MOS tube changes along with the change of the working state of the MOS tube, and the pixel circuit is not stable is solved. And the dynamic range stability of the pixel circuit is poor.

Description

Technical Field

[0001] The present application belongs to the technical field of pixel circuits, and specifically relates to a pixel circuit, an image sensor, and a camera. Background Art

[0002] High dynamic range (HDR) complementary metal oxide semiconductor (CMOS) image sensor (CIS) can adapt to scenes under different lighting conditions and often uses a triple conversion gain (TCG) pixel circuit.

[0003] It should be noted that the dynamic range of the pixel circuit is positively correlated with the capacitance value in the pixel circuit.

[0004] In the prior art, a pixel circuit with three conversion gains uses a MOS tube (Metal-Oxide-Semiconductor Field-Effect Transistor) as a capacitor to receive photo-generated electrons from a photodiode.

[0005] In the process of implementing the present application, the inventors found that there are at least the following problems in the prior art: since the pixel circuit uses a MOS tube as a capacitor to receive photogenerated electrons from the photodiode, and the capacitance value of the MOS tube changes with the working state of the MOS tube, the dynamic range stability of the pixel circuit is poor. Summary of the invention

[0006] The present application aims to provide a pixel circuit, an image sensor and a camera, which at least solve the problem in the prior art that the pixel circuit uses a MOS tube as a capacitor to receive photogenerated electrons from a photodiode, and the capacitance value of the MOS tube changes with the working state of the MOS tube, resulting in poor dynamic range stability of the pixel circuit.

[0007] In order to solve the above technical problems, this application is implemented as follows:

[0008] In a first aspect, an embodiment of the present application provides a pixel circuit, including: a photodiode, a first switch device, a first capacitor, a second switch device, a second capacitor, a third switch device, a third capacitor, and an output module;

[0009] The photodiode, the first switch device, the second switch device, and the third switch device are electrically connected in sequence;

[0010] The first pin of the first capacitor is electrically connected between the first switch device and the second switch device, and the second pin of the first capacitor is grounded; the output module is electrically connected between the first switch device and the second switch device;

[0011] The first pin of the second capacitor is electrically connected between the second switch device and the third switch device, and the second pin of the second capacitor is grounded;

[0012] The first pin of the third capacitor is electrically connected to the third switch device, and the second pin of the third capacitor is grounded or used to receive an external input voltage signal.

[0013] Optionally, the first switching device, the second switching device, and the third switching device are all transistors.

[0014] Optionally, the anode of the photodiode is grounded, the first pin of the first switching device is electrically connected to the cathode of the photodiode, and the second pin of the first switching device is electrically connected to the first pin of the second switching device and the first pin of the first capacitor respectively; the first pin of the second switching device is electrically connected to the first pin of the first capacitor, and the second pin of the second switching device is electrically connected to the first pin of the second capacitor and the first pin of the third switching device respectively; the second pin of the third switching device is electrically connected to the first pin of the third capacitor; the control pin of the first switching device is used to receive a first control signal input from the outside, the control pin of the second switching device is used to receive a second control signal input from the outside; the control pin of the third switching device is used to receive a third control signal input from the outside.

[0015] Optionally, the pixel circuit further includes a reset device, and the reset device is electrically connected to the third switch device.

[0016] Optionally, the reset device is a transistor; a first pin of the reset device is used to be electrically connected to an external power supply, a second pin of the reset device is electrically connected to the third switch device, and a control pin of the reset device is used to receive a reset signal input externally.

[0017] Optionally, the output module includes a signal amplifying device and a fourth switching device; the signal amplifying device is electrically connected to the first switching device, the first capacitor, the second switching device, and the fourth switching device, respectively.

[0018] Optionally, the signal amplifying device and the fourth switching device are both transistors; the control pin of the signal amplifying device is electrically connected to the first switching device, the first capacitor, and the second switching device, respectively; the first pin of the signal amplifying device is used to be electrically connected to an external power supply; the second pin of the signal amplifying device is electrically connected to the first pin of the fourth switching device; the second pin of the fourth switching device is the signal output end of the pixel circuit, and the control pin of the fourth switching device is used to receive an externally input pixel row scanning signal.

[0019] Optionally, the first capacitor, the second capacitor, and the third capacitor are all plate capacitors.

[0020] In a second aspect, an embodiment of the present application provides an image sensor, comprising a pixel circuit as described in the first aspect.

[0021] In a third aspect, an embodiment of the present application provides a camera, comprising the image sensor as described in the second aspect.

[0022] In an embodiment of the present application, a pixel circuit includes a photodiode, a first switch device, a first capacitor, a second switch device, a second capacitor, a third switch device, a third capacitor and an output module. The photogenerated electrons of the photodiode overflow to the first capacitor after the photodiode is saturated, overflow to the second capacitor after the first capacitor is saturated, and overflow to the third capacitor after the second capacitor is saturated. When the second switch device is turned off, the output signal of the pixel circuit represents the amount of photogenerated electrons (charge) stored in the first capacitor. When the second switch device is turned on and the third switch device is turned off, the output current of the pixel circuit represents the amount of photogenerated electrons stored in the first capacitor and the second capacitor. When the second switch device and the third switch device are both turned on, the output current of the pixel circuit represents the amount of photogenerated electrons stored in the first capacitor, the second capacitor and the third capacitor, thereby forming a pixel circuit with three conversion gains, and there is no need to use a MOS tube as a capacitor for receiving photogenerated electrons in the pixel circuit, thereby improving the stability of the capacitance value of the capacitor in the pixel circuit, and then improving the dynamic range stability of the pixel circuit, solving the problem that the pixel circuit uses a MOS tube as a capacitor to receive the photogenerated electrons of the photodiode in the prior art, and the capacitance value of the MOS tube changes with the working state of the MOS tube, resulting in poor dynamic range stability of the pixel circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for describing the embodiments are briefly introduced below.

[0024] Figure 1 is a structural schematic diagram of a pixel circuit provided in an embodiment of the present application;

[0025] Figure 2 is a control timing diagram of a pixel circuit provided in an embodiment of the present application;

[0026] Figure 3 It is a schematic diagram of the charge amounts of the photodiode, the first capacitor, the second capacitor, and the third capacitor in the pixel circuit provided in an embodiment of the present application.

[0027] Reference numerals:

[0028] 10 - photodiode; 20 - first switch device; 30 - second switch device; 40 - third switch device; 50 - first capacitor; 60 - second capacitor; 70 - third capacitor; 80 - output module; 81 - signal amplifier device; 82 - fourth switch device; 90 - reset device. DETAILED DESCRIPTION

[0029] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0030] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0031] Reference Figure 1The embodiment of the present application provides a pixel circuit, including: a photodiode 10, a first switch device 20, a first capacitor 50, a second switch device 30, a second capacitor 60, a third switch device 40, a third capacitor 70 and an output module 80; the photodiode 10, the first switch device 20, the second switch device 30, and the third switch device 40 are electrically connected in sequence; the first pin of the first capacitor 50 is electrically connected between the first switch device 20 and the second switch device 30, and the second pin of the first capacitor 50 is grounded; the output module 80 is electrically connected between the first switch device 20 and the second switch device 30; the first pin of the second capacitor 60 is electrically connected between the second switch device 30 and the third switch device 40, and the second pin of the second capacitor 60 is grounded; the first pin of the third capacitor 70 is electrically connected to the third switch device 40, and the second pin of the third capacitor 70 is grounded or the second pin of the third capacitor 70 is used to receive an external input voltage signal.

[0032] It should be noted that the photodiode 10 is used to receive an external light signal and convert the electrons in the light signal into photogenerated electrons. The first capacitor 50, the second capacitor 60 and the third capacitor 70 all have stable capacitance values. The external input voltage signal is used to adjust the charge amount of the third capacitor 70.

[0033] In some embodiments, the capacitance of the third capacitor 70 is greater than the sum of the capacitance of the first capacitor 50 and the capacitance of the second capacitor 60 .

[0034] In the related art, the pixel circuit with three conversion gains uses a MOS tube as a capacitor to receive photogenerated electrons from a photodiode. It should be noted that the capacitance value of the MOS tube is the capacitance value between the source and drain of the MOS tube. Since the capacitance value of the MOS tube changes with the working state of the MOS tube, specifically, the capacitance value of the MOS tube changes with the voltage difference between the source voltage and the gate voltage of the MOS tube, the capacitance value of the MOS tube is poorly stable, and the capacitance of the MOS tube occupies the area of ​​the active area of ​​the MOS tube, and the capacitance of the MOS tube is prone to leakage.

[0035] In the embodiment of the present application, the pixel circuit includes a photodiode 10, a first switch device 20, a first capacitor 50, a second switch device 30, a second capacitor 60, a third switch device 40, a third capacitor 70 and an output module 80. The photogenerated electrons of the photodiode 10 overflow to the first capacitor 50 after the photodiode 10 is saturated, overflow to the second capacitor 60 after the first capacitor 50 is saturated, and overflow to the third capacitor 70 after the second capacitor 60 is saturated. When the second switch device 30 is turned off, the output signal of the pixel circuit represents the amount of photogenerated electrons (charge) stored in the first capacitor 50. When the second switch device 30 is turned on and the third switch device 40 is turned off, the output current of the pixel circuit represents the amount of photogenerated electrons (charge) stored in the first capacitor 50. and the photogenerated electrons stored in the second capacitor 60. When the second switch device 30 and the third switch device 40 are both turned on, the output current of the pixel circuit represents the photogenerated electrons stored in the first capacitor 50, the second capacitor 60 and the third capacitor 70, thereby forming a pixel circuit with three conversion gains, and there is no need to use a MOS tube as a capacitor for receiving photogenerated electrons in the pixel circuit, which improves the stability of the capacitance value of the capacitor in the pixel circuit, and then improves the dynamic range stability of the pixel circuit, and solves the problem in the prior art that the pixel circuit uses a MOS tube as a capacitor to receive the photogenerated electrons of the photodiode 10, and the capacitance value of the MOS tube changes with the working state of the MOS tube, resulting in poor dynamic range stability of the pixel circuit.

[0036] Optionally, the first switching device 20 , the second switching device 30 , and the third switching device 40 are all transistors.

[0037] Specifically, the first switch device 20, the second switch device 30, and the third switch device 40 are NMOS tubes, that is, negative channel Metal Oxide Semiconductor tubes (Negative channel Metal Oxide Semiconductor). The first switch device 20, the second switch device 30, and the third switch device 40 have three working states: on, half-on, and off.

[0038] When the first switch device 20, the second switch device 30, and the third switch device 40 are all in half-conduction, the photogenerated electrons of the photodiode 10 overflow to the first capacitor 50 after the photodiode 10 is saturated, overflow to the second capacitor 60 after the first capacitor 50 is saturated, and overflow to the third capacitor 70 after the second capacitor 60 is saturated.

[0039] Optionally, the anode of the photodiode 10 is grounded, the first pin of the first switching device 20 is electrically connected to the cathode of the photodiode 10, and the second pin of the first switching device 20 is electrically connected to the first pin of the second switching device 30 and the first pin of the first capacitor 50, respectively; the first pin of the second switching device 30 is electrically connected to the first pin of the first capacitor 50, and the second pin of the second switching device 30 is electrically connected to the first pin of the second capacitor 60 and the first pin of the third switching device 40, respectively; the second pin of the third switching device 40 is electrically connected to the first pin of the third capacitor 70; the control pin of the first switching device 20 is used to receive a first control signal input from the outside, the control pin of the second switching device 30 is used to receive a second control signal input from the outside; the control pin of the third switching device 40 is used to receive a third control signal input from the outside.

[0040] Specifically, the first switch device 20, the second switch device 30, and the third switch device 40 are NMOS tubes, the source of the first switch device 20 is electrically connected to the cathode of the photodiode 10, and the drain of the first switch device 20 is electrically connected to the source of the second switch device 30 and the first pin of the first capacitor 50 respectively; the source of the second switch device 30 is electrically connected to the first pin of the first capacitor 50, and the drain of the second switch device 30 is electrically connected to the first pin of the second capacitor 60 and the source of the third switch device 40 respectively; the drain of the third switch device 40 is electrically connected to the first pin of the third capacitor 70; the gate of the first switch device 20 is used to receive a first control signal input from the outside, the gate of the second switch device 30 is used to receive a second control signal input from the outside; the gate of the third switch device 40 is used to receive a third control signal input from the outside.

[0041] It should be noted that when the voltage value of the first control signal is a first voltage value, the first switching device 20 is turned off, when the voltage value of the first control signal is a second voltage value, the first switching device 20 is half turned on, and when the voltage value of the first control signal is a third voltage value, the first switching device 20 is turned on, wherein the first voltage value is less than the second voltage value, and the second voltage value is less than the third voltage value.

[0042] Similarly, when the voltage value of the second control signal is the first voltage value, the second switch device 30 is turned off, when the voltage value of the second control signal is the second voltage value, the second switch device 30 is half turned on, and when the voltage value of the second control signal is the third voltage value, the second switch device 30 is turned on; when the voltage value of the third control signal is the first voltage value, the third switch device 40 is turned off, when the voltage value of the third control signal is the second voltage value, the third switch device 40 is half turned on, and when the voltage value of the third control signal is the third voltage value, the third switch device 40 is turned on.

[0043] Optionally, the pixel circuit further includes a reset device 90 , and the reset device 90 is electrically connected to the third switch device 40 .

[0044] It should be noted that the reset device 90 is used to reset the first capacitor 50, the second capacitor 60, and the third capacitor 70, that is, to consume the photogenerated electrons stored in the first capacitor 50, the second capacitor 60, and the third capacitor 70 so that the charge of the first capacitor 50, the second capacitor 60, and the third capacitor 70 is zero.

[0045] Optionally, the reset device 90 is a transistor; a first pin of the reset device 90 is used to be electrically connected to an external power supply, a second pin of the reset device 90 is electrically connected to the third switch device 40, and a control pin of the reset device 90 is used to receive an external input reset signal.

[0046] Specifically, the reset device 90 is an NMOS tube, the drain of the reset device 90 is used to be electrically connected to an external power supply, the source of the reset device 90 is electrically connected to the drain of the third switch device 40, and the gate of the reset device 90 is used to receive an external reset signal.

[0047] It should be noted that when the reset signal is at a high level, the reset device 90 is turned on, and when the reset signal is at a low level, the reset device 90 is turned off. When the reset device 90, the first switch device 20, the second switch device 30, and the third switch device 40 are all turned on, the photogenerated electrons in the photodiode 10, the first capacitor 50, the second capacitor 60, and the third capacitor 70 all flow to the positive electrode of the power supply electrically connected to the reset device 90, so that the charge in the photodiode 10, the first capacitor 50, the second capacitor 60, and the third capacitor 70 is zero, thereby resetting the photodiode 10, the first capacitor 50, the second capacitor 60, and the third capacitor 70.

[0048] Optionally, the output module 80 includes a signal amplifier device 81 and a fourth switch device 82; the signal amplifier device 81 is electrically connected to the first switch device 20, the first capacitor 50, the second switch device 30, and the fourth switch device 82 respectively.

[0049] It should be noted that, when the second switching device 30 is turned off, the signal amplifier device 81 is used to amplify the current generated by the first capacitor 50; when the second switching device 30 is turned on and the third switching device 40 is turned off, the signal amplifier device 81 is used to amplify the current generated jointly by the first capacitor 50 and the second capacitor 60; when the second switching device 30 and the third switching device 40 are both turned on, the signal amplifier device 81 is used to amplify the current generated jointly by the first capacitor 50, the second capacitor 60 and the third capacitor 70.

[0050] When the fourth switch device 82 is turned on, the pixel circuit outputs a pixel signal, and when the fourth switch device 82 is turned off, the pixel circuit stops outputting the pixel signal. The pixel signal is the output signal of the pixel circuit.

[0051] Optionally, the signal amplifying device 81 and the fourth switching device 82 are both transistors; the control pin of the signal amplifying device 81 is electrically connected to the first switching device 20, the first capacitor 50, and the second switching device 30, respectively; the first pin of the signal amplifying device 81 is used to be electrically connected to an external power supply; the second pin of the signal amplifying device 81 is electrically connected to the first pin of the fourth switching device 82; the second pin of the fourth switching device 82 is the signal output end of the pixel circuit; the control pin of the fourth switching device 82 is used to receive an externally input pixel row scanning signal.

[0052] Specifically, the signal amplifier device 81 and the fourth switch device 82 are both NMOS tubes. The gate of the signal amplifier device 81 is electrically connected to the drain of the first switch device 20, the first pin of the first capacitor 50, and the source of the second switch device 30, respectively. The drain of the signal amplifier device 81 is used to be electrically connected to an external power supply, and the source of the signal amplifier device 81 is electrically connected to the drain of the fourth switch device 82; the source of the fourth switch device 82 is the signal output end of the pixel circuit, and the gate of the fourth switch device 82 is used to receive an externally input pixel row scanning signal.

[0053] It should be noted that when the pixel row scanning signal is at a high level, the source of the fourth switch device 82 outputs the pixel signal, and when the pixel row scanning signal is at a low level, the source of the fourth switch device 82 stops outputting the pixel signal.

[0054] Optionally, the first capacitor 50 , the second capacitor 60 , and the third capacitor 70 are all plate capacitors.

[0055] It should be noted that the plate capacitor is composed of two metal plates with opposite charges, and the two metal plates are separated by a layer of insulator in the middle, and the capacitance value of the plate capacitor is stable.

[0056] Figure 2 A control timing diagram of a pixel circuit provided in an embodiment of the present application, waveform curve A is a timing waveform curve of a pixel row scan signal, waveform curve B is a timing waveform curve of a first control signal, waveform curve C is a timing waveform curve of a reset signal, waveform curve D is a timing waveform curve of a third control signal, waveform curve E is a timing waveform curve of a second control signal, and waveform curve F is a timing waveform curve of a pixel signal output from a signal output end of the pixel circuit.

[0057] At time t0, the pixel row scan signal is at a low level, the voltage value of the first control signal is the second voltage value, the voltage value of the reset signal is the second voltage value, the voltage value of the third control signal is the second voltage value, the voltage value of the second control signal is the second voltage value, and the pixel signal is at a low level.

[0058] During the time period T1, the reset device 90, the first switch device 20, the second switch device 30, and the third switch device 40 are all in a semi-conducting state, and the photogenerated electrons of the photodiode 10 overflow to the first capacitor 50 after the photodiode 10 is saturated, overflow to the second capacitor 60 after the first capacitor 50 is saturated, overflow to the third capacitor 70 after the second capacitor 60 is saturated, and overflow to the positive electrode of the external power supply electrically connected to the reset device 90 after the third capacitor 70 is saturated.

[0059] At time t1, the pixel row scan signal is at a high level, the voltage value of the first control signal is a first voltage value, the voltage value of the reset signal is the first voltage value, the voltage value of the third control signal is the first voltage value, the voltage value of the second control signal is the third voltage value, and the pixel signal is at a high level, which represents the amount of photogenerated electrons stored in the first capacitor 50 and the second capacitor 60.

[0060] At time t2, the pixel row scan signal is at a high level, the voltage value of the first control signal is the first voltage value, the voltage value of the reset signal is the first voltage value, the voltage value of the third control signal is the first voltage value, the voltage value of the second control signal is the first voltage value, the pixel signal is at a high level, and the pixel signal represents the amount of photogenerated electrons stored in the first capacitor 50.

[0061] At time t3, the pixel row scan signal is at a high level, the voltage value of the first control signal is the first voltage value, the voltage value of the reset signal is the first voltage value, the voltage value of the third control signal is the first voltage value, the voltage value of the second control signal is the first voltage value, the pixel signal is at a high level, and the pixel signal represents the amount of photogenerated electrons stored in the first capacitor 50.

[0062] At time t4, the pixel row scan signal is at a high level, the voltage value of the first control signal is the first voltage value, the voltage value of the reset signal is the first voltage value, the voltage value of the third control signal is the first voltage value, the voltage value of the second control signal is the third voltage value, and the pixel signal is at a high level, which represents the amount of photogenerated electrons stored in the first capacitor 50 and the second capacitor 60.

[0063] At time t5, the pixel row scan signal is at a high level, the voltage value of the first control signal is the first voltage value, the voltage value of the reset signal is the first voltage value, the voltage value of the third control signal is the third voltage value, the voltage value of the second control signal is the third voltage value, and the pixel signal is at a high level, which represents the amount of photogenerated electrons stored in the first capacitor 50, the second capacitor 60 and the third capacitor 70.

[0064] At time t6, the pixel row scan signal is at a high level, the voltage value of the first control signal is the first voltage value, the voltage value of the reset signal is the first voltage value, the voltage value of the third control signal is the third voltage value, the voltage value of the second control signal is the third voltage value, and the pixel signal is at a high level, and the pixel signal represents the amount of photogenerated electrons stored in the first capacitor 50, the second capacitor 60 and the third capacitor 70.

[0065] In order to increase the dynamic range of the pixel circuit, an exposure process in time period T2 is added (photodiode 10 collects light signals), where time period T1 is 60 to 100 times that of time period T2, which can increase the dynamic range by 35 dB to 40 dB. The exposure process in time period T1 meets the requirements of light emitting diode (LED) flicker suppression (LFM).

[0066] During the time period T2, the reset device 90, the first switch device 20, the second switch device 30, and the third switch device 40 are all in a semi-conducting state, and the photogenerated electrons of the photodiode 10 overflow to the first capacitor 50 after the photodiode 10 is saturated, overflow to the second capacitor 60 after the first capacitor 50 is saturated, overflow to the third capacitor 70 after the second capacitor 60 is saturated, and overflow to the positive electrode of the external power supply electrically connected to the reset device 90 after the third capacitor 70 is saturated.

[0067] At time t7, the pixel row scan signal is at a high level, the voltage value of the first control signal is the first voltage value, the voltage value of the reset signal is the first voltage value, the voltage value of the third control signal is the first voltage value, the voltage value of the second control signal is the third voltage value, and the pixel signal is at a high level, which represents the amount of photogenerated electrons stored in the first capacitor 50 and the second capacitor 60.

[0068] At time t8, the pixel row scan signal is at a high level, the voltage value of the first control signal is the first voltage value, the voltage value of the reset signal is the first voltage value, the voltage value of the third control signal is the third voltage value, the voltage value of the second control signal is the third voltage value, and the pixel signal is at a high level, and the pixel signal represents the amount of photogenerated electrons stored in the first capacitor 50, the second capacitor 60 and the third capacitor 70.

[0069] In the above process, refer to Figure 3 (a), at time t0, the charge amount Q1 of the photodiode 10, the charge amount Q2 of the first capacitor 50, the charge amount Q3 of the second capacitor 60, and the charge amount Q4 of the third capacitor 70 are all 0; refer to Figure 3 (b), in the time period T1, the charge amount Q1 of the photodiode 10, the charge amount Q2 of the first capacitor 50, and the charge amount Q3 of the second capacitor 60 are all saturated and overflowed, and the charge amount Q4 of the third capacitor 70 is not saturated; refer to Figure 3 (c), at time t1, the charge Q1 of the photodiode 10 is not saturated, the total charge Q2+Q3 of the charge Q2 of the first capacitor 50 and the charge Q3 of the second capacitor 60 is not saturated, and the charge Q4 of the third capacitor 70 is not saturated; refer to Figure 3 (d), at time t2, the charge amount Q1 of the photodiode 10 is not saturated, the charge amount Q2 of the first capacitor 50 is not saturated, the charge amount Q3 of the second capacitor 60 is not saturated, and the charge amount Q4 of the third capacitor 70 is not saturated; refer to Figure 3 (e), at time t3, the charge amount Q1 of the photodiode 10 is not saturated, the charge amount Q2 of the first capacitor 50 is saturated, the charge amount Q3 of the second capacitor 60 is not saturated, and the charge amount Q4 of the third capacitor 70 is not saturated; refer to Figure 3 (f), at time t4, the charge Q1 of the photodiode 10 is not saturated, the total charge Q2+Q3 of the charge Q2 of the first capacitor 50 and the charge Q3 of the second capacitor 60 is saturated, and the charge Q4 of the third capacitor 70 is not saturated; refer to Figure 3 (g) At time t5, the charge Q1 of the photodiode 10 is 0, and the total charge Q2+Q3+Q4 of the charge Q2 of the first capacitor 50, the charge Q3 of the second capacitor 60 and the charge Q4 of the third capacitor 70 is not saturated; Figure 3 (h) At time t6, the charge Q1 of the photodiode 10 is 0, and the total charge Q2+Q3+Q4 of the charge Q2 of the first capacitor 50, the charge Q3 of the second capacitor 60, and the charge Q4 of the third capacitor 70 is 0.

[0070] In summary, in the embodiment of the present application, the pixel circuit includes a photodiode 10, a first switch device 20, a first capacitor 50, a second switch device 30, a second capacitor 60, a third switch device 40, a third capacitor 70 and an output module 80. The photogenerated electrons of the photodiode 10 overflow to the first capacitor 50 after the photodiode 10 is saturated, overflow to the second capacitor 60 after the first capacitor 50 is saturated, and overflow to the third capacitor 70 after the second capacitor 60 is saturated. When the second switch device 30 is turned off, the output signal of the pixel circuit represents the amount of photogenerated electrons (charge) stored in the first capacitor 50. When the second switch device 30 is turned on and the third switch device 40 is turned off, the output current of the pixel circuit represents the amount of photogenerated electrons stored in the first capacitor 50. 50 and the photogenerated electrons stored in the second capacitor 60. When the second switch device 30 and the third switch device 40 are both turned on, the output current of the pixel circuit represents the photogenerated electrons stored in the first capacitor 50, the second capacitor 60 and the third capacitor 70, thereby forming a pixel circuit with three conversion gains, and there is no need to use a MOS tube as a capacitor for receiving photogenerated electrons in the pixel circuit, which improves the stability of the capacitance value of the capacitor in the pixel circuit, and then improves the dynamic range stability of the pixel circuit, and solves the problem in the prior art that the pixel circuit uses a MOS tube as a capacitor to receive the photogenerated electrons of the photodiode 10, and the capacitance value of the MOS tube changes with the working state of the MOS tube, resulting in poor dynamic range stability of the pixel circuit.

[0071] In a second aspect, an embodiment of the present application provides an image sensor, comprising the aforementioned pixel circuit.

[0072] In some embodiments, the image sensor is a CMOS image sensor.

[0073] The specific implementation process of the pixel circuit in the image sensor is similar to the implementation process of the aforementioned pixel circuit, which will not be repeated here.

[0074] Since the pixel circuit of the embodiment of the present application has better dynamic range stability than the pixel circuit in the related art, the image sensor using the pixel circuit of the embodiment of the present application has better dynamic range stability than the image sensor using the pixel circuit in the related art.

[0075] In a third aspect, an embodiment of the present application provides a camera, comprising the aforementioned image sensor.

[0076] In the image sensor of the camera, the specific implementation process of the pixel circuit is similar to the implementation process of the aforementioned pixel circuit, which will not be repeated here.

[0077] Since the image sensor using the pixel circuit of the embodiment of the present application has better dynamic range stability than the image sensor using the pixel circuit in the related art, the camera using the image sensor of the embodiment of the present application has better dynamic range stability than the camera using the image sensor in the related art.

[0078] It should be noted that, in this article, the terms "comprise", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0079] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

Claims

1. A pixel circuit, characterized in that: include: A photodiode, a first switch device, a first capacitor, a second switch device, a second capacitor, a third switch device, a third capacitor and an output module; The photodiode, the first switch device, the second switch device, and the third switch device are electrically connected in sequence; The first pin of the first capacitor is electrically connected between the first switch device and the second switch device, and the second pin of the first capacitor is grounded; the output module is electrically connected between the first switch device and the second switch device; The first pin of the second capacitor is electrically connected between the second switch device and the third switch device, and the second pin of the second capacitor is grounded; The first pin of the third capacitor is electrically connected to the third switch device, and the second pin of the third capacitor is grounded or used to receive an external input voltage signal.

2. The pixel circuit according to claim 1, characterized in that: The first switching device, the second switching device, and the third switching device are all transistors.

3. The pixel circuit according to claim 2, characterized in that: The anode of the photodiode is grounded, the first pin of the first switch device is electrically connected to the cathode of the photodiode, and the second pin of the first switch device is electrically connected to the first pin of the second switch device and the first pin of the first capacitor respectively; The first pin of the second switch device is electrically connected to the first pin of the first capacitor, and the second pin of the second switch device is electrically connected to the first pin of the second capacitor and the first pin of the third switch device respectively; The second pin of the third switch device is electrically connected to the first pin of the third capacitor; The control pin of the first switch device is used to receive a first control signal input from the outside, the control pin of the second switch device is used to receive a second control signal input from the outside; the control pin of the third switch device is used to receive a third control signal input from the outside.

4. The pixel circuit according to claim 1, characterized in that: The pixel circuit further includes a reset device electrically connected to the third switch device.

5. The pixel circuit according to claim 4, characterized in that: The reset device is a transistor; The first pin of the reset device is used to be electrically connected to an external power supply, the second pin of the reset device is electrically connected to the third switch device, and the control pin of the reset device is used to receive a reset signal input from the outside.

6. The pixel circuit according to claim 1, characterized in that: The output module includes a signal amplifier device and a fourth switch device; The signal amplifying device is electrically connected to the first switching device, the first capacitor, the second switching device, and the fourth switching device respectively.

7. The pixel circuit according to claim 6, characterized in that: The signal amplifier device and the fourth switch device are both transistors; The control pins of the signal amplifying device are electrically connected to the first switch device, the first capacitor, and the second switch device respectively; the first pin of the signal amplifying device is used to be electrically connected to an external power supply; and the second pin of the signal amplifying device is electrically connected to the first pin of the fourth switch device; The second pin of the fourth switch device is a signal output terminal of the pixel circuit, and the control pin of the fourth switch device is used to receive an externally input pixel row scanning signal.

8. The pixel circuit according to claim 1, characterized in that: The first capacitor, the second capacitor, and the third capacitor are all plate capacitors.

9. An image sensor, characterized in that: Comprising the pixel circuit as claimed in any one of claims 1 to 8.

10. A camera, characterized in that: Comprising the image sensor as claimed in claim 9.

Images