A power switching device and electronic equipment

Abstract

This application discloses a power switching device and an electronic device. The power switching device includes: an active region; a termination region; a gate pad; a plurality of trench gates extending along a first direction and spaced apart along a second direction, the first and second directions being perpendicular; a gate bus surrounding the active region and electrically connected to the gate pad, comprising: a first gate bus connected to a first side of the gate pad, with a portion of the first gate bus extending along the second direction; a second gate bus connected to a second side of the gate pad, with a portion of the second gate bus extending along the second direction; and at least one gate finger extending along the second direction and connected to the first or second gate bus; the gate bus and the gate pad at least partially surround the active region. The arrangement of the gate bus, gate pad, and gate finger ensures that even trench gates far from the gate pad can receive sufficient current, resulting in a more uniform current distribution within the active region.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and more specifically to a power switching device and an electronic device. Background Technology

[0002] With the development of technology, power switching devices, such as IGBTs (Insulated Gate Bipolar Transistors), are being used more and more widely. The demand for high-current IGBTs is constantly increasing. As the current capability increases, the size of the IGBT chip also increases, which leads to uneven current distribution and uneven heat distribution in the active region. Summary of the Invention

[0003] The summary section introduces a series of simplified concepts, which will be further explained in detail in the detailed description section. This summary section is not intended to limit the key and essential technical features of the claimed technical solution, nor is it intended to determine the scope of protection of the claimed technical solution.

[0004] To address the aforementioned problems, this application provides a power switching device, which includes:

[0005] Active region;

[0006] The terminal area is located on the periphery of the active area;

[0007] Multiple trench gates are disposed within the active region, the multiple trench gates extend along a first direction and are spaced apart along a second direction, the first direction and the second direction intersect;

[0008] A gate bus is at least partially disposed between the active region and the terminal region;

[0009] A gate pad is disposed between the terminal region and the active region, and the gate pad is configured to have an exposed electrical connection area for electrical connection with the gate bus.

[0010] The gate bus includes:

[0011] A first gate bus is connected to a first side of the gate pad, and a portion of the first gate bus extends along the second direction;

[0012] A second gate bus is connected to a second side of the gate pad, and a portion of the second gate bus extends along the second direction, wherein the first side and the second side intersect.

[0013] At least one gate finger, each gate finger extending along the second direction, and one end connected to the first gate bus or the second gate bus; wherein,

[0014] The gate bus and the gate pad form an enclosing shape that at least partially surrounds the active region.

[0015] The above technical solution has the following advantages and beneficial effects: by setting a connected gate bus and gate pad between the active region and the terminal region, the drive signal can flow from the gate pad and be transmitted to each trench gate through the gate bus, or the output current from the trench gate can flow out to the gate pad through the gate bus, so as to realize the turning on or off of the power switching device. Then, the gate finger is used to partition the area to prevent the current from being too concentrated in the edge area of ​​the active region, so that the current distribution in the active region is more uniform, thereby improving the uniformity of heat distribution.

[0016] For example, the active region has a diagonal line, one end of which is close to the gate pad, and the first gate bus and the second gate bus are located on opposite sides of the diagonal line. The first gate bus, the second gate bus, and the gate pad form an enclosing shape that at least partially surrounds the active region.

[0017] The above technical solution has the following advantages and beneficial effects: By arranging the first gate bus and the second gate bus on both sides of the diagonal line and forming an enclosed shape, the current flowing out from the gate pad can flow through the first gate bus and the second gate bus to the trench gate in the active region, so that the trench gate that is far away from the gate pad can also obtain the corresponding current, thereby enhancing the uniformity of current distribution.

[0018] For example, the gate pad is disposed in the corner area of ​​the enclosed shape and protrudes towards the side where the active region is located.

[0019] The above technical solution has the following advantages and benefits: placing the gate pad in the corner area not only helps to keep the device layout neat and orderly, improving aesthetics and maintainability, but also reduces electromagnetic interference with other devices, and reduces noise and errors.

[0020] Exemplarily, the first gate bus includes:

[0021] A first branch line, the first end of which is connected to the first side of the gate pad, and the first branch line extends along the first direction;

[0022] The second branch line has a first end connected to the second end of the first branch line, and the second branch line extends along the second direction and spans the plurality of trench gates.

[0023] The above technical solution has the following advantages and beneficial effects: by having a first branch and a second branch in the first gate bus, the second branch realizes the electrical connection with the multiple trench gates it spans, while the first branch realizes the electrical connection between the second branch and the gate pad, thereby forming an effective current path so that the current flows from the gate pad to the multiple trench gates or flows from the multiple trench gates to the gate pad.

[0024] For example, the second gate bus includes:

[0025] The third branch line, the first end of which is connected to the second side of the gate pad, and the third branch line spans the plurality of trench gates along the second direction;

[0026] A fourth branch line, the first end of which is connected to the second end of the third branch line, and the fourth branch line extends along the first direction.

[0027] The above technical solution has the following advantages and beneficial effects: Similarly to the first gate bus, the third branch realizes the electrical connection with the multiple trench gates it spans, while the fourth branch realizes the electrical connection between the second branch and the gate pad, thereby forming an effective current path so that the current flows from the gate pad to the multiple trench gates or from the multiple trench gates to the gate pad.

[0028] For example, the gate finger includes a first gate finger and a second gate finger, wherein one end of the first gate finger is connected to the first branch line and the first gate finger extends into the active region, one end of the second gate finger is connected to the second end of the fourth branch line and the second gate finger extends into the active region, and the first gate finger and the second gate finger are spaced apart in the second direction.

[0029] The above technical solution has the following advantages and beneficial effects: the two gate fingers set at intervals can divide the active region into more areas to prevent the current from being too concentrated in the edge area of ​​the active region, thereby making the current distribution more uniform.

[0030] For example, the first gate finger and the second gate finger are opposite to each other and spaced apart.

[0031] The above technical solution has the following advantages and benefits: by setting the first gate finger and the second gate finger relatively apart, the active region can be divided into several relatively uniform regions, which helps to distribute the current evenly.

[0032] For example, if the length of the second branch in the second direction is set to D, the length of the first gate bus is set to L1, the length of the second gate finger in the second direction is set to L2, and the length of the second gate bus is set to L3, then |L1-(L2+L3)|≤0.2D.

[0033] The above technical solution has the following advantages and beneficial effects: By limiting the relationship between the length of the first gate bus (including the total length and the length of the second branch in the second direction) and the length of the second gate finger and the second gate bus, the length of the first current path formed by the first gate bus and the length of the second current path formed by the second gate finger and the second gate bus are as close as possible. This makes the time when the drive signal input from the gate pad reaches the multiple trench gates more consistent or the time when the current output from the multiple trench gates reaches the gate pad more consistent. This makes the regions controlled by the multiple trench gates turn on or off as synchronously as possible, improves the current distribution in the active region, and makes the current distribution more uniform, thereby improving the uniformity of heat distribution.

[0034] For example, if the length of the second branch in the second direction is set to D, the length of the third branch is set to L4, the length of the first gate finger in the second direction is set to L5, and the length of the first gate bus between the first gate finger and the gate pad is set to L6, then |L4-(L5+L6)|≤0.2D.

[0035] The above technical solution has the following advantages and beneficial effects: By limiting the relationship between the length of the third branch of the second gate bus and the length of the first gate finger and the length of the first gate bus between the first gate finger and the gate pad, the length of the third current path formed by the first gate finger and the first gate bus between the first gate finger and the gate pad is made as close as possible to the length of the fourth current path formed by the third branch of the second gate bus. This makes the time when the drive signal input from the gate pad reaches the multiple trench gates more consistent or the time when the current output from the multiple trench gates reaches the gate pad more consistent, thus improving the current distribution in the active region and making the current distribution more uniform.

[0036] For example, if the length of the second branch in the second direction is set to D, then the lengths of the first gate finger and the second gate finger in the second direction are both 1 / 3D; and / or

[0037] In the first direction, the distance between the first gate finger and the second gate finger and the second branch is 1 / 2D; and / or

[0038] In the first direction, the distance between the first gate finger and the second branch is equal to the distance between the first gate finger and the third branch, and the distance between the second gate finger and the second branch is equal to the distance between the second gate finger and the third branch.

[0039] The above technical solution has the following advantages and beneficial effects: By limiting the length relationship between the first gate finger and the second gate finger, as well as the distance between the first gate finger and the second gate finger and the second branch, it helps to improve the problem of excessive current concentration and improve the uniformity of current distribution. Furthermore, through this setting, the length difference between the parts of the gate bus that serve as different current paths can be minimized, thereby improving the uniformity of current distribution and heat distribution in the active region.

[0040] For example, the length of the second branch in the second direction is set to D, and the lengths of the first gate finger and the second gate finger in the second direction are both 1 / 3D.

[0041] In the first direction, the distance between the first gate finger and the second gate finger and the second branch is 1 / 2D.

[0042] The above technical solution has the following advantages and beneficial effects: by limiting the length of the first gate finger and the second gate finger so that the lengths of the first gate finger and the second gate finger are the same, and the lengths of the first gate finger and the second gate finger are also equal to the length of the interval between the first gate finger and the second gate finger, the length difference between the parts of the gate bus that serve as different current paths can be shortened as much as possible, thereby improving the uniformity of current distribution and heat distribution in the active region.

[0043] For example, the first branch is parallel to and opposite to the fourth branch, and the second branch is parallel to and opposite to the third branch.

[0044] The above technical solution has the following advantages and beneficial effects: With this setting, the active region can be effectively surrounded by the first gate bus and the second gate bus, thereby enabling the driving signal to flow into the multiple trench gates of the active region and the current of the multiple trench gates to be output to the gate pad, so as to turn the power switching device on or off, and help to achieve better current distribution uniformity.

[0045] For example, the first branch and the third branch are of equal length.

[0046] The above technical solution has the following advantages and benefits: By setting it up in this way, the length difference between the parts of the gate bus that serve as different current paths can be shortened as much as possible, thereby improving the uniformity of current distribution and heat distribution in the active region.

[0047] Exemplarily, the gate bus further includes:

[0048] A third gate bus, wherein a first end of the third gate bus is connected to a second end of the second branch, and the third gate bus extends toward the fourth branch along the first direction;

[0049] A fourth gate bus, wherein a first end of the fourth gate bus is connected to a second end of the fourth branch, and the fourth gate bus extends toward the third gate bus along the first direction, wherein...

[0050] The third gate bus and the fourth gate bus are spaced apart in the first direction.

[0051] The above technical solution has the following advantages and beneficial effects: by setting the third gate bus and the fourth gate bus, the contact area with the gate polysilicon layer below can be increased, the contact resistance can be reduced, thereby improving the signal transmission speed, and it also helps to disperse current, reduce the formation of hot spots, improve thermal stability, and help maintain the normal operation of the device at high temperature. Therefore, by setting the third gate bus and the fourth gate bus, the stability of the device can be effectively improved.

[0052] For example, the third gate bus and the fourth gate bus are arranged opposite to each other and spaced apart; and / or,

[0053] The third gate bus and the fourth gate bus have the same length.

[0054] The above technical solution has the following advantages and benefits: such a setting can make the shape and structure of the gate bus more regular, simplify the complexity of the gate bus wiring, enable the gate bus to transmit current more smoothly, reduce current congestion and loss, and improve the overall performance of the device.

[0055] For example, the first direction is perpendicular to the second direction.

[0056] The above technical solution has the following advantages and benefits: such a setting can make the gate bus arrangement more reasonable, make more effective use of the space on the chip, simplify the complexity of gate bus wiring, enable the gate bus to transmit current more smoothly, reduce current congestion and loss, and improve the overall performance of the device.

[0057] For example, the power switching device includes an IGBT or an RC-IGBT.

[0058] The above technical solution has the following advantages and benefits: the trench gate structure optimizes the current path, making the IGBT switch faster, which helps to reduce switching losses and improve the overall efficiency of the power electronic system.

[0059] This application provides an electronic device that includes the power switching device described above.

[0060] The above technical solution has the following advantages or beneficial effects: it includes the aforementioned power switching device in the electronic device, and therefore has similar advantages to the aforementioned power switching device. Attached Figure Description

[0061] The following drawings, which are incorporated herein by reference and are used to understand this application, illustrate embodiments of the invention and their descriptions, thereby explaining the apparatus and principles of the invention. In the drawings,

[0062] Figure 1 A schematic diagram of a power switching device according to a first embodiment of this application is shown;

[0063] Figure 2 It shows Figure 1 A schematic diagram showing the length relationships of some components in a power switching device;

[0064] Figures 3A-3D It shows Figure 1 A schematic diagram of four different current paths in a power switching device;

[0065] Figure 4 A schematic diagram of a power switching device according to a second embodiment of this application is shown;

[0066] Figure 5A-5G The various stages in the manufacturing process of the power switching device according to embodiments of this application are shown. Figure 1 An exemplary cross-sectional view at point A1;

[0067] Figure 6 The manufacturing steps of the power switching device according to an embodiment of this application are shown in the following: Figure 1 An exemplary cross-sectional view at point A2;

[0068] Figure 7 A schematic block diagram of an electronic device according to an embodiment of this application is shown.

[0069] In the attached diagram,

[0070] 10 Active region; 11 Transition region; 20 Termination region; 30 Gate pad; 40 Trench gate; 50 First gate bus; 501 First branch; 502 Second branch; 51 Second gate bus; 511 Third branch; 512 Fourth branch; 52 Third gate bus; 53 Fourth gate bus; 601 First gate finger; 602 Second gate finger; 70 Diagonal line; 700 Substrate; 7001 First surface; 7002 Second surface; 7003 Drift region; 7 01 Gate trench; 702 Gate trench insulating film; 703 Gate trench electrode; 704 Body region; 705 Emitter layer; 706 Interlayer insulating film; 707 Contact hole; 7081 Emitter metal layer; 714 Gate polysilicon layer; 7083 Termination region metal layer; 709 Buffer layer; 710 Collector layer; 711 Collector metal layer; 712 Polysilicon layer; 7131 P-well region; 7132 P-implantation region; 713 Guard ring; 800 Electronic device. Detailed Implementation

[0071] The following description provides numerous specific details to offer a more thorough understanding of this application. However, it will be apparent to those skilled in the art that this application can be practiced without one or more of these details. In other instances, certain technical features well-known in the art have not been described to avoid confusion with this application.

[0072] It should be understood that this application can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of this application to those skilled in the art. In the drawings, for clarity, the dimensions and relative dimensions of layers and regions may be exaggerated. The same reference numerals denote the same elements throughout.

[0073] It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or parts, these elements, components, areas, layers, and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or part from another element, component, area, layer, or part. Therefore, without departing from the teachings of this application, the first element, component, area, layer, or part discussed below may be referred to as the second element, component, area, layer, or part.

[0074] Spatial relation terms such as "below," "under," "below," "under," "above," and "above" are used here for convenience to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of devices in use and operation.

[0075] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. When used herein, the singular forms “a,” “an,” and “ / the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “compose” and / or “comprising,” when used in this specification, identify the presence of features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0076] Embodiments of the invention are described herein with reference to cross-sectional views that serve as schematic diagrams of preferred embodiments (and intermediate structures) of this application. Thus, variations in the shown shape are contemplated due to, for example, manufacturing techniques and / or tolerances. Therefore, embodiments of this application should not be limited to the specific shapes shown herein, but include shape deviations due to, for example, manufacturing processes. Consequently, the figures are substantially schematic, and their shapes are not intended to show the actual shape of the device and are not intended to limit the scope of this application.

[0077] With the development of technology, power switching devices, such as IGBTs (Insulated Gate Bipolar Transistors), are being used more and more widely. The demand for high-current IGBTs is constantly increasing. With the rapid development of new energy vehicles, wind power, photovoltaics, and energy storage, the demand for power devices like IGBTs is increasing daily. In terms of market demand, IGBTs, as core components in new energy vehicles, are widely used in this field and have a significant impact on the performance of the entire vehicle. At the same time, emerging industries such as wind, solar, and energy storage are also providing ample impetus for the growth of IGBTs. In terms of technological development, the maximum current capability of common IGBT products on the market is generally between tens and hundreds of amperes. With the increase in current capability, the IGBT chip size also increases. For high-current chips, the chip area is large, and there is a certain voltage drop and parasitic capacitance from the gate pad to the distant trench gate, leading to asynchronous trench gate switching. When the chip is turned on, the trench gate closer to the gate pad conducts first. Due to the presence of parasitic capacitance and resistance, the trench gate farther from the gate pad conducts later or even fails to conduct. When the chip is turned off, the trench gate closer to the gate pad turns off first. Due to the presence of parasitic capacitance and resistance, the trench gate farther from the gate pad turns off later or even burns out. This results in asynchronous and uneven conduction of the trench gate switches, which in turn leads to uneven current distribution within the IGBT. This uneven current distribution further leads to uneven heat distribution.

[0078] In view of the above problems, this application provides a power switching device. For example... Figure 1 As shown, Figure 1 The diagram shows a power switching device with a generally square top view. The power switching device includes: an active region 10, a terminal region 20 surrounding the active region 10, and a transition region 11 between the active region 10 and the terminal region 20; that is, the terminal region 20 surrounds the active region 10 and the transition region 11. Figure 1 As shown, the areas within the two dashed boxes represent the transition region 11. Multiple trench gates 40 are disposed within the active region 10. These trench gates 40 extend along a first direction (e.g., a horizontal direction) and are spaced apart along a second direction, which intersects. The first and second directions are two non-parallel or non-coincident intersecting directions; exemplarily, the first and second directions are perpendicular. This arrangement allows for a more rational arrangement of the gate bus, more efficient use of chip space, and simplifies the complexity of gate bus wiring. It also enables the gate bus to transmit current more smoothly, reducing current congestion and losses, and improving the overall performance of the device.

[0079] Exemplarily, the active region 10 is the portion that performs the basic functions of the power switching device, the termination region 20 is the portion used to improve the static withstand voltage characteristics, stabilize, and enhance the reliability and dynamic damage resistance of the power switching device, and the transition region 11 is the portion that connects the active region 10 and the termination region 20. In some embodiments, the power switching device can be an IGBT, or a reverse-conducting IGBT (i.e., an RC-IGBT), or a MOSFET, wherein the reverse-conducting IGBT is formed by integrating an IGBT and a diode (e.g., a Fast Recovery Diode, FRD) on the same semiconductor substrate. When the power switching device is an IGBT, the active region 10 performs the basic functions of the IGBT and includes the IGBT region; when the power switching device is a reverse-conducting IGBT, for example, the IGBT and FRD are integrated together, the active region 10 performs the basic functions of both the IGBT and the FRD, and includes the IGBT region and the diode region, such as the FRD region, within the active region 10.

[0080] The gate bus 50 is at least partially disposed between the active region 10 and the terminal region 20, that is, the gate bus is at least partially disposed in the transition region 11.

[0081] In one example, such as Figure 6As shown, the IGBT cell in the IGBT region includes a substrate 700, an emitter metal layer 7081, a collector metal layer 711, a buffer layer 709 (FS), a trench gate 40, a gate polysilicon layer 714, a gate bus 50, an interlayer insulating film 706, a drift region of a first conductivity type, a body layer of a second conductivity type 704, an emitter layer of a first conductivity type 705, and a collector layer of a second conductivity type 710. It is worth mentioning that... Figure 6 The number of trench gates shown is merely an illustrative representation for ease of description, and its actual number is not necessarily the same as the number of trench gates shown. Figures 5A-5G The trench gates shown have different numbers, but the effect they achieve is the same. Figures 5A-5G The effect is the same.

[0082] It is worth mentioning that the first conductivity type can be N-type and the second conductivity type can be P-type, or the first conductivity type can be P-type and the second conductivity type can be N-type. In this embodiment, the case in which the first conductivity type can be N-type and the second conductivity type can be P-type is mainly taken as an example.

[0083] The substrate 700 has opposing first surfaces 7001 and second surfaces 7002, both of which span the active region 10, the transition region 11, and the termination region 20. A drift region 7003 is located within the substrate 700, for example, between the first surface 7001 and the second surface 7002, and spans the active region 10, the transition region 11, and the termination region 20.

[0084] A body layer 704 is disposed on the first surface 7001 side of the drift region 7003, and an emitter layer 705 is disposed on the first surface 7001 side of the body layer 704. A gate trench is formed on the substrate 700, extending from the first surface 7001 through the emitter layer 705 and the body layer 704 to the drift region 7003. A gate trench electrode is disposed within the gate trench, separated by a gate trench insulating film (not shown), thereby forming a trench gate 40. The gate trench electrode faces the drift region 7003 separated by the gate trench insulating film. The gate insulating film of the trench gate 40 is in contact with the body layer 704 and the emitter layer 705. If a gate driving voltage is applied to the gate trench electrode, the body layer 704 in contact with the gate trench insulating film of the trench gate 40 forms a channel.

[0085] A buffer layer 709 of a first conductivity type, with a higher concentration of impurities of the first conductivity type than that of the drift region 7003, is provided on the second surface 7002 side of the drift region 7003. The buffer layer 709 is provided to suppress depletion layer breakdown extending from the body layer 704 to the second surface 7002 side when the power switching device is in the off state. The buffer layer 709 can be formed by implanting phosphorus (P) or protons (H+), or by implanting both phosphorus (P) and protons (H+). Alternatively, the power switching device may not have the buffer layer 709, and the buffer layer 709 may also be provided as the drift region 7003. The buffer layer 709 and the drift region 7003 may also be combined and referred to as the drift region 7003.

[0086] A collector layer 710 is provided on the side of the buffer layer 709 away from the first surface 7001, that is, the collector layer 710 is provided between the drift region 7003 and the second surface 7002. The collector layer 710 constitutes the second surface 7002 of the substrate 700.

[0087] A collector metal layer 711 is also provided on the side of the collector layer 710 away from the first surface 7001, which is in contact with the collector layer 710 to form a conductive contact.

[0088] Interlayer insulating film 706 is provided in the active region 10, the terminal region 20 and the transition region 11 for electrical isolation.

[0089] An interlayer insulating film 706 of the active region 10 is disposed on the first surface 7001. An emitter metal layer 7081 is disposed on the interlayer insulating film 706 of the active region 10. The emitter metal layer 7081 is electrically connected to the emitter layer 705 through the contact hole of the interlayer insulating film 706.

[0090] A guard ring 713 of a second conductivity type is disposed on the first surface 7001, for example, in a P-type configuration. Exemplarily, the guard ring has a P-well region 7131 and a P-injection region 7132. The P-well region 7131 is located in the transition region 11, and the P-injection region 7132 is located in the terminal region 20. The P-well region 7131 and the P-injection region 7132 are spaced apart, with the side of the P-well region 7131 closest to the active region 10 and spaced apart from the trench gate 40. The number of P-injection regions 7132 can be one or more. When there are multiple P-injection regions 7132, they are arranged spaced apart from each other in accordance with the holding voltage.

[0091] The gate polysilicon layer 714 is located in the transition region 11 and is disposed on the first surface 7001 and above the P-well region 7131. The gate bus 50 is located on the gate polysilicon layer 714 and is electrically connected to the gate polysilicon layer 714.

[0092] The interlayer insulating film 706 of the transition region 11 includes an interlayer insulating film 706 surrounding the gate polysilicon layer 714 and an interlayer insulating film (not shown) disposed between the gate polysilicon layer 714 and the substrate 700. The interlayer insulating film disposed between the gate polysilicon layer 714 and the substrate 700 isolates the substrate 700 and the gate polysilicon layer 714 from each other. A gate bus 50 is disposed on the interlayer insulating film 706 surrounding the gate bus 50 in the transition region 11. The gate bus 50 is electrically connected to the gate polysilicon layer 714 through a contact hole in the interlayer insulating film 706 surrounding the gate polysilicon layer 714. An emitter metal layer 7081 is also disposed in the transition region 11. The gate polysilicon layer 714 and the gate bus 50 are disposed at intervals from the emitter metal layer 7081 of the transition region 11 and the active region 10. The emitter metal layer 7081 of the transition region 11 is connected to the emitter metal layer 7081 of the active region 10. Optionally, the gate bus 50 is electrically connected to the trench gate in the active region via the gate polysilicon layer 714.

[0093] An interlayer insulating film 706 is disposed on the first surface 7001 of the terminal region 20. A polysilicon layer 712 is disposed above each P-implantation region 7132, and the interlayer insulating film 706 of the terminal region 20 covers the polysilicon layer 712. The terminal region 20 is also provided with a terminal region metal layer 7083, which is electrically connected to the P-implantation region 7132 through contact holes on the interlayer insulating film 706 of the terminal region 20. The FRD cell of the FRD region includes an anode layer of a second conductivity type disposed on the first surface side compared to the drift region of the first conductivity type, and a cathode layer of the first conductivity type disposed on the second surface side compared to the drift region of the first conductivity type.

[0094] A gate pad 30 is disposed between the active region 10 and the termination region 20. Furthermore, in some examples, the gate pad 30 is disposed within the transition region 11. The gate pad 30 is configured to have an exposed electrical connection area that can be used for electrical connection with leads. The gate pad 30 is used for electrical connection with the gate bus. In some examples, the gate pad 30 is disposed at the corner of an enclosed shape and protrudes towards the side where the active region 10 is located, forming a generally rectangular structure in top view with the active region 10. This rectangle is surrounded by the termination region 20. The corner area can refer to the corner area projected onto the surface of the substrate 700, for example, disposed at the lower right corner of the rectangle in this embodiment. In some embodiments, the gate pad 30 can also be disposed at a suitable location. The gate pad 30 is used to introduce the drive signal of the trench gate 40 to control the conduction or cutoff of the power switching device. It can also serve as a discharge channel for the trench gate 40. The gate pad 30 is a window opened on the passivation layer on the chip surface. During packaging, a metal wire is soldered on it to connect to the pin and bring out the potential. Placing the gate pad 30 in the corner area not only helps to maintain the neatness and order of the device layout, improving aesthetics and maintainability, but also reduces electromagnetic interference with other devices, reduces noise and errors. At the same time, it makes connectors and test equipment easier to access, thereby simplifying the connection and testing process, helping to improve production efficiency and test accuracy, and reducing production costs.

[0095] The two ends of the trench gate 40 in the first direction are connected to the gate bus, and the gate bus is also electrically connected to the gate pad 30, so that the trench gate 40 can obtain a drive signal through the gate bus. The transition region is the part that joins the active region 10 and the terminal region 20 together. The gate bus is disposed on the transition region. The drive signal flows in from the gate pad 30 and is transmitted to multiple trench gates 40 through the gate bus. Alternatively, the output current from the gate 40 flows out to the gate pad 30 through the gate bus, so that the trench gates 40 far from the gate pad 30 can also obtain sufficient current, making the current distribution in the active region 10 more uniform. The transition region is a particularly important part to ensure the destructive resistance under dynamic conditions.

[0096] In some examples, the gate bus includes a first gate bus 50, a second gate bus 51, and at least one gate finger. One end of the first gate bus 50 is connected to a first side of the gate pad 30. For example, the gate pad 30 has a first end adjacent to the active region 10 and a second end opposite to and adjacent to the terminal region 20 on the first side. The first gate bus 50 is connected to the second end of the first side, and a portion of the first gate bus 50 extends along a second direction. One end of the second gate bus 51 is connected to a second side of the gate pad 30. For example, the second side has a first end adjacent to the active region 10 and a second end opposite to and adjacent to the terminal region 20 on the second side. The first gate bus 50 is connected to the second end of the second side, and a portion of the second gate bus 51 extends along the first direction. One end of at least one gate finger is connected to either the first gate bus 50 or the second gate bus 51. Each gate finger extends along the second direction, for example, extending into the active region 10. The gate finger typically leads the trench gate potential to a greater distance from the gate pad 30 to make the current distribution within the active region more uniform.

[0097] In some examples, such as Figure 1 As shown, the active region 10 has a diagonal line 70, one end of which is close to the gate pad 30. A first gate bus 50 and a second gate bus 51 are located on opposite sides of the diagonal line 70. The first gate bus 50, the second gate bus 51, and the gate pad 30 form an enclosing shape that at least partially surrounds the active region 10. By placing the first gate bus 50 and the second gate bus 51 on opposite sides of the diagonal line 70, and connecting both to the gate pad 30, the enclosing shape at least partially surrounds the active region 10. This allows current flowing from the gate pad 30 to flow through the first gate bus 50 and the second gate bus 51 to the trench gate 40 in the active region 10, ensuring that the trench gate 40, which is farther from the gate pad 30, also receives current, thus enhancing the uniformity of current distribution.

[0098] The gate bus and the gate pad 30 at least partially surround the active region 10, i.e., the gate bus and the gate pad 30 are connected to form an enclosing shape. This allows the drive signal to flow from the gate pad and be transmitted to multiple trench gates 40 through the gate bus, or to allow the output current from the trench gate 40 to flow out through the gate bus to the gate pad, thereby enabling the power switching device to be turned on or off. The gate fingers further divide the active region into zones to prevent current from being excessively concentrated at the edges, thus making the current distribution within the active region more uniform and improving the uniformity of heat distribution. The ring structure in this embodiment can be a ring structure with an opening. It is worth mentioning that the materials of the gate bus and the gate fingers can be metal or other suitable conductive materials.

[0099] In some embodiments, such as Figure 1 As shown, the first gate bus 50 includes a first branch 501 and a second branch 502. The first end of the first branch 501 is connected to the first side of the gate pad 30. For example, the gate pad 30 has a first end adjacent to the active region 10 and a second end opposite to the first end and adjacent to the terminal region 20 on the first side. The first end of the first branch 501 is connected to the second end of the first side, and the first branch 501 extends along the first direction. The first end of the second branch 502 is connected to the second end of the first branch 501, and the second branch 502 extends along the second direction across the plurality of trench gates 40, that is, the second branch 502 extends toward the side where the active region is located.

[0100] The second gate bus 51 includes a third branch 511 and a fourth branch 512. The first end of the third branch 511 is connected to the second side of the gate pad 30. For example, the gate pad 30 has a first end adjacent to the active region 10 and a second end opposite to the first end and adjacent to the terminal region 20 on the second side. The first end of the third branch 511 is connected to the second end of the second side. The third branch 511 crosses a plurality of the trench gates 40 along the second direction. The first end of the fourth branch 512 is connected to the second end of the third branch 511, and the fourth branch 512 extends along the first direction.

[0101] Thus, the first branch 501 and the second branch 502 are distributed on the first side of the gate pad 30, for example as follows: Figure 1 On the left side of the gate pad 30 shown, that is, the side closer to the active region, the third branch 511 and the fourth branch 512 are distributed on the second side of the gate pad 30, that is, the side closer to the active region, and the first side and the second side intersect, for example as shown. Figure 1 On the upper side of the gate pad 30 shown, the first gate bus 50, the second gate bus 51 and the gate pad 30 form a ring structure around the active region 10. The trench gate 40 is connected between the second branch 502 and the third branch 511. At the same time, in order to make the active region 10 within the ring structure larger and the trench gate 40 longer, the connection point between the first branch 501 and the third branch 511 and the gate pad 30 is set at one end near the terminal region 20.

[0102] In some embodiments, such as Figure 1 , Figure 4 As shown, where Figure 4A power switching device is shown with a generally rectangular top view. The first branch 501 is parallel to and opposite the fourth branch 512, and the second branch 502 is parallel to and opposite the third branch 511. Since the power switching device is generally square or rectangular in top view, placing the first branch 501 parallel to the fourth branch 512 and the second branch 502 parallel to the third branch 511 forms an L-shaped first gate bus 50 and an L-shaped second gate bus 51. The trench gate 40 can be regularly connected between the second branch 502 and the third branch 511, which is beneficial for regular routing during subsequent metal layer layout and wiring. When the power switching device is generally square in size, in some embodiments, such as... Figure 1 As shown, the lengths of the first branch 501 and the third branch 511 are equal. This makes the lengths of the current paths flowing through the first branch 501 and the third branch 511 closer, which helps to achieve better current distribution uniformity, thereby making the heat distribution more uniform and improving the stability of the device.

[0103] It is worth mentioning that the top view of the power switching device is generally square or rectangular. The roughly rectangular shape formed by the active region 10, the transition region 11, and the gate bus and gate pad 30 can have right angles or rounded corners, which can be reasonably set according to actual needs. The shape formed by the gate bus 50 and the gate pad 30 can be closed or open.

[0104] In some embodiments, such as Figures 1-4As shown, there are two gate fingers, including a first gate finger 601 and a second gate finger 602. One end of the first gate finger 601 is connected to the first branch line 501 and extends into the active region 10. One end of the second gate finger 602 is connected to the second end of the fourth branch line 512 and extends into the active region 10. The first gate finger 601 and the second gate finger 602 are spaced apart in the second direction. In some embodiments, the first gate finger 601 and the second gate finger 602 are opposite to each other and spaced apart. The first gate finger 601 and the second gate finger 602 divide the active region 10 into more regions, preventing excessive current concentration and making the current distribution more uniform. At least one emitter metal layer (also referred to as emitter pad or source pad) is provided in the active region 10. The emitter metal layer is electrically connected to the emitter layer of the IGBT. Exemplarily, the gate bus and the gate pad can at least partially surround the emitter metal layer. The emitter metal layer can also be partially disposed in the gap between the first gate finger 601 and the second gate finger 602. An insulating layer is provided between the gate bus and the emitter metal layer for electrically isolating the gate bus and the emitter metal layer. An insulating layer is also provided between the gate pad and the emitter metal layer for electrically isolating the gate pad and the emitter metal layer. The emitter metal layer can be used to bring out the power switching device. In the embodiments of this application, the emitter metal layer can have a smaller resistance to allow for a larger conduction current and has better thermal conductivity. In one specific embodiment, the gate pad 30 is configured to have an exposed electrical connection area that can be electrically connected to leads to transmit drive signals, such as electrical signals, provided by external circuitry to the gate pad 30 via the leads. The drive signals are conducted from the leads to the gate pad 30 and then to the gate bus, and then from the gate bus to each trench gate 40 to provide trench gate drive to turn on the power switching device. The trench gate drive is a key factor in controlling the on and off of the IGBT, and the trench gate drive determines the opening or closing of the channel region, thereby controlling the flow of current.

[0105] In some embodiments, such as Figure 2 , Figure 4As shown, the length of the second branch 502 in the second direction is set to D, and the lengths of the first gate finger 601 and the second gate finger 602 in the second direction are both 1 / 3D; and / or, in the first direction, the distance between the first gate finger 601 and the second gate finger 602 and the second branch 502 is both 1 / 2D; for example, the line connecting the first gate finger 601 and the second gate finger 602 is on the same vertical line, and the first gate finger 601 extends from the middle position of the first branch 501 into the active region, and the second gate finger 602 extends from the middle position of the fourth branch 512 into the active region, the lengths of the first gate finger 601 and the second gate finger 602 are equal, and the lengths of the first gate finger 601 and the second gate finger 602 are also equal to the interval length between the first gate finger 601 and the second gate finger 602; optionally, the first gate finger 601 and the second gate finger 602 are both located at half the length of the trench gate. In some examples, in the first direction, the distance between the first gate finger 601 and the second branch 502 is equal to the distance between the first gate finger 601 and the third branch 511, and the distance between the second gate finger 602 and the second branch 502 is equal to the distance between the second gate finger 602 and the third branch 511. In this way, the first gate finger 601 and the second gate finger 602 can evenly divide the active region 10, further helping to improve the problem of excessive current concentration and improve the uniformity of current distribution. Furthermore, with this arrangement, the length difference between the portions of the gate bus that serve as different current paths can be minimized, thereby resulting in better uniformity of current distribution and heat distribution within the active region.

[0106] In some embodiments, such as Figure 4 As shown, the first gate bus 50, the second gate bus 51, and the gate pad 30 form an enclosed shape, which can be generally rectangular. In this case, the length of the second branch 502 can be D2, and the sum of the length of the first branch 501 and the length of the gate pad in the first direction can be D1. Then, the distance between the first gate finger, the second gate finger, and the second branch can be 1 / 2D1. Optionally, D1 and D2 can be different.

[0107] In some embodiments, such as Figure 3A and Figure 3B As shown in the figure, the red arrows in the figure represent the current paths, where Figure 3A The first current path P1 is shown. Figure 3B A second current path P2 is shown. The length of the second branch 502 in the second direction is set to D, the length of the first gate bus is set to L1, the length of the second gate finger 602 in the second direction is set to L2, and the length of the second gate bus is set to L3. (The rest of the text appears to be unrelated and possibly machine-generated.) Figure 3AThe first current path P1 shown: Current flows in from the end of the second branch 502 furthest from the first branch 501, flows through the second branch 502 and the first branch 501 to the gate pad 30, then the distance of the first current path P1 = L1; Figure 3B The second current path P2 shown: Current flows in from the end of the second gate finger near the center region, passing through the second gate finger 602, the fourth branch 512, and the third branch 511. Therefore, the distance of the second current path P2 = L2 + L3. In a specific embodiment, according to... Figure 2 As shown in the length markings, the distance of the first current path P1 is D + 1 / 2D + d2 = 1.5D + d2, and the distance of the second current path P2 is 1 / 3D + 1 / 2D + 1 / 2D + d2 = 1.33D + d2. Considering the first current path P1 and the second current path P2 as the longer current paths in the current path from the gate bus to the gate pad 30, the distance difference between the two longer current paths is equal to 0.17D. The smaller the distance difference, the more uniform the current distribution. Therefore, setting |L1-(L2+L3)|≤0.2D can make the current distribution more uniform. Alternatively, setting |L1-(L2+L3)|≤0.17D further can make the current distribution more uniform by making the distance difference between the two smaller.

[0108] In some embodiments, such as Figure 3C and Figure 3D As shown in the figure, the red arrows represent the current paths, where... Figure 3C The first current path P3 is shown. Figure 3D A second current path P4 is shown. The length of the second branch 502 in the second direction is set to D, the length of the third branch 511 is set to L4, the length of the first gate finger 601 in the second direction is set to L5, and the length of the first gate bus 50 between the first gate finger 601 and the gate pad is set to L6. Figure 3C The third current path P3 shown: Current flows in from the end of the first gate finger 601 near the center region, flows through the first gate finger 601 and the first branch line 501, and is located between the first gate finger 601 and the gate pad. Therefore, the distance of the third current path P3 = L5 + L6; Figure 3D The fourth current path P4 shown: Current flows in from the end of the third branch 511 furthest from the gate pad 30, flows through the third branch 511 to the gate pad 30, then the distance of the fourth current path P4 = L4. In a specific embodiment, according to Figure 2As shown in the length markings, the distance of the third current path P3 = 1 / 3D + d2 = 0.33 + d2, and the distance of the fourth current path P4 = 1 / 2D + 1 / 2D + d2 = D + d2. Considering the third current path P3 and the fourth current path P4 as the shorter current paths flowing from the gate bus to the gate pad 30, the distance difference between the two short current paths is also equal to 0.17D. Similarly, in this application, |L4 - (L5 + L6)| ≤ 0.2D, or even further, |L4 - (L5 + L6)| ≤ 0.17D, to make the current distribution more uniform, thereby making the heat distribution more uniform. Simultaneously, the settings for the gate finger position and length in this application can make the distance difference of the long current path equal to the distance difference of the short current path, further making the current distribution more uniform, which is more conducive to heat distribution and the reliability of the power switching device.

[0109] In some embodiments, such as Figure 1 As shown, the sum of the length of the first branch 501 in the first direction and the length of the gate pad 30 in the first direction is equal to the length of the second branch 502 in the second direction. Similarly, the sum of the length of the third branch 511 in the second direction and the length of the gate pad 30 in the second direction is equal to the length of the second branch 502 in the second direction, thus forming a structure with three equal sides, thereby making the trench gate between the second branch 502 and the third branch 511 more uniformly charged.

[0110] In some embodiments, such as Figure 1As shown, the gate bus further includes a third gate bus 52 and a fourth gate bus 53. The third gate bus 52 is connected to the end of the first gate bus 50 away from the gate pad 30, and the fourth gate bus 53 is connected to the end of the second gate bus 51 away from the gate pad 30. The third gate bus 52 and the fourth gate bus 53 are spaced apart. For example, the first end of the third gate bus 52 is connected to the second end of the second branch 502, and the third gate bus 52 extends towards the fourth branch 512 along the first direction; the first end of the fourth gate bus 53 is connected to the second end of the fourth branch 512, and the fourth gate bus 53 extends towards the third gate bus 52 along the first direction. The third gate bus 52 and the fourth gate bus 53 are spaced apart in the first direction. For example, the third gate bus 52 and the fourth gate bus 53 are opposite to each other and spaced apart. By setting the third gate bus 52 and the fourth gate bus 53, the contact area with the underlying gate polysilicon layer can be increased, reducing contact resistance and thus improving signal transmission speed. It also helps to disperse current, reduce hotspot formation, and improve thermal stability, which is beneficial for maintaining normal device operation at high temperatures. Therefore, setting the third gate bus 52 and the fourth gate bus 53 can effectively improve device stability. Furthermore, connecting the third gate bus 52 and the fourth gate bus 53, which are spaced apart in the first direction, to the second branch 502 and the fourth branch 512 respectively can form a ring structure with a small opening. This not only allows for more efficient distribution of the trench gate 40 current, ensuring uniform current distribution within the active region 10 and simplifying the wiring complexity between the gate bus and the gate pad 30, but also ensures the connection between the active region 10 and the transition region 11 through this opening (e.g., electrically connecting the emitter metal layer outside the gate bus to the emitter metal layer of the active region). Optionally, the third gate bus 52 and the fourth gate bus 53 are spaced apart in a first direction, or the third gate bus 52 and the fourth gate bus 53 are spaced apart in a second direction.

[0111] In some examples, the third gate bus 52 and the fourth gate bus 53 are of equal length. This arrangement allows for a more regular shape and structure of the gate bus, simplifies the complexity of gate bus wiring, enables smoother current transmission, reduces current congestion and losses, and improves the overall performance of the device. In some embodiments, a method for manufacturing the power switching device of this application, such as an IGBT, may include the following steps:

[0112] Step S1, as follows Figure 5AAs shown, a substrate 700 is provided, the substrate 700 having a first surface 7001 and a second surface 7002 opposite to each other, and a drift region of a first conductivity type is formed between the first surface 7001 and the second surface 7002.

[0113] Step S2, as follows Figure 5B As shown, a gate trench 701 is formed by etching from the first surface 7001 of the substrate 700 into the substrate 700. Then, a gate trench insulating film 702 is formed on the inner wall and bottom of the gate trench 701 and on the first surface 7001 of the substrate 700. The material of the gate trench insulating film 702 may include silicon oxide or other suitable insulating materials.

[0114] Step S3, depositing to form gate trench electrodes to fill the gate trench. First, as... Figure 5C As shown, a gate trench electrode 703 is deposited to form a gate trench electrode 703. The gate trench electrode 703 covers the substrate 700 and fills the gate trench 701 to form a trench gate 40. The material of the gate trench electrode 703 may include, but is not limited to, polysilicon. Then, as shown... Figure 5D As shown, the gate trench electrode 703 is etched to remove the gate trench electrode on the first surface of the substrate.

[0115] Step S4, as follows Figure 5E As shown, a body layer 704 of a second conductivity type is formed in the substrate 700, wherein the body layer 704 is located on the side of the drift region away from the second surface 7002 and on both sides of the trench gate 40. Continuing as... Figure 5E As shown, an emitter layer 705 of a first conductivity type is formed within the substrate 700. The emitter layer 705 is located on the side of the body layer 704 away from the second surface 7002, and the surface of the emitter layer 705 away from the body layer 704 constitutes a portion of the first surface 7001. Exemplarily, the body layer and emitter layer are formed by ion implantation. Optionally, the emitter layer 705 may be, for example, an N+ emitter layer, i.e., an N-type heavily doped emitter layer.

[0116] Step S5, as follows Figure 5F As shown, an interlayer insulating film 706 with contact holes 707 is formed on the first surface 7001 of the substrate 700, wherein the contact holes 707 expose at least a portion of the emitter layer 705, thereby enabling the emitter metal layer formed in subsequent steps to connect with the emitter layer 705. Then, dopant is implanted into the contact holes 707 corresponding to the body layer 704 to form a P+ region (not shown), which serves as the lead-out region of the body layer 704.

[0117] Step S6, as follows Figure 5GAs shown, an emitter metal layer 7081 is formed on the interlayer insulating film 706 and the contact hole 707. Then, a buffer layer 709 and a collector layer 710 are sequentially formed on the side of the drift region away from the first surface 7001. Specifically, the second surface 7002 of the substrate 700 is thinned, and then a buffer layer 709 is formed within the second surface 7002 of the substrate 700. Next, a collector layer 710 is formed on the side of the buffer layer 709 away from the first surface 7001. At least a portion of the surface of the collector layer 710 constitutes the second surface 7002. A collector metal layer 711 is also formed on the side of the collector layer 710 away from the first surface, contacting the collector layer 710 to form a conductive contact.

[0118] It is worth mentioning that the above steps are only examples and only include the relevant steps for fabricating the active region structure. The fabrication of a complete power switching device may include other steps, which will not be elaborated here.

[0119] According to the power switching device provided in this application, by setting a gate bus and a gate pad connected between the active region and the terminal region, the drive signal flows in from the gate pad and is transmitted to each trench gate through the gate bus, or the output current from the trench gate flows out to the gate pad through the gate bus, so as to realize the turning on or off of the power switching device. Then, the gate fingers are used to partition the active region to prevent the current from being too concentrated in the edge region, so as to make the current distribution in the active region more uniform and thus improve the uniformity of heat distribution.

[0120] On the other hand, this application, such as Figure 7 As shown, an electronic device 800 is provided, which includes the power switching device described above. This electronic device can be any electronic product or device, such as a household appliance (e.g., an inverter air conditioner), a television, a mobile phone, a tablet computer, a laptop computer, a netbook, a game console, a television set, a VCD player, a DVD player, a navigation device, a camera, a camcorder, a voice recorder, an MP3 player, an MP4 player, or a PSP. Because the electronic device of this application has the aforementioned power switching device, it possesses similar advantages to the aforementioned power switching device.

[0121] Although exemplary embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above exemplary embodiments are merely illustrative and are not intended to limit the scope of this application. Various changes and modifications can be made therein by those skilled in the art without departing from the scope and spirit of this application. All such changes and modifications are intended to be included within the scope of this application as claimed in the appended claims.

[0122] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of this application may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.

[0123] Similarly, it should be understood that, in order to streamline this application and aid in understanding one or more of the various inventive aspects, features of this application may sometimes be grouped together in a single embodiment, figure, or description thereof in the description of exemplary embodiments of this application. However, this approach should not be construed as reflecting an intention that the claimed application requires more features than are expressly recited in each claim. Rather, as reflected in the corresponding claims, its inventive point lies in solving the corresponding technical problem with features fewer than all features of a single disclosed embodiment. Therefore, the claims following the detailed description are hereby expressly incorporated into that detailed description, wherein each claim itself is a separate embodiment of this application.

[0124] Those skilled in the art will understand that, apart from the mutual exclusion of features, all features disclosed in this specification (including the accompanying claims, abstract, and drawings) and all processes or elements of any method or apparatus so disclosed can be combined in any combination. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstract, and drawings) may be replaced by an alternative feature serving the same, equivalent, or similar purpose.

[0125] Furthermore, those skilled in the art will understand that although some embodiments herein include certain features included in other embodiments but not others, combinations of features from different embodiments are intended to be within the scope of this application and form different embodiments. For example, in the claims, any of the claimed embodiments can be used in any combination.

[0126] It should be noted that the above embodiments are illustrative of this application and not restrictive of this application, and that those skilled in the art can devise alternative embodiments without departing from the scope of the appended claims.

Claims

1. A power switching device, characterized in that, include: Active region; The terminal area is located on the periphery of the active area; Multiple trench gates are disposed within the active region, the multiple trench gates extend along a first direction and are spaced apart along a second direction, the first direction and the second direction intersect; A gate bus is at least partially disposed between the active region and the terminal region; A gate pad is disposed between the termination region and the active region, and the gate pad is configured to have an exposed electrical connection area for electrical connection with the gate bus; wherein, the gate bus includes: A first gate bus is connected to a first side of the gate pad, and a portion of the first gate bus extends along the second direction; The first gate bus includes: A first branch line, the first end of which is connected to the first side of the gate pad, and the first branch line extends along the first direction; The second branch line has a first end connected to the second end of the first branch line, and the second branch line extends along the second direction and crosses the plurality of trench gates. A second gate bus is connected to a second side of the gate pad, and a portion of the second gate bus extends along the second direction, wherein the first side and the second side intersect. The second gate bus includes: The third branch line has a first end connected to the second side of the gate pad, and the third branch line extends along the second direction and crosses the plurality of trench gates. A fourth branch line, the first end of which is connected to the second end of the third branch line, and the fourth branch line extends along the first direction; A third gate bus, wherein a first end of the third gate bus is connected to a second end of the second branch, and the third gate bus extends toward the fourth branch along the first direction; A fourth gate bus, wherein a first end of the fourth gate bus is connected to a second end of the fourth branch, and the fourth gate bus extends toward the third gate bus along the first direction, wherein the third gate bus and the fourth gate bus are spaced apart in the first direction; At least one gate finger, each gate finger extending along the second direction and having one end connected to the first gate bus or the second gate bus, the gate finger including a second gate finger, one end of the second gate finger being connected to the second end of the fourth branch, and the second gate finger extending into the active region; wherein, The gate bus and the gate pad form an enclosing shape that at least partially surrounds the active region. The gate pad is disposed in the corner area of ​​the enclosing shape. The active region has a diagonal line, one end of which is close to the gate pad. The first gate bus and the second gate bus are respectively located on both sides of the diagonal line. The first gate bus, the second gate bus, and the gate pad form an enclosing shape that at least partially surrounds the active region.

2. The power switching device as described in claim 1, characterized in that, The gate pad protrudes towards the side where the active region is located.

3. The power switching device as described in claim 1, characterized in that, The gate finger includes a first gate finger, one end of which is connected to the first branch line and extends into the active region. The first gate finger and the second gate finger are spaced apart in the second direction.

4. The power switching device as described in claim 3, characterized in that, The first gate finger and the second gate finger are opposite to each other and spaced apart.

5. The power switching device as described in claim 3, characterized in that, Let the length of the second branch in the second direction be D, the length of the first gate bus be L1, the length of the second gate finger in the second direction be L2, and the length of the second gate bus be L3. .

6. The power switching device as described in claim 3, characterized in that, Let the length of the second branch in the second direction be D, the length of the third branch be L4, the length of the first gate finger in the second direction be L5, and the length of the first gate bus between the first gate finger and the gate pad be L6. .

7. The power switching device as described in claim 3, characterized in that, Let the length of the second branch in the second direction be D, then the lengths of the first gate finger and the second gate finger in the second direction are both ⅓D; and / or In the first direction, the distance between the first gate finger and the second gate finger and the second branch is ½D; and / or In the first direction, the distance between the first gate finger and the second branch is equal to the distance between the first gate finger and the third branch, and the distance between the second gate finger and the second branch is equal to the distance between the second gate finger and the third branch.

8. The power switching device as described in claim 3, characterized in that, The sum of the length of the first branch in the first direction and the length of the gate pad in the first direction is equal to the length of the second branch in the second direction.

9. The power switching device as claimed in claim 1, characterized in that, The first branch is parallel to and opposite to the fourth branch, and the second branch is parallel to and opposite to the third branch.

10. The power switching device as claimed in claim 1, characterized in that, The first branch and the third branch are of equal length.

11. The power switching device as claimed in claim 1, characterized in that, The third gate bus and the fourth gate bus are positioned opposite each other and spaced apart; and / or, The third gate bus and the fourth gate bus have the same length.

12. The power switching device according to any one of claims 1 to 11, characterized in that, The first direction is perpendicular to the second direction.

13. The power switching device according to any one of claims 1 to 11, characterized in that, The power switching device includes IGBT or RC-IGBT.

14. An electronic device, characterized in that, Includes the power switching device as described in any one of claims 1 to 13.

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