Novel battery piece structure and preparation method thereof

Abstract

The invention discloses a novel battery piece structure and a preparation method thereof, and the structure comprises a silicon substrate which is provided with conductive layers on the two surfaces; the packaging film is constructed and arranged on the conducting layers on the two sides of the silicon substrate, and patterning is carried out on the packaging film to obtain a grid line groove; the grid line layer is configured in the grid line groove in the packaging film; and the protection layer is configured on the outer side of the grid line layer, the grid line layer is wrapped in the protection layer, and the outer edge of the protection layer is carried on the packaging film. The invention designs a novel graphical packaging module with permanent coverage, which not only can be used as a mask layer for preparing a metal wire layer through electroplating, but also does not influence the characteristics of a high-light-transmission transparent conductive layer of a final product, and can also replace the existing expensive mask material, the process flow is simple, the cost is low, and the production efficiency is high. Omnibearing anti-oxidation protection can be carried out on the metal grid lines, the equipment investment is saved, the production and operation cost is reduced, and the conversion efficiency of a battery piece can be improved.

Description

Technical Field

[0001] This application belongs to the technical field of photovoltaic cell preparation, and particularly relates to a novel cell structure and a preparation method thereof. Background Art

[0002] In the development of photovoltaic cells, since silver paste is used for the wires of the cells, if the traditional method of printing silver paste is adopted, with the continuous expansion of cell production capacity, the silver consumption of photovoltaic cells has increased sharply, causing the silver price to soar continuously, and ultimately affecting the difficulty of reducing the levelized cost of energy (LCOE), which hinders the large-scale promotion of the use of clean new energy.

[0003] Therefore, in recent years, in addition to improving efficiency, cost reduction has been the key focus in the photovoltaic industry. Although the wire width has been continuously narrowed, silver still has to be used. Therefore, the introduction of the copper electroplated grid process is the most anticipated. One of the current methods is to deposit and prepare a bottom seed layer with a vacuum device. And the challenges to be faced are twofold: one is the high cost of the vacuum deposition equipment; the other is the low utilization rate of the target materials used in vacuum deposition, resulting in material waste. These two factors have posed challenges to the popularization of the copper manufacturing process.

[0004] In addition, in one of the processes of the fine metal grid application process, a mask is used as the process for fine line patterning. In the past, a photosensitive mask that can be exposed was used for fine line formation, and through the exposure and development process, the areas to be electroplated of the fine grids (≤15um) were exposed. And after the electroplating process is completed, the mask is removed. The material cost of the mask is also one of the obstacles to reducing the cost of metal grids.

[0005] Therefore, this application specifically proposes to use a packaging material that can be exposed and developed in combination with electroplating to prepare a cell structure with fine line metal grids, so as to achieve both fine line formation, thereby increasing the light-receiving area, that is, increasing parameters such as short-circuit current Isc and fill factor FF, and then achieving the purpose of increasing the conversion efficiency of the cell, and moreover, there is no need to remove the packaging material. Finally, this special packaging material can protect the side height surface of the copper metal grid from oxidation, and for the prepared metal grid with a convex dome-shaped arc structure, the exposed part can be further subjected to electroplating tin process for more complete anti-oxidation protection. It can be said to kill multiple birds with one stone and truly achieve the purpose of improving efficiency and reducing costs.

[0006] Therefore, how to propose a cell with a permanently coverable and patternable molecular packaging module is the key point of the invention in this case. Summary of the Invention

[0007] This application provides a novel cell structure and a preparation method thereof, which solve the technical problems of high production cost and low conversion efficiency of existing photovoltaic cells.

[0008] In order to solve at least one of the above technical problems, the technical solution adopted in this application is:

[0009] A novel battery cell structure, comprising:

[0010] A silicon substrate having conductive layers on both sides thereof;

[0011] The packaging film is constructed on the conductive layers on both sides of the silicon substrate and patterned to obtain the gate line grooves;

[0012] A gate line layer, which is arranged in a gate line groove in the packaging film;

[0013] The protection layer is arranged outside the gate line layer and wraps the gate line layer therein.

[0014] Further, the packaging film is constructed as a non-conductive packaging module structure;

[0015] Preferably, the packaging film has a thickness of 5-50 um.

[0016] Furthermore, the gate line layer includes a bottom seed layer close to the conductive layer and a metal gate line disposed on the bottom seed layer;

[0017] Preferably, the thickness of the bottom seed layer is 0.1-3 um.

[0018] Furthermore, the top of the metal grid line protrudes from the packaging film, and the thickness of the metal grid line exceeding the packaging film is 5-50% of the thickness of the packaging film;

[0019] Preferably, the outer edge of the metal grid line is disposed on the packaging film.

[0020] Furthermore, the top of the metal grid line is constructed as a curved surface structure;

[0021] Preferably, the protective layer is adapted to the top curved surface structure of the metal grid line, and the outer edge of the protective layer is mounted on the packaging film;

[0022] Preferably, the protective layer has a thickness of 0.1-3 um.

[0023] A method for preparing the novel battery cell structure as described above comprises the following steps:

[0024] obtaining a silicon substrate having a conductive layer;

[0025] Packaging films are respectively prepared on two sides of the silicon substrate having the conductive layer;

[0026] Performing patterning operations on the packaging film to obtain front gate line grooves and back gate line grooves;

[0027] Sequentially preparing a bottom seed layer and a metal gate line in the front gate line groove and the back gate line groove;

[0028] Prepare a corresponding protective layer based on the metal grid line structure;

[0029] After cleaning and drying, a battery cell with a permanent covering and graphic packaging film structure is obtained.

[0030] Furthermore, when preparing the packaging film, it includes:

[0031] First, a layer of liquid molecular polymer coating is printed and coated on one side of a silicon substrate having a conductive layer, and the coating layer on the side is dried and cured;

[0032] Then a layer of molecular polymer coating is printed on the other side of the silicon substrate, and the coating layer on this side is dried and cured;

[0033] Finally, a double-sided packaging film is obtained.

[0034] Furthermore, the coating for the encapsulation film is composed of one or more of POE, EVA, EPE, PI, a film former, a photosensitizer, a solvent, a leveling agent or a defoaming agent; the coating may be a liquid photosensitive mask material or a patternable molecular polymer in sheet form.

[0035] Furthermore, when patterning operations are performed on the packaging film, the cured packaging films on both sides are exposed and developed, respectively, wherein:

[0036] The laser intensity used for exposure is 60-220mj / cm 2 , laser wavelength is 355-410nm;

[0037] The solution used for development is sodium bicarbonate with a volume concentration ratio of 1-5%, the development temperature is 25-40°C, the development time is 80-180s, and the solution spraying pressure is 1.0-2.5Kg / cm 2 ;

[0038] The opening width of the gate line groove is obtained to be 10-50um.

[0039] Furthermore, the bottom seed layer and the metal gate line are prepared by electrolytic reduction, wherein the material used for the bottom seed layer includes a single metal layer or a composite metal layer formed of nickel, copper and silver metals;

[0040] The protective layer of the metal grid line is prepared by electrolytic reduction process, and the material used for the protective layer includes tin or silver metal.

[0041] A new cell structure designed in this application is used to design a new permanent-covering patternable molecular encapsulation film module, which can not only be used as a mask layer for preparing the metal wire layer by electroplating, but also does not affect the high light-transmitting transparent conductive layer characteristics of the final product. At the same time, it can replace the existing expensive mask materials, and there is no need to vacuum deposit the bottom seed layer, remove the mask or etch the bottom seed layer. The process flow is simple, and the metal grid line can be fully protected from oxidation, saving equipment investment, reducing production and operation costs, and improving the conversion efficiency of the cell. This application also proposes a preparation method for a new cell structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 is a schematic diagram of a novel battery cell structure in this application;

[0043] Figure 2 is a schematic diagram of a silicon substrate with a conductive layer in the present application;

[0044] Figure 3 is a schematic diagram of preparing a packaging film in this application;

[0045] Figure 4 is a schematic diagram of a gate line trench obtained after patterning the packaging film in the present application;

[0046] Figure 5 is a schematic diagram of preparing a bottom seed layer in this application;

[0047] Figure 6 is a schematic diagram of preparing metal grid lines in this application;

[0048] Figure 7 It is a flow chart of the method for preparing the battery cell structure in this application.

[0050] In the figure:

[0051] 10. Silicon substrate 11. Mother wafer 12. n+ layer

[0052] 13. p+ layer 20, conductive layer 30, packaging film

[0053] 40, gate line layer 41, bottom seed layer 42, metal gate line

[0054] 50, protective layer 100, battery cell DETAILED DESCRIPTION

[0055] The present application is described in detail below with reference to the accompanying drawings and specific embodiments.

[0056] This embodiment proposes a new type of battery cell structure, such as Figure 1As shown, it includes a silicon substrate 10 with a conductive layer 20 on both sides, and a packaging film 30 for permanent patterning operation is provided on the conductive layer 20 on both sides. On the packaging film 30, after patterning to obtain a gate line groove, a gate line layer 40 composed of a bottom seed layer 41 and a metal gate line 42 is directly deposited, and then a protective layer 50 is provided on the outside of the metal gate line 42, thereby forming a new type of battery cell 100 structure.

[0057] like Figure 2 As shown, the silicon substrate 10 includes a mother substrate 11, an n+ layer 12 grown on the front side of the mother substrate 11, and a p+ layer 13 grown on the back side of the mother substrate 11. A conductive transparent conductive layer 20 is simultaneously prepared on both sides of the silicon substrate 10. The conductive layer 20 is a structure made of an oxide metal ceramic material, commonly known as a transparent conductive film layer (Transparent Conducting Oxide; TCO). Its materials include but are not limited to tin-doped indium oxide film, tungsten-doped indium oxide film, aluminum-doped indium oxide film, titanium-doped indium oxide film, cesium-doped indium oxide film, aluminum-doped zinc oxide, gallium-doped zinc oxide, aluminum-gallium-doped zinc oxide, tin oxide SnOx, etc., and a thin film material formed by using one or a combination of the above materials in different proportions. Its deposition thickness is 20-150nm.

[0058] like Figure 3 As shown, a liquid photosensitive mask coating or a patternable molecular polymer coating in the form of a sheet is printed onto the conductive layer 20 on both sides of the silicon substrate by a printing coating process, forming a packaging film 30 that can be used as a mask to protect the conductive layer 20 and can be patterned, and then a patterning operation is performed on the packaging film 30 to obtain a gate line groove. This packaging film 30 not only does not affect the high light transmittance and transparent conductive properties of the final product, but also can replace the existing expensive mask materials (for example, dry film or wet photoresist), can be directly used as a mask layer for electroplating metal wires on the conductive layer, and can also be directly used to prepare metal gate lines in the patterned gate line grooves, and there is no need to perform vacuum deposition of the bottom seed layer, film removal, and etching of the bottom seed layer. The preparation method is simple and the operation process steps are shortened. At the same time, a battery cell with the same performance as the prior art can be obtained, achieving the technical effect of saving equipment investment and reducing production and operation costs.

[0059] Furthermore, the components of the coating of the packaging film 30 include but are not limited to liquid photosensitive mask materials composed of POE, EVA, EPE, PI, film-forming agents, photosensitizers, solvents, leveling agents and defoaming agents, or patternable molecular polymers in sheet form, which are finally formed into a liquid coatable form or a printing paste in sheet form.

[0060] First, a coating is printed on one side of the silicon substrate 10 to obtain a liquid packaging film 30, which is then dried and solidified to form a solid packaging film 30. Then, a coating is printed on the other side of the silicon substrate 10, which is then dried and solidified to turn the liquid into a solid state, thereby obtaining a double-sided packaging film 30 structure. The packaging film 30 is constructed as a non-conductive packaging module structure, and its thickness H is 5-50um.

[0061] like Figure 4 As shown, the packaging film 30 on both sides is then exposed and developed until the conductive layer is exposed to obtain the gate line groove, that is, the packaging film 30 structure after patterning is obtained. Among them, the distribution of the gate line groove on the front side is different from the distribution pattern of the gate line groove on the back side; and the opening width of the gate line groove is 10-50um. This packaging material that can be exposed and developed can be used in combination with electroplating to prepare a cell structure with fine metal grid lines, thereby achieving thinning, and then the light receiving area can be increased, and the current Isc, fill factor FF and other parameters can be increased, so as to achieve the purpose of improving the conversion efficiency of the cell, and there is no need to remove the packaging film material. In addition, this special packaging material can protect the side height surface of the copper metal grid line from oxidation.

[0062] like Figure 5-6 As shown, the gate line layer 40 is arranged in the gate line groove in the packaging film 30, including a bottom seed layer 41 close to the conductive layer 20 and a metal gate line 42 disposed on the bottom seed layer 41. Preferably, the bottom seed layer 41 has a thickness of 0.1-3 um, wherein the preparation material of the bottom seed layer 41 includes but is not limited to a single layer of metal or a composite layer of metal composed of metals such as nickel, copper and silver.

[0063] The metal grid line 42 is made of copper wire, and its top is protruding from the packaging film 30. The outer edge of the metal grid line 30 extends outward and is placed on the top of the packaging film 30. Figure 6 It is obvious that the structure of the metal gate line 42 protruding from the packaging film 30 is a convex dome-shaped arc surface structure, and its maximum width is greater than the width placed in the gate line groove. Preferably, the thickness H1 of the metal gate line 42 exceeding the packaging film is 5-50% of the thickness H of the packaging film 30. The prepared metal gate line with a convex dome-shaped arc surface structure is subjected to an electroplating tin process on the portion of the metal gate line exposed from the packaging film, that is, on the arc surface structure to obtain a protective layer, so that it can be more completely protected against oxidation.

[0064] like Figure 7As shown, the protective layer 50 is arranged on the outside of the gate line layer 40, that is, on the outside of the metal gate line 42, and wraps the metal gate line 42 therein. The protective layer 50 is adapted to the top curved surface structure of the metal gate line 42, and the outer edge of the protective layer 50 is mounted on the top surface of the packaging film 30. Preferably, the thickness of the protective layer 50 is 0.1-3um. The materials used for the protective layer 50 include, but are not limited to, tin, silver and other materials.

[0065] A method for preparing the novel battery cell structure as described above, Figure 7 As shown, the steps include:

[0066] S1. Obtain a silicon substrate having a conductive layer.

[0067] like Figure 2 As shown, firstly, an n+ layer 12 is obtained on the front side of the mother substrate 11, and then a p+ layer 13 is obtained on the back side thereof; then, a conductive transparent conductive layer 20 is prepared on both sides of the silicon substrate 10 simultaneously. Among them, the conductive layer 20 is a structure made of an oxide metal ceramic material, commonly known as a transparent conductive film layer (Transparent Conducting Oxide; TCO). Its materials include but are not limited to tin-doped indium oxide film, tungsten-doped indium oxide film, aluminum-doped indium oxide film, titanium-doped indium oxide film, cesium-doped indium oxide film, aluminum-doped zinc oxide, gallium-doped zinc oxide, aluminum-gallium-doped zinc oxide, tin oxide SnOx, etc., and a thin film material formed by using one or a combination of the above materials in different proportions. Its deposition thickness is 20-150nm.

[0068] S2. Prepare packaging films on both sides of the silicon substrate having the conductive layer.

[0069] like Figure 3 As shown, a layer of liquid molecular polymer coating is first printed and coated on one side of the silicon substrate 10 having a conductive layer 20, and the coating layer on the side is dried and cured. Then, a layer of molecular polymer coating is printed on the other side of the silicon substrate 10, and the coating layer on the side is dried and cured, and finally a double-sided packaging film 30 is obtained, and the thickness of the butterfly packaging film 30 is 5-50um.

[0070] The coating for the packaging film 30 is composed of a liquid photosensitive mask material or a sheet-like patternable molecular polymer composed of one or more of POE, EVA, EPE, PI, a film former, a photosensitizer, a solvent, a leveling agent or a defoaming agent, and finally forms a liquid coatable form or a sheet-like printing paste.

[0071] S3. Performing graphic operations on the packaging film to obtain front gate line grooves and back gate line grooves.

[0072] like Figure 4As shown, the cured packaging film 30 on both sides is exposed and developed respectively, wherein an exposure machine is used to expose the front side first and then the back side, and the laser intensity used during exposure is 60-220mj / cm 2 , the laser wavelength is 355-410nm.

[0073] In this embodiment, the packaging film 30 is used as a mask layer to replace the existing expensive mask material, and the non-gate line groove patterns on the front and back sides are exposed by the exposure machine in sequence. Then the silicon substrate is controlled to be loaded into the developer, and both sides are developed synchronously, so that the packaging film 30 at the strip gate line groove that is not exposed is washed away by the developer, thereby exposing the conductive layer 20 on the strip gate line groove.

[0074] The developing solution is sodium bicarbonate with a volume concentration ratio of 1-5%, the developing temperature is 25-40°C, the developing time is 80-180s, and the solution spraying pressure is 1.0-2.5Kg / cm 2 , and finally the opening width of the gate line groove is 10-50um.

[0075] The packaging material that can be exposed and developed is used in conjunction with electroplating to prepare a cell structure with fine metal grid lines, so as to achieve thinning, thereby increasing the light receiving area, that is, increasing the current Isc, fill factor FF and other parameters, and then achieving the purpose of improving the conversion efficiency of the cell, and there is no need to remove the packaging material. There are also packaging materials with this characteristic that can also protect the side height surface of the copper metal grid line from oxidation.

[0076] S4, sequentially preparing a bottom seed layer and a metal gate line in the front gate line groove and the back gate line groove.

[0077] like Figure 5 As shown, on both sides of the silicon substrate 10, a bottom seed layer 41 is first prepared on the conductive layer 20 by electrolytic reduction, and the electroplating thickness is 0.1-3um. The material used for the bottom seed layer 41 includes but is not limited to a single metal layer or a composite metal layer formed by metals such as nickel, copper and silver.

[0078] like Figure 6 As shown, the metal gate line 42 is prepared by electrolytic reduction method, and the metal gate line 42 is made of copper material. The top of the metal gate line 42 is protruded from the packaging film 30, and the outer edge of the metal gate line 30 extends outward and is placed on the top of the packaging film 30. The structure of the metal gate line 42 protruding from the packaging film 30 is a curved surface structure, and its maximum width is greater than the width placed in the gate line groove. Preferably, the thickness H1 of the metal gate line 42 exceeding the packaging film is 5-50% of the thickness H of the packaging film 30.

[0079] S5. Prepare a corresponding protective layer based on the metal gate line structure.

[0080] like Figure 7 As shown, a protective layer 50 of the metal grid line 42 is prepared by an electrolytic reduction process, and the materials used for the protective layer 50 include but are not limited to tin or silver metal. The protective layer 50 is arranged on the outside of the metal grid line 42 and wraps the metal grid line 42 therein. The protective layer 50 is adapted to the top curved surface structure of the metal grid line 42, and the outer edge of the protective layer 50 is mounted on the top surface of the packaging film 30. Preferably, the thickness of the protective layer 50 is 0.1-3um.

[0081] For the metal grid line 42, combined with the anti-oxidation protection of the side height surface by the packaging film, the electroplating tin process is applied to the raised dome-shaped arc surface structure exposed from the packaging film to obtain a protective layer adapted to its dome-shaped raised surface structure, thereby providing it with more complete anti-oxidation protection.

[0082] S6. After cleaning and drying, a battery cell having a permanent covering and patternable packaging film structure is obtained.

[0083] Finally, the silicon substrate with the protective layer 50 is cleaned and dried to obtain a new type of battery cell 100 with a permanent covering and patternable packaging film structure.

[0084] In order to enable those skilled in the art to further understand the method of the present invention, the technical solution of the present invention will be explained in detail below in conjunction with specific embodiments. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments.

[0085] S1. Obtain a silicon substrate 10 having a conductive layer 20.

[0086] S2. On both sides of the silicon substrate 10 with the conductive layer 20, a liquid molecular polymer coating is printed on the front side of the silicon substrate 10 by a printing coating process, and then dried at 65-70°C for 3 minutes, so that the surface of the packaging film 30 on the front side does not stick. Repeat this process, print a layer of liquid molecular polymer coating on the back side of the silicon substrate 10, and then dry the side at 65-70°C for 3 minutes. Finally, the thickness of the double-sided packaging film 30 is 10um.

[0087] S3, respectively expose both sides of the packaging film 30, that is, first control it to be placed in an exposure machine, first expose the non-grid line groove pattern on the front side, and then expose the non-grid line groove pattern on the back side, and the laser intensity during exposure is 60mj / cm 2 , the laser wavelength is 355nm, in order to transfer the gate line groove pattern.

[0088] Then the silicon substrate is loaded into the developer and developed simultaneously on both sides in sodium bicarbonate with a volume concentration ratio of 2.5%. The development temperature is 35°C, the development time is 180s, and the solution spraying pressure is 2.5Kg / cm 2 , so that the packaging film 30 of the strip-shaped gate line groove that is not exposed is washed away by the developer and the conductive layer 20 is exposed, and finally a strip-shaped gate line groove with an opening width of 10-50 um is obtained.

[0089] S4. On both sides of the silicon substrate 10, a bottom seed layer 41 with a thickness of 2 μm is first prepared on the conductive layer 20 by electrolytic reduction, and the bottom seed layer 41 is a nickel metal layer. Then, a copper metal gate line 42 is prepared by electrolytic reduction, and the deposition thickness of the metal gate line 42 is 10 μm. The thickness of the metal gate line 42 exceeding the packaging film is 2 μm.

[0090] S5 , preparing the protective layer 50 of the metal gate line 42 by electrolytic reduction process, and the protective layer 50 is made of tin material and has a thickness of 2 um.

[0091] S6. The silicon substrate is then cleaned and dried to obtain a new type of battery cell 100 with a permanent covering and patternable packaging film structure.

[0092] A new cell structure designed in this application is used to design a new permanently covered patternable molecular encapsulation film module, which can not only be used as a mask layer for preparing the metal wire layer for electroplating, but also does not affect the high light transmittance transparent conductive layer characteristics of the final product. At the same time, it can replace the existing expensive mask materials, and there is no need to vacuum deposit the bottom seed layer, remove the mask or etch the bottom seed layer. The process flow is simple, and the metal grid line can be fully protected from oxidation, saving equipment investment, reducing production and operation costs, and improving the conversion efficiency of the cell. This application also proposes a preparation method for a new cell structure.

[0093] The above detailed description of the embodiments of the present application is only a preferred embodiment of the present application and cannot be considered to limit the scope of implementation of the present application. All equivalent changes and improvements made within the scope of the present application should still fall within the scope of the patent coverage of the present application.

Claims

1. A novel battery cell structure, characterized in that: include: A silicon substrate having conductive layers on both sides thereof; The packaging film is constructed on the conductive layers on both sides of the silicon substrate and patterned to obtain the gate line grooves; A gate line layer, which is arranged in a gate line groove in the packaging film; The protection layer is arranged outside the gate line layer and wraps the gate line layer therein.

2. A novel battery cell structure according to claim 1, characterized in that: The packaging film is constructed as a non-conductive packaging module structure; Preferably, the packaging film has a thickness of 5-50 um.

3. A novel battery cell structure according to claim 1 or 2, characterized in that: The gate line layer includes a bottom seed layer close to the conductive layer and a metal gate line disposed on the bottom seed layer; Preferably, the thickness of the bottom seed layer is 0.1-3 um.

4. A novel battery cell structure according to claim 3, characterized in that: The top of the metal grid line is protruded from the packaging film, and the thickness of the metal grid line exceeding the packaging film is 5-50% of the thickness of the packaging film; Preferably, the outer edge of the metal grid line is disposed on the packaging film.

5. A novel battery cell structure according to any one of claims 1-2 and 4, characterized in that: The top of the metal grid line is constructed as a curved surface structure; Preferably, the protective layer is adapted to the top curved surface structure of the metal grid line, and the outer edge of the protective layer is mounted on the packaging film; Preferably, the protective layer has a thickness of 0.1-3 um.

6. A method for preparing a novel battery cell structure according to any one of claims 1 to 5, characterized in that the steps include: obtaining a silicon substrate having a conductive layer; Packaging films are respectively prepared on two sides of the silicon substrate having the conductive layer; Performing patterning operations on the packaging film to obtain front gate line grooves and back gate line grooves; Sequentially preparing a bottom seed layer and a metal gate line in the front gate line groove and the back gate line groove; Prepare a corresponding protective layer based on the metal grid line structure; After cleaning and drying, a battery cell with a permanent covering and graphic packaging film structure is obtained.

7. The method for preparing a novel battery cell structure according to claim 6, characterized in that: The preparation of the packaging film includes: First, a layer of liquid molecular polymer coating is printed and coated on one side of a silicon substrate having a conductive layer, and the coating layer on the side is dried and cured; Then a layer of molecular polymer coating is printed on the other side of the silicon substrate, and the coating layer on this side is dried and cured; Finally, a double-sided packaging film is obtained.

8. The method for preparing a novel battery cell structure according to claim 7, characterized in that: The coating for the packaging film is composed of one or more of POE, EVA, EPE, PI, a film former, a photosensitizer, a solvent, a leveling agent or a defoamer; the coating can be a liquid photosensitive mask material or a patternable molecular polymer in sheet form.

9. A method for preparing a novel battery cell structure according to claim 7 or 8, characterized in that: When patterning operations are performed on the packaging film, the cured packaging films on both sides are exposed and developed, respectively, wherein: The laser intensity used for exposure is 60-220mj / cm 2 , laser wavelength is 355-410nm; The solution used for development is sodium bicarbonate with a volume concentration ratio of 1-5%, the development temperature is 25-40°C, the development time is 80-180s, and the solution spraying pressure is 1.0-2.5Kg / cm 2 ; The opening width of the gate line groove is obtained to be 10-50um.

10. The method for preparing a novel battery cell structure according to claim 9, characterized in that: The bottom seed layer and the metal grid line are prepared by electrolytic reduction method, wherein the material used for the bottom seed layer includes a single metal layer or a composite metal layer formed by nickel, copper and silver metals; The protective layer of the metal grid line is prepared by electrolytic reduction process, and the material used for the protective layer includes tin or silver metal.

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