Image sensor, preparation method of image sensor, electronic equipment and vehicle

Abstract

The invention discloses an image sensor, a preparation method of the image sensor, electronic equipment and a vehicle, the image sensor comprises a substrate, a floating diffusion node and a barrier layer, the floating diffusion node is located in the substrate, and the floating diffusion node extends into the substrate from the upper surface of the substrate along a first direction perpendicular to the substrate; and the barrier layer is positioned on one side, far away from the substrate, of the floating diffusion node, is in contact with the bottom of the floating diffusion node and is used for preventing doping of the floating diffusion node from diffusing into the substrate. According to the image sensor, the barrier layer is arranged below the floating diffusion node, so that the node capacitance of the floating diffusion node can be greatly reduced, the dynamic range is expanded, more image details can be obtained, and the image quality under dark light can also be ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of image acquisition, and in particular to an image sensor, a method for preparing the image sensor, an electronic device and a vehicle. Background Art

[0002] For image sensors, the dynamic range formula is: DR = 20·log 10 (N MAX / n floor ), where DR stands for dynamic range, N MAX represents the full well capacity, n floor Represents the background noise. Therefore, there are two main ways to improve its dynamic range: (1) increase the full well capacity; (2) reduce the noise and reduce the value of the detectable signal. In the related art, most of them use DCG+HDR technology to increase the full well capacity so that the dynamic range can be expanded in the direction of bright light acquisition, but the image quality under dark light conditions cannot be guaranteed. In order to improve the image quality under dark light conditions, in some schemes, the parasitic capacitance of the image sensor is reduced by setting a stepped gate structure, but the proportion of parasitic capacitance to FD capacitance is relatively low, and the ability to improve the dynamic range by reducing parasitic capacitance is limited. Summary of the invention

[0003] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, one purpose of the present invention is to provide an image sensor that can greatly reduce the node capacitance of the floating diffusion node itself, thereby improving the dynamic range, ensuring the image quality in dark light scenes, and having a wider range of applicable scenes.

[0004] A second objective of the present invention is to provide a method for preparing an image sensor.

[0005] A third objective of the present invention is to provide an electronic device.

[0006] A fourth object of the present invention is to provide a vehicle.

[0007] In order to solve the above problems, an embodiment of the first aspect of the present invention provides an image sensor, comprising: a substrate; a floating diffusion node, the floating diffusion node is located in the substrate, and the floating diffusion node extends from the upper surface of the substrate to the inside of the substrate along a first direction perpendicular to the substrate; a blocking layer, the blocking layer is located on a side of the floating diffusion node away from the substrate and in contact with the bottom of the floating diffusion node, and is used to block the doping of the floating diffusion node from diffusing into the interior of the substrate.

[0008] According to the image sensor of the embodiment of the present invention, a blocking layer is provided on the side of the floating diffusion node away from the substrate. The blocking layer is used to block the doping of the floating diffusion node from diffusing into the interior of the substrate. This can greatly reduce the junction capacitance of the floating diffusion node itself. The junction capacitance of the floating diffusion node itself is inversely proportional to the conversion gain of the image sensor, that is, the conversion gain is greatly increased, thereby improving the dynamic range. The image quality in dark light scenes can also be guaranteed, and the applicable scenes are wider.

[0009] In some embodiments, the barrier layer is an insulating layer.

[0010] In some embodiments, the substrate is a silicon substrate; and the insulating layer is a buried silicon oxide layer prepared by SIMOX (Separation by Implanted Oxygen) technology.

[0011] In some embodiments, the blocking layer is a doping layer; the conductivity type of the doping layer is opposite to the conductivity type of the floating diffusion node; and the doping concentration of the doping layer is less than the doping concentration of the floating diffusion node.

[0012] In some embodiments, the doping concentration of the doping layer is one order of magnitude or two orders of magnitude smaller than the doping concentration of the floating diffusion node.

[0013] In some embodiments, the image sensor further includes: a photoelectric conversion unit, a first drain region, a source region, and a second drain region, wherein the photoelectric conversion unit, the first drain region, the source region, and the second drain region are arranged at intervals along a second direction parallel to the substrate, the first drain region is suitable for being connected to a power supply terminal, and the second drain region is suitable for outputting an image signal.

[0014] In some embodiments, the image sensor also includes: a transfer transistor, which is located on the upper surface of the substrate between the photoelectric conversion unit and the floating diffusion node, and is used to control the charge transfer of the photoelectric conversion unit; a reset transistor, which is located on the upper surface of the substrate between the floating diffusion node and the first drain region, and is used to control the reset of the floating diffusion node; a source follower transistor, which is located on the upper surface of the substrate between the first drain region and the source region, and is used to amplify the photogenerated electrical signal; a row selection transistor, which is located on the upper surface of the substrate between the source region and the second drain region, and is used to control the output of the source follower transistor.

[0015] A second aspect of the present invention provides a method for preparing an image sensor, comprising: providing a substrate; preparing a blocking layer below a corresponding floating diffusion node position of the substrate in a first direction perpendicular to the substrate; and preparing a floating diffusion node at the floating diffusion node position of the substrate, wherein the floating diffusion node extends from the upper surface of the substrate into the substrate along the first direction, and the blocking layer contacts the bottom of the floating diffusion node to prevent the doping of the floating diffusion node from diffusing into the interior of the substrate.

[0016] According to the method for preparing an image sensor according to an embodiment of the present invention, a blocking layer is prepared on the side of the floating diffusion node away from the substrate. The blocking layer can block the doping of the floating diffusion node from diffusing into the interior of the substrate, thereby greatly reducing the node capacitance of the floating diffusion node itself. The junction capacitance of the floating diffusion node itself is inversely proportional to the conversion gain of the image sensor, that is, the conversion gain is greatly increased, thereby improving the dynamic range of the image sensor, and the image quality in dark light scenes can also be guaranteed, and the applicable scenes are wider.

[0017] In some embodiments, preparing a barrier layer in a substrate includes: preparing an insulating layer in the substrate.

[0018] In some embodiments, preparing the insulating layer in the substrate includes: preparing a buried silicon oxide layer in the silicon substrate by using SIMOX technology.

[0019] In some embodiments, a buried silicon oxide layer is prepared in a silicon substrate by using a SIMOX technique, comprising: in the first direction, injecting a preset dose H of oxygen element into a region corresponding to the floating diffusion node, and performing an annealing process for a preset time t and a preset temperature T to form the buried silicon oxide layer in the silicon substrate; wherein the value of the preset dose H satisfies 1.6*10 18 cm -2 ≤H≤2.0*10 18 cm -2 The value of the preset time t satisfies 3 hours ≤ t ≤ 6 hours, and the value of the preset temperature T satisfies 1100° C. ≤ T ≤ 1350° C.

[0020] In some embodiments, preparing a barrier layer in the substrate includes: in the first direction, injecting doping particles having a conductivity type opposite to that of the floating diffusion node into a region corresponding to the floating diffusion node below the floating diffusion node to form a doping layer.

[0021] In some embodiments, the doping concentration of the doping layer is one order of magnitude or two orders of magnitude smaller than the doping concentration of the floating diffusion node.

[0022] In some embodiments, after preparing the barrier layer in the substrate, the preparation method further includes: preparing a photoelectric conversion unit, a first drain region, a source region, and a second drain region at corresponding positions in the substrate close to the upper surface of the substrate, and the first drain region, the source region, and the second drain region are arranged at intervals along a second direction parallel to the substrate.

[0023] In some embodiments, the preparation method also includes: respectively preparing a transfer transistor, a reset transistor, a source follower transistor and a row selection transistor at corresponding positions on the upper surface of the substrate, wherein the transfer transistor is located on the upper surface of the substrate between the photoelectric conversion unit and the floating diffusion node, the reset transistor is located on the upper surface of the substrate between the floating diffusion node and the first drain region, the source follower is located on the upper surface of the substrate between the first drain region and the source region, and the row selection transistor is located on the upper surface of the substrate between the source region and the second drain region.

[0024] In some embodiments, before preparing a barrier layer below the corresponding floating diffusion node position of the substrate, the preparation method further includes: preparing a shallow trench isolation structure at the corresponding position of the substrate to divide different regional positions of the substrate.

[0025] A third aspect of the present invention provides an electronic device, comprising the image sensor of the above embodiment.

[0026] According to the electronic device of the embodiment of the present invention, by adopting the above-mentioned image sensor, the node capacitance of the floating diffusion node of the image sensor itself is greatly reduced, thereby improving the dynamic range, and the image quality in dark light scenes can also be guaranteed, thereby improving the imaging quality.

[0027] A fourth aspect of the present invention provides a vehicle comprising at least one image sensor according to the above-mentioned embodiment.

[0028] According to the vehicle of the embodiment of the present invention, by adopting the above-mentioned image sensor, the node capacitance of the floating diffusion node of the image sensor itself is greatly reduced, thereby improving the dynamic range, and the image quality in dark light scenes can also be guaranteed, so that the vehicle can obtain clear external environment images in various situations, providing data support for control strategies based on image information.

[0029] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0031] Figure 1 is a schematic diagram of an image sensor according to an embodiment of the present invention;

[0032] Figure 2 is a schematic diagram of an image sensor according to another embodiment of the present invention;

[0033] Figure 3 is a flow chart of a method for preparing an image sensor according to an embodiment of the present invention;

[0034] Figure 4 is a flow chart of a SIMOX technology implementation according to an embodiment of the present invention;

[0035] Figure 5 is a schematic diagram of a SIMOX technology implementation according to an embodiment of the present invention;

[0036] Figure 6 (1), (2) and (3) are schematic diagrams of conventional structure and SIMOX technology structure simulation and capacitance simulation curves according to an embodiment of the present invention;

[0037] Figure 7 (1), (2) and (3) are schematic diagrams of simulation curves of a conventional structure and a doped isolation structure and a capacitance simulation curve according to an embodiment of the present invention;

[0038] Figure 8 is a structural block diagram of an electronic device according to an embodiment of the present invention;

[0039] Fig. 9 is a structural block diagram of a vehicle according to an embodiment of the present invention.

[0040] Reference numerals:

[0041] Vehicle 300; electronic device 200; image sensor 100;

[0042] Substrate 101 ; floating diffusion node 102 ; barrier layer 103 ; photoelectric conversion unit 104 ; first drain region 105 ; source region 106 ; second drain region 107 ; transfer transistor 108 ; reset transistor 109 ; source follower transistor 110 ; and row selection transistor 111 . DETAILED DESCRIPTION

[0043] Embodiments of the present invention are described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. Embodiments of the present invention are described in detail below.

[0044] A first aspect of the present invention provides an image sensor, such as Figure 1 As shown, the image sensor 100 includes a substrate 101 , a floating diffusion node 102 and a barrier layer 103 .

[0045] The floating diffusion node 102 is located in the substrate, and extends from the upper surface of the substrate 101 to the inside of the substrate along a first direction perpendicular to the substrate 101 ; the floating diffusion node 102 can be understood as a capacitor for storing electrons generated by photoelectric conversion.

[0046] The blocking layer 103 is located on a side of the floating diffusion node 102 away from the substrate 101 and is in contact with the bottom of the floating diffusion node 102. In an embodiment, the blocking layer 103 can be either a physical blocking layer or an electrical blocking layer, which is used to block the doping of the floating diffusion node from diffusing into the interior of the substrate, thereby achieving the purpose of reducing the node capacitance of the floating diffusion node itself, and the blocking layer 103 is in contact with the bottom of the floating diffusion node 103 and will not affect the current transmission on both sides of the floating diffusion node.

[0047] Specifically, the capacitance of the floating diffusion node 102 mainly includes five parts: the PN junction capacitance Cj of the FD itself, the overlap capacitance Cov of the FD and the TX tube and the RST tube, a MOS capacitor Csf attached to the SF connected to the FD, and the metal parasitic capacitance Cw on the metal line connecting the FD and the SF. Among them, except for the PN junction capacitance itself, the rest are parasitic capacitances. In the related art, most of the conversion gain is improved by reducing the parasitic capacitance. However, in the FD capacitance composition, Cj accounts for more than 70% of the total capacitance. In the present application, it is precisely by preparing a blocking layer 103 under the FD node, and blocking the doping of the floating diffusion node from diffusing into the interior of the substrate through the blocking layer 103, that the junction capacitance of the FD node itself can be reduced, thereby reducing Cj without affecting other devices, significantly reducing the size of the total capacitance and thus improving the conversion gain value.

[0048] According to the image sensor 100 of the embodiment of the present invention, a blocking layer 103 is prepared on the side of the floating diffusion node 102 away from the substrate 101. The blocking layer 103 can block the doping of the floating diffusion node 102 from diffusing into the interior of the substrate 101, thereby greatly reducing the node capacitance of the floating diffusion node 102 itself. The node capacitance of the floating diffusion node 102 itself is inversely proportional to the conversion gain of the image sensor, thereby improving the dynamic range of the image sensor, and the image quality in dark light scenes can also be guaranteed, and the application scenario range is wider.

[0049] In some embodiments, the blocking layer 103 is an insulating layer, which blocks the doping of the floating diffusion node 102 from diffusing into the substrate 101 through physical isolation, thereby reducing the junction capacitance of the floating diffusion node 102 itself.

[0050] Specifically, the blocking layer 103 is an insulating layer, which can play a role of physical isolation. The junction capacitance of the floating diffusion node is effectively reduced through physical isolation, thereby improving the conversion gain and the dynamic range of the image sensor.

[0051] In some embodiments, the substrate is a silicon substrate; an insulating layer may be prepared under the floating diffusion node 102 by using SIMOX (Separation by Implanted Oxygen) technology, that is, the insulating layer may be a buried silicon oxide layer prepared by SIMOX technology.

[0052] Among them, SIMOX technology is a technology of silicon on insulator (SOI), which introduces a buried oxide layer between the top silicon and the back substrate. For example, a SIMOX SOI wafer implants high-dose oxygen ions into single-crystal silicon under high temperature conditions to form an isolation layer, and forms a new semiconductor material with a three-layer structure of top silicon, silicon dioxide buried layer, and bulk silicon under ultra-high temperature annealing conditions. In addition, the applicant understands that there is no relevant literature record of the application of SIMOX technology in the preparation of image sensors.

[0053] Specifically, silicon substrate is a semiconductor material that uses silicon as a base layer for growing other semiconductor materials. Silicon is a common semiconductor material that is widely used in the semiconductor integrated circuit industry. It has a complete industrial chain, and the price of silicon substrates is cheap, large in size, and the device process is mature. The SIMOX technology in the advanced silicon-on-insulator manufacturing process is used to prepare the insulating layer as a buried silicon oxide layer. For example, the original substrate silicon is a single crystal silicon material, and in the embodiment of the present invention, the SIMOX technology can be used to convert part of the silicon material into silicon dioxide as a blocking layer 103 to convert the FD fully depleted capacitance into a partially depleted capacitance, so as to prevent the FD doping from diffusing into the substrate, and to reduce the junction capacitance of the FD, thereby improving the conversion gain and improving the dynamic range.

[0054] In some embodiments, the barrier layer 103 may be a doped layer; the conductivity type of the doped layer is opposite to that of the floating diffusion node, so that the original gradual junction of the floating diffusion node 102 is transformed into an abrupt junction, reducing the junction capacitance area, that is, greatly reducing the junction capacitance of the floating diffusion node 102 itself, thereby improving the conversion gain value, and achieving the effect of improving the dynamic range of the image sensor. In addition, the doping concentration of the doped layer is less than the doping concentration of the floating diffusion node, which can prevent the doping layer from affecting the floating diffusion node 102.

[0055] For example, the floating diffusion node 102 is N-type, and high-dose P-type doping is implemented below the floating diffusion node 102, that is, a P+ doping layer is prepared on the side of the floating diffusion node 102 away from the substrate surface, thereby forming a mutation at the junction of the floating diffusion node 102 and the P+ doping layer, that is, the gradual junction of the floating diffusion node 102 is transformed into a sudden junction, reducing the diffusion of electrons from the floating diffusion node to the substrate to reduce its junction capacitance value, thereby achieving the effect of improving the conversion gain, thereby improving the dynamic range of the image sensor.

[0056] In this embodiment, compared with the insulating layer, the blocking layer 103 is changed into a P-type doping layer, that is, the physical isolation is changed into electrical isolation. The method of P-type doping of the doping layer is most compatible with the existing production process of image sensors and has the smallest process variation.

[0057] In some embodiments, the doping concentration of the doping layer is one or two orders of magnitude lower than the doping concentration of the floating diffusion node 102. That is, the doping concentration of the doping layer is configured based on the doping concentration of the floating diffusion node 102 itself, which can achieve the effect of transforming the gradual junction of the floating diffusion node 102 into an abrupt junction, thereby reducing the diffusion of electrons from the floating diffusion node to the substrate to reduce its junction capacitance value, thereby achieving the effect of improving the conversion gain, and will not affect the original performance of the floating diffusion node 102.

[0058] In some embodiments, Figure 1 As shown, the image sensor 100 further includes: a photoelectric conversion unit 104 , a first drain region 105 , a source region 106 and a second drain region 107 .

[0059] The photoelectric conversion unit 104, the first drain region 105, the source region 106 and the second drain region 107 are arranged in a second direction parallel to the substrate. The first drain region 105 is suitable for connecting to a power supply terminal, and the second drain region is suitable for outputting image signals.

[0060] Specifically, the second direction can be understood as a direction parallel to the substrate, the first drain region 105 and the second drain region 107 play an emission role, the second drain region 107 outputs an image signal, and the source region 106 plays a collector role to achieve the basic image acquisition function of the image sensor.

[0061] In some embodiments, Figure 1 As shown, the image sensor 100 further includes a transfer transistor 108 , a reset transistor 109 , a source follower transistor 110 , and a row selection transistor 111 .

[0062] Among them, the transfer transistor 108 is located on the upper surface of the substrate between the photoelectric conversion unit and the floating diffusion node, and is used to control the charge transfer of the photoelectric conversion unit; the reset transistor 109 is located on the upper surface of the substrate between the floating diffusion node and the first drain region, and is used to control the reset of the floating diffusion node; the source follower 110 is located on the upper surface of the substrate between the first drain region and the source region, and is used to amplify the photogenerated electrical signal; the row selection transistor 111 is located on the upper surface of the substrate between the source region and the second drain region, and is used to control the output of the source follower transistor.

[0063] Specifically, the photoelectric conversion unit 104 may be a photodiode, which converts the optical signal into an electrical signal, the transfer transistor 108 controls the charge transfer of the photoelectric conversion unit to the floating diffusion node 102, the reset transistor 109 controls the resetting of the floating diffusion node, the source follower transistor 110 amplifies the photogenerated electrical signal, and the row selection transistor 111 controls the output of the electrical signal amplified by the source follower transistor 111. Thus, the control of the image acquisition process of the image sensor and the transmission of the image signal are realized.

[0064] Based on the structure of the image sensor of the above embodiment, Figure 3 A method for preparing an image sensor according to an embodiment of a second aspect of the present invention is described. The method at least includes steps S1 to S3.

[0065] Step S1, providing a substrate.

[0066] Specifically, a substrate is provided, and image sensors and other devices are prepared based on the substrate. The substrate may be a silicon substrate. Silicon is a common semiconductor material and is widely used in the semiconductor integrated circuit industry. It has a complete industrial chain, and the silicon substrate is cheap, available in large sizes, and has mature device technology.

[0067] Step S2, preparing a barrier layer below the corresponding floating diffusion node position of the substrate in a first direction perpendicular to the substrate.

[0068] Specifically, after providing the substrate, a blocking layer is prepared below the corresponding floating diffusion node position of the substrate. The blocking layer may be an insulating layer or a doped layer. The blocking layer is an insulating layer that plays an isolation role and improves the conversion gain through physical isolation. The blocking layer is a doped layer and high-dose P-type doping is implemented below the floating diffusion node to transform the gradual junction into a sudden junction, reduce the diffusion of electrons from the floating diffusion node to the substrate, and reduce its junction capacitance value. The doped layer is changed to a P-type doped layer to transform the physical isolation into electrical isolation.

[0069] Step S3, preparing a floating diffusion node at the floating diffusion node position of the substrate.

[0070] The floating diffusion node extends from the upper surface of the substrate into the substrate along a first direction, and the barrier layer contacts the bottom of the floating diffusion node to prevent the doping of the floating diffusion node from diffusing into the substrate.

[0071] Specifically, after the barrier layer is prepared, a floating diffusion node is prepared at the floating diffusion node position of the substrate. The floating diffusion node is located above the barrier layer and can be understood as a capacitor for storing electrons generated by photoelectric conversion. The barrier layer contacts the bottom of the floating diffusion node to prevent the doping of the floating diffusion node from diffusing into the interior of the substrate, thereby reducing the value of the floating diffusion node junction capacitance and thereby improving the conversion gain.

[0072] According to the method for preparing an image sensor according to an embodiment of the present invention, a blocking layer is prepared on the side of the floating diffusion node away from the substrate. The blocking layer can block the doping of the floating diffusion node from diffusing into the interior of the substrate, which can greatly reduce the node capacitance of the floating diffusion node itself. The node capacitance of the floating diffusion node itself is inversely proportional to the conversion gain of the image sensor, thereby improving the dynamic range of the image sensor, and the image quality in dark light scenes can also be guaranteed, and the scope of application scenarios is wider.

[0073] In some embodiments, preparing a barrier layer in a substrate includes: preparing an insulating layer in the substrate.

[0074] Specifically, the barrier layer may be an insulating layer, which can block the diffusion of the depletion region of the floating diffusion node into the substrate, thereby converting it from full depletion to partial depletion, effectively reducing the junction capacitance of the floating diffusion node and improving the conversion gain.

[0075] In some embodiments, preparing an insulating layer in the substrate includes: preparing a buried silicon oxide layer in the silicon substrate by using a SIMOX technique.

[0076] Specifically, SIMOX technology is a new type of semiconductor material that implants high-dose oxygen ions into single crystal silicon under high temperature conditions to form an isolation layer, and forms a three-layer structure of top silicon, silicon dioxide buried layer, and bulk silicon under ultra-high temperature annealing conditions. It is mainly used to manufacture high-speed microprocessors, high-speed communications, three-dimensional image processing, advanced multimedia circuits, low-voltage and low-power mobile computers, mobile phones, and portable electronic equipment circuits.

[0077] By introducing the SIMOX technology in the silicon-on-insulator manufacturing process into the manufacturing process of the image sensor, some devices in the image sensor have the characteristics of silicon-on-insulator devices. Its structure is a surface silicon thin layer-silicon dioxide insulating layer material-silicon substrate, and the integrated circuit is manufactured on the surface silicon thin layer. Compared with integrated circuits manufactured on bulk silicon substrates, devices manufactured by silicon-on-insulator have many advantages, such as faster transmission speed, smaller parasitic capacitance, smaller operating voltage and higher radiation resistance.

[0078] In some embodiments, a buried silicon oxide layer is prepared in a silicon substrate by using a SIMOX technique, comprising: in a first direction, injecting a preset dose H of oxygen element into a region below a corresponding floating diffusion node, and performing an annealing process for a preset time t and a preset temperature T to form a buried silicon oxide layer in the silicon substrate; wherein the value of the preset dose H satisfies 1.6*10 18 cm -2 ≤H≤2.0*10 18 cm -2 , for example, H = 1.8*10 18 cm -2 ; The value of the preset time t satisfies 3 hours ≤ t ≤ 6 hours, for example, t = 4 hours or 5 hours, and the value of the preset temperature T satisfies 1100°C ≤ T ≤ 1350°C, for example, T = 1200°C or 1300°C, etc.

[0079] Specifically, by introducing the SIMOX technology in the silicon-on-insulator manufacturing process into the manufacturing process of the image sensor, through process optimization and improvement, high-concentration oxygen element doping is performed below the doping of the floating diffusion node area and a long-term high-temperature annealing is performed to allow the injected oxygen element to chemically react with silicon, thereby generating a layer of silicon dioxide insulating layer material below the floating diffusion node to block the diffusion of the depletion region of the floating diffusion node into the substrate, thereby converting it from full depletion to partial depletion.

[0080] In the floating diffusion node manufacturing process, SIMOX is one of the earliest and lowest-cost technologies. It uses high-dose ion implantation technology to implant oxygen ions of a preset dose H into the silicon substrate, and performs annealing treatment at a preset time t and a preset temperature T. The oxygen element value of the preset dose H satisfies 1.6*10 18 cm -2 ≤H≤2.0*10 18 cm -2 , the value of the preset time length t satisfies 3 hours ≤ t ≤ 6 hours, the value of the preset temperature T satisfies 1100℃ ≤ T ≤ 1350℃, the oxygen ions in the silicon wafer react chemically with silicon to form a silicon oxide isolation buried layer, and the substrate and the top silicon thin film layer are isolated by the silicon oxide isolation buried layer; by using this technology, a silicon oxide isolation layer is formed under the doping of the floating diffusion node area using SIMOX technology to block the diffusion of the floating diffusion node doping, converting the original full depletion into partial depletion, reducing the size of the junction capacitance and thereby increasing the corresponding conversion gain.

[0081] According to the following Figure 4 Describe the implementation process for introducing SIMOX technology into image sensor manufacturing.

[0082] Step S4, providing a semiconductor substrate, wherein the substrate has a pad oxide and a silicon chloride layer.

[0083] Specifically, the pad oxide serves as a stress barrier layer for silicon nitride, while silicon nitride serves as a barrier layer for subsequent shallow trench filling and grinding.

[0084] Step S5, implementing shallow trench isolation on the substrate to complete the division of different areas.

[0085] Step S6, performing shallow trench etching thermal damage thermal oxidation repair and trench filling.

[0086] Step S7, depositing an implantation blocking oxide layer.

[0087] Step S8, using the photoresist as a barrier layer, injecting a high dose of oxygen into the area below the floating diffusion node by ion implantation, and then removing the photoresist.

[0088] Step S9, performing high temperature and long time annealing to react the implanted oxygen element with the silicon element to generate silicon oxide.

[0089] Step S10, forming a photodiode region, a polysilicon gate and a floating diffusion node region in the substrate.

[0090] The present invention mainly introduces SIMOX technology into the manufacturing process of image sensors without affecting the performance of other devices. Since the manufacturing process of image sensors is more sensitive to thermal budget, and the oxygen elements injected by SIMOX technology require a long period of high-temperature annealing to make the injected oxygen elements react with silicon, the oxygen elements are injected after the shallow trench filling is completed; at this time, a photomask is required to define the area of ​​the floating diffusion node, and the doping of the oxygen elements should be located below the floating diffusion node area and the doping depth should be slightly greater than the doping depth of the floating diffusion node so that the silicon oxide barrier layer generated by the reaction can block the full depletion of the floating diffusion node electrons and thus reduce the junction capacitance; the manufacturing process after annealing is consistent with the manufacturing process of the standard image sensor, such as Figure 5 As shown, the SIMOX technology is used to finally generate a barrier layer of uniform thickness below the floating diffusion node area of ​​the silicon substrate. In the subsequent floating diffusion node reset process, the silicon oxide barrier layer can block the depletion diffusion of electrons from the floating diffusion node to the substrate, causing it to change from full depletion to partial depletion, reducing the junction capacitance of the floating diffusion node.

[0091] Figure 5 Step 1 is shallow trench isolation etching; step 2 is shallow trench etching damage repair and filling; step 3 is high-dose oxygen element implantation using SIMOX technology; step 3 is high-temperature annealing to completely react the implanted oxygen element with the silicon element to generate silicon dioxide; step 4 is high-temperature annealing to completely react the implanted oxygen element with the silicon element to generate silicon dioxide. Step 5 is the manufacture of photoelectric conversion units, floating diffusion nodes, gates and subsequent processes.

[0092] Figure 1 : is a schematic diagram of the structure of the present invention, and its structural size is the same as that of the traditional structure. The difference is that the present invention uses the SIMOX technology to inject a high dose of oxygen into the silicon substrate below the floating diffusion node area, and reacts the injected oxygen with silicon to generate buried silicon oxide through long-term high-temperature annealing. The manufacturing process of the image sensor is more sensitive to the thermal budget, so the SIMOX process is advanced to after the shallow trench isolation process is completed. At this time, the SIMOX process will not affect the subsequent process, and the subsequent process is consistent with the manufacturing method of the conventional image sensor. Due to the presence of the silicon oxide barrier layer in the floating diffusion node area, the subsequent diffusion of electrons from the floating diffusion node to the substrate is limited, and the floating diffusion node doping changes from full depletion to partial depletion, so the junction capacitance of the floating diffusion node is reduced.

[0093] In order to verify the effect of the present invention, the capacitance values ​​of floating diffusion nodes of the traditional image sensor structure and the structure of the present invention are compared without changing the doping conditions. Figure 6 As shown in (1), (2) and (3), Figure 6 (1) Old refers to the floating diffusion node structure manufactured by traditional technology. Figure 6 (2) "new" refers to the floating diffusion node structure manufactured by the technology of the present invention. The difference between the two structures is that there is a silicon oxide barrier layer under the floating diffusion node region of the silicon substrate of the new structure. From the potential distribution comparison diagram of the two structures, it can be seen that the diffusion depletion region of the floating diffusion node in the new structure is limited by the existence of the silicon oxide barrier layer, resulting in a smaller depletion region size than the depletion region in the traditional structure. Therefore, it can be judged that the depletion region in the new structure is in a partially depleted state. Figure 6 The CV curve in (3) shows the junction capacitance between the floating diffusion node and the substrate. According to Q=CV, the capacitance is inversely proportional to the voltage, so as the voltage increases, the capacitance decreases. The capacitance in the traditional structure is always greater than the capacitance of the structure of the present invention. The reason is attributed to the presence of buried silicon oxide, which blocks the diffusion of electron doping from the floating diffusion node to the substrate, transforming the original fully depleted structure into a partially depleted structure, resulting in a reduction in its junction area and thus a reduction in its final capacitance. By calculating the comparative structure, it can be obtained that under the same voltage conditions, the capacitance value in the present invention is reduced by 20% compared with the traditional structure, which can increase the corresponding conversion gain by 20%, thereby further reducing the sensitivity threshold of the image sensor, making it easier to detect electrons in dim light and thus improving the dynamic range of the image sensor.

[0094] In some embodiments, preparing a barrier layer in a substrate includes: in a first direction, injecting doping particles having a conductivity type opposite to that of the floating diffusion node into a region below the corresponding floating diffusion node to form a doping layer.

[0095] Specifically, doping particles with a conductivity type opposite to that of the floating diffusion node are injected into the area below the corresponding floating diffusion node in a direction perpendicular to the substrate to form a doping layer. For example, high-dose P-type doping is implemented below the floating diffusion node to transform the gradual junction into an abrupt junction, thereby reducing the diffusion of electrons from the floating diffusion node to the substrate and reducing its junction capacitance. The doping layer is changed to a P-type doping layer to convert physical isolation into electrical isolation. The method of P-type doping through the doping layer is most compatible with the existing production process of image sensors and minimizes process changes.

[0096] In some embodiments, the doping concentration of the doping layer is one order of magnitude or two orders of magnitude less than the doping concentration of the floating diffusion node.

[0097] Specifically, the doping concentration of the doping layer is one or two orders of magnitude smaller than the doping concentration of the floating diffusion node to avoid affecting the floating diffusion node.

[0098] For example, the present invention provides a method for manufacturing a high dynamic range image sensor, which performs high-concentration P-type element doping below the floating diffusion node area through process optimization and improvement, and changes the original gradual junction between the floating diffusion node and the substrate into an abrupt junction to reduce the junction capacitance and thereby improve the conversion gain.

[0099] Figure 2 As shown in the figure, it is a schematic diagram of the image sensor introduced with P+ type doping. It can be seen from the figure that compared with the traditional structure, the only difference is that there is a high-concentration P+ doping layer under the floating diffusion node, and its function is to transform the original gradual junction between the floating diffusion node and the substrate into a sudden junction to reduce the junction capacitance and thus increase the conversion gain of the floating diffusion node. Its manufacturing method is also relatively simple. After the side wall etching process is completed, a new mask is added, which covers other areas and only exposes the floating diffusion node area. Then P+ type doping is injected. The injection depth of P+ type doping is higher than that of the floating diffusion node. After the injection is completed, subsequent annealing is used to activate the doped P-type elements and repair the doping damage. After the floating diffusion node is doped, it is formed as shown below. Figure 2 In the structure shown, the diffusion of the floating diffusion node is hindered by the abrupt junction, so its diffusion area is reduced compared to other regions.

[0100] Structural simulation of gradual junction and abrupt junction Figure 7 As shown in (1), (2) and (3). Figure 7 (1) Old represents the floating diffusion node structure that has not been processed, and Figure 7 (2) The new type represents the floating diffusion node structure after P+ doping. By comparing the potential diagrams, it can be seen that the floating diffusion node area after P+ doping is significantly reduced, which is mainly because P+ doping hinders the diffusion of electrons to the substrate, resulting in a decrease in junction capacitance. Figure 7The CV curve in (3) is a comparison chart of the capacitance values ​​of the two. It can be seen from the figure that under the corresponding conditions, the capacitance value of the floating diffusion node after P+ doping is significantly smaller than the capacitance value in the traditional structure, and the capacitance value after P+ doping is more likely to stabilize after a certain voltage, which is mainly due to the hindering effect of the P+ doping layer.

[0101] In some embodiments, after preparing a barrier layer in the substrate, the preparation method further includes: preparing a photoelectric conversion unit, a first drain region, a source region, and a second drain region at corresponding positions in the substrate close to the upper surface of the substrate, and the first drain region, the source region, and the second drain region are arranged at intervals along a second direction parallel to the substrate.

[0102] Specifically, after preparing a blocking layer in the substrate, a photoelectric conversion unit, a first drain region, a source region, and a second drain region are prepared at corresponding positions in the substrate near the upper surface of the substrate. The second direction can be understood as a direction parallel to the substrate, the first drain region can be understood as the first drain region from left to right in the direction parallel to the substrate, and the second drain region can be understood as the second drain region from left to right in the direction parallel to the substrate; the first drain region and the second drain region play an emitting role, the second drain region outputs an image signal, and the source region plays a collecting role.

[0103] In some embodiments, the preparation method further includes: preparing a transfer transistor, a reset transistor, a source follower transistor and a row selection transistor at corresponding positions on the upper surface of the substrate respectively.

[0104] Among them, the transfer transistor is located on the upper surface of the substrate between the photoelectric conversion unit and the floating diffusion node, the reset transistor is located on the upper surface of the substrate between the floating diffusion node and the first drain region, the source follower is located on the upper surface of the substrate between the first drain region and the source region, and the row selection transistor is located on the upper surface of the substrate between the source region and the second drain region.

[0105] Specifically, the transfer transistor controls the charge transfer of the photoelectric conversion unit to the floating diffusion node, the reset transistor controls the resetting of the floating diffusion node, the source follower transistor amplifies the photogenerated electrical signal, and the row selection transistor controls the output of the electrical signal amplified by the source follower transistor.

[0106] In some embodiments, before preparing a barrier layer below a corresponding floating diffusion node position of the substrate, the preparation method further includes: preparing a shallow trench isolation structure at a corresponding position of the substrate to divide different regional positions of the substrate.

[0107] Specifically, before preparing the barrier layer below the floating diffusion node position, a shallow trench isolation structure needs to be prepared at the corresponding position of the substrate. By preparing the shallow trench isolation structure, different regional positions of the substrate can be divided to avoid errors in the preparation area during the preparation process.

[0108] A third aspect of the present invention provides an electronic device, such as Figure 8 As shown, the electronic device 200 includes the image sensor 100 .

[0109] According to the electronic device of the embodiment of the present invention, by adopting the above-mentioned image sensor, the node capacitance of the floating diffusion node of the image sensor itself is greatly reduced, thereby improving the dynamic range, and the image quality in dark light scenes can also be guaranteed, thereby improving the imaging quality.

[0110] A fourth aspect of the present invention provides a vehicle, such as Fig. 9 As shown, vehicle 300 includes image sensor 100 .

[0111] According to the vehicle of the embodiment of the present invention, by adopting the above-mentioned image sensor, the node capacitance of the floating diffusion node of the image sensor itself is greatly reduced, thereby improving the dynamic range, and the image quality in dark light scenes can also be guaranteed, so that the vehicle can obtain clear external environment images in various situations, providing data support for control strategies based on image information.

[0112] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example.

[0113] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. An image sensor, characterized in that: include: substrate; A floating diffusion node, the floating diffusion node is located in the substrate, and the floating diffusion node extends from the upper surface of the substrate to the inside of the substrate along a first direction perpendicular to the substrate; A blocking layer is located at a side of the floating diffusion node away from the substrate and in contact with a bottom of the floating diffusion node, and is used to block doping of the floating diffusion node from diffusing into the substrate.

2. The image sensor according to claim 1, characterized in that The barrier layer is an insulating layer.

3. The image sensor according to claim 2, characterized in that The substrate is a silicon substrate; The insulating layer is a buried silicon oxide layer prepared by SIMOX technology.

4. The image sensor according to claim 1, characterized in that The barrier layer is a doped layer; The conductivity type of the doped layer is opposite to the conductivity type of the floating diffusion node; The doping concentration of the doping layer is less than the doping concentration of the floating diffusion node.

5. The image sensor according to claim 4, characterized in that: The doping concentration of the doping layer is one order of magnitude or two orders of magnitude smaller than the doping concentration of the floating diffusion node.

6. The image sensor according to any one of claims 1 to 5, characterized in that: The image sensor further includes: a photoelectric conversion unit, a first drain region, a source region, and a second drain region. The photoelectric conversion unit, the first drain region, the source region, and the second drain region are arranged at intervals along a second direction parallel to the substrate. The first drain region is suitable for being connected to a power supply terminal, and the second drain region is suitable for outputting an image signal.

7. The image sensor according to claim 6, characterized in that: The image sensor further comprises: a transfer transistor, the transfer transistor being located on the upper surface of the substrate between the photoelectric conversion unit and the floating diffusion node and being used to control the charge transfer of the photoelectric conversion unit; a reset transistor, the reset transistor being located on the upper surface of the substrate between the floating diffusion node and the first drain region and being used for controlling the resetting of the floating diffusion node; A source follower transistor, the source follower being located on the upper surface of the substrate between the first drain region and the source region, and being used to amplify a photogenerated electrical signal; A row selection transistor is located on the upper surface of the substrate between the source region and the second drain region and is used to control the output of the source follower transistor.

8. A method for preparing an image sensor, characterized in that: include: providing a substrate; In a first direction perpendicular to the substrate, a barrier layer is prepared below a corresponding floating diffusion node position of the substrate; as well as A floating diffusion node is prepared at the floating diffusion node position of the substrate, and the floating diffusion node extends from the upper surface of the substrate to the inside of the substrate along the first direction. The blocking layer contacts the bottom of the floating diffusion node to prevent the doping of the floating diffusion node from diffusing into the inside of the substrate.

9. The preparation method according to claim 8, characterized in that: Preparing a barrier layer in the substrate includes: preparing an insulating layer in the substrate.

10. The preparation method according to claim 9, characterized in that: The insulating layer is prepared in the substrate, comprising: preparing a buried silicon oxide layer in the silicon substrate by using SIMOX technology.

11. The preparation method according to claim 10, characterized in that: The buried silicon oxide layer is prepared in the silicon substrate by SIMOX technology, including: In the first direction, injecting a preset dose H of oxygen into the area corresponding to the floating diffusion node, and performing an annealing process for a preset time t and a preset temperature T to form the buried silicon oxide layer in the silicon substrate; The value of the preset dose H satisfies 1.6*10 18 cm -2 ≤H≤2.0*10 18 cm -2 The value of the preset time t satisfies 3 hours ≤ t ≤ 6 hours, and the value of the preset temperature T satisfies 1100° C. ≤ T ≤ 1350° C.

12. The preparation method according to claim 8, characterized in that: Preparing a barrier layer in the substrate, comprising: In the first direction, doping particles having a conductivity type opposite to that of the floating diffusion node are implanted into a region corresponding to a region below the floating diffusion node to form a doping layer.

13. The preparation method according to claim 12, characterized in that: The doping concentration of the doping layer is one order of magnitude or two orders of magnitude smaller than the doping concentration of the floating diffusion node.

14. The preparation method according to claim 8, characterized in that: After preparing the barrier layer in the substrate, the preparation method further comprises: A photoelectric conversion unit, a first drain region, a source region, and a second drain region are prepared at corresponding positions in the substrate near the upper surface of the substrate. The first drain region, the source region, and the second drain region are arranged at intervals along a second direction parallel to the substrate.

15. The preparation method according to claim 14, characterized in that: The preparation method further comprises: A transfer transistor, a reset transistor, a source follower transistor and a row selection transistor are respectively prepared at corresponding positions on the upper surface of the substrate, wherein the transfer transistor is located on the upper surface of the substrate between the photoelectric conversion unit and the floating diffusion node, the reset transistor is located on the upper surface of the substrate between the floating diffusion node and the first drain region, the source follower is located on the upper surface of the substrate between the first drain region and the source region, and the row selection transistor is located on the upper surface of the substrate between the source region and the second drain region.

16. The preparation method according to any one of claims 8 to 15, characterized in that: Before preparing a barrier layer below the corresponding floating diffusion node position of the substrate, the preparation method further includes: A shallow trench isolation structure is prepared at a corresponding position of the substrate to divide different regions of the substrate.

17. An electronic device, characterized in that: The image sensor comprises the image sensor according to any one of claims 1 to 7.

18. A vehicle, characterized in that: Comprising at least one image sensor according to any one of claims 1-7.

Images