Solar cell and method of manufacturing the same, solar cell module, and electric device

Abstract

The present application relates to the field of solar cell technology, specifically to a solar cell and its preparation method, a solar cell module, and an electrical device. The solar cell comprises a crystalline silicon light absorption layer, a charge transfer layer comprising a doped polycrystalline silicon layer, a first passivation layer, and a first metal electrode. The first metal electrode penetrates the first passivation layer and contacts the doped polycrystalline silicon layer. The surface of the crystalline silicon light absorption layer adjacent to the first metal electrode comprises a velvet region and a polished region. The orthographic projection of the first metal electrode on the crystalline silicon light absorption layer is located in the velvet region, and the surface of the doped polycrystalline silicon layer in contact with the first metal electrode has a curved contact site. The solar cell ensures passivated contact while having low contact resistance and high photoelectric conversion efficiency.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of solar cells, in particular to a solar cell, a preparation method thereof, a solar cell module and an electric device. BACKGROUND

[0002] Metallization plays a crucial role in the manufacturing process of crystalline silicon solar cells. Its main function is to form metal electrodes on the front and back surfaces of the cell, which are responsible for collecting and transmitting current, directly affecting the performance of the cell. The metallization process usually uses screen printing technology to print metal paste (silver paste, silver-aluminum paste, etc.) onto the surface of the cell, and then solidifies through a sintering process to form ohmic contact. The key challenge of metallization technology is how to optimize the design and materials of the metal electrode to reduce shading effect, reduce contact resistance, reduce metal recombination, and improve the overall efficiency of the cell. Although various studies have been carried out, the contact resistance and metal recombination are still challenges faced by solar cells. SUMMARY

[0003] The present application aims to at least partially solve one of the technical problems in the related art. To this end, the present application provides a solar cell considering passivation performance and contact resistance, a preparation method thereof, a solar cell module and an electric device.

[0004] In a first aspect, the present application provides a solar cell. According to an embodiment of the present application, the solar cell comprises: a crystalline silicon light-absorbing layer having opposite first and second sides; a charge transport layer located on the first side of the crystalline silicon light-absorbing layer and comprising a doped polysilicon layer; a first passivation layer located on the side of the charge transport layer away from the crystalline silicon light-absorbing layer; and a first metal electrode penetrating through the first passivation layer and contacting the doped polysilicon layer; wherein the surface of the crystalline silicon light-absorbing layer near the first metal electrode comprises a textured region and a polished region, and the orthographic projection of the first metal electrode on the crystalline silicon light-absorbing layer is located in the textured region; the surface of the doped polysilicon layer contacting the first metal electrode has an arc-shaped recessed pit recessed toward the doped polysilicon layer, and the surface of the first metal electrode contacting the doped polysilicon layer has an arc-shaped protruding part protruding toward the doped polysilicon layer, and the arc-shaped protruding part is arranged in the arc-shaped recessed pit.

[0005] In the solar cell, the contact interface structure between the first metal electrode and the doped polysilicon layer can not only increase the specific surface area of the first metal electrode in contact with the doped polysilicon layer and ensure the contact performance of the first metal electrode, but also ensure the passivation performance of the non-contact area, reduce metal recombination as much as possible, and improve the photoelectric conversion efficiency of the solar cell.

[0006] According to an embodiment of the present application, the surface of the doped polysilicon layer in contact with the first metal electrode comprises a plurality of protruding structures protruding towards the first metal electrode, and the arc-shaped concave is located on the surface of the protruding structure.

[0007] According to an embodiment of the present application, the size of the base of the protruding structure is 0.5-2 μm.

[0008] According to an embodiment of the present application, the arc-shaped concave comprises a hemispherical concave.

[0009] According to an embodiment of the present application, the radius of the hemispherical concave is 10-180 nm.

[0010] According to an embodiment of the present application, the surface of the crystalline silicon light-absorbing layer close to the first metal electrode satisfies at least one of the following conditions:

[0011] The area ratio of the textured region is 0.5-7%;

[0012] The reflectivity of the textured region is 5-35%;

[0013] The reflectivity of the polished region is 40-70%.

[0014] According to an embodiment of the present application, the textured region comprises a plurality of sub-textured regions arranged at intervals, and the first metal electrode comprises a plurality of first sub-electrodes arranged at intervals, the orthographic projection of each first sub-electrode on the crystalline silicon light-absorbing layer is located in one sub-textured region, the width of each sub-textured region is greater than or equal to the width of each first sub-electrode, and / or the width of each sub-textured region is 40-100 μm, and / or the width of each first sub-electrode is 10-50 μm.

[0015] According to an embodiment of the present application, the solar cell further comprises a tunneling layer between the crystalline silicon light-absorbing layer and the charge transport layer.

[0016] According to an embodiment of the present application, the solar cell further comprises an emitter layer on the second side of the crystalline silicon light-absorbing layer, a second passivation layer on the side of the emitter away from the crystalline silicon light-absorbing layer, an anti-reflection layer on the side of the second passivation layer away from the crystalline silicon light-absorbing layer, and a second metal electrode penetrating through the anti-reflection layer, the second passivation layer and the emitter layer and in contact with the crystalline silicon light-absorbing layer.

[0017] According to an embodiment of the present application, the second passivation layer comprises a plurality of second sub-passivation layers arranged at intervals, and the hydrogen content in the plurality of second sub-passivation layers gradually increases in the direction away from the crystalline silicon light-absorbing layer.

[0018] In a second aspect, the application provides a method for preparing the solar cell described above. According to an embodiment of the application, the method comprises: performing laser oxidation treatment on a predetermined region on a first side surface of a crystalline silicon light-absorbing layer to form an oxidation protective layer on the predetermined region; performing polishing treatment on the first side surface of the crystalline silicon light-absorbing layer to remove the oxidation protective layer and form a textured region and a polished region; sequentially forming a charge transport layer and a first passivation layer on the first side surface of the crystalline silicon light-absorbing layer after the polishing treatment; printing a first conductive paste on a surface of the first passivation layer away from the crystalline silicon light-absorbing layer, and then sequentially performing high-temperature sintering, photo-injection treatment, and laser enhancement treatment to form a first metal electrode.

[0019] According to an embodiment of the application, based on the total mass of the first conductive paste, the first conductive paste comprises 83% to 90% silver powder, 0.5% to 3% glass powder, and 7% to 12% organic phase.

[0020] According to an embodiment of the application, the wavelength of the laser used in the laser oxidation treatment step and the wavelength of the laser used in the laser enhancement treatment step are each independently 300 nm to 600 nm; and / or the spot diameter of the laser is 40 μm to 100 μm.

[0021] According to an embodiment of the application, the method satisfies at least one of the following conditions: forming the charge transport layer comprises: depositing an intrinsic polysilicon layer by chemical vapor deposition, and then doping the polysilicon layer by ion diffusion or ion implantation to obtain a doped polysilicon layer; forming the charge transport layer comprises: obtaining a pre-prepared polysilicon layer by plasma-enhanced chemical vapor deposition, and then annealing the pre-prepared polysilicon layer to obtain the doped polysilicon layer; and forming the first passivation layer comprises: forming the first passivation layer by plasma-enhanced chemical vapor deposition.

[0022] According to an embodiment of the application, before forming the charge transport layer, the method further comprises: forming a tunneling layer on the first side surface of the crystalline silicon light-absorbing layer by plasma-enhanced chemical vapor deposition.

[0023] According to an embodiment of the application, the method further comprises: forming an emitter layer on a second side surface of the crystalline silicon light-absorbing layer by ion diffusion; forming a second passivation layer on a surface of the emitter layer away from the crystalline silicon light-absorbing layer by atomic layer deposition; forming an anti-reflection layer on a surface of the second passivation layer away from the crystalline silicon light-absorbing layer by plasma-enhanced chemical vapor deposition; and forming a second metal electrode on a surface of the anti-reflection layer away from the crystalline silicon light-absorbing layer by sequentially printing and sintering.

[0024] In a third aspect, the present application provides a solar cell module. According to an embodiment of the present application, the solar cell module comprises the solar cell as described above or the solar cell prepared by the method as described above. The solar cell module has higher open circuit voltage and photoelectric conversion effect.

[0025] In a fourth aspect, the present application provides an electric device. According to an embodiment of the present application, the electric device comprises the solar cell module as described above. The electric device has all the features and advantages of the solar cell module as described above, which will not be repeated here. BRIEF DESCRIPTION OF DRAWINGS

[0026] Figure 1 is a schematic diagram of a partial cross-sectional structure of a solar cell according to an embodiment of the present application.

[0027] Figure 2 is a schematic diagram of a partial cross-sectional structure of a solar cell according to another embodiment of the present application.

[0028] Figure 3 is a schematic diagram of a partial cross-sectional structure of a solar cell according to another embodiment of the present application.

[0029] Figure 4 is a schematic diagram of a partial cross-sectional structure of a solar cell according to another embodiment of the present application.

[0030] Figure 5 is a schematic diagram of a process of forming a textured region and a polished region on a surface of a crystalline silicon light-absorbing layer according to an embodiment of the present application.

[0031] REFERENCE SIGNS:

[0032] 1: crystalline silicon light-absorbing layer 11: first side 12: second side 111: textured region 1111: sub-textured region 112: polished region 2: charge transport layer 21: doped polysilicon layer 211: arc-shaped concave pit 212: convex structure 3: first passivation layer 4: first metal electrode 41: arc-shaped convex part 42: first sub-electrode 5: tunneling layer 6: emitter layer 7: second passivation layer 8: anti-reflection layer 9: second metal electrode 10: crystalline silicon substrate 101: oxidation protective layer DETAILED DESCRIPTION

[0033] Embodiments of the present application are described in detail below with reference to the accompanying drawings. The embodiments described below are exemplary and are intended to explain the present application, and should not be understood as limiting the present application.

[0034] In a first aspect, the present application provides a solar cell. According to an embodiment of the present application, the solar cell comprises a crystalline silicon light-absorbing layer, a charge transport layer, a first passivation layer, a first metal electrode, a tunneling layer, an emitter layer, a second passivation layer, an anti-reflection layer and a second metal electrode. Figure 1The solar cell comprises: a crystalline silicon light-absorbing layer 1 having opposite first and second sides 11 and 12; a charge transport layer 2 located on the first side of the crystalline silicon light-absorbing layer 1 and comprising a doped polysilicon layer 21; a first passivation layer 3 located on the side of the charge transport layer 2 away from the crystalline silicon light-absorbing layer 1; and a first metal electrode 4 penetrating through the first passivation layer 3 and contacting the doped polysilicon layer 21. The surface of the crystalline silicon light-absorbing layer 1 near the first metal electrode 4 comprises a textured region 111 and a polished region 112, and the orthographic projection of the first metal electrode 4 on the crystalline silicon light-absorbing layer 1 is located in the textured region 111. The surface of the doped polysilicon layer 21 contacting the first metal electrode 4 has an arc-shaped concave pit 211 recessed toward the doped polysilicon layer, and the surface of the first metal electrode 4 contacting the doped polysilicon layer 21 has an arc-shaped convex protrusion 41 protruding toward the doped polysilicon layer, and the arc-shaped convex protrusion 41 is fitted in the arc-shaped concave pit 211.

[0035] In the solar cell, the contact interface structure between the first metal electrode and the doped polysilicon layer can increase the contact area between the first metal electrode and the doped polysilicon layer, ensure the contact performance of the first metal electrode, ensure the passivation performance of the non-contact region, reduce metal recombination as much as possible, and improve the photoelectric conversion efficiency of the solar cell.

[0036] It can be understood that the "arc-shaped concave pit" described herein refers to a concave pit with at least part of the surface being arc-shaped, and correspondingly, the "arc-shaped convex protrusion" refers to a convex protrusion with at least part of the surface being arc-shaped.

[0037] According to an embodiment of the present application, the arc-shaped concave pit comprises a hemispherical concave pit. It can be understood that there will be some errors in the preparation process, and therefore, the "hemispherical concave pit" described herein can be an ideal hemispherical concave pit or an approximately hemispherical concave pit. In this way, the first metal electrode and the doped polysilicon layer have a larger contact area and a smaller contact resistance.

[0038] According to an embodiment of the present application, the radius of the hemispherical concave pit can be 10 nm to 180 nm, specifically, 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, 160 nm, 170 nm, 180 nm, etc. With the above dimensions, the contact resistance of the first metal electrode and the doped polysilicon layer can be further reduced.

[0039] According to an embodiment of the present application, the crystalline silicon light-absorbing layer can be a single-crystal silicon layer or a polycrystalline silicon layer, and the conductivity type thereof can be n-type or p-type. As an example, it can be n-type single-crystal silicon or n-type polycrystalline silicon.

[0040] It can be understood that, in order to avoid shading as much as possible, the first metal electrode can be provided in the form of a metal gate line, that is, can include a plurality of spaced metal tracks, include a metal grid, etc., that is, the first metal electrode only covers a small part of the area of the first passivation layer. It can also be understood that the first metal electrode is arranged corresponding to the textured area on the surface of the crystalline silicon light-absorbing layer. Therefore, according to the embodiments of the present application, the area ratio of the textured area on the surface of the crystalline silicon light-absorbing layer close to the first metal electrode is 0.5% to 7%, specifically, 0.5%, 1%, 1.5%, 2%, 2.5%, 3%, 3.5%, 4%, 4.5%, 5%, 5.5%, 6%, 6.5%, 7%, etc. Having the above area ratio can meet the setting requirements of the first metal electrode, while the light transmittance is high, which is beneficial to improve the light absorption effect of the solar cell.

[0041] According to the embodiments of the present application, the reflectivity of the textured area on the surface of the crystalline silicon light-absorbing layer close to the first metal electrode can be 5% to 35%, specifically, 5%, 10%, 15%, 20%, 25%, 30%, 35%, etc. Having the above reflectivity is beneficial to have a suitable contact area and a small contact resistance between the subsequent doped polysilicon layer and the first metal electrode, while a good passivation contact can be maintained, thereby being beneficial to improve the open-circuit voltage and the photoelectric conversion efficiency of the solar cell.

[0042] According to the embodiments of the present application, the reflectivity of the polished area on the surface of the crystalline silicon light-absorbing layer close to the first metal electrode is 40% to 70%, specifically, 40%, 45%, 50%, 55%, 60%, 65%, 70%, etc. Having the above reflectivity of the polished area is beneficial to reduce reflection loss, reduce charge recombination, improve the internal quantum efficiency of the cell, improve contact performance, improve surface defects, improve passivation quality, etc.

[0043] According to the embodiments of the present application, the doping element in the doped polysilicon layer can include at least one of phosphorus, boron, carbon, nitrogen, and oxygen. In some embodiments, the doping concentration in the doped polysilicon layer is 10 15 -10 21 atoms·cm -3 ; specifically, 10 15 atoms·cm -3 , 10 16 atoms·cm -3 , 10 17 atoms·cm -3 , 10 18 atoms·cm -3 , 10 19 atoms·cm -3 , 10 20atoms·cm -3 ,10 21 atoms·cm -3 etc. Thus, it is conducive to pass through charges, for example, when the conductive type of the crystalline silicon light-absorbing layer is n-type, it can allow electrons to pass through, while preventing holes from passing through; and it is conducive to improve passivation effect, reduce recombination, and improve photoelectric conversion efficiency of the solar cell.

[0044] According to embodiments of the present application, referring to Figure 1 , the doped polysilicon layer 21 includes a plurality of protruding structures 212 protruding towards the first metal electrode 4 on the surface of the doped polysilicon layer 21 in contact with the first metal electrode 4, and the arc-shaped concave pits 211 are located on the surface of the protruding structures 212. Thus, the contact area of the first metal electrode and the doped polysilicon layer can be further increased, the contact resistance can be reduced, and at the same time, a better passivation contact can be maintained, metal recombination can be reduced, and the photoelectric conversion efficiency of the solar cell can be improved.

[0045] According to embodiments of the present application, the size of the base of the protruding structure 212 is 0.5 μm to 2 μm, specifically, 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm, 1.0 μm, 1.1 μm, 1.2 μm, 1.3 μm, 1.4 μm, 1.5 μm, 1.6 μm, 1.7 μm, 1.8 μm, 1.9 μm, 2.0 μm, etc. Within this size range, the doped polysilicon and the first metal electrode have a suitable contact area, the contact resistance is small, at the same time, the passivation contact effect is good, metal recombination is less, and the solar cell can achieve a higher open circuit voltage and a larger photoelectric conversion efficiency.

[0046] It can be understood that the protruding structure on the doped polysilicon layer is inherited from the textured region on the crystalline silicon light-absorbing layer. Specifically, the textured region on the crystalline silicon light-absorbing layer has a pyramid structure, and after the doped polysilicon layer is formed on the textured region of the crystalline silicon light-absorbing layer, for example, after the doped polysilicon layer is formed by a deposition method, the surface of the doped polysilicon layer has a corresponding topography with the surface of the crystalline silicon light-absorbing layer, that is, the protruding structure is formed on the doped polysilicon layer at a position corresponding to the pyramid structure on the textured region. Because of the material properties of the crystalline silicon light-absorbing layer, the pyramid has a shape similar to a quadrangular pyramid, and the base (i.e., the bottom) of the pyramid is generally square. Correspondingly, the protruding structure on the doped polysilicon layer also has a shape similar to a quadrangular pyramid, and the bottom (or base) of the protruding structure is also square. The size of the base of the protruding structure refers to the length of the side of the square bottom of the protruding structure.

[0047] According to embodiments of the present application, the doped polysilicon layer can be a single layer or multiple layers, which can be selected according to actual needs. The thickness of the doped polysilicon layer can be 20 nm to 200 nm, specifically, 20 nm, 50 nm, 100 nm, 150 nm, 200 nm, etc.

[0048] In some embodiments, in addition to the doped polysilicon layer, the charge transport layer can further include at least one of a silicon oxide layer and an amorphous silicon layer arranged in a stack with the doped polysilicon layer, and the specific layer stacking order is not particularly limited in the present application. As an example, the charge transport layer can include a doped polysilicon layer, a silicon oxide layer, and another doped polysilicon layer arranged in a stack. It should be noted that when the charge transport layer includes two or more doped polysilicon layers, the one closest to the first metal electrode is in contact with the first metal electrode.

[0049] According to embodiments of the present application, the material of the first passivation layer can include silicon nitride, and the thickness of the first passivation layer can be 60-100 nm (specifically, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, etc.). In this way, a better passivation effect is achieved.

[0050] As described previously, the first metal electrode can be arranged in the form of a metal gate line, i.e., can include a plurality of spaced metal tracks, include a metal grid, etc. Therefore, according to embodiments of the present application, with reference to Figure 2 The roughened area 111 includes a plurality of spaced sub-roughened areas 1111, and the first metal electrode 4 includes a plurality of spaced first sub-electrodes 42. The orthogonal projection of each first sub-electrode 42 on the crystalline silicon light-absorbing layer 1 is located within one of the sub-roughened areas 1111. The width W1 of each sub-roughened area 1111 is greater than or equal to the width W2 of each first sub-electrode 42. The width W1 of each sub-roughened area is 40-100 μm (specifically, 40 μm, 45 μm, 50 μm, 55 μm, 60 μm, 65 μm, 70 μm, 75 μm, 80 μm, 85 μm, 90 μm, 95 μm, 100 μm, etc.). The width W2 of each first sub-electrode is 10-50 μm (specifically, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm, 50 μm, etc.).

[0051] From a top-down perspective, the first sub-electrode and the sub-roughened area are substantially in the shape of an elongated rectangle. The width W1 of the sub-roughened area and the width W2 of the first sub-electrode are both the length of the short side of the elongated rectangle, which can be measured by observing with a 3D microscope, for example, by measuring the width at 5 points and then taking the average.

[0052] According to embodiments of the present application, the material of the first metal electrode can include at least one of silver, aluminum, and alloys thereof, such as silver and silver-aluminum alloy. In this way, the first metal electrode has better electrical conductivity and lower corrosion performance on the passivation layer, which helps to ensure the passivation effect while reducing the contact resistance between the first metal electrode and the doped polysilicon layer.

[0053] According to an embodiment of the present application, referring to Figure 3 The solar cell further comprises a tunneling layer 5 between the crystalline silicon light-absorbing layer 1 and the charge transport layer 2. Thus, the surface of the crystalline silicon light-absorbing layer can be effectively passivated, the surface dangling bonds can be reduced, and the surface recombination rate can be reduced; the charge can be transported, which helps to improve the current collection efficiency; the ohmic contact with low resistance can be provided; the electric field intensity on the surface of the cell can be reduced, thus reducing the direct influence of the electric field on the charge, which helps to improve the stability and the life of the cell; and the fill factor, the open-circuit voltage and the photoelectric conversion efficiency of the solar cell can be improved.

[0054] According to an embodiment of the present application, the material of the tunneling layer can comprise silicon oxide; the thickness of the tunneling layer is 0.5-2 nm, specifically, 0.5 nm, 0.6 nm, 0.7 nm, 0.8 nm, 0.9 nm, 1 nm, 1.1 nm, 1.2 nm, 1.3 nm, 1.4 nm, 1.5 nm, 1.6 nm, 1.7 nm, 1.8 nm, 1.9 nm, 2 nm, etc.

[0055] According to an embodiment of the present application, referring to Figure 4 The solar cell further comprises an emitter layer 6 on the second side of the crystalline silicon light-absorbing layer 1; a second passivation layer 7 on the side of the emitter layer 6 away from the crystalline silicon light-absorbing layer 1; an anti-reflection layer 8 on the side of the second passivation layer 7 away from the crystalline silicon light-absorbing layer 1; and a second metal electrode 9 penetrating through the anti-reflection layer 6, the second passivation layer 7 and the emitter layer 8, and contacting the crystalline silicon light-absorbing layer 1.

[0056] According to an embodiment of the present application, the material of the emitter layer comprises a boron-diffused emitter layer, i.e. a part of boron atoms diffused into the crystalline silicon substrate to form a boron-diffused emitter layer.

[0057] According to an embodiment of the present application, the second passivation layer can be a single-layer structure or a multi-layer structure. As an example, the second passivation layer can comprise a plurality of second sub-passivation layers stacked together, and the hydrogen content in the plurality of second sub-passivation layers gradually increases along the direction away from the crystalline silicon light-absorbing layer. Specifically, the hydrogen content in the outer layer (i.e. the layer away from the light-absorbing layer) is high, which can effectively passivate defects and reduce recombination; and the hydrogen content in the inner layer is low, which can facilitate the sintering of the conductive paste in the process of preparing the second metal electrode.

[0058] According to an embodiment of the present application, the material of the second passivation layer can comprise at least one of silicon oxide and aluminum oxide; and the thickness of the second passivation layer is 1 nm-10 nm, specifically, 1 nm, 2 nm, 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, 10 nm, etc.

[0059] According to embodiments of the present application, the second metal electrode can also be provided in the form of metal grid lines or metal grid, etc. In some embodiments, the material of the second metal electrode can include at least one of silver, aluminum and alloys thereof, such as silver, silver-aluminum alloy, etc. Thus, the second metal electrode has better conductivity, and the effect of collecting and conducting current is better.

[0060] In a second aspect, the present application provides a method for preparing the solar cell described above. According to embodiments of the present application, the method comprises the following steps:

[0061] S1: performing laser oxidation treatment on a predetermined region on the first side surface of the crystalline silicon light-absorbing layer to form an oxidation protective layer on the predetermined region, and the flowchart is shown in Figure 5 .

[0062] According to embodiments of the present application, the crystalline silicon light-absorbing layer used in this step can be a crystalline silicon light-absorbing layer obtained after necessary pretreatment of a crystalline silicon substrate. The specific pretreatment can be selected according to actual needs. For example, the crystalline silicon substrate can be subjected to texturing treatment to obtain the crystalline silicon light-absorbing layer.

[0063] According to embodiments of the present application, in this step, the laser oxidation treatment refers to laser irradiation on the predetermined region to convert part of the thickness of the textured structure into an oxide layer, so that the textured structure can be protected from being damaged in the subsequent steps.

[0064] Specifically, in this step, the laser oxidation treatment can use a nanosecond laser or a picosecond laser, and the wavelength of the laser can be 300 nm to 600 nm. As a specific example, a 355 nm picosecond laser can be selected. The diameter of the laser spot can be 40 μm to 100 μm, and specific examples include 40 μm, 45 μm, 50 μm, 55 μm, 60 μm, 65 μm, 70 μm, 75 μm, 80 μm, 85 μm, 90 μm, 95 μm, 100 μm, etc. According to needs, high-purity oxygen can be introduced during laser oxidation treatment to improve the density of the oxide layer and increase the protection of the oxidation protective layer.

[0065] It can be understood that in this step, the diameter of the laser spot determines the width of the sub-textured region. A laser with a smaller spot diameter is preferably selected to obtain a sub-textured region with a smaller width, which in turn facilitates the reduction of the width of the first sub-electrode and the reduction of the light-shielding area of the first metal electrode. As mentioned above, due to the size of the laser spot diameter, the width of the sub-textured region is greater than the width of the first sub-electrode. However, such arrangement facilitates the preparation of the first sub-electrode, which can provide a larger processing allowance and reduce the difficulty of preparation.

[0066] S2: polishing the first side surface of the crystalline silicon light-absorbing layer and removing the oxidation protective layer to form a textured region and a polished region, for which refer to the flowchart Figure 5 .

[0067] In this step, the first side surface of the crystalline silicon light-absorbing layer can be polished by a conventional method, for example, the surface can be polished with an alkali solution, the textured structure of the surface not protected by the oxidation protective layer is removed to form a polished surface, and the surface protected by the oxidation protective layer does not react with the alkali solution and retains the textured structure.

[0068] In this step, the oxidation protective layer can be removed by acid washing or the like, and after the oxidation protective layer is removed, the crystalline silicon light-absorbing layer having both the polished region and the textured region is obtained.

[0069] S3: sequentially forming a charge transport layer and a first passivation layer on the first side surface of the crystalline silicon light-absorbing layer after the polishing.

[0070] Specifically, the charge transport layer can be prepared by chemical vapor deposition or plasma-enhanced chemical vapor deposition.

[0071] In some embodiments, forming the charge transport layer comprises: depositing an intrinsic polysilicon layer by chemical vapor deposition, and then doping the polysilicon layer by ion diffusion or ion implantation to obtain a doped polysilicon layer.

[0072] In some embodiments, forming the charge transport layer comprises: obtaining a pre-prepared polysilicon layer by plasma-enhanced chemical vapor deposition, and annealing the pre-prepared polysilicon layer to obtain the doped polysilicon layer.

[0073] In some embodiments, forming the first passivation layer can comprise: forming the first passivation layer by plasma-enhanced chemical vapor deposition.

[0074] S4: printing a first conductive paste on the surface of the first passivation layer away from the crystalline silicon light-absorbing layer, and then sequentially performing high-temperature sintering, photo-injection treatment, and laser enhancement treatment to form a first metal electrode.

[0075] In this step, the first conductive paste can be printed by a method such as screen printing, and then high-temperature sintering and photo-injection treatment are performed, and then the first conductive paste can be subjected to laser enhancement treatment to form an arc contact site.

[0076] Specifically, in this step, the high-temperature sintering and the light injection treatment can be performed according to conventional operations in the field, for example, the high-temperature sintering can be performed by placing the intermediate product after the first conductive paste is coated at a temperature of 700-800°C, and then placing the sintered intermediate product under a light source to work under certain light conditions, usually for several minutes to several hours.

[0077] Specifically, the laser enhancement treatment can be performed by using a laser to irradiate the first conductive paste after the light injection treatment. In this step, a nanosecond laser or a picosecond laser can be used, and the wavelength of the laser can be 300-600 nm. As a specific example, a 355 nm picosecond laser can be selected. The diameter of the laser spot can be 40-100 μm, specifically 40 μm, 45 μm, 50 μm, 55 μm, 60 μm, 65 μm, 70 μm, 75 μm, 80 μm, 85 μm, 90 μm, 95 μm, 100 μm, etc.

[0078] In this step, a first conductive paste with low corrosion can be used, so that the contact resistance can be reduced while ensuring the passivation contact effect.

[0079] In some embodiments, based on the total mass of the first conductive paste, the first conductive paste includes 83-90% silver powder, 0.5-3% glass powder, and 7-12% organic phase. Specifically, based on the total mass of the first conductive paste, the mass percentage of silver powder in the first conductive paste can be specifically 83%, 84%, 85%, 86%, 87%, 88%, 89%, 90%, etc.; the mass percentage of glass powder in the first conductive paste can be specifically 0.5%, 1%, 1.5%, 2%, 2.5%, 3%, etc.; and the mass percentage of the organic phase in the first conductive paste can be specifically 7%, 7.5%, 8%, 8.5%, 9%, 9.5%, 10%, 10.5%, 11%, 11.5%, 12%, 12.5%, 13%, etc.

[0080] It can be understood that the organic phase in the first conductive paste has the functions of adjusting the rheological properties, printing properties and drying properties of the paste to adapt to different processing requirements. In some embodiments, the organic phase in the first conductive paste can include solvents and binders, and according to the needs of use, can also include plasticizers, curing agents, leveling agents, stabilizers, thixotropic agents and fillers, etc.

[0081] As an example, the binder can include Acrylic Resins, Epoxy Resins and Phenolic Resins, etc., for providing adhesion and stability of the silver paste.

[0082] As an example, the solvent can include alcohols (such as ethanol, isopropyl alcohol), ketones (such as acetone, methyl ethyl ketone), and esters (such as ethyl acetate, butyl butyrate), etc., for adjusting the viscosity and fluidity of the silver paste.

[0083] According to an embodiment of the present application, before forming the charge transport layer, the method further comprises: S5: forming a tunneling layer on the first side surface of the crystalline silicon light-absorbing layer by a plasma-enhanced chemical vapor deposition method.

[0084] According to an embodiment of the present application, the method further comprises: S6: forming an emitter layer on the second side surface of the crystalline silicon light-absorbing layer by an ion diffusion method; S7: forming a second passivation layer on the surface of the emitter layer away from the crystalline silicon light-absorbing layer by an atomic layer deposition method; S8: forming an anti-reflection layer on the surface of the second passivation layer away from the crystalline silicon light-absorbing layer by a plasma-enhanced chemical vapor deposition method; and S9: forming a second metal electrode on the surface of the anti-reflection layer away from the crystalline silicon light-absorbing layer by sequentially printing and sintering.

[0085] In a third aspect, the present application provides a solar cell module. According to an embodiment of the present application, the solar cell module comprises the solar cell described above or the solar cell prepared by the method described above. The solar cell module has higher open-circuit voltage and photoelectric conversion effect.

[0086] In a fourth aspect, the present application provides a power utilization device. According to an embodiment of the present application, the power utilization device comprises the solar cell module described above. The power utilization device has all the features and advantages of the solar cell module described above, which will not be repeated here.

[0087] It can be understood that the specific type of the power utilization device is not particularly limited, for example, including but not limited to vehicles, wearable devices, game consoles, detection devices, lighting devices, energy storage devices, etc. It can also be understood that in addition to the solar cell module described above, the power utilization device can also include necessary structures and components, which can be specifically referred to conventional technologies, and the present application is not particularly limited.

[0088] Embodiments of the present application will be described in detail below.

[0089] Embodiment 1

[0090] (1) N-type silicon substrate is selected, the thickness of the silicon substrate is 130 μm, the reflectivity is 10% by slot-type alkali texturing, and the pyramid base size is 1 μm;

[0091] (2) After the texturing of the silicon substrate, high-temperature boron diffusion is performed by introducing BCl3 and O2, the bonding temperature is 1050°C, and the bonding time is 4600s, forming a boron diffusion layer with a sheet resistance of 400Ω / □, which is the emitter layer;

[0092] (3) After the boron diffusion of the silicon substrate, the BSG (boron-silicon glass) formed on the back surface (i.e. the first side) is etched using a chain-type HF, and then laser oxidation treatment is performed on the gate line area designed on the back surface using a laser, wherein the laser uses a 355nm violet laser, and the laser spot diameter is 50μm. High-purity oxygen can be introduced during laser oxidation treatment to improve the density of the oxidation layer and increase the protective property of the mask (i.e. the oxidation protective layer);

[0093] (4) After the formation of the patterned mask, the silicon substrate is subjected to etching of the non-laser area using an alkaline solution in a slot-type etching machine, forming a polished area, while the silicon oxide mask has certain corrosion resistance to the alkaline solution, and the textured structure under the mask is preserved, forming a textured area, and the area ratio of the textured area is 5%. After that, the back surface textured area is subjected to secondary modification through acid washing, alkaline washing, acid washing, and water washing in the slot-type etching machine, and the reflectivity of the back surface textured area is 30%, while the reflectivity of the back surface polished area is 53%;

[0094] (5) The back surface charge transport layer and the tunneling layer are prepared, i.e. the deposition of the back surface tunneling layer and the phosphorus-doped polycrystalline silicon layer (i.e. the doped polycrystalline silicon layer) is performed. The back surface tunneling layer and the phosphorus-doped polycrystalline silicon can be deposited in the same tube using plasma-enhanced chemical vapor deposition (PECVD). The tunneling layer needs to be subjected to in-situ oxidation deposition by introducing N2O, and the thickness of the silicon oxide is 1.2nm. The phosphorus-doped polycrystalline silicon needs to be deposited by introducing SiH4, phosphine, and H2, and the total thickness is 110nm. Then, 10nm of an oxide layer is formed by introducing SiH4 and N2O to serve as a protective layer (MASK). After that, high-temperature annealing is performed to activate the phosphorus atoms, and the annealing temperature is 895°C. After annealing, the sheet resistance is 45Ω / □, and the doping concentration is 5×10 20 atoms·cm -3 ;

[0095] (6) After the annealing of the silicon substrate, the MASK formed on the front surface is etched using a chain-type HF, and then the silicon substrate is subjected to a stripping process to remove the phosphorus-doped polycrystalline silicon, the tunneling layer, the BSG on the front surface, and the MASK on the back surface, which is to avoid battery leakage;

[0096] (7) The silicon wafer is sequentially coated with aluminum oxide (i.e. the second passivation layer) on the front surface (the second side) + silicon nitride (i.e. the anti-reflection layer) on the front surface + silicon nitride (i.e. the first passivation layer) on the back surface.

[0097] (8) The second passivation layer of aluminum oxide can be formed by atomic layer deposition (ALD) and has a thickness of 5 nm. The passivation layer of aluminum oxide is an aluminum oxide stack comprising an aluminum oxide layer 1 and an aluminum oxide layer 2, the hydrogen content of the aluminum oxide layer 2 being higher than the hydrogen content of the aluminum oxide layer 1, the hydrogen content being controlled by the flow rate of H2O introduced;

[0098] (9) The front side antireflection layer of silicon nitride comprises silicon nitride, silicon oxynitride and silicon oxide, is formed by PECVD, and has a total thickness of 75 nm. The specific structure from inside to outside (i.e. away from the silicon substrate) is silicon nitride, silicon oxynitride and silicon oxide.

[0099] (10) The first passivation layer of silicon nitride on the back side comprises silicon nitride and silicon oxynitride, is formed by PECVD, and has a total thickness of 85 nm. The first passivation layer also serves as an antireflection layer.

[0100] (11) The front and back sides of the silicon substrate are screen printed with low-etching silver paste, and after high-temperature sintering (peak temperature of 760°C), the paste is subjected to photo injection treatment, and then the conductive paste is subjected to laser enhancement treatment to form the first metal electrode on the back side and the second metal electrode on the front side, thereby completing the preparation of the complete cell.

[0101] The second metal electrode is connected to the boron emitter layer, and the first metal electrode is connected to the phosphorus-doped polysilicon layer to form an ohmic contact. The silver paste used to form the second metal electrode is from Shengyi with model number SSP-995PF-BFB-TL. The silver paste used to form the first metal electrode is a low-etching pure silver paste (silver powder 88%, glass powder 2%, organic phase 10%) and is subjected to laser enhancement treatment to optimize the contact. The paste in the first metal electrode forms a hemispherical contact with a radius of 50 μm.

[0102] Comparative Example 1

[0103] (1) An N-type silicon substrate with a thickness of 130 μm is selected, and is subjected to groove-type alkali texturing to have a reflectivity of 10% and a pyramid base size of 1 μm.

[0104] (2) The silicon substrate after texturing is subjected to high-temperature boron diffusion by introducing BCl3 and O2, and is subjected to a bonding temperature of 1040°C and a bonding time of 5600 s to form a boron diffusion layer with a sheet resistance of 130 Ω / □, i.e. an emitter layer.

[0105] (3) The silicon substrate after boron diffusion is etched by a chain-type HF to form a BSG on the back side, and then is etched by an alkali using a groove-type etching machine to form a polished surface with a reflectivity of 53%.

[0106] (4) After cleaning, the silicon substrate is subjected to deposition of a back tunneling layer and a phosphorus-doped polysilicon layer. The back tunneling layer and the phosphorus-doped polysilicon layer can be deposited in the same tube by using plasma enhanced chemical vapor deposition (PECVD). The tunneling layer is subjected to in-situ oxidation deposition by introducing N2O, and the thickness of the silicon oxide is 1.2 nm. The phosphorus-doped polysilicon layer is deposited by introducing SiH4, phosphine and H2, and the total thickness is 110 nm. Then, 10 nm of an oxide layer is formed by introducing SiH4 and N2O to serve as a protective layer (MASK). Subsequently, high-temperature annealing is performed to activate the phosphorus atoms, and the annealing temperature is 895°C. After annealing, the sheet resistance is 45 Ω / □, and the doping concentration is 5×1019 atoms·cm-2. 20 atoms·cm -3 ;

[0107] (5) After annealing, the silicon substrate is etched by using a chain of HF to etch the MASK formed on the front surface, and then the silicon substrate is subjected to a stripping process to remove the phosphorus-doped polysilicon layer and the tunneling layer on the front surface, remove the BSG on the front surface, and remove the MASK on the back surface. This step aims to avoid battery leakage.

[0108] (6) After the emitter layer and the back charge transport layer are prepared, the silicon substrate is successively subjected to front aluminum oxide + front silicon nitride + back silicon nitride film coating.

[0109] (7) The second aluminum oxide passivation layer can be formed by atomic layer deposition (ALD), and the thickness is 5 nm. The aluminum oxide passivation layer is an aluminum oxide stack, including an aluminum oxide layer 1 and an aluminum oxide layer 2. The hydrogen content of the aluminum oxide layer 2 is higher than that of the aluminum oxide layer 1, and the hydrogen content is controlled by the flow rate of H2O introduced.

[0110] (8) The front silicon nitride anti-reflection layer includes silicon nitride, silicon oxynitride and silicon oxide, and is formed by PECVD. The specific structure from the inside to the outside is silicon nitride, silicon oxynitride and silicon oxide, and the total thickness is 75 nm.

[0111] (9) The back silicon nitride first passivation layer includes silicon nitride and silicon oxynitride, and is formed by PECVD. The specific structure from the inside to the outside is silicon nitride and silicon oxynitride, and the total thickness is 85 nm. The first passivation layer also serves as an anti-reflection layer.

[0112] (10) The front and back surfaces are both subjected to screen printing of conductive paste. The front surface uses silver-aluminum paste with a model number of SSP-995PF from Shangyin, and the back surface uses pure silver paste with a model number of SSP-995PF-BF from Shangyin. After high-temperature sintering, the first metal electrode and the second metal electrode are formed by light injection treatment, and the complete battery is prepared.

[0113] Among them, the second metal electrode is connected with the boron-doped emitter layer, and the first metal electrode is connected with the phosphorus-doped polysilicon layer to form an ohmic contact.

[0114] Performance test: the battery efficiency Eta, open circuit voltage Uoc, short circuit current Jsc and fill factor FF of the solar cells prepared in the above examples and comparative examples were tested by a halm electrical performance tester from Germany. The test results are shown in Table 1.

[0115] Table 1

[0116] Eta / % Uoc / V Jsc / (mA / cm2) FF / % Comparative Example 1 24.88 0.7263 41.08 83.40 Example 1 25.30 0.7362 41.13 83.54

[0117] As can be clearly seen from the data in Table 1, the solar cells in the examples form hemispherical contact sites, reduce the contact resistance, and at the same time can reduce the recombination, and the battery efficiency Eta, open circuit voltage Uoc, short circuit current Jsc and fill factor FF of the solar cells are all obviously improved.

[0118] In the description of the present application, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application.

[0119] In addition, the terms "first", "second" are only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined with "first", "second" can explicitly or implicitly include at least one of the features. In the description of the present application, the meaning of "a plurality of" is at least two, such as two, three, etc., unless otherwise specifically limited.

[0120] In the present application, unless otherwise specifically defined and limited, the terms "mounting", "connecting", "connecting", "fixing" and the like should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanically connected, or it can be electrically connected or in communication with each other; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication or interaction relationship of two elements, unless otherwise specifically limited. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0121] In the present application, unless otherwise explicitly specified and limited, a first feature is "on" or "under" a second feature can mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, the first feature is "over", "above" and "on top of" the second feature can mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is horizontally higher than the second feature. The first feature is "under", "below" and "underneath" the second feature can mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is horizontally lower than the second feature.

[0122] In the description of the present application, the description of the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present application, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any appropriate manner in one or more embodiments or examples. In addition, the person skilled in the art can combine and combine the different embodiments or examples described in the present application and the features of the different embodiments or examples without contradiction.

[0123] Although the embodiments of the present application have been shown and described above, it is understood that the above-described embodiments are exemplary and are not to be construed as limiting the present application, and the person skilled in the art can make changes, modifications, replacements and variations to the above-described embodiments within the scope of the present application.

Claims

1. A solar cell, characterized in that: include: a crystalline silicon light absorbing layer having a first side and a second side opposite to each other; a charge transport layer, located on a first side of the crystalline silicon light absorption layer and comprising a doped polysilicon layer; a first passivation layer, located on a side of the charge transport layer away from the crystalline silicon light absorption layer; a first metal electrode, the first metal electrode penetrating the first passivation layer and contacting the doped polysilicon layer; The surface of the crystalline silicon light absorption layer close to the first metal electrode includes a textured area and a polished area, and the orthographic projection of the first metal electrode on the crystalline silicon light absorption layer is located in the textured area; At least a portion of the surface of the doped polysilicon layer in contact with the first metal electrode has a curved surface pit that is recessed toward the doped polysilicon layer, and at least a portion of the surface of the first metal electrode in contact with the doped polysilicon layer has a curved surface protrusion that is protruded toward the doped polysilicon layer, and the curved surface protrusion is cooperatively disposed in the curved surface pit; The surface of the doped polysilicon layer in contact with the first metal electrode includes a plurality of protruding structures protruding toward the first metal electrode, and the arc-surface pits are located on the surfaces of the protruding structures.

2. The solar cell according to claim 1, wherein The size of the protruding structure base is 0.5 μm to 2 μm.

3. The solar cell according to claim 1, wherein The arc surface pit includes a hemispherical pit.

4. The solar cell according to claim 3, characterized in that The radius of the hemispherical pit is 10 nm to 180 nm.

5. The solar cell according to claim 1, wherein The surface of the crystalline silicon light absorption layer close to the first metal electrode satisfies at least one of the following conditions: The area of ​​the suede area accounts for 0.5% to 7%; The reflectivity of the suede area is 5% to 35%; The reflectivity of the polished area is 40% to 70%.

6. The solar cell according to claim 1, wherein The velvet area includes a plurality of spaced-apart sub-velvet areas, the first metal electrode includes a plurality of spaced-apart first sub-electrodes, the orthographic projection of each of the first sub-electrodes on the crystalline silicon light absorption layer is located in one of the sub-velvet areas, the width of each of the sub-velvet areas is greater than or equal to the width of each of the first sub-electrodes, and / or the width of each of the sub-velvet areas is 40μm~100μm; and / or the width of each of the first sub-electrodes is 10μm~50μm.

7. The solar cell according to claim 1, wherein Also includes: The tunneling layer is located between the crystalline silicon light absorption layer and the charge transport layer.

8. The solar cell according to any one of claims 1 to 7, wherein Also includes: an emitter layer, located on the second side of the crystalline silicon light absorbing layer; a second passivation layer, located on a side of the emitter away from the crystalline silicon light absorbing layer; an anti-reflection layer, located on a side of the second passivation layer away from the crystalline silicon light absorbing layer; A second metal electrode is provided, wherein the second metal electrode penetrates the anti-reflection layer, the second passivation layer and the emitter layer and contacts the crystalline silicon light absorption layer.

9. The solar cell according to claim 8, characterized in that The second passivation layer includes a plurality of stacked second sub-passivation layers, and the hydrogen content in the plurality of second sub-passivation layers gradually increases in a direction away from the crystalline silicon light absorption layer.

10. A method for preparing a solar cell according to any one of claims 1 to 9, characterized in that: include: performing laser oxidation on a predetermined area on the first side surface of the crystalline silicon light absorbing layer to form an oxidation protection layer on the predetermined area; Polishing the first side surface of the crystalline silicon light absorbing layer, and then removing the oxidation protection layer to form a textured area and a polished area; forming a charge transfer layer and a first passivation layer in sequence on the first side surface of the polished crystalline silicon light absorption layer; A first conductive paste is printed on a surface of the first passivation layer away from the crystalline silicon light absorption layer, and then high-temperature sintering, light injection treatment and laser enhancement treatment are performed in sequence to form a first metal electrode.

11. The method according to claim 10, characterized in that Based on the total mass of the first conductive paste, the first conductive paste includes 83% to 90% silver powder, 0.5% to 3% glass powder, and 7% to 12% organic phase.

12. The method according to claim 10, characterized in that The wavelength of the laser used in the laser oxidation treatment step and the wavelength of the laser used in the laser enhancement treatment step are independently 300 nm to 600 nm; and / or the spot diameter of the laser is 40 μm to 100 μm.

13. The method according to claim 10, characterized in that Meet at least one of the following conditions: Forming the charge transport layer includes: depositing an intrinsic polysilicon layer by chemical vapor deposition, and then doping the polysilicon layer by ion diffusion or ion implantation to obtain a doped polysilicon layer; Forming the charge transport layer includes: obtaining a prefabricated polysilicon layer by a plasma enhanced chemical vapor deposition method, and annealing the prefabricated polysilicon layer to obtain the doped polysilicon layer; Forming the first passivation layer includes forming the first passivation layer by a plasma enhanced chemical vapor deposition method.

14. The method according to claim 10, characterized in that Before forming the charge transport layer, the method further comprises: A tunneling layer is formed on the first side surface of the crystalline silicon light absorption layer by a plasma enhanced chemical vapor deposition method.

15. The method according to claim 10, characterized in that Also includes: forming an emitter layer on the second side surface of the crystalline silicon light absorption layer by an ion diffusion method; forming a second passivation layer on a surface of the emitter layer away from the crystalline silicon light absorbing layer by atomic layer deposition; forming an anti-reflection layer on a surface of the second passivation layer away from the crystalline silicon light absorbing layer by plasma enhanced chemical vapor deposition; A second metal electrode is formed on the surface of the anti-reflection layer away from the crystalline silicon light absorption layer by sequentially performing printing, sintering and light injection processes.

16. A solar cell module, characterized in that: The invention comprises the solar cell according to any one of claims 1 to 9 or the solar cell prepared by the method according to any one of claims 10 to 15.

17. An electrical device, characterized in that: A solar cell module comprising the solar cell module according to claim 16.

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