Solar cell and preparation method thereof

Abstract

The embodiment of the invention relates to the photovoltaic field, and provides a solar cell and a preparation method thereof. The tunneling layer is located on the surface of the substrate; the transparent electron transport layer is located on the surface of the tunneling layer; the semiconductor doping layer is located on the surface of the transparent electron transport layer; the passivation layer is located on the surface of the semiconductor doping layer; and the electrode is located on the passivation layer, and the electrode is electrically connected with the semiconductor doping layer. The solar cell provided by the embodiment of the invention at least can improve the photoelectric conversion efficiency of the solar cell.

Description

Technical Field

[0001] The present application relates to the photovoltaic field, and in particular to a solar cell and a method for preparing the same. Background Art

[0002] At present, with the gradual depletion of fossil energy, solar cells are becoming more and more widely used as a new energy alternative. Solar cells are devices that convert sunlight into electrical energy. Solar cells use the photovoltaic principle to generate carriers, and then use electrodes to lead the carriers out, thereby facilitating the effective use of electrical energy.

[0003] The current solar cells mainly include IBC cells (Interdigitated Back Contact), TOPCON (Tunnel Oxide Passivated Contact), PERC cells (Passivated emitter and real cell) and heterojunction cells, etc. The photoelectric conversion efficiency of solar cells is improved by reducing optical losses and reducing the recombination of photogenerated carriers on the surface and in the body of the silicon substrate through different film layer settings and functional limitations.

[0004] However, the photoelectric conversion efficiency of current solar cells is still poor. Summary of the invention

[0005] The embodiments of the present application provide a solar cell and a method for preparing the same, which are at least beneficial to improving the photoelectric conversion efficiency of the solar cell.

[0006] According to some embodiments of the present application, on the one hand, the embodiments of the present application provide a solar cell, comprising: a substrate; a tunneling layer, the tunneling layer is located on the surface of the substrate; a transparent electron transport layer, the transparent electron transport layer is located on the surface of the tunneling layer; a semiconductor doping layer, the semiconductor doping layer is located on the surface of the transparent electron transport layer; a passivation layer, the passivation layer is located on the surface of the semiconductor doping layer; an electrode, the electrode is located on the passivation layer, and the electrode is electrically connected to the semiconductor doping layer.

[0007] In some embodiments, the transparent electron transport layer includes a doped zinc oxide layer.

[0008] In some embodiments, the transparent electron transport layer has a first doping element, and the semiconductor doping layer has a second doping element, the second doping element has the same conductivity type as the first doping element; the first doping element is one of an N-type doping element or a P-type doping element.

[0009] In some embodiments, the transparent electron transport layer is further doped with at least one of aluminum or hydrogen; wherein the doping concentration of the aluminum element ranges from 0.1 at% to 50 at%, and the doping concentration of the hydrogen element ranges from 0.1 at% to 30 at%.

[0010] In some embodiments, the invention further comprises: a doping layer, the doping layer being located between the substrate and the tunneling layer, the doping layer containing at least one of the first doping element, the aluminum element or the hydrogen element; wherein the doping concentration of the hydrogen element is greater than 1×10 19 cm -3 .

[0011] In some embodiments, the semiconductor doping layer has a thickness ranging from 1 nm to 100 nm.

[0012] According to some embodiments of the present application, on the other hand, an embodiment of the present application provides a method for preparing a solar cell, comprising: providing a substrate; forming a tunneling layer, wherein the tunneling layer is located on the surface of the substrate; forming a transparent electron transport layer, wherein the transparent electron transport layer is located on the surface of the tunneling layer; forming a semiconductor doping layer, wherein the semiconductor doping layer is located on the surface of the transparent electron transport layer; forming a passivation layer, wherein the passivation layer is located on the surface of the semiconductor doping layer; and forming an electrode, wherein the electrode is located on the passivation layer and is electrically connected to the semiconductor doping layer.

[0013] In some embodiments, a cycle ratio of cyclically repeating the first atomic layer deposition process and the second atomic layer deposition process ranges from 1:1 to 20:1.

[0014] According to some embodiments of the present application, on the other hand, embodiments of the present application provide a photovoltaic module, including: a cell string, which is composed of a plurality of solar cells as described in any one of the above embodiments or a solar cell prepared by the preparation method as described in any one of the listed embodiments; a packaging film for covering the surface of the cell string; and a cover plate for covering the surface of the packaging film facing away from the cell string.

[0015] The technical solution provided by the embodiments of the present application has at least the following advantages: The solar cell provided in the embodiment of the present application has a tunneling layer and a transparent electron transport layer arranged on the surface of the substrate. The tunneling layer can provide chemical passivation and can also serve as a tunneling layer. The transparent electron transport layer can provide passivation capability and serve as a lateral transport layer and a longitudinal transport layer, thereby optimizing the passivation capability and carrier transport capability. The tunneling layer and the transparent electron transport layer can provide a good passivation effect. Secondly, a thin semiconductor doping layer is arranged on the transparent electron transport layer, which can improve the contact performance between the transparent electron transport layer and the electrode, thereby reducing the contact resistance between the electrode and the transparent electron transport layer and improving the photoelectric conversion efficiency of the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] One or more embodiments are exemplarily illustrated by the figures in the corresponding drawings. These exemplified descriptions do not constitute a limitation on the embodiments. Unless otherwise specified, the figures in the drawings do not constitute a scale limitation. In order to more clearly illustrate the embodiments of the present application or the technical solutions in the traditional technology, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0017] Figure 1 A schematic diagram of the structure of a solar cell provided in one embodiment of the present application; Figure 2 Another structural schematic diagram of a solar cell provided in one embodiment of the present application; Figure 3 A schematic diagram of another structure of a solar cell provided in one embodiment of the present application; Figure 4 A schematic structural diagram of a solar cell corresponding to a substrate provided in a method for preparing a solar cell provided in another embodiment of the present application; Figure 5 A schematic structural diagram of a solar cell corresponding to the formation of an oxide layer in a method for preparing a solar cell provided in another embodiment of the present application; Figure 6 Another schematic diagram of the structure of a solar cell corresponding to the formation of an oxide layer in a method for preparing a solar cell provided in another embodiment of the present application; Figure 7 A schematic structural diagram of a solar cell corresponding to the formation of an amorphous silicon layer in a method for preparing a solar cell provided in another embodiment of the present application; Figure 8 A schematic structural diagram of a solar cell corresponding to an annealing process performed in a method for preparing a solar cell provided in another embodiment of the present application; Fig. 9 A schematic structural diagram of a photovoltaic module provided in yet another embodiment of the present application. DETAILED DESCRIPTION

[0018] As can be seen from the background art, the photoelectric conversion efficiency of current solar cells is poor.

[0019] Analysis found that one of the reasons for the poor photoelectric conversion efficiency of solar cells is the poor passivation performance of the substrate.

[0020] An embodiment of the present application provides a solar cell, which forms a tunneling layer and a transparent electron transport layer on the surface of a substrate to passivate the surface of the substrate and reduce the recombination rate on the surface of the substrate; forms a semiconductor doping layer on the surface of the transparent electron transport layer to improve the contact performance between the transparent electron transport layer and the electrode to reduce electrical losses, thereby improving the photoelectric conversion efficiency of the solar cell. In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.

[0021] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0022] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists, A and B exist at the same time, and B exists. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0023] In the description of the embodiments of the present application, the term "multiple" refers to more than two (including two). Similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).

[0024] In the description of the embodiments of the present application, the technical terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, which are only for the convenience of describing the embodiments of the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the embodiments of the present application.

[0025] In the description of the embodiments of the present application, unless otherwise clearly specified and limited, technical terms such as "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal connection of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0026] In the accompanying drawings corresponding to the embodiments of the present application, the thickness and area of ​​the layer are magnified for better understanding and ease of description. When describing a component (such as a layer, film, region or substrate) on another component or on the surface of another component, the component may be "directly" located on the surface of the other component, or a third component may be present between the two components. On the contrary, when describing a component on the surface of another component or when another component is formed or provided on the surface of a component, it means that there is no third component between the two components. In addition, when describing a component as "substantially" formed on another component, it means that the component is not formed on the entire surface (or front surface) of the other component, nor is it formed on a partial edge of the entire surface.

[0027] In the description of the embodiments of the present application, when a component "includes" another component, unless otherwise specified, other components are not excluded, and other components may be further included. In addition, when a component such as a layer, film, region, or plate is referred to as "on / located on" another component, it can be "directly on" the other component (i.e., located on the surface of the other component with no other components between them), or another component may exist in between. In addition, when a component such as a layer, film, region, or plate is "directly located on" another component, or when a component such as a layer, film, region, or plate is located on the surface of another component, it means that no other components are located in between.

[0028] The terms used in the description of the various embodiments described herein are only used to describe specific embodiments and are not intended to be limiting. As used in the description of the various embodiments described and in the appended claims, "the part" is also intended to include the plural form unless the context clearly indicates otherwise. Among them, a component includes a layer, a film, a region, or a plate.

[0029] Figure 1 A schematic diagram of the structure of a solar cell provided in one embodiment of the present application; Figure 2 Another structural schematic diagram of a solar cell provided in one embodiment of the present application; Figure 3 This is another structural schematic diagram of a solar cell provided in one embodiment of the present application. Figure 2~Figure 3 Only the film layer structure on one side of the substrate is shown, and the tunneling layer, transparent electron transport layer, semiconductor doping layer, passivation layer and electrode are all located on this side of the substrate. The surface of the substrate can be the front side of the substrate or the back side of the substrate. The film layer structure on the other side of the substrate can be specifically required or as shown in FIG. Figure 1 The above figures are all used as examples to assist in explaining the technical solution, which does not constitute a limitation on the scope of protection of the embodiments of the present application and all technical solutions.

[0030] refer to Figure 1 On the one hand, an embodiment of the present application provides a solar cell for improving the photoelectric conversion efficiency of a solar cell. The solar cell includes a substrate 100. The solar cell includes a tunneling layer 101, and the tunneling layer 101 is located on the surface of the substrate 100. The solar cell includes a transparent electron transport layer 110, and the transparent electron transport layer 110 is located on the surface of the tunneling layer 101. The solar cell includes a semiconductor doping layer 121, and the semiconductor doping layer 121 is located on the surface of the transparent electron transport layer 110. The solar cell includes a passivation layer 104, and the passivation layer 104 is located on the surface of the semiconductor doping layer 121. The solar cell includes an electrode 105, and the electrode 105 is located on the passivation layer 104, and the electrode 105 is electrically connected to the semiconductor doping layer 121.

[0031] The solar cell provided in the embodiment of the present application has a tunneling layer 101 and a transparent electron transport layer 110 arranged on the surface of the substrate 100. The tunneling layer 101 can provide chemical passivation and can also serve as a carrier tunneling layer. The transparent electron transport layer 110 can provide passivation capability and serve as a lateral transport layer and a longitudinal transport layer, thereby optimizing the passivation capability and the carrier transport capability. The combination of the tunneling layer 101 and the transparent electron transport layer 110 can provide a better passivation effect. Secondly, a thin semiconductor doping layer 121 is arranged on the transparent electron transport layer 110, which can improve the contact performance between the transparent electron transport layer 110 and the electrode 105, thereby reducing the contact resistance between the electrode 105 and the transparent electron transport layer 110 and improving the photoelectric conversion efficiency of the solar cell.

[0032] The following will describe the various embodiments of the present application in detail with reference to the accompanying drawings. However, it will be appreciated by those skilled in the art that in the various embodiments of the present application, many technical details are provided in order to enable the reader to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solution claimed in the present application can be implemented.

[0033] refer to Figure 1 The material of the substrate 100 may be an elemental semiconductor material. Specifically, the elemental semiconductor material is composed of a single element, such as silicon or germanium. The elemental semiconductor material may be in a single crystal state, a polycrystalline state, an amorphous state, or a microcrystalline state (a state having both a single crystal state and an amorphous state is referred to as a microcrystalline state), for example, silicon may be at least one of single crystal silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon.

[0034] In some embodiments, the material of the substrate 100 may also be a compound semiconductor material. Common compound semiconductor materials include but are not limited to silicon germanium, silicon carbide, gallium arsenide, indium gallium, perovskite, cadmium telluride, copper indium selenide and the like. The substrate 100 may also be a sapphire substrate, a silicon on insulator substrate or a germanium on insulator substrate.

[0035] In some embodiments, the substrate 100 may be an N-type semiconductor substrate. The N-type semiconductor substrate is doped with an N-type doping element, and the N-type doping element may be any one of the Group V elements such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As).

[0036] In some embodiments, the solar cell is a single-sided cell, the first side of the substrate 100 can be used as the light-receiving side (front side) for receiving incident light, and the second side of the substrate 100 can be used as the backlight side (back side). The backlight side can also receive incident light, but the efficiency of receiving the incident light is weaker than that of the light-receiving side.

[0037] In one example, the tunneling layer 101 is located on the first surface of the substrate 100 ; in another example, the tunneling layer 101 is located on the second surface of the substrate 100 .

[0038] In some embodiments, the front side of the substrate 100 has a velvet structure, which can improve the internal reflectivity of incident light, thereby improving the photoelectric conversion efficiency. The velvet structure may include a plurality of convex structures, which may be arranged adjacently or spaced apart, or stacked or partially overlapped. The embodiment of the present application does not limit the number, arrangement, and shape of the convex structures.

[0039] The tunneling layer 101 can allow majority carriers to tunnel and block minority carriers to penetrate, thereby separating electrons and holes, reducing the recombination of electrons and holes, and lowering the recombination rate.

[0040] In some embodiments, the tunneling layer 101 may be an ultra-thin silicon oxide layer. The ultra-thin silicon oxide layer causes an asymmetric shift in the energy band on the surface of the substrate 100, so that the barrier to the majority carriers is lower than the barrier to the minority carriers. Therefore, the majority carriers can easily perform quantum tunneling through the silicon oxide layer, while the minority carriers are difficult to pass through the silicon oxide layer to achieve selective transmission of carriers. Secondly, the silicon oxide layer has a chemical passivation effect. Due to the presence of interface state defects at the interface between the substrate 100 and the silicon oxide layer, the interface state density on the surface of the substrate 100 is large. The increase in the interface state density promotes the recombination of photogenerated carriers, thereby reducing the photoelectric conversion efficiency of the solar cell. In other words, the silicon oxide layer reduces the carrier recombination rate by saturating the dangling bonds of the substrate 100, reducing the defect state density of the substrate 100, and reducing the recombination center of the substrate 100.

[0041] In some embodiments, the thickness of the tunneling layer 101 is 0.5 nm to 2 nm. The thickness of the tunneling layer 101 ranges from 0.5 nm to 0.8 nm, 0.8 nm to 1.1 nm, 1.1 nm to 1.6 nm, or 1.6 nm to 2 nm. When the thickness of the tunneling layer 101 is within any of the above ranges, the thickness of the tunneling layer 101 is relatively thin, and majority carriers can easily perform quantum tunneling through the tunneling layer 101, while minority carriers have difficulty passing through the tunneling layer 101, so as to achieve selective transmission of carriers.

[0042] In some embodiments, the material of the tunneling layer 101 may also be at least one of amorphous silicon, microcrystalline silicon, nanocrystalline silicon or silicon carbide.

[0043] The transparent electron transport layer 110 itself has a good light transmittance, thereby reducing the parasitic absorption of incident light and the loss of short-wavelength light caused by the film layer itself. Secondly, the transparent electron transport layer 110 can have a lateral transmission capability, thereby increasing the lateral transmission rate of carriers of the solar cell, thereby increasing the photoelectric conversion efficiency of the solar cell. Thirdly, the transparent electron transport layer 110 itself has a large electron affinity, and electrons can move more easily in the transparent conductive layer, so that it can be used as a selection layer to separate electrons and holes, thereby increasing the carrier transmission rate.

[0044] In some embodiments, the transparent electron transport layer 110 includes a doped zinc oxide layer. The doped zinc oxide layer not only has a high electron transport efficiency, but also has hydroxyl groups and oxygen vacancies in the zinc oxide layer, which can chemically passivate and hydrogen passivate the substrate 100, thereby reducing the recombination rate and improving the photoelectric conversion efficiency of the solar cell.

[0045] In some embodiments, the transparent electron transport layer 110 is further doped with at least one of aluminum or hydrogen; wherein the doping concentration of the aluminum element is in the range of 0.1 at% to 50 at%, and the doping concentration of the hydrogen element is in the range of 0.1 at% to 30 at%. The high doping concentrations of the aluminum element and the hydrogen element can reduce the energy barrier height around the c-Si surface, thereby increasing the asymmetry of the carriers and reducing the surface recombination.

[0046] It should be noted that "at%" refers to atomic percentage, which indicates the percentage of atoms of an element in a substance. For example, if the doping concentration of aluminum is 1 at%, and the transparent electron transport layer contains aluminum, oxygen, and zinc, then the calculation formula for the doping concentration of aluminum is the number of atoms of aluminum divided by (the number of atoms of aluminum + the number of atoms of oxygen + the number of atoms of zinc), and the result is 1 at%.

[0047] The doping concentration of the aluminum element may range from 0.1 at% to 10 at%, from 10 at% to 20 at%, from 20 at% to 30 at%, from 30 at% to 40 at% or from 40 at% to 50 at%. The doping concentration of the aluminum element may range from 2 at%, from 8 at%, from 13 at%, from 17 at%, from 25 at%, from 31 at%, from 36 at%, from 43 at% or from 50 at%.

[0048] The doping concentration of the hydrogen element may range from 0.1 at% to 8 at%, 8 at% to 15 at%, 15 at% to 22 at%, 22 at% to 26 at% or 26 at% to 30 at%. The doping concentration of the hydrogen element may range from 0.2 at%, 3 at%, 6 at%, 9 at%, 13 at%, 16 at%, 22 at%, 28 at% or 30 at%.

[0049] In some embodiments, the thickness h1 of the transparent electron transport layer 110 ranges from 1 nm to 100 nm. The thickness h1 of the transparent electron transport layer 110 ranges from 1 nm to 10 nm, 10 nm to 20 nm, 20 nm to 30 nm, 30 nm to 40 nm, 40 nm to 50 nm, 50 nm to 60 nm, 60 nm to 80 nm, or 90 nm to 100 nm. The thickness h1 of the transparent electron transport layer 110 may be 2 nm, 15 nm, 23 nm, 38 nm, 47 nm, 61 nm, 76 nm, 81 nm, 93 nm, or 100 nm.

[0050] In some embodiments, reference Figure 2 , the transparent electron transport layer 110 includes a laminated aluminum oxide layer 112 and a zinc oxide layer 111. The total thickness of the laminated aluminum oxide layer 112 and the zinc oxide layer 111 is the thickness h1 of the transparent electron transport layer 110. The thickness of each aluminum oxide layer 112 and the distribution of doping elements can be set according to actual needs, and the thickness of each zinc oxide layer 111 and the distribution of doping elements can be set according to actual needs.

[0051] In some embodiments, the number of zinc oxide layers 111 between each adjacent aluminum oxide layer 112 ranges from 0 to 3. The thickness of the zinc oxide layer 111, the thickness of the aluminum oxide layer 112, and the distribution of the stacking between the zinc oxide layer 111 and the aluminum oxide layer 112 are controlled to control the transparent conductivity, work function, and valence band of the transparent electron transport layer 110 finally formed, thereby optimizing the field effect passivation effect.

[0052] The semiconductor doping layer 121 has a field passivation effect. Specifically, an electrostatic field pointing to the inside of the substrate 100 is formed on the surface of the substrate 100, so that minority carriers escape from the interface, thereby reducing the minority carrier concentration, so that the carrier recombination rate at the interface of the substrate 100 is reduced, thereby increasing the open circuit voltage, short circuit current and fill factor of the solar cell, and improving the photoelectric conversion efficiency of the solar cell. The semiconductor doping layer 121 is also used to reduce the contact resistance between the electrode 105 and the semiconductor doping layer 121.

[0053] In some embodiments, the thickness h2 of the semiconductor doping layer 121 ranges from 1 nm to 100 nm. Thus, since the transparent electron transport layer 110 is used as a part of the passivation layer 104 , the semiconductor doping layer 121 can be set to be relatively thin, thereby reducing the optical absorption of the semiconductor doping layer 121 .

[0054] Wherein, the thickness h2 of the semiconductor doping layer 121 ranges from 1 nm to 100 nm. The thickness h2 of the semiconductor doping layer 121 ranges from 1 nm to 10 nm, 10 nm to 20 nm, 20 nm to 30 nm, 30 nm to 40 nm, 40 nm to 50 nm, 50 nm to 60 nm, 60 nm to 80 nm or 90 nm to 100 nm. The thickness h2 of the semiconductor doping layer 121 can be 2 nm, 15 nm, 23 nm, 38 nm, 47 nm, 61 nm, 76 nm, 81 nm, 93 nm or 100 nm.

[0055] The semiconductor doping layer 121 may be a doped polysilicon layer, a doped amorphous silicon layer or a doped microcrystalline silicon layer.

[0056] In some embodiments, the transparent electron transport layer 110 has a first doping element, and the semiconductor doping layer 121 has a second doping element, and the second doping element has the same conductivity type as the first doping element; the first doping element is one of an N-type doping element or a P-type doping element. In this way, the doping element in the transparent electron transport layer 110 and the doping element in the semiconductor doping layer 121 can be a doping element of the same conductivity type, and the doping element can serve as a conductive medium between the semiconductor doping layer 121 and the transparent electron transport layer 110, thereby improving the carrier transmission efficiency.

[0057] In some embodiments, the doping concentration of the second doping element in the semiconductor doping layer 121 is greater than the doping concentration of the first doping element in the transparent electron transport layer 110, so that the semiconductor doping layer 121 and the transparent electron transport layer 110 can form a high-low junction, thereby prompting carriers to move quickly to the semiconductor doping layer 121, and then be collected by the electrode 105. The low doping concentration in the transparent electron transport layer 110 can avoid parasitic absorption caused by the high doping concentration of the transparent electron transport layer 110; and the high doping concentration of the semiconductor doping layer 121 can reduce the contact resistance between the semiconductor doping layer 121 and the electrode 105 to reduce electrical losses.

[0058] In some embodiments, the doping concentration of the first doping element in the transparent electron transport layer 110 is uniformly doped or gradiently doped, that is, the closer to the substrate 100, the lower the doping concentration. The doping concentration of the second doping element in the semiconductor doping layer 121 is uniformly doped or gradiently doped, that is, the closer to the substrate 100, the lower the doping concentration.

[0059] In some embodiments, reference Figure 3The solar cell further includes: a doping layer 106, the doping layer 106 is located between the substrate 100 and the tunneling layer 101, and the doping layer 106 contains at least one of a first doping element, an aluminum element, or a hydrogen element; wherein the doping concentration of the hydrogen element is greater than 1×10 19 cm -3 In this way, the doping layer 106 can serve as a hydrogen-passivated substrate layer, reducing the carrier recombination centers on the surface of the substrate 100, thereby reducing the recombination rate and improving the photoelectric conversion efficiency of the solar cell.

[0060] In some embodiments, the aluminum concentration in the doping layer 106 is in the range of 1×10 17 ~5×10 20 cm -3 , phosphorus concentration range is 1×10 17 ~5×10 20 cm -3 , as the doping depth increases, the concentrations of hydrogen, aluminum and phosphorus in the crystalline silicon substrate gradually decrease.

[0061] The passivation layer 104 may be a single-layer structure or a stacked-layer structure, and the material of the passivation layer 104 may be one or more of silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride oxide, titanium oxide, hafnium oxide, aluminum oxide, and the like.

[0062] The material of the electrode 105 includes a conductive material such as silver, aluminum, and gold, and the electrode 105 is in electrical contact with the semiconductor doping layer 121. The contact between the electrode 105 and the semiconductor doping layer 121 can be surface-to-surface contact, or the electrode 105 penetrates a portion of the thickness of the semiconductor doping layer 121 and is in electrical contact with the semiconductor doping layer 121.

[0063] Continue to refer Figure 1 The solar cell further includes: a first doping layer 107, the first doping layer 107 is located on a side of the substrate 100 away from the tunneling layer 101; a first passivation layer 108, the first passivation layer 108 is located on a surface of the first doping layer 107; a first electrode 109, the first electrode 109 is located on a surface of the first passivation layer 108, and the first electrode 109 is in electrical contact with the first doping layer 107.

[0064] In one example, the semiconductor doping layer is doped with a doping element of the same conductivity type as the substrate, such as an N-type doping element; the first doping layer is doped with a doping element of another conductivity type, such as a P-type doping element, and the first doping layer serves as an emitter. The side of the substrate in contact with the first doping layer is the front side of the substrate, and the side of the substrate in contact with the tunneling layer is the back side of the substrate, and the solar cell is a positive junction solar cell.

[0065] In one example, the semiconductor doping layer is doped with a doping element of the same conductivity type as the substrate, such as an N-type doping element; the first doping layer is doped with a doping element of another conductivity type, such as a P-type doping element, and the first doping layer serves as an emitter. The side of the substrate in contact with the first doping layer is the back side of the substrate, and the side of the substrate in contact with the tunneling layer is the front side of the substrate, and the solar cell is a back junction solar cell.

[0066] In one example, the semiconductor doping layer is doped with doping elements of a different conductivity type from that of the substrate, for example, the substrate is doped with P-type doping elements, and the semiconductor doping layer is doped with N-type doping elements; the first doping layer is doped with doping elements of the same conductivity type as that of the substrate, for example, P-type doping elements. The side of the substrate in contact with the first doping layer is the front side of the substrate, and the side of the substrate in contact with the tunneling layer is the back side of the substrate, and the solar cell is a back junction solar cell.

[0067] In one example, the semiconductor doping layer is doped with doping elements of a different conductivity type from that of the substrate, for example, the substrate is doped with P-type doping elements, and the semiconductor doping layer is doped with N-type doping elements; the first doping layer is doped with doping elements of the same conductivity type as that of the substrate, for example, P-type doping elements. The side of the substrate in contact with the first doping layer is the back side of the substrate, and the side of the substrate in contact with the tunneling layer is the front side of the substrate, and the solar cell is a positive junction solar cell.

[0068] It should be noted that the "junction" mentioned above refers to a PN junction. The doping element type of the substrate in the above example is only an example, and it is only necessary to satisfy that the doping element of the semiconductor doping layer is one of the N-type doping element or the P-type doping element, the doping element in the first doping layer is the other of the N-type doping element or the P-type doping element, and the doping element type of the substrate is the same as that of the semiconductor doping layer or the first doping layer of the same type.

[0069] The solar cell provided in the embodiment of the present application has a tunneling layer 101 and a transparent electron transport layer 110 arranged on the surface of the substrate 100. The tunneling layer 101 can provide chemical passivation and can also serve as a carrier tunneling layer. The transparent electron transport layer 110 can provide passivation capability and serve as a lateral transport layer and a longitudinal transport layer, thereby optimizing the passivation capability and the carrier transport capability. The combination of the tunneling layer 101 and the transparent electron transport layer 110 can provide a better passivation effect. Secondly, a thin semiconductor doping layer 121 is arranged on the transparent electron transport layer 110, which can improve the contact performance between the transparent electron transport layer 110 and the electrode 105, thereby reducing the contact resistance between the electrode 105 and the transparent electron transport layer 110 and improving the photoelectric conversion efficiency of the solar cell.

[0070] Correspondingly, another aspect of an embodiment of the present application provides a method for preparing a solar cell, which is used to prepare the solar cell provided by the above embodiment. The technical features that are the same as or corresponding to the above embodiment will not be described in detail here.

[0071] Figure 4~Figure 8 A schematic diagram of the structure of a solar cell corresponding to each step in a method for preparing a solar cell provided in another embodiment of the present application.

[0072] refer to Figure 4 The preparation method includes: providing a substrate 100.

[0073] In some embodiments, the material of the substrate 100 may be an elemental semiconductor material or a compound semiconductor material.

[0074] In some embodiments, the substrate 100 has a first surface and a second surface opposite to each other. The first surface of the substrate 100 may be a front surface or a back surface, and the second surface may be the other of the front surface and the back surface.

[0075] In some embodiments, the front surface of the substrate 100 has a velvet structure, which may be formed by a velvet treatment.

[0076] refer to Figure 5 The preparation method includes: forming a tunneling layer 101 , where the tunneling layer 101 is located on a surface of a substrate 100 .

[0077] In some embodiments, the thickness of the tunneling layer 101 is 0.5 nm to 2 nm. The material of the tunneling layer 101 can be at least one of silicon oxide, amorphous silicon, microcrystalline silicon, nanocrystalline silicon or silicon carbide.

[0078] In some embodiments, the tunneling layer 101 may be formed by LPCVD (Low Pressure Chemical Vapor Deposition), oxygen plasma surface treatment, UV / ozone oxidation, RCA solution method, thermal oxidation, thermal nitric acid method, atomic layer deposition, or the like.

[0079] In some embodiments, if the tunneling layer 101 is a material layer other than a silicon oxide layer, it can also be formed by processes such as plasma immersion ion implantation, magnetron sputtering, atomic layer deposition, sol-gel method, and pulsed laser deposition.

[0080] refer to Figures 5 to 8 The preparation method includes: forming a transparent electron transport layer 110, which is located on the surface of the tunneling layer 101; and forming a semiconductor doping layer 121, which is located on the surface of the transparent electron transport layer 110.

[0081] refer to Figure 5 The preparation method includes: forming an oxide layer 102.

[0082] In some embodiments, reference Figure 6 The oxide layer 102 is a doped zinc oxide layer, and the process steps for forming the doped zinc oxide layer include: providing a precursor material and a reactant material; performing a first atomic layer deposition process to form a zinc oxide layer 111; performing a second atomic layer deposition process to form an aluminum oxide layer 112; cyclically repeating the first atomic layer deposition process and the second atomic layer deposition process until the thickness of the multi-layer zinc oxide layer 111 and the aluminum oxide layer 112 is within a preset range; and performing an annealing process.

[0083] In some embodiments, the precursor material and the reactant material are a zinc source, an oxygen source, and an aluminum source, for example, the zinc source may be diethyl zinc (DEZ), the aluminum source may be trimethyl aluminum (TMA), and the oxygen source may be deionized (DI) water. Different reactants enter the chamber of the atomic layer deposition equipment, chemically adsorb on the surface and react to form the transparent electron transport layer 110.

[0084] In some embodiments, the cyclic ratio of the first atomic layer deposition process and the second atomic layer deposition process is 1:1 to 20:1. By changing the ZnO:Al2O3 cyclic ratio in the oxide film, the work function and valence band of the oxide film are regulated, thereby optimizing the field effect passivation effect.

[0085] The preparation method includes the following steps: introducing a zinc source and an oxygen source to complete a zinc oxide cycle, and the total number of zinc oxide cycles is 10 to 250; inserting an aluminum oxide cycle after each 1 to 20 zinc oxide cycles. Taking the preparation of zinc oxide as an example, a small reaction cycle of a complete zinc oxide thin film atomic layer deposition method includes: (1) a pulse precursor diethyl zinc source enters the reaction chamber and undergoes a chemical adsorption reaction on the exposed substrate surface; (2) the remaining precursor is purged with an inert gas; (3) a pulse precursor oxygen source (ultrapure water) enters the reaction chamber and undergoes chemical adsorption on the surface; (4) the remaining unreacted precursor and by-products are purged with an inert gas. The above four steps are a small reaction cycle of a complete zinc oxide thin film atomic layer deposition method. At this time, an atomic layer of zinc oxide thin film is deposited. Repeat several small reaction cycles to continuously deposit a zinc oxide film of a certain thickness. After repeating the zinc oxide small reaction cycle n times, insert a small reaction cycle of aluminum oxide atomic layer deposition method with trimethylaluminum as aluminum precursor and ultrapure water as oxygen source, and the above process is collectively referred to as a large cycle (the pulse time of zinc source, oxygen source and aluminum source is generally 30ms~300ms, and the purge time is generally 1s~60s). A zinc oxide doped aluminum film with a fixed doping ratio is obtained by continuous deposition of the large cycle. Adjusting the above n value can achieve precise control of the doping ratio. Similarly, changing the inserted aluminum oxide deposition small cycle to a doping step with phosphorus trichloride as a phosphorus precursor can achieve effective and controllable doping of zinc oxide with phosphorus. Furthermore, adjusting this step to a plasma treatment of a hydrogen-containing gas can achieve effective and controllable hydrogen doping of zinc oxide.

[0086] refer to Figure 7 , an amorphous silicon layer 103 is formed on the surface of the oxide layer 102. The amorphous silicon layer 103 can be formed by an LPCVD process.

[0087] In some embodiments, reference Figure 8 , a doping source layer is formed on the amorphous silicon layer, and the battery is subjected to laser doping or heat treatment process to transform the amorphous silicon layer into a semiconductor doping layer 121 and the oxide layer into a transparent electron transport layer 110.

[0088] In some embodiments, the heat treatment process may be an annealing process, and the above structure is thermally annealed in a certain environment, and the semiconductor doping layer 121 plays a role in preventing hydrogen from overflowing. Further, during the annealing process, the transparent conductive layer realizes the diffusion of hydrogen, compensates for the defects of the tunneling layer 101 and the dangling bonds on the silicon surface, and improves the contact chemical passivation effect.

[0089] In some embodiments, the high temperature annealing temperature is 800°C to 1100°C.

[0090] refer to Figure 1, forming a passivation layer 104 , the passivation layer 104 is located on the surface of the semiconductor doping layer 121 ; forming an electrode 105 , the electrode 105 is located on the passivation layer 104 , and the electrode 105 is electrically connected to the semiconductor doping layer 121 .

[0091] In some embodiments, the electrode 105 slurry is printed on the surface of the passivation layer 104 by screen printing and then sintered to form the electrode 105 .

[0092] In some embodiments, the electrode 105 slurry may be sintered from LECO (Laser-enhanced contact optimization) slurry, and part of the LECO slurry corrodes and penetrates into the passivation layer 104 and forms an electrical connection with the semiconductor doping layer 121 or with the semiconductor doping layer 121 through crystals.

[0093] The laminated passivation contact structure of the solar cell provided in the embodiment of the present application exhibits excellent surface passivation performance, with an implicit open circuit voltage (Voc) of up to 750mV and an average contact resistivity of 1.2mΩcm². In addition, the solar cell can be prepared by a low-temperature manufacturing process, which is compatible with the solar cell manufacturing process, showing environmental friendliness and cost-effectiveness.

[0094] The beneficial effects of the embodiments of the present application will be further illustrated below in combination with embodiments and comparative examples.

[0095] Embodiment 1: An N-type crystalline silicon substrate was prepared and subjected to standard RCA cleaning. A tunneling layer with a thickness of 1.5 nm was deposited on the surface of the silicon substrate by LPCVD, and an oxide layer with a thickness of 100 nm was deposited on the surface of the tunneling layer by ALD. An amorphous silicon layer with a thickness of 30 nm was deposited on the surface of the oxide layer by LPCVD. High-temperature annealing was performed by LPCVD, and phosphorus atoms were doped into the amorphous silicon and the oxide layer at the same time. The temperature was 900°C for 30 min, so that a phosphorus-aluminum co-doped zinc oxide layer (transparent electron transport layer) and a phosphorus-doped polysilicon layer (semiconductor doping layer) were formed on the surface of the tunneling layer.

[0096] Comparative Example 1: Prepare an N-type crystalline silicon substrate and perform standard RCA cleaning on the crystalline silicon substrate; use LPCVD to deposit a tunneling layer with a thickness of 1.5 nm on the surface of the silicon substrate, and use LPCVD to deposit an amorphous silicon layer with a thickness of 130 nm on the surface of the tunneling layer; perform high-temperature annealing in LPCVD and dope phosphorus atoms in the amorphous silicon at a temperature of 900°C for 30 minutes, so that a phosphorus-doped polysilicon layer (semiconductor doping layer) is formed on the surface of the tunneling layer.

[0097] TOPCon batteries were prepared by the methods of Example 1 and Comparative Example 1, and the performance of each battery was tested. The results are shown in the following table.

[0098] Table 1 Comparison of battery performance of Example 1 and Comparative Example 1

[0099] The results show that the phosphorus-aluminum co-doped zinc oxide stacked passivation contact structure can improve the short-circuit current, open-circuit voltage, fill factor and battery conversion efficiency of TOPCon batteries.

[0100] According to some embodiments of the present application, another aspect of the embodiments of the present application further provides a stacked battery.

[0101] The stacked cell comprises: a bottom cell, which is a solar cell prepared by the preparation method of any one of the above embodiments or a solar cell of any one of the above embodiments; and a top cell, which is located on the side of the substrate of the bottom cell away from the front electrode.

[0102] In some embodiments, the stacked battery has a first grid line of a first polarity and a second grid line of a second polarity, the first grid line is in electrical contact with the top battery, and the second grid line is in electrical contact with the bottom battery, wherein the second grid line is the front electrode of the bottom battery.

[0103] In some embodiments, there is an interface layer between the top cell and the bottom cell, and the interface layer also covers the passivation contact structure on the back side.

[0104] It is worth noting that the stacked cell in the embodiment of the present application can be a two-layer solar cell, a three-layer solar cell, or a multi-layer stacked solar cell with more than three layers.

[0105] In some embodiments, the top cell may be a perovskite solar cell, which includes: a stacked first transmission layer, a perovskite substrate, a second transmission layer, a transparent conductive layer, and an anti-reflection layer, wherein the first transmission layer is directly opposite to the bottom cell.

[0106] In some embodiments, the first transport layer may be one of an electron transport layer and a hole transport layer, and the second transport layer may be the other of the electron transport layer and the hole transport layer.

[0107] Correspondingly, another embodiment of the present application provides a photovoltaic module, including the solar cell provided in the above embodiment, and the technical features that are the same as or corresponding to the above embodiment are not described in detail here.

[0108] refer to Fig. 9The photovoltaic module includes: a battery string, which is composed of a plurality of solar cells as in any one of the above embodiments or a solar cell 20 prepared by the preparation method as in any one of the above embodiments; a packaging film 21, which is used to cover the surface of the battery string; and a cover plate 22, which is used to cover the surface of the packaging film 21 away from the battery string.

[0109] Specifically, in some embodiments, multiple cells can be electrically connected through a connecting member 218, and the connecting member 218 is welded to a main grid on the cell. The main grid includes a main electrode electrically connected to the front electrode and a main electrode electrically connected to the back electrode.

[0110] In some embodiments, no intervals are set between the battery cells, that is, the battery cells overlap each other.

[0111] In some embodiments, the connection component 218 is welded to the secondary grid on the battery cell, and the secondary grid includes a front electrode and a back electrode.

[0112] In some embodiments, the encapsulation film 21 includes a first encapsulation layer and a second encapsulation layer, the first encapsulation layer covers one of the front side or the back side of the solar cell, and the second encapsulation layer covers the other of the front side or the back side of the solar cell. Specifically, at least one of the first encapsulation layer or the second encapsulation layer can be an organic encapsulation film such as a polyvinyl butyral (PVB) film, an ethylene-vinyl acetate copolymer (EVA) film, a polyethylene octene co-elastomer (POE) film or a polyethylene terephthalate (PET) film.

[0113] It is worth noting that there is a boundary line between the first encapsulation layer and the second encapsulation layer before lamination. After lamination, the photovoltaic module is no longer a first encapsulation layer and a second encapsulation layer, that is, the first encapsulation layer and the second encapsulation layer have formed an integral encapsulation film 21.

[0114] In some embodiments, the cover plate 22 may be a glass cover plate, a plastic cover plate or the like with a light-transmitting function. Specifically, the surface of the cover plate 22 facing the encapsulation film 21 may be a concave-convex surface, thereby increasing the utilization rate of the incident light. The cover plate 22 includes a first cover plate and a second cover plate, the first cover plate is opposite to the first encapsulation layer, and the second cover plate is opposite to the second encapsulation layer; or the first cover plate is opposite to one side of the solar cell, and the second cover plate is opposite to the other side of the solar cell.

[0115] Those skilled in the art will appreciate that the above-mentioned embodiments are specific examples for implementing the present application, and in practical applications, various changes may be made to the embodiments in form and detail without departing from the spirit and scope of the present application. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the present application, and therefore the scope of protection of the present application shall be subject to the scope defined in the claims.

Claims

1. A solar cell, characterized in that: include: substrate; A tunneling layer, wherein the tunneling layer is located on the surface of the substrate; A transparent electron transport layer, wherein the transparent electron transport layer is located on the surface of the tunneling layer; The transparent electron transport layer comprises a doped zinc oxide layer; A semiconductor doping layer, wherein the semiconductor doping layer is located on the surface of the transparent electron transport layer; A passivation layer, the passivation layer is located on the surface of the semiconductor doping layer; An electrode is located on the passivation layer and is electrically connected to the semiconductor doping layer.

2. The solar cell according to claim 1, characterized in that: The transparent electron transport layer has a first doping element, and the semiconductor doping layer has a second doping element, the second doping element has the same conductivity type as the first doping element; the first doping element is one of an N-type doping element or a P-type doping element.

3. The solar cell according to claim 2, characterized in that: The transparent electron transport layer is further doped with at least one of aluminum or hydrogen; wherein the doping concentration of the aluminum element is in the range of 0.1 at% to 50 at%, and the doping concentration of the hydrogen element is in the range of 0.1 at% to 30 at%.

4. The solar cell according to claim 3, characterized in that: Also includes: A doping layer, the doping layer is located between the substrate and the tunneling layer, and the doping layer contains at least one of the first doping element, the aluminum element, or the hydrogen element; wherein the doping concentration of the hydrogen element is greater than 1×10 19 cm -3 .

5. The solar cell according to claim 1, characterized in that: The thickness of the semiconductor doping layer is in the range of 1 nm to 100 nm.

6. A method for preparing a solar cell, characterized in that: include: providing a substrate; forming a tunneling layer, wherein the tunneling layer is located on the surface of the substrate; forming a transparent electron transport layer, wherein the transparent electron transport layer is located on a surface of the tunneling layer; The transparent electron transport layer comprises a doped zinc oxide layer; forming a semiconductor doping layer, wherein the semiconductor doping layer is located on the surface of the transparent electron transport layer; forming a passivation layer, wherein the passivation layer is located on the surface of the semiconductor doping layer; An electrode is formed, wherein the electrode is located on the passivation layer and is electrically connected to the semiconductor doping layer.

7. The method for preparing a solar cell according to claim 6, characterized in that: The process steps for forming the doped zinc oxide layer include: providing a precursor material and a reactant material; performing a first atomic layer deposition process to form a zinc oxide layer; performing a second atomic layer deposition process to form an aluminum oxide layer; cyclically repeating the first atomic layer deposition process and the second atomic layer deposition process until the thickness of the multiple layers of the zinc oxide layer and the aluminum oxide layer is within a preset range; and performing an annealing process.

8. The method for preparing a solar cell according to claim 7, characterized in that: The cycle ratio range of cyclically repeating the first atomic layer deposition process and the second atomic layer deposition process is 1:1~20:

1.

9. A photovoltaic module, characterized in that: include: A battery string, comprising a plurality of solar cells as claimed in any one of claims 1 to 5 or a solar cell prepared by the preparation method as claimed in any one of claims 6 to 8; A packaging film, used to cover the surface of the battery string; The cover plate is used to cover the surface of the packaging film away from the battery string.

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