Perovskite silicon laminated cell adopting TaN intermediate layer and preparation method thereof

Abstract

The invention relates to a perovskite silicon laminated cell adopting a TaN intermediate layer and a preparation method of the perovskite silicon laminated cell. The perovskite silicon laminated cell comprises a bottom electrode, a silicon bottom cell, the TaN intermediate layer, a perovskite cell and a metal grid line electrode which are sequentially arranged from bottom to top. According to the perovskite silicon laminated cell adopting the TaN intermediate layer, the TaN intermediate layer has excellent long wave permeability, conductivity and stability, so that the light absorption capability of the cell can be effectively improved, and the overall photoelectric conversion efficiency of the perovskite silicon laminated cell is improved; meanwhile, the production cost of the TaN material is lower, and the overall cost can be reduced during large-scale manufacturing; in addition, the TaN intermediate layer in the invention has good compatibility with different types of crystalline silicon cells, and can adapt to various manufacturing processes.

Description

Technical Field

[0001] The present invention belongs to the technical field of perovskite cells, and in particular relates to a perovskite silicon stacked cell using a TaN intermediate layer and a preparation method thereof. Background Art

[0002] As an emerging solar cell technology, perovskite silicon tandem cells have attracted much attention in recent years and have triggered a widespread research boom in the energy field. Compared with traditional silicon-based solar cells, perovskite silicon tandem cells have many significant advantages, such as simple process, low raw material cost and high efficiency conversion. These characteristics make perovskite silicon tandem cells show great application potential in the field of renewable energy and become one of the important trends in the development of future solar cell technology.

[0003] The middle layer plays a vital role in the tandem solar cell. It provides a recombination site for electrons and holes from the top and bottom cells, promotes the effective recombination of charges, and improves the efficiency of the cell. The conductivity, light transmittance and stability of the middle layer will directly affect the overall performance of the tandem cell. The ideal middle layer should have good conductivity to increase the recombination rate of charges; high optical transmittance can allow light to effectively penetrate to the bottom cell, ensuring that the rear junction cell receives enough light for photoelectric conversion. By selecting the right material, the middle layer can reduce unnecessary light absorption, thereby improving the energy conversion efficiency of the entire tandem cell. By optimizing the performance of the middle layer, it is expected to significantly improve the efficiency and reliability of the tandem cell.

[0004] In the prior art, conductive oxides are usually used as the intermediate layer material, especially transparent conductive indium-doped tin oxide (ITO) film. However, the traditional ITO film has a high reflectivity in the infrared band, which limits its effective use of long-wave solar energy. In addition to ITO, other common transparent conductive oxides (TCO) include indium zinc oxide (IZO) and aluminum-doped zinc oxide (AZO). Although IZO has good conductivity and transparency, its stability and conductivity may decrease at high temperatures, affecting the long-term performance of the battery. AZO is relatively low in cost, but its conductivity and optical properties are still inferior to ITO, especially in applications with high transmittance requirements. In addition, using doped polysilicon as an intermediate layer is also an option, but its process is complicated and the cost is high. In summary, the intermediate layer materials in the prior art cannot have both long-wave transmittance, conductivity and stability, which limits the development and application of perovskite silicon stacked cells. Summary of the invention

[0005] In order to solve the above problems existing in the prior art, the present invention provides a perovskite silicon stacked cell using a TaN intermediate layer and a preparation method thereof. The technical problem to be solved by the present invention is achieved by the following technical solutions:

[0006] A first aspect of the present invention provides a perovskite silicon stacked cell using a TaN intermediate layer, comprising a bottom electrode, a silicon bottom cell, a TaN intermediate layer, a perovskite cell and a metal grid electrode arranged in sequence from bottom to top.

[0007] In one achievable manner, the invention further comprises: an alloy layer;

[0008] The alloy layer is disposed between the TaN intermediate layer and the perovskite cell.

[0009] In one achievable manner, the material of the alloy layer includes: one of a Ta-Ni alloy mixture, a Ta-Ti alloy mixture and a Ta-Cu alloy mixture; and the thickness of the alloy layer is 1-2 nm.

[0010] In one achievable manner, the perovskite cell is a pin-type perovskite cell;

[0011] The pin-type perovskite cell comprises a hole transport layer, a perovskite light absorption layer, an electron transport layer, a buffer layer and a transparent electrode layer which are arranged in sequence from bottom to top.

[0012] In one achievable manner, the electron selection layer in the silicon bottom cell is arranged upward;

[0013] The hole transport layer of the pin-type perovskite cell is arranged close to the electron selection layer of the silicon bottom cell.

[0014] In one achievable manner, the perovskite cell is a nip-type perovskite cell;

[0015] The nip-type perovskite cell comprises an electron transport layer, a perovskite light absorption layer, a hole transport layer, a buffer layer and a transparent electrode layer which are arranged in sequence from bottom to top.

[0016] In one achievable manner, the hole selection layer in the silicon bottom cell is arranged upward;

[0017] The electron transport layer of the nip-type perovskite cell is arranged close to the hole selection layer of the silicon bottom cell.

[0018] In one achievable manner, the silicon bottom cell includes: one of a HJT cell, a TOPCon cell and a PERC cell.

[0019] The second aspect of the present invention provides a method for preparing a perovskite silicon tandem cell using a TaN intermediate layer, comprising the following steps:

[0020] A TaN intermediate layer is prepared on the upper surface of the silicon bottom cell;

[0021] Prepare a perovskite cell on the upper surface of the TaN intermediate layer;

[0022] A metal grid electrode is prepared on the upper surface of the perovskite cell; and a bottom electrode is prepared on the lower surface of the silicon bottom cell.

[0023] In one achievable manner, a TaN intermediate layer is prepared on the upper surface of a silicon bottom cell, comprising:

[0024] By using reactive magnetron sputtering technology, TaN with a thickness of 1 to 5 nm is prepared on the upper surface of the silicon bottom battery to form a TaN intermediate layer.

[0025] Compared with the prior art, the present invention has the following beneficial effects:

[0026] The present invention discloses a perovskite silicon tandem cell using a TaN intermediate layer. The TaN intermediate layer has excellent long-wave transmittance, conductivity and stability, can effectively increase the light absorption capacity of the cell, and improve the overall photoelectric conversion efficiency of the perovskite silicon tandem cell. At the same time, the production cost of the TaN material is lower, which can reduce the overall cost during large-scale manufacturing. Moreover, the TaN intermediate layer in the present invention has good compatibility with different types of crystalline silicon cells and can adapt to various manufacturing processes. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a schematic structural diagram of a perovskite silicon tandem cell using a TaN intermediate layer provided by an embodiment of the present invention;

[0028] Figure 2 is a transmittance diagram of a 2 nm TaN film provided by an embodiment of the present invention;

[0029] Figure 3 It is a schematic structural diagram of a pin-type perovskite silicon tandem battery provided by an embodiment of the present invention;

[0030] Figure 4 This is a schematic diagram of the steps of a perovskite silicon tandem cell using a TaN intermediate layer provided by an embodiment of the present invention;

[0031] Figure 5 It is a schematic diagram of the structure of another perovskite silicon tandem battery using a TaN intermediate layer provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0032] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0033] Embodiment 1

[0034] The first aspect of this embodiment provides a perovskite silicon stacked cell using a tantalum nitride (TaN) intermediate layer, see Figure 1 , Figure 1 The structure diagram of a perovskite silicon tandem cell using a TaN intermediate layer provided in an embodiment of the present invention is shown in FIG. A perovskite silicon tandem cell using a TaN intermediate layer provided in this embodiment comprises a bottom electrode, a silicon bottom cell, a TaN intermediate layer, a perovskite cell and a metal grid electrode arranged in sequence from bottom to top.

[0035] In this embodiment, the perovskite cell is a pin-type perovskite cell or a nip-type perovskite cell. The silicon bottom cell includes: one of a HJT cell, a TOPCon cell and a PERC cell. The thickness of the TaN intermediate layer is 1 to 5 nm.

[0036] Specifically, TaN has excellent long-wave transmittance, conductivity and stability, which enables the perovskite silicon tandem cell to effectively transmit long-wave light (such as near-infrared light), thereby improving the light absorption capacity of the perovskite silicon tandem cell and improving the overall photoelectric conversion efficiency of the perovskite silicon tandem cell. Furthermore, when the thickness of the TaN intermediate layer is 1 to 5 nm, the ultra-thin characteristics of the TaN intermediate layer can usually further optimize the long-wave transmittance, conductivity and stability, and make full use of these properties to show good transmittance. The thickness of the ultra-thin TaN film reduces the reflection and absorption of light when it passes through, thereby improving the long-wave transmittance. When the thickness of the TaN intermediate layer is too thin, the conductivity of the TaN film may be insufficient, which will lead to a decrease in the transmission efficiency of the carrier interface, resulting in electrical losses, thereby affecting the overall efficiency of the battery. In addition, film discontinuity or pores may occur, resulting in the inability of the current to pass smoothly, resulting in high resistance and unevenness. When the thickness of the TaN intermediate layer is too thick, the TaN intermediate layer will affect the transmittance of light. The thicker TaN intermediate layer may block some light from entering, which will reduce the light absorption efficiency and affect the performance of the battery. Therefore, when the thickness of the TaN intermediate layer is 1 to 5 nm, the TaN intermediate layer can show good long-wave transmittance, conductivity and stability. Preferably, the thickness of the TaN intermediate layer is 2 to 3 nm.

[0037] See also Figure 2 , Figure 2 This is a transmittance diagram of a 2 nm TaN film provided by an embodiment of the present invention. As an intermediate layer material, more attention is paid to the transmittance of the material in the near infrared region. Figure 2It can be seen that when the near-infrared wavelength is greater than 1000nm or even higher, the transmittance trend of TaN is constantly increasing. Therefore, whether it is a two-junction stack or a three-junction stack cell, TaN film can effectively utilize the near-infrared part of the solar spectrum. Conventional materials such as ITO have a sharp decline in the transmittance trend in the near-infrared region, and their performance in the near-infrared region is far inferior to TaN. TaN not only has excellent light transmittance, but also has good conductivity. In terms of material cost, TaN has better cost-effectiveness than some high-cost transparent conductive oxides (such as ITO). Considering the cost, conductivity, light transmittance, high temperature resistance and oxidation resistance, TaN film has great application potential. As an intermediate layer material, TaN film has high value in some applications, especially in high-efficiency optoelectronic devices that need to take into account both light transmittance and conductivity.

[0038] See also Figure 3 , Figure 3 : is a schematic diagram of the structure of a pin-type perovskite silicon stacked cell provided in an embodiment of the present invention. In this embodiment, the perovskite cell is a pin-type perovskite cell. The pin-type perovskite cell includes a hole transport layer, a perovskite light absorption layer, an electron transport layer, a buffer layer and a transparent electrode layer arranged in sequence from bottom to top. The materials of the hole transport layer include: CuO, NiO x , 2PACz, Me-4PACz, MeO-4PACz and CuSCN. The materials of the perovskite light absorbing layer include: Cs 0.05 FA 0.8 MA 0.15 PbI 2.25 Br 0.75 , FA 0.65 MA 0.2 Cs 0.15 PbI 2.4 Br 0.6 , FA 0.5 MA 0.38 Cs 0.12 PbI 2.04 Br 0.96 The materials of the electron transport layer include: PCBM, TiO2, SnO2, ZnO, C 60 The material of the buffer layer includes SnO x. The material of the transparent electrode layer includes IZO or ITO. Furthermore, when the perovskite cell is a pin-type perovskite cell, the electron selection layer in the silicon bottom cell is arranged upward. The hole transport layer of the pin-type perovskite cell is arranged close to the electron selection layer of the silicon bottom cell. Exemplarily, taking the silicon bottom cell as an HJT cell as an example, the n+ amorphous silicon layer is the electron selection layer of the HJT cell, and the p+ amorphous silicon layer is the hole selection layer of the HJT cell. When the perovskite cell is a pin-type perovskite cell and the silicon bottom cell is an HJT cell, the perovskite silicon stacked cell using a TaN intermediate layer provided in this embodiment includes a bottom electrode, an ITO layer, a p+ amorphous silicon layer, an intrinsic amorphous silicon layer, a single crystal silicon substrate, an intrinsic amorphous silicon layer, an n+ amorphous silicon layer, a TaN intermediate layer, a hole transport layer, a perovskite light absorption layer, an electron transport layer, a buffer layer, a transparent electrode layer and a metal grid electrode arranged in sequence from bottom to top. It should be understood that although the specific structures and materials of HJT cells, TOPCon cells and PERC cells are different, they all have electron selection layers and hole selection layers in mechanism. Those skilled in the art should be able to clearly distinguish the electron selection layers and hole selection layers in the specific structures of HJT cells, TOPCon cells and PERC cells.

[0039] In another achievable manner, the perovskite cell is a nip-type perovskite cell. The nip-type perovskite cell includes an electron transport layer, a perovskite light absorption layer, a hole transport layer, a buffer layer and a transparent electrode layer arranged in sequence from bottom to top, wherein the material of the electron transport layer includes: one of TiN, SnO2, TiO2, and ZnO. The material of the perovskite light absorption layer includes: Cs 0.05 FA 0.8 MA 0.15 PbI 2.25 Br 0.75 , FA 0.65 MA 0.2 Cs 0.15 PbI 2.4 Br 0.6 , FA 0.5 MA 0.38 Cs 0.12 PbI 2.04 Br 0.96The material of the hole transport layer includes: one of Spiro-OMeTAD, PEDOT:PSS, CuSCN, and PTAA. The material of the buffer layer includes MoO3. The material of the transparent electrode layer includes IZO or ITO. When the perovskite cell is a nip-type perovskite cell, the hole selection layer of the silicon bottom cell is arranged upward, and the electron transport layer of the nip-type perovskite cell is arranged close to the hole selection layer of the silicon bottom cell. Exemplarily, taking the silicon bottom cell as an HJT cell as an example, the n+ amorphous silicon layer is the electron selection layer of the HJT cell, and the p+ amorphous silicon layer is the hole selection layer of the HJT cell. When the perovskite cell is a nip-type perovskite cell and the silicon bottom cell is a HJT cell, the perovskite silicon stacked cell using a TaN intermediate layer includes a bottom electrode, an ITO layer, an n+ amorphous silicon layer, an intrinsic amorphous silicon layer, a single crystal silicon substrate, an intrinsic amorphous silicon layer, a p+ amorphous silicon layer, a TaN intermediate layer, an electron transport layer, a perovskite light absorption layer, a hole transport layer, a buffer layer, a transparent electrode layer and a metal grid electrode arranged in sequence from bottom to top.

[0040] The second aspect of this embodiment provides a method for preparing a perovskite silicon stacked cell using a TaN intermediate layer, see Figure 4 , Figure 4 It is a schematic diagram of the steps of a perovskite silicon tandem battery using a TaN intermediate layer provided in an embodiment of the present invention.

[0041] This embodiment provides a method for preparing a perovskite silicon tandem cell using a TaN intermediate layer, comprising the following steps:

[0042] S110: preparing a TaN intermediate layer on the upper surface of the silicon bottom cell.

[0043] Specifically, the silicon bottom battery is ultrasonically cleaned with acetone, deionized water, and alcohol for 15 minutes and then dried. TaN with a thickness of 1 to 5 nm is prepared on the upper surface of the silicon bottom battery by reactive magnetron sputtering technology to form a TaN intermediate layer. In this embodiment, the silicon bottom battery is one of a HJT battery, a TOPCon battery, and a PERC battery. Exemplarily, the thickness of the tantalum nitride film is 1 nm or 2 nm or 3 nm or 4 nm or 5 nm.

[0044] Furthermore, the vacuum chamber is evacuated to a pressure better than 10 -7 Pa, and then allow nitrogen and argon to enter the vacuum chamber through a gas flowmeter, wherein the argon flow rate is 50-100 sccm, the nitrogen flow rate is 10-50 sccm, the temperature is set to 20-100°C, the DC source power during sputtering is 100-200 W, and the sputtering time is 45-180 s. Finally, a 2-3 nm tantalum nitride film is obtained, and the TaN intermediate layer is prepared.

[0045] S120: preparing a perovskite cell on the upper surface of the TaN intermediate layer.

[0046] Specifically, a pin-type perovskite cell or a nip-type perovskite cell is prepared on the upper surface of the TaN intermediate layer.

[0047] In an achievable manner, the perovskite cell is a pin-type perovskite cell. Step S120 includes the following steps: preparing a pin-type perovskite cell on the upper surface of the TaN intermediate layer.

[0048] S121: forming a hole transport layer on the upper surface of the TaN intermediate layer.

[0049] Specifically, NiO is used on the upper surface of the TaN intermediate layer. x NiO is deposited by magnetron reactive sputtering x Membrane, growth pressure is 10 -4 Pa, high purity argon gas is introduced at a flow rate of 20 sccm to 30 sccm and a power of 50 W to 65 W, and a hole transport layer with a thickness of 15 to 20 nm is prepared on the TaN intermediate layer.

[0050] S122: preparing a perovskite light absorbing layer on the upper surface of the hole transport layer.

[0051] For example, the material of the perovskite light absorbing layer is Cs 0.05 FA 0.8 MA 0.15 PbI 2.25 Br 0.75 . Configure Cs with a concentration of 1.6M to 1.8M 0.05 FA 0.8 MA 0.15 PbI 2.25 Br 0.75 The perovskite precursor solution is stirred and dissolved for standby use. The precursor solution is spin-coated on the hole transport layer by a one-step spin coating method. Specifically, the front stage speed is 1000-2000rpm for 5s, and the rear stage speed is 5000-6000rpm for 45s. 180-200μL of anti-solvent chlorobenzene is added at the 12th to 15th second of the start of spin coating for extraction. After the spin coating is completed, annealing is performed at 100-120°C for 10-20min to obtain the perovskite light absorbing layer.

[0052] S123: preparing an electron transport layer on the upper surface of the perovskite light absorbing layer.

[0053] For example, the material of the electron transport layer is C 60 A 20nm C layer is deposited on the perovskite light-absorbing layer using a thermal evaporation process. 60 , growth pressure is 10 -4 Pa, the growth rate is The preparation of the electron transport layer is completed.

[0054] S124: preparing a buffer layer on the upper surface of the electron transport layer.

[0055] For example, the material of the buffer layer is SnO x SnO was prepared by atomic layer deposition (ALD) process. x Buffer layer, during the ALD deposition process, the substrate temperature is maintained at 85-100°C, the Sn precursor source is maintained at 55-85°C, and the H2O source is maintained at room temperature. 120-160 cycles are performed to obtain 15-20nm SnO x Buffer layer.

[0056] S125: preparing a transparent electrode layer on the upper surface of the buffer layer.

[0057] Specifically, indium zinc oxide (IZO) is deposited on the upper surface of the buffer layer by a magnetron sputtering process as a transparent electrode at a growth rate of The power is 40-50W, the DC voltage is 99V, and finally a 100nm IZO transparent electrode layer is obtained.

[0058] After step S125 is completed, a pin-type perovskite cell is prepared on the upper surface of the TaN intermediate layer.

[0059] In another achievable manner, the perovskite cell is a nip-type perovskite cell. Step S120 includes the following steps: preparing an electron transport layer, a perovskite light absorption layer, a hole transport layer, a buffer layer and a transparent electrode layer in sequence from bottom to top on the upper surface of the TaN intermediate layer to obtain a nip-type perovskite cell.

[0060] S130: preparing a metal grid electrode on the upper surface of the perovskite cell; and preparing a bottom electrode on the lower surface of the silicon bottom cell.

[0061] Specifically, a 200-500nm metal electrode Ag is prepared on the lower surface of the bottom ITO of the bottom silicon cell, and a 100-200nm metal grid line electrode Ag is prepared on the top of the transparent electrode of the perovskite cell to obtain the perovskite silicon stacked cell provided in this embodiment.

[0062] The perovskite silicon stacked cell with a TaN intermediate layer provided in this embodiment increases the light absorption capacity of the cell through the TaN intermediate layer, thereby improving the overall photoelectric conversion efficiency. The production cost of TaN materials is lower, which can reduce the overall cost during large-scale manufacturing. TaN has good high temperature resistance and oxidation resistance, can maintain its performance under a wider range of conditions, and is suitable for a variety of application environments. The TaN film has high chemical stability, is easy to recycle and reuse the bottom components, and helps to reduce costs. In addition, the TaN intermediate layer has good compatibility with different types of crystalline silicon cells and can adapt to various manufacturing processes. The perovskite cell on the top is not only suitable for the preparation of hybrid perovskite solar cells, but also suitable for all-inorganic perovskite solar cells, showing broad application prospects.

[0063] Embodiment 2

[0064] Based on Example 1, this example provides a perovskite silicon stacked cell using a TaN intermediate layer and a preparation method thereof. Figure 5 , Figure 5 It is a schematic diagram of the structure of another perovskite silicon tandem battery using a TaN intermediate layer provided in an embodiment of the present invention.

[0065] The perovskite silicon stacked cell using the TaN intermediate layer provided in this embodiment includes a bottom electrode, a silicon bottom cell, a TaN intermediate layer, an alloy layer, a perovskite cell and a metal grid electrode arranged in sequence from bottom to top. That is, the alloy layer is arranged between the TaN intermediate layer and the perovskite cell.

[0066] In this embodiment, the perovskite cell is a pin-type perovskite cell, that is, the perovskite silicon stacked cell using a TaN intermediate layer provided in this embodiment includes a bottom electrode, a silicon bottom cell, a TaN intermediate layer, an alloy layer, a hole transport layer, a perovskite light absorption layer, an electron transport layer, a buffer layer, a transparent electrode layer and a metal grid line electrode arranged in sequence from bottom to top.

[0067] In another achievable embodiment, the perovskite cell is a nip-type perovskite cell, that is, the perovskite silicon stacked cell using a TaN intermediate layer includes a bottom electrode, a silicon bottom cell, a TaN intermediate layer, an alloy layer, an electron transport layer, a perovskite light absorbing layer, a hole transport layer, a buffer layer, a transparent electrode layer and a metal grid electrode arranged in sequence from bottom to top.

[0068] The method for preparing a perovskite silicon tandem cell using a TaN intermediate layer provided in this embodiment comprises the following steps:

[0069] S210: preparing a TaN intermediate layer on the upper surface of the silicon bottom cell.

[0070] Specifically, the silicon bottom cell was cleaned with acetone, deionized water, and alcohol ultrasonically for 15 minutes and then dried. The vacuum chamber was evacuated to a vacuum better than 10 by using reactive magnetron sputtering technology. -7 Pa, and then allow nitrogen and argon to enter the vacuum chamber through a gas flowmeter, wherein the argon flow rate is 50-100sccm, the nitrogen flow rate is 10-50sccm, the temperature is set to 20-100°C, the DC source power during sputtering is 100-200W, and the sputtering time is 30-120s. After the sputtering is completed, when other conditions remain unchanged, the argon flow rate is increased to 100-150sccm, and the second stage of sputtering is carried out, so that the tantalum content in the top film is higher, the sputtering time is about 15-60s, and finally a 2-3nm tantalum nitride film is obtained, and the TaN intermediate layer preparation is completed.

[0071] Furthermore, when room temperature magnetron reactive sputtering of metallic TaN is used as an intermediate layer, the TaN film has higher long-wave transmittance and can more effectively utilize long-wave light than common conductive oxides, reducing parasitic absorption of light, thereby increasing the light absorption capacity of the battery and improving the overall photoelectric conversion efficiency of the device.

[0072] S220: preparing an alloy layer and a perovskite cell on the upper surface of the TaN intermediate layer.

[0073] In this embodiment, the material of the alloy layer includes: one of a Ta-Ni alloy mixture, a Ta-Ti alloy mixture and a Ta-Cu alloy mixture. Furthermore, the Ta-Ni alloy mixture is Ta-Ni-NO, the Ta-Ti alloy mixture is Ta-Ti-NO, and the Ta-Cu alloy mixture is Ta-Cu-NO.

[0074] In one achievable manner, step S220 includes:

[0075] S221: forming an alloy layer and a hole transport layer on the upper surface of the TaN intermediate layer.

[0076] Specifically, in order to simplify the preparation process, the materials of the alloy layer and the hole transport layer are carefully designed in this embodiment, and NiO x Or CuO as the hole transport layer, by directly preparing NiO on the upper surface of the TaN intermediate layer x or CuO, after annealing, the NiO in contact with the bottom layer and the TaN middle layer x or CuO are converted into Ta-Ni alloy mixture or Ta-Cu alloy mixture to form an alloy layer, and the top layer of NiO xOr CuO is directly used as the hole transport layer to prepare the alloy layer and the hole transport layer in one step. Furthermore, in S310, the second stage of sputtering of TaN can make the Ta content at the top of the TaN intermediate layer higher, so that the Ta ratio of the TaN intermediate layer close to the hole transport layer is higher to facilitate better alloy formation.

[0077] The alloy layer is made of Ta-Ni alloy mixture, and the hole transport layer is made of NiO x For example: On the upper surface of the TaN intermediate layer, NiO x NiO is deposited by magnetron reactive sputtering x Membrane, growth pressure is 10 -4 Pa, high purity argon gas is introduced at a flow rate of 20 sccm to 30 sccm, the power is 50 W to 65 W, and NiO with a thickness of 15 to 20 nm is prepared on the TaN intermediate layer. x After sputtering, the Ta-Ni-NO alloy mixture is formed at a thickness of 1 nm by annealing at a temperature of 200°C to 250°C in an Ar atmosphere for 20 min to 30 min.

[0078] Specifically, TaN itself has good stability, but the addition of nickel to the Ta-Ni alloy mixture under high temperature conditions helps to form an alloy layer with stronger stability, thereby enhancing the stability of the TaN intermediate layer. Nickel itself is a good conductive material with higher conductivity than pure tantalum. When nickel is combined with TaN, it can enhance the overall conductivity of the alloy, especially in the case of thin film layers, nickel can effectively reduce the resistance of the alloy.

[0079] In another achievable manner, Ta and M are co-sputtered on the upper surface of the TaN intermediate layer to obtain an alloy layer, wherein M is one of Ni, Ti and Cu, and the co-sputtering atmosphere is nitrogen and oxygen. Then, a hole transport layer is prepared on the alloy layer.

[0080] It should be understood that when the perovskite cell is a nip-type perovskite cell, TiO2 is selected as the electron transport layer, and TiO2 is directly prepared on the upper surface of the TaN intermediate layer. After annealing, the bottom TiO2 and TaN intermediate layer are jointly converted into a Ta-Ti alloy mixture to form an alloy layer. The top TiO2 or TiN is directly used as the electron transport layer, thereby realizing the one-step preparation of the alloy layer and the electron transport layer.

[0081] S222: On the upper surface of the hole transport layer, a perovskite light absorption layer, an electron transport layer, a buffer layer and a transparent electrode layer are sequentially prepared from bottom to top. After step S222 is completed, a silicon bottom cell, a TaN intermediate layer, an alloy layer and a pin-type perovskite cell are sequentially arranged from bottom to top.

[0082] S230: preparing a metal grid electrode on the upper surface of the perovskite cell; and preparing a bottom electrode on the lower surface of the silicon bottom cell.

[0083] Specifically, a 100-200 nm metal grid electrode is prepared on the upper surface of the perovskite cell. A 200-500 nm electrode metal is prepared on the lower surface of the silicon bottom cell to form a bottom electrode. After step S230 is completed, the perovskite silicon stacked cell with a TaN intermediate layer provided in this embodiment is obtained.

[0084] The perovskite silicon stacked cell with a TaN intermediate layer provided in this embodiment increases the light absorption capacity of the cell through the TaN intermediate layer, improves the overall photoelectric conversion efficiency, and uses an alloy layer to further enhance the corrosion resistance and conductivity of the TaN intermediate layer, further improving the stability and transmission efficiency of the cell. It avoids the problems of common conductive oxides as intermediate connection layers that cannot effectively utilize long-wavelength solar energy and decreases in stability and conductivity at high temperatures. In addition, the combination of the bottom cell and the intermediate layer of the present invention can be recycled and reused, reducing production costs. The TaN intermediate layer and the alloy layer have strong tolerance to the environment, can maintain their performance under a wider range of conditions, and adapt to different application environments. Therefore, the top perovskite cell can be prepared using all-inorganic perovskites or organic-inorganic hybrid perovskites, and has a broad application market.

[0085] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

Claims

1. A perovskite silicon tandem cell using a TaN intermediate layer, characterized in that: It includes a bottom electrode, a silicon bottom battery, a TaN middle layer, a perovskite battery and a metal grid electrode which are arranged in sequence from bottom to top.

2. A perovskite silicon tandem cell using a TaN intermediate layer according to claim 1, characterized in that: Also includes: Alloy layer; The alloy layer is disposed between the TaN intermediate layer and the perovskite cell.

3. The perovskite silicon tandem cell using a TaN intermediate layer according to claim 2, characterized in that: The material of the alloy layer includes: one of a Ta-Ni alloy mixture, a Ta-Ti alloy mixture and a Ta-Cu alloy mixture; the thickness of the alloy layer is 1-2 nm.

4. The perovskite silicon tandem cell using a TaN intermediate layer according to claim 1, characterized in that: The perovskite cell is a pin-type perovskite cell; The pin-type perovskite cell comprises a hole transport layer, a perovskite light absorption layer, an electron transport layer, a buffer layer and a transparent electrode layer which are arranged in sequence from bottom to top.

5. The perovskite silicon tandem cell using a TaN intermediate layer according to claim 4, characterized in that: The electron selection layer in the silicon bottom cell is arranged upward; The hole transport layer of the pin-type perovskite cell is arranged close to the electron selection layer of the silicon bottom cell.

6. The perovskite silicon tandem cell using a TaN intermediate layer according to claim 1, characterized in that: The perovskite cell is a nip-type perovskite cell; The nip-type perovskite cell comprises an electron transport layer, a perovskite light absorption layer, a hole transport layer, a buffer layer and a transparent electrode layer which are arranged in sequence from bottom to top.

7. The perovskite silicon tandem cell using a TaN intermediate layer according to claim 6, characterized in that: The hole selection layer in the silicon bottom cell is arranged upward; The electron transport layer of the nip-type perovskite cell is arranged close to the hole selection layer of the silicon bottom cell.

8. The perovskite silicon tandem cell using a TaN intermediate layer according to claim 1, characterized in that: The silicon bottom cell includes: one of a HJT cell, a TOPCon cell and a PERC cell.

9. A method for preparing a perovskite silicon tandem cell using a TaN intermediate layer, characterized in that: The following steps are involved: A TaN intermediate layer is prepared on the upper surface of the silicon bottom cell; Prepare a perovskite cell on the upper surface of the TaN intermediate layer; A metal grid electrode is prepared on the upper surface of the perovskite cell; and a bottom electrode is prepared on the lower surface of the silicon bottom cell.

10. The method for preparing a perovskite silicon tandem cell using a TaN intermediate layer according to claim 9, characterized in that: A TaN intermediate layer is prepared on the upper surface of the silicon bottom cell, including: By using reactive magnetron sputtering technology, TaN with a thickness of 1 to 5 nm is prepared on the upper surface of the silicon bottom battery to form a TaN intermediate layer.

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