Embedded system information processing method and device, equipment and medium

Abstract

The invention discloses an embedded system information processing method and device, equipment and a medium. The method comprises the following steps: acquiring target embedded system information, and performing data volume compression on the target embedded system information to obtain first information; performing data verification on the first information to obtain a verification result; wherein the data verification comprises data quality evaluation and data anomaly detection; if the verification result is that verification is passed, the edge end equipment is used for intelligently analyzing the first information to obtain an analysis result; wherein the edge end equipment comprises a GPU (Graphics Processing Unit) and an FPGA (Field Programmable Gate Array), and the intelligent analysis comprises classification, clustering and abnormal behavior analysis; and performing data encryption on the analysis result to obtain second information, and sending the second information to the central processing unit. According to the scheme, data volume compression, data verification, intelligent analysis and data encryption processing are carried out on the information of the embedded system, the safety, accuracy and efficiency of information processing of the embedded system can be effectively guaranteed, and therefore the stability and reliability of the embedded system are guaranteed.

Description

Technical Field

[0001] The present invention relates to the technical field of data processing, and in particular to a method, device, equipment and medium for processing embedded system information. Background Art

[0002] An embedded system is a system that combines computer technology with specific applications. It is usually embedded in other devices, such as home appliances, automobiles, industrial equipment, etc. Embedded systems have the characteristics of small size, low power consumption, and strong real-time performance. They can meet the needs of specific application scenarios and play a key role in the intelligence and automation of equipment.

[0003] In the related technologies, there are deficiencies in the collection and detection of embedded system information, such as large data volume, poor data security, difficulty in ensuring data quality, low data processing efficiency, and insufficient data anomaly detection measures, which affect the stability and reliability of the embedded system. Summary of the invention

[0004] The present invention provides a method, device, equipment and medium for processing embedded system information. By performing data volume compression, data verification, intelligent analysis and data encryption processing on the embedded system information respectively, the security, accuracy and efficiency of the embedded system information processing can be effectively guaranteed, thereby ensuring the stability and reliability of the embedded system.

[0005] According to one aspect of the present invention, a method for processing embedded system information is provided, the method comprising:

[0006] Acquire target embedded system information, and compress the target embedded system information to obtain first information;

[0007] Performing data verification on the first information to obtain a verification result; wherein the data verification includes data quality assessment and data anomaly detection;

[0008] If the verification result is passed, the first information is intelligently analyzed by using an edge device to obtain an analysis result; wherein the edge device includes a GPU and an FPGA, and the intelligent analysis includes classification, clustering and abnormal behavior analysis;

[0009] The analysis result is encrypted to obtain second information, and the second information is sent to a central processing unit.

[0010] According to another aspect of the present invention, a device for processing embedded system information is provided, the device comprising:

[0011] A data volume compression module, used for acquiring target embedded system information, and performing data volume compression on the target embedded system information to obtain first information;

[0012] A data verification module, configured to perform data verification on the first information to obtain a verification result; wherein the data verification includes data quality assessment and data anomaly detection;

[0013] An intelligent analysis module, configured to, if the verification result is a passed verification, use an edge device to perform intelligent analysis on the first information to obtain an analysis result; wherein the edge device includes a GPU and an FPGA, and the intelligent analysis includes classification, clustering and abnormal behavior analysis;

[0014] The data encryption module is used to encrypt the analysis result to obtain second information, and send the second information to the central processing unit.

[0015] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:

[0016] at least one processor; and,

[0017] a memory communicatively connected to the at least one processor; wherein,

[0018] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the method for processing embedded system information described in any embodiment of the present invention.

[0019] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the method for processing embedded system information described in any embodiment of the present invention when executed.

[0020] The technical solution of the embodiment of the present invention obtains the target embedded system information, compresses the data volume of the target embedded system information to obtain the first information; performs data verification on the first information to obtain the verification result; wherein the data verification includes data quality assessment and data anomaly detection; if the verification result is passed, the first information is intelligently analyzed by the edge device to obtain the analysis result; wherein the edge device includes GPU and FPGA, and the intelligent analysis includes classification, clustering and abnormal behavior analysis; the analysis result is encrypted to obtain the second information, and the second information is sent to the central processing unit. This technical solution can effectively ensure the security, accuracy and efficiency of embedded system information processing by performing data volume compression, data verification, intelligent analysis and data encryption processing on the embedded system information, thereby ensuring the stability and reliability of the embedded system.

[0021] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0023] Figure 1 is a flowchart of a method for processing embedded system information provided according to Embodiment 1 of the present invention;

[0024] Figure 2 is a flowchart of a method for processing embedded system information provided according to Embodiment 2 of the present invention;

[0025] Figure 3 is a schematic diagram of the structure of an embedded system information processing device provided according to Embodiment 3 of the present invention;

[0026] Figure 4 The invention is a schematic diagram of the structure of an electronic device for implementing an embedded system information processing method according to an embodiment of the invention. DETAILED DESCRIPTION

[0027] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0028] It should be noted that the terms "first", "second", "target", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0029] Embodiment 1

[0030] Figure 1 This is a flowchart of a method for processing embedded system information provided by Embodiment 1 of the present invention. This embodiment is applicable to the case of processing embedded system information efficiently, accurately and safely. The method can be executed by an embedded system information processing device. The embedded system information processing device can be implemented in the form of hardware and / or software. The embedded system information processing device can be configured in an electronic device with data processing capabilities. Figure 1 As shown, the method includes:

[0031] S110, obtaining target embedded system information, and compressing the target embedded system information to obtain first information.

[0032] Among them, embedded system information can be understood as information generated by an embedded system. The target embedded system information can refer to embedded system information waiting to be processed. It should be noted that the target embedded system information can come from the same detection device or from different detection devices, which can be determined according to actual application conditions, and is not limited in this embodiment. The first information can refer to information obtained after compressing the target embedded system information.

[0033] In this embodiment, the target embedded system information is first obtained, and then a preset compression algorithm (such as Huffman coding, run length coding, LZ77, DEFLATE, etc.) is used to intelligently identify redundant information in the target embedded system information and remove it, thereby compressing the target embedded system information to obtain the first information, thereby effectively reducing the data volume of the target embedded system information, which is beneficial to the subsequent data transmission and processing efficiency.

[0034] In this embodiment, optionally, compressing the target embedded system information to obtain the first information includes: performing data preprocessing on the target embedded system information; wherein the data preprocessing includes denoising and normalization processing; determining the data type of the target embedded system information, and determining a target compression algorithm based on the data type; and compressing the target embedded system information after data preprocessing according to the target compression algorithm to obtain the first information.

[0035] Specifically, the target embedded system information is first preprocessed, such as denoising and normalization, to remove useless information and outliers, so as to lay the foundation for subsequent data volume compression. Different types of embedded system information have different characteristics, such as text information may have more repeated characters, image information has a large amount of data and regular pixel values, so the most suitable compression method can be determined as the target compression algorithm according to the data type of the target embedded system information (such as text, image, audio, etc.) and the requirements of specific application scenarios (such as storage requirements, transmission bandwidth, etc.), so as to achieve data volume compression of the target embedded system information.

[0036] For example, for text-type embedded system information, due to the large number of repeated characters, Huffman coding (encoding according to the frequency of character occurrence) can be used to effectively compress the data volume; for image-type embedded system information, run-length encoding can make good use of the characteristics of continuous identical pixel values ​​and compress data by recording the length and value of continuous identical pixel values, which can greatly reduce the data volume; for other types of embedded system information, such as audio, it is necessary to select a suitable compression algorithm based on specific characteristics. For example, there may be a large number of low-frequency or high-frequency parts in the audio, and the corresponding transform coding algorithm can be used to remove redundancy.

[0037] Exemplarily, for text embedded system information, based on the characteristics of character sequences, the LZ77 algorithm can also be used to compress the data volume. Among them, the LZ77 algorithm compresses by finding repeated patterns in the string, and can achieve good compression effects for a large amount of repeated text content. For example, a document containing a large number of repeated paragraphs can quickly find these repeated parts and encode them through the LZ77 algorithm, thereby greatly reducing the amount of data. For image embedded system information, since images usually have a large amount of pixel data, the DEFLATE algorithm can also be used to effectively compress the pixel values ​​of the image. Among them, the DEFLATE algorithm utilizes a combination of Huffman coding and the LZ77 algorithm, which can significantly reduce the storage space of image data without losing too much image quality. For example, a picture with a high resolution can have its file size greatly reduced after being compressed using the DEFLATE algorithm, which is convenient for data storage and transmission.

[0038] Through such settings, this solution can accurately select compression algorithms according to the characteristics of different data types and the needs of specific application scenarios, and can achieve the best data compression effect.

[0039] S120, performing data verification on the first information to obtain a verification result; wherein the data verification includes data quality assessment and data anomaly detection.

[0040] In this embodiment, in order to ensure the accuracy of the data, after obtaining the first information, data quality assessment and data anomaly detection can be performed on the first information respectively to obtain the corresponding data verification results. Among them, data quality assessment can include multiple aspects such as completeness, accuracy, consistency and validity, which are used to detect quality problems in the data (such as missing values, outliers, duplicate data, etc.). Data anomaly detection can include detection of data mutations, trend anomalies, etc. If the first information passes both the data quality assessment and the data anomaly detection, it can be determined that the first information passes the data verification.

[0041] In this embodiment, optionally, data verification is performed on the first information to obtain a verification result, including: performing data verification on the integrity of the first information based on a preset integrity indicator to obtain a first verification result; determining a reference data source based on the data type and business scenario of the first information; performing accuracy verification on the data content of the first information based on the reference data source to obtain a second verification result; performing validity verification on the data format of the first information based on the reference data source to obtain a third verification result; determining the data source and collection time of the first information, and performing data verification on the consistency of the first information based on the data source and collection time to obtain a fourth verification result; determining a data quality assessment result of the first information based on the first verification result, the second verification result, the third verification result and the fourth verification result.

[0042] Specifically, the integrity ratio of the first information can be calculated based on the preset integrity index. If the integrity ratio is greater than the preset ratio threshold (such as 95%), the first information can be considered to have integrity. Otherwise, it does not have integrity. This is used as the first verification result to implement integrity verification of the first information. Among them, the preset integrity index can be understood as a data indicator item that must exist in advance to ensure data integrity. Exemplarily, by defining a data integrity index, such as the existence of a required field in each table, a flag bit can be set for each required field in the table. If the field is empty in the first information, the flag bit is 0, otherwise it is 1. For each table, the sum of the required field flag bits is calculated and compared with the total number of rows in the table, and the integrity ratio can be obtained. For example, a table has 100 rows, and the sum of the required field flag bits is 90, then the integrity ratio is 90%. When the preset ratio threshold is 95%, since 90% < 95%, it can be determined that the first information does not have integrity. Data integrity verification can be used to check whether the collected data is complete. By carefully checking the field integrity and record integrity of the collected data, it is possible to promptly discover missing parts in the data, such as certain key fields being empty, thereby ensuring the basic integrity of the data.

[0043] Then, the reference data source is determined according to the data type and business scenario of the first information. Among them, the data type can be one of text and numerical value; the reference data source can be understood as a standard data source or business rule that matches the data type and business scenario of the first information, which is used as a measure for judging the accuracy of the data. After determining the reference data source, the data content of the first information can be checked for accuracy based on the reference data source to obtain a second verification result. Exemplarily, for numerical data, the deviation range between the data and the standard value can be calculated, and data exceeding the deviation range is considered inaccurate; for text data, the text similarity algorithm can be used to judge the accuracy of the data. For example, the collected text is compared with the authoritative text, and the similarity score is calculated. The similarity below a certain threshold is considered inaccurate. Through data accuracy verification, the collected data can be accurately compared with the reference data source, and the accuracy of the data can be judged from multiple dimensions such as numerical value and logic to ensure that the data can truly reflect the actual situation.

[0044] After determining the reference data source, the data format of the first information may be validated based on the reference data source to obtain a third validation result. Exemplarily, the data is validated within the scope of business rules and data format requirements, and the data is validated strictly in accordance with business rules and data format requirements, such as whether the value range and data type of the data comply with regulations, thereby ensuring the validity and operability of the data at the business level.

[0045] In addition, the consistency of the first information can be verified according to the data source and collection time of the first information to obtain a fourth verification result. Among them, the data consistency check can be used to check whether there are consistency problems between data from different sources and different time periods, and to conduct a comprehensive consistency check on data from different collection points and different time periods, such as whether the data of the same object at different times are consistent, the consistency of data from different channels, etc., to avoid data contradictions. Among them, the consistency of data from different channels refers to the situation that different data sources (such as different databases, different systems or different devices, etc.) should remain consistent for the same or related information when collecting and recording data. Exemplarily, data consistency rules can be established in advance, for example, the associated field values ​​of the same entity in different tables should be consistent, and the data consistency is checked through the key-value relationship between the associated tables.

[0046] It should be noted that in this embodiment, a data monitoring tool can be used to perform sampling checks on the collected embedded system information at regular intervals (i.e., regularly) by setting a timed task. The first verification result, the second verification result, the third verification result, and the fourth verification result can also be integrated to obtain the final data quality assessment result, and a quality assessment report can be generated based on the data quality assessment result. It is understandable that the quality assessment report includes statistical information on data integrity, accuracy, consistency, and effectiveness, such as the content, quantity, and proportion of unqualified data of each indicator.

[0047] Through such a setting, this scheme can effectively judge the completeness, accuracy, consistency and validity of the collected data, so as to determine whether the collected data meets the requirements, which helps to improve the quality and availability of the data.

[0048] In this embodiment, optionally, performing data verification on the first information to obtain a verification result also includes: performing statistical analysis on the first information to obtain a statistical result; wherein the statistical analysis includes mean, variance and standard deviation analysis; determining a target threshold range based on attribute information of the first information and historical information corresponding to the attribute information, and comparing the first information with the target threshold range to obtain a matching result; and determining a data anomaly detection result of the first information based on the statistical result and the matching result.

[0049] Exemplarily, the first information can be monitored in real time through a variety of anomaly detection algorithms, such as statistical-based methods, rule-based methods, machine learning-based methods, etc., so as to promptly discover anomalies in the data, such as data mutations, trend anomalies, etc. Specifically, the data distribution, indicators out of range, and anomalies that do not match the normal pattern can be detected through a variety of methods such as statistical analysis, threshold setting, and pattern matching. For example, by using statistical principles, by calculating and analyzing characteristic parameters such as the mean, variance, and standard deviation of the first information, the anomalies in the data distribution are discovered, thereby keenly capturing the anomalies in the data distribution that deviate from the norm, providing a strong basis for subsequent detection.

[0050] In addition, the candidate threshold ranges of various data indicators can be set in advance according to the rules presented by historical data and the clear requirements in the business rules. After obtaining the first information, the matching target threshold range can be determined from the candidate threshold range according to the attribute information of the first information (such as which business scenario it belongs to) and the historical information corresponding to the attribute information. When the first information is not within the target threshold range, it indicates that there is a data anomaly in the first information; otherwise, it indicates that there is no data anomaly in the first information. For example, assuming that the first information is f, the minimum data indicator threshold is f(min), and the maximum data indicator threshold is f(max), that is, the target threshold range is [f(min), f(max)]; when f(min)≤f≤f(max), it can be judged that there is no anomaly in the first information. When it is determined that there is a data anomaly, a data anomaly alarm can be triggered immediately to ensure timely perception of abnormal data.

[0051] Furthermore, after obtaining the statistical results and matching results, the statistical results and matching results can be integrated to obtain the data anomaly detection results, and then an anomaly detection report is generated based on the data anomaly detection results, and the anomaly detection report is promptly reported to relevant personnel to provide strong support for subsequent processing. Exemplarily, the anomaly detection report may include the time, location, data feature information, etc. of the anomaly.

[0052] With such a setting, this solution can quickly and accurately determine whether there are data anomalies in the collected data through statistical analysis and pattern matching, which helps to further improve the quality and availability of the data.

[0053] S130: If the verification result is passed, use the edge device to perform intelligent analysis on the first information to obtain an analysis result; wherein the edge device includes a GPU and an FPGA, and the intelligent analysis includes classification, clustering and abnormal behavior analysis.

[0054] In this embodiment, if the first information passes the data verification, the computing power of the edge device (such as GPU and FPGA, etc.) can be used to perform a quick preliminary intelligent analysis (including classification, clustering and abnormal behavior analysis, etc.) on the first information to obtain the analysis result. Among them, GPU is a graphics processing unit, and FPGA is a field programmable gate array; the analysis result includes the analysis method and data content. For example, taking the intelligent transportation system as an example, the GPU and FPGA at the edge are used to process the video data collected by the camera on the road. Among them, the GPU can quickly extract features from each frame of the video, such as identifying the outline, color and other features of the vehicle; the FPGA can perform real-time classification based on these features and divide the vehicles into different types, such as cars, trucks, buses, etc. At the same time, cluster analysis can also be performed to classify vehicles that appear simultaneously in a certain area into one category for subsequent statistics and analysis of traffic flow. For abnormal behavior detection, the edge can pre-set some rules for vehicle behavior, such as sudden acceleration, deceleration, deviation from the normal driving trajectory, etc. of the vehicle is considered abnormal; when abnormal behavior is detected, the edge device can immediately issue an alarm and transmit the relevant data to the central server for further confirmation and analysis. By performing preliminary analysis and processing at the edge, the amount of data transmission and latency are greatly reduced compared to transmitting all video data to a central server for processing, enabling the system to respond and process road conditions in real time in a short period of time, such as promptly detecting traffic jams, accidents, etc. and taking corresponding measures.

[0055] S140, encrypting the analysis result to obtain second information, and sending the second information to the central processing unit.

[0056] In this embodiment, after obtaining the analysis results, a high-strength encryption algorithm, such as AES, RSA, etc., can be used to encrypt the analysis results. During the encryption process, a unique key can be generated for each data block, and the key management adopts a secure key distribution mechanism to prevent the key from being stolen or tampered with. In addition, in order to deal with possible encryption cracking attacks, the key can also be updated regularly to increase the security of the data.

[0057] Specifically, firstly, a complex random number generation algorithm and key expansion technology are used to generate high-strength and difficult-to-crack keys (including keys required for encryption and decryption), providing a solid foundation for subsequent data encryption to ensure the uniqueness and security of the keys. Then, considering encryption efficiency, security and other factors, the encryption algorithm that best suits the current data characteristics and application environment is selected from a variety of encryption algorithms such as AES, RSA, DES, etc., to meet different data encryption requirements. Then, the analysis results are encrypted according to the selected encryption algorithm. Advanced encryption technologies (such as block encryption, stream encryption, etc.) can be used to encrypt the data bit by bit or block by block, so that the data has a high degree of randomness and complexity during the encryption process, increasing the difficulty of cracking.

[0058] Furthermore, in order to verify the integrity and security of the encrypted data and ensure that the data has not been tampered with during transmission and storage, the encrypted data can be verified for integrity and security through a specific verification algorithm (such as a hash function). Once the data is found to be tampered with or damaged, an alarm is immediately issued and corresponding recovery measures are taken to ensure the security and reliability of the data. Among them, the hash function maps the encrypted data to a hash value of a fixed length. This hash value is unique. Even if the original data has only a slight change, the hash value will change significantly. When verifying and testing, the hash value of the encrypted data is first calculated, and then the hash value is compared with the hash value of the previously stored data. If the two are exactly the same, it indicates that the data has not been tampered with during transmission and storage, and the integrity is verified; if the hash values ​​of the two are different, it indicates that the data may be tampered with or damaged. At this time, an alarm can be issued immediately and a series of recovery measures can be taken, such as re-obtaining the original data for encryption and verification, or restoring it to an untampered state by backing up the data, etc., to ensure that the security and reliability of the data are always maintained.

[0059] The technical solution of the embodiment of the present invention obtains the target embedded system information, compresses the data volume of the target embedded system information to obtain the first information; performs data verification on the first information to obtain the verification result; wherein the data verification includes data quality assessment and data anomaly detection; if the verification result is passed, the first information is intelligently analyzed by the edge device to obtain the analysis result; wherein the edge device includes GPU and FPGA, and the intelligent analysis includes classification, clustering and abnormal behavior analysis; the analysis result is encrypted to obtain the second information, and the second information is sent to the central processing unit. This technical solution can effectively ensure the security, accuracy and efficiency of embedded system information processing by performing data volume compression, data verification, intelligent analysis and data encryption processing on the embedded system information, thereby ensuring the stability and reliability of the embedded system.

[0060] In this embodiment, optionally, after compressing the target embedded system information after data preprocessing according to the target compression algorithm to obtain the first information, it also includes: determining the compression effect according to the ratio of the first information to the target embedded system information; if the compression effect does not meet the preset compression ratio, adjusting the target compression algorithm according to the compression effect; and re-compressing the target embedded system information after data preprocessing based on the adjusted target compression algorithm to obtain the first information.

[0061] In this embodiment, after obtaining the first information, the compression effect can also be determined according to the ratio of the first information to the target embedded system information, and then the compression effect can be evaluated based on the preset compression ratio. Wherein, the preset compression ratio can refer to a reference compression ratio (which can include multiple values) pre-set according to the actual compression requirements, which can be used as a basis for judging the compression effect. If the compression effect does not meet the preset compression ratio, that is, the ratio of the first information to the target embedded system information is too high or too low, the target compression algorithm can be adjusted according to the compression effect to ensure that the target embedded system information always maintains the optimal compression state. Wherein, there are two ways to adjust the target compression algorithm, one is to adjust the compression parameters of the target compression algorithm (such as window size, matching length, etc.), and the other is to directly replace the target compression algorithm.

[0062] Through such settings, this solution can ensure that the target embedded system information always maintains the optimal compression state through compression effect evaluation, thereby better achieving data volume compression.

[0063] In this embodiment, optionally, after performing data verification on the first information to obtain a verification result, it also includes: if the verification result is failure to pass the verification, determining the data that failed to pass the verification in the first information as target abnormal data; performing data repair on the target abnormal data, and updating the first information based on the repaired data.

[0064] In this embodiment, if the data quality assessment fails to pass the verification, the data cleaning function can be used to automatically repair or eliminate the data with quality problems, thereby improving the quality of the data. If the data anomaly detection fails to pass the verification, the corresponding recovery measures can be triggered immediately, such as data repair, data re-collection, switching backup data, etc., to ensure the stability and reliability of the embedded system. Specifically, after the data anomaly is detected, various information such as the historical trend of the data and the correlation of adjacent data can be used to infer and repair the abnormal data to restore the integrity of the data. When the abnormal data cannot be repaired directly, the abnormal data can be replaced with a pre-set default value or data obtained from other reliable sources (such as data from similar devices) to ensure the availability of the data.

[0065] Through such a setting, this solution can effectively ensure the accuracy and availability of data by automatically repairing and updating abnormal data when data verification fails.

[0066] Embodiment 2

[0067] Figure 2 A flowchart of a method for processing embedded system information provided in Embodiment 2 of the present invention is provided, and this embodiment is optimized based on the above embodiment. The specific optimization is: after obtaining the target embedded system information, it also includes: obtaining the clock information corresponding to the data source of the target embedded system information; determining whether the clock information has a clock deviation according to the standard time source; if so, correcting the clock information according to the standard time source, and updating the acquisition time of the target embedded system information based on the corrected clock information.

[0068] like Figure 2 As shown, the method of this embodiment specifically includes the following steps:

[0069] S210, acquiring target embedded system information and clock information corresponding to a data source of the target embedded system information.

[0070] The data source can be understood as the data collection point or collection device. Each data source corresponds to a local clock. When collecting data, a timestamp is accurately added to each data. The timestamp can be accurate to milliseconds or even microseconds, accurately recording the data collection time, providing an accurate time basis for subsequent data association and analysis.

[0071] S220: Determine whether the clock information has clock deviation according to the standard time source.

[0072] Exemplarily, the standard time source may be a global positioning system (GPS) or the like. In this embodiment, after obtaining the standard time source, each data source may be connected to an accurate standard time source, and the standard time may be synchronized to the local clock of each data source with a high-precision frequency and algorithm to ensure the consistency of the time reference. In addition, time synchronization protocols suitable for embedded systems, such as NTP (Network Time Protocol) and PTP (Precision Time Protocol), may be selected and optimized, and customized implementation may be performed according to the characteristics and requirements of the embedded system to ensure the efficiency and stability of time synchronization. Furthermore, during the data collection process, the local clocks of each data source are continuously monitored in real time to determine whether there is a clock deviation between the local clock and the standard time source.

[0073] S230: If it exists, the clock information is corrected according to the standard time source, and the acquisition time of the target embedded system information is updated based on the corrected clock information.

[0074] In this embodiment, if there is a clock deviation or it is found that the clock deviation exceeds a preset range, an alarm can be immediately issued and corresponding adjustment measures can be taken, such as adjusting the clock frequency or performing clock correction, and the collection time of the target embedded system information can be updated based on the corrected clock information to maintain the accuracy of the time.

[0075] By designing a time synchronization mechanism for data collection, we can ensure that the time of each collection point remains consistent, providing an accurate time reference for subsequent data association and analysis. The time synchronization mechanism uses high-precision timestamp technology to ensure that the time of each collection point can remain highly consistent. It can regularly send time synchronization signals to each collection point. After receiving the signal, the collection point will adjust according to its own clock deviation to ensure the accuracy of the time. At the same time, it also has time backtracking and timestamp verification functions, which can trace and verify the time when data is abnormal to ensure the accuracy of the time sequence and association of the data.

[0076] S240: compress the target embedded system information to obtain first information.

[0077] S250, performing data verification on the first information to obtain a verification result; wherein the data verification includes data quality assessment and data anomaly detection.

[0078] S260: If the verification result is passed, use the edge device to perform intelligent analysis on the first information to obtain an analysis result; wherein the edge device includes a GPU and an FPGA, and the intelligent analysis includes classification, clustering and abnormal behavior analysis.

[0079] S270, encrypt the analysis result to obtain second information, and send the second information to the central processing unit.

[0080] Among them, the specific implementation method of S240-S270 can refer to the relevant description in the above-mentioned embodiment 1, and will not be repeated here.

[0081] The technical solution of the embodiment of the present invention, after obtaining the target embedded system information, also obtains the clock information corresponding to the data source of the target embedded system information; determines whether the clock information has clock deviation according to the standard time source; if so, corrects the clock information according to the standard time source, and updates the acquisition time of the target embedded system information based on the corrected clock information. This technical solution, by designing a time synchronization mechanism for the collected data, can ensure that the time of each data source remains consistent, thereby providing an accurate time reference for the subsequent association and analysis of data.

[0082] Embodiment 3

[0083] Figure 3This is a schematic diagram of the structure of an embedded system information processing device provided in Embodiment 3 of the present invention. The device can execute the embedded system information processing method provided in any embodiment of the present invention and has the corresponding functional modules and beneficial effects of the execution method. Figure 3 As shown, the device comprises:

[0084] The data volume compression module 310 is used to obtain target embedded system information and perform data volume compression on the target embedded system information to obtain first information;

[0085] A data verification module 320 is used to perform data verification on the first information to obtain a verification result; wherein the data verification includes data quality assessment and data anomaly detection;

[0086] An intelligent analysis module 330, configured to, if the verification result is a passed verification, use an edge device to perform intelligent analysis on the first information to obtain an analysis result; wherein the edge device includes a GPU and an FPGA, and the intelligent analysis includes classification, clustering and abnormal behavior analysis;

[0087] The data encryption module 340 is used to encrypt the analysis result to obtain second information, and send the second information to the central processing unit.

[0088] Optionally, the data volume compression module 310 is used to:

[0089] Performing data preprocessing on the target embedded system information; wherein the data preprocessing includes denoising and normalization processing;

[0090] Determine a data type of the target embedded system information, and determine a target compression algorithm based on the data type;

[0091] The target embedded system information after data preprocessing is compressed according to the target compression algorithm to obtain the first information.

[0092] Optionally, the data volume compression module 310 is further used to:

[0093] After compressing the target embedded system information after data preprocessing according to the target compression algorithm to obtain the first information, the method further includes:

[0094] Determining a compression effect according to a ratio of the first information to the target embedded system information;

[0095] If the compression effect does not meet the preset compression ratio, adjusting the target compression algorithm according to the compression effect;

[0096] The target embedded system information after data preprocessing is recompressed based on the adjusted target compression algorithm to obtain the first information.

[0097] Optionally, the data verification module 320 is used to:

[0098] Performing data verification on the integrity of the first information based on a preset integrity indicator to obtain a first verification result;

[0099] Determine a reference data source according to the data type and business scenario of the first information;

[0100] Performing accuracy verification on the data content of the first information based on the reference data source to obtain a second verification result;

[0101] Performing validity verification on the data format of the first information based on the reference data source to obtain a third verification result;

[0102] Determining a data source and a collection time of the first information, and performing a data verification on the consistency of the first information based on the data source and the collection time to obtain a fourth verification result;

[0103] A data quality assessment result of the first information is determined according to the first verification result, the second verification result, the third verification result and the fourth verification result.

[0104] Optionally, the data verification module 320 is further used to:

[0105] Performing statistical analysis on the first information to obtain statistical results; wherein the statistical analysis includes mean, variance and standard deviation analysis;

[0106] Determine a target threshold range according to the attribute information of the first information and the historical information corresponding to the attribute information, and compare the first information with the target threshold range to obtain a matching result;

[0107] A data anomaly detection result of the first information is determined according to the statistical result and the matching result.

[0108] Optionally, the device further includes: a data repair module, configured to:

[0109] After performing data verification on the first information to obtain a verification result, if the verification result is failure to pass the verification, determining the data in the first information that fails to pass the verification as target abnormal data;

[0110] The target abnormal data is repaired, and the first information is updated based on the repaired data.

[0111] Optionally, the device further includes: a clock correction module, configured to:

[0112] After acquiring the target embedded system information, acquiring clock information corresponding to a data source of the target embedded system information;

[0113] Determining whether the clock information has a clock deviation according to a standard time source;

[0114] If it exists, the clock information is corrected according to the standard time source, and the acquisition time of the target embedded system information is updated based on the corrected clock information.

[0115] An embedded system information processing device provided by an embodiment of the present invention can execute an embedded system information processing method provided by any embodiment of the present invention, and has functional modules and beneficial effects corresponding to the execution method.

[0116] Embodiment 4

[0117] Figure 4 A schematic diagram of the structure of an electronic device 10 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0118] like Figure 4 As shown, the electronic device 10 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 to the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0119] A number of components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0120] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above, such as a method for processing embedded system information.

[0121] In some embodiments, the method for processing embedded system information may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the method for processing embedded system information described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to execute the method for processing embedded system information in any other appropriate manner (e.g., by means of firmware).

[0122] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0123] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0124] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0125] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0126] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0127] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0128] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0129] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for processing embedded system information, characterized in that: The method comprises: Acquire target embedded system information, and compress the target embedded system information to obtain first information; Performing data verification on the first information to obtain a verification result; wherein the data verification includes data quality assessment and data anomaly detection; If the verification result is passed, the first information is intelligently analyzed by using an edge device to obtain an analysis result; wherein the edge device includes a GPU and an FPGA, and the intelligent analysis includes classification, clustering and abnormal behavior analysis; The analysis result is encrypted to obtain second information, and the second information is sent to a central processing unit.

2. The method according to claim 1, characterized in that Compressing the target embedded system information to obtain first information includes: Performing data preprocessing on the target embedded system information; wherein the data preprocessing includes denoising and normalization processing; Determine a data type of the target embedded system information, and determine a target compression algorithm based on the data type; The target embedded system information after data preprocessing is compressed according to the target compression algorithm to obtain the first information.

3. The method according to claim 2, characterized in that After compressing the target embedded system information after data preprocessing according to the target compression algorithm to obtain the first information, the method further includes: Determining a compression effect according to a ratio of the first information to the target embedded system information; If the compression effect does not meet the preset compression ratio, adjusting the target compression algorithm according to the compression effect; The target embedded system information after data preprocessing is recompressed based on the adjusted target compression algorithm to obtain the first information.

4. The method according to claim 1, characterized in that: Performing data verification on the first information to obtain a verification result includes: Performing data verification on the integrity of the first information based on a preset integrity indicator to obtain a first verification result; Determine a reference data source according to the data type and business scenario of the first information; Performing accuracy verification on the data content of the first information based on the reference data source to obtain a second verification result; Performing validity verification on the data format of the first information based on the reference data source to obtain a third verification result; Determining a data source and a collection time of the first information, and performing a data verification on the consistency of the first information based on the data source and the collection time to obtain a fourth verification result; A data quality assessment result of the first information is determined according to the first verification result, the second verification result, the third verification result and the fourth verification result.

5. The method according to claim 1 or 4, characterized in that: Performing data verification on the first information to obtain a verification result also includes: Performing statistical analysis on the first information to obtain statistical results; wherein the statistical analysis includes mean, variance and standard deviation analysis; Determine a target threshold range according to the attribute information of the first information and the historical information corresponding to the attribute information, and compare the first information with the target threshold range to obtain a matching result; A data anomaly detection result of the first information is determined according to the statistical result and the matching result.

6. The method according to claim 1, characterized in that After performing data verification on the first information to obtain a verification result, the method further includes: If the verification result is failure to pass the verification, the data that failed to pass the verification in the first information is determined as target abnormal data; The target abnormal data is repaired, and the first information is updated based on the repaired data.

7. The method according to claim 1, characterized in that After acquiring the target embedded system information, the method further includes: Acquire clock information corresponding to a data source of the target embedded system information; Determining whether the clock information has a clock deviation according to a standard time source; If it exists, the clock information is corrected according to the standard time source, and the acquisition time of the target embedded system information is updated based on the corrected clock information.

8. An embedded system information processing device, characterized in that: The device comprises: A data volume compression module, used for acquiring target embedded system information, and performing data volume compression on the target embedded system information to obtain first information; A data verification module, configured to perform data verification on the first information to obtain a verification result; wherein the data verification includes data quality assessment and data anomaly detection; An intelligent analysis module, configured to, if the verification result is a passed verification, use an edge device to perform intelligent analysis on the first information to obtain an analysis result; wherein the edge device includes a GPU and an FPGA, and the intelligent analysis includes classification, clustering and abnormal behavior analysis; The data encryption module is used to encrypt the analysis result to obtain second information, and send the second information to the central processing unit.

9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and, a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the method for processing embedded system information according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the method for processing embedded system information according to any one of claims 1 to 7 when executed.

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