Decoding method and device, electronic equipment, storage medium and program product

By adopting a cascading fusion method of two decoding methods in flash memory, the problem of low error correction performance in the prior art is solved, and higher data read and write reliability and lower bit error rate are achieved.

CN119864061AActive Publication Date: 2025-04-22SHANDONG YUNHAI GUOCHUANG CLOUD COMPUTING EQUIP IND INNOVATION CENT CO LTD
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Patent Information

Application Number
CN202510323374.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-19
Publication Date
2025-04-22
Estimated Expiration
2045-03-19

AI Technical Summary

Technical Problem

In the prior art, the error correction performance of flash memory is low, which affects the reliability of reading and writing data in a high-density storage environment.

Method used

A decoding method is adopted that performs decoding operations in two decoding methods in each processing round. First, the initial confidence information and codeword information are decoded using the first decoding method to obtain the codeword information at the first level. Then, the codeword information at the first level is corrected using the second decoding method to obtain the codeword information at the second level. Through this cascading fusion method, the codeword information after the previous round of error correction is used for decoding, reducing the bit error rate and reducing the number of iterations.

Benefits of technology

Through multiple iterations in cascading and fusion decoding, the bit error rate of decoding is reduced, the number of iterations is reduced, and the error correction performance is improved.

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Abstract

The invention discloses a decoding method and device, electronic equipment, a storage medium and a program product, and relates to the technical field of storage, and the decoding method comprises the steps: in each processing round, carrying out decoding operation through two decoding modes, namely, after initial confidence information and initial code word information corresponding to the current round are obtained, adopting a first decoding mode, and adopting a second decoding mode after the initial confidence information and the initial code word information corresponding to the current round are obtained; and decoding the initial confidence information and the initial codeword information to obtain the codeword information of the first level in the current round, and correcting the result obtained by the first decoding mode by adopting a second decoding mode and the pre-obtained codeword information of the first level to obtain the codeword information of the second level in the current round. Thus, through multiple rounds of iteration in cascade fusion decoding, decoding can be performed by using the code word information after the last round of error correction in the decoding operation process corresponding to the first decoding mode, and the error rate of decoding can be reduced, so that the number of iterations can be greatly reduced, and the decoding performance can be improved.
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Description

Technical Field

[0001] The present application relates to the field of storage technology, and in particular to a decoding method, device, electronic device, storage medium, and program product. Background Art

[0002] In the field of storage technology, with the continuous development of flash memory technology, the density of storage cells in flash memory is constantly increasing, that is, the distance between storage cells is getting closer, which may affect the state of its neighboring cells when programming or reading a cell, increasing the bit error rate. Therefore, in order to ensure the reliability of reading and writing data, it is necessary to introduce error correction technology in the data reading and writing channel.

[0003] Currently, independent encoding / decoding methods are generally used to encode / decode data, resulting in low error correction performance of flash memory. Summary of the invention

[0004] The present application provides a decoding method, an apparatus, an electronic device, a storage medium, and a program product to at least solve the problem of low error correction performance in the related art.

[0005] The present application provides a decoding method, comprising: In the current round, obtaining initial codeword information corresponding to the current round; Obtain the initial confidence information corresponding to the current round; Determine the first-level codeword information in the current round according to the preconfigured first decoding mode, the initial confidence information, and the initial codeword information; Using a first decoding method, verifying the codeword information of the first level in the current round, and obtaining a verification result corresponding to the codeword information of the first level in the current round; According to the preconfigured second decoding mode and the pre-acquired first-level verification information, error correction is performed on the first-level codeword information in the current round to obtain the second-level codeword information in the current round; When it is determined that the verification result and / or the number of iterations corresponding to the current round meets the preset conditions, the iteration is stopped, and the codeword information of the second level in the current round is determined as the target decoding result.

[0006] The present application also provides a decoding device, comprising: An acquisition module, used to acquire, in a current round, initial codeword information corresponding to the current round; acquire initial confidence information corresponding to the current round; A determination module, configured to determine the codeword information of the first level in the current round according to the preconfigured first decoding mode, the initial confidence information, and the initial codeword information; A verification module, configured to verify the codeword information of the first level in the current round by using the first decoding method, and obtain a verification result corresponding to the codeword information of the first level in the current round; An error correction module, configured to correct the codeword information of the first level in the current round according to the preconfigured second decoding mode and the pre-acquired first level verification information, so as to obtain the codeword information of the second level in the current round; The determination module is also used to stop the iteration when it is determined that the verification result and / or the number of iterations corresponding to the current round meet the preset conditions, and determine the codeword information of the second level in the current round as the target decoding result.

[0007] The present application also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of any one of the above decoding methods when executing the computer program.

[0008] The present application also provides a computer-readable storage medium, in which a computer program is stored, wherein when the computer program is executed by a processor, the steps of any one of the above decoding methods are implemented.

[0009] The present application also provides a computer program product, including a computer program, which implements the steps of any of the above decoding methods when executed by a processor.

[0010] Through this application, in each processing round, the decoding operation is performed by two decoding methods, that is, after obtaining the initial confidence information and initial codeword information corresponding to the current round, the first decoding method is first used to perform decoding operations on the initial confidence information and the initial codeword information to obtain the first-level codeword information in the current round, and then the second decoding method and the pre-acquired first-level codeword information are used to correct the result obtained by the first decoding method (the first-level codeword information in the current round) to obtain the second-level codeword information in the current round. In this way, through multiple rounds of iterations in cascade fusion decoding, the codeword information after error correction in the previous round can be used for decoding during the decoding operation corresponding to the first decoding method, which can reduce the decoding error rate, thereby greatly reducing the number of iterations and improving the decoding performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0012] Figure 1 A schematic diagram of the architecture of a coding system provided in an embodiment of the present application; Figure 2 A flowchart of a decoding method provided in an embodiment of the present application; Figure 3 A schematic diagram of the structure of the data to be decoded provided in an embodiment of the present application; Figure 4 A flowchart of another decoding method provided in an embodiment of the present application; Figure 5 A data flow diagram of a decoding process provided in an embodiment of the present application; Figure 6 A schematic diagram of a flow chart of an encoding method provided in an embodiment of the present application; Figure 7 A schematic diagram of the data flow of the encoding and decoding process provided in the embodiment of the present application; Figure 8 A flowchart of another decoding method provided in an embodiment of the present application; Fig. 9 A schematic diagram of the structure of a decoding device provided in an embodiment of the present application; Fig.10 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0013] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0014] It should be noted that, in the description of this application, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. The terms "first", "second", etc. in this application are used to distinguish similar objects, and are not used to describe a specific order or sequence.

[0015] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0016] The decoding method provided in the embodiment of the present application can be performed as follows: Figure 1The coding system shown in the figure can include a flash memory controller and a flash memory. The flash memory controller can be used to receive various read and write requests from other devices, and parse the various read and write requests to obtain operation information for reading and writing data, and read data from the flash memory or write data to the flash memory according to the operation information. The flash memory includes multiple storage units for storing data.

[0017] The embodiment of the present application provides a decoding method, which can be executed by the above-mentioned flash memory controller, such as Figure 2 As shown, the decoding method may include the following steps: Step S201: in the current round, initial confidence information and initial codeword information corresponding to the current round are obtained.

[0018] Among them, the initial confidence information may include the initial confidences corresponding to multiple bits in the current round. The initial confidence may be a log-likelihood ratio (LLR), which indicates the probability characteristic of the bit being a first preset value, and the first preset value may be 1 or 0. Accordingly, the initial confidence information may be an initial LLR table. The codeword information may be the result obtained by processing the original data with a coding algorithm, including the original information and redundant information added for error correction or error detection. The initial codeword information includes the initial decision values ​​corresponding to each bit in the current round.

[0019] The current round may be the first round among multiple rounds, or may be a non-first round among multiple rounds. The methods for obtaining the initial confidence information and initial codeword information corresponding to these two types of rounds are different. Therefore, the specific steps for obtaining the initial codeword information and the initial confidence information are introduced below for the first round and the non-first round respectively.

[0020] Case 1: The current round is the first round.

[0021] First, obtaining the initial codeword information corresponding to the current round may include the following specific steps: Step 1: Obtain data to be decoded.

[0022] Step 2: Decode the data to be decoded according to the second decoding method to obtain initial codeword information corresponding to the current round.

[0023] The data to be decoded may include multiple lines of user data, multiple lines of first-class verification data, second-class verification data for protecting each line of user data, and second-class verification data for protecting each line of first-class verification data. For example, the structure of the data to be decoded may be as follows: Figure 3As shown, it includes n rows of user data and c rows of first-class check data, and second-class check data for protecting each row of user data and each row of first-class check data, that is, n+c rows of second-class check data. Alternatively, the data to be decoded may include multiple rows of user data, multiple rows of first-class check data, and second-class check data for protecting each row of first-class check data, and only a part of the data that is prone to errors is protected. Only part of the data is decoded during the decoding process, which can improve the efficiency of the decoding process corresponding to the second decoding method, thereby improving the overall decoding efficiency. The first-class check data may be the check data corresponding to the first decoding method, and the second-class check data may be the check data corresponding to the second decoding method. The first decoding method may be an iterative decoding method, for example, it may be a low-density parity check code (LDPC) decoding method. The second decoding method may be an algebraic code decoding method, for example, a Bose Chaudhuri Hocquenghem (BCH) code decoding method or a Reed-Solomon (RS) code decoding method.

[0024] Specifically, after the flash memory controller reads the data to be decoded from the flash memory, it can first input the data to be decoded into its own decoder corresponding to the second decoding mode (for example, input into the BCH decoder), perform decoding and error correction on the data to be decoded, and obtain the initial codeword information corresponding to the current round and the first-level verification information (that is, the second type of verification data, for example, Figure 3 The first-level check information is cached for the next decoding process corresponding to the second decoding method. The decoder can be implemented in the form of a hardware module or in the form of software.

[0025] In this way, in the first round, the second decoding method is used to decode the data to be decoded, so that some erroneous data in the data to be decoded can be corrected. When the decoding operation corresponding to the first decoding method is performed subsequently, the decoding process can be accelerated, the decoding operation efficiency corresponding to the first decoding method can be improved, resource waste can be reduced, and the decoding processing delay can be reduced.

[0026] In some optional implementations, the flash memory controller may also directly determine the data to be decoded as the initial codeword information corresponding to the current round without being processed by the second decoding method.

[0027] In some optional implementations, the flash memory controller may first determine the data length of the data to be decoded, and when it is determined that the data length is greater than a preset length threshold, the second decoding method may be determined to be an RS code decoding method, or when it is determined that the data length is less than or equal to the preset length threshold, the second decoding method may be determined to be a BCH decoding method. Since the BCH code has a lower computational complexity when processing smaller data blocks, and the RS code has a higher error correction capability when processing larger data blocks, the appropriate decoding method is dynamically selected according to the data length, which has high flexibility, can reduce unnecessary computational overhead, and improve overall computational efficiency.

[0028] Second, obtaining the initial confidence information corresponding to the current round may include the following specific steps: Step 1: Determine the initial confidence corresponding to each bit in the current round according to the first decoding mode and the initial decision value corresponding to each bit in the initial codeword information in the current round.

[0029] Step 2: Generate initial confidence information corresponding to the current round based on the initial confidence corresponding to each bit in the current round.

[0030] Specifically, taking the first decoding method as an LDPC code decoding method as an example, the flash memory controller can calculate the initial confidence corresponding to each bit in the current round according to the calculation method specified in the LDPC code decoding method, using the initial decision value of each bit in the initial codeword information in the current round, and the preset noise characteristics. Furthermore, the flash memory controller can arrange the initial confidence corresponding to each bit in the current round according to the order of the bits, and generate the initial confidence information corresponding to the current round.

[0031] Case 2: The current round is not the first round.

[0032] First, obtaining the initial confidence information corresponding to the current round may include the following specific steps: Step 1: Obtain the codeword information of the second level in the previous round corresponding to the current round, and the confidence information of the first level in the previous round.

[0033] Step 2: According to the second decoding method and the codeword information of the second level in the previous round, the confidence information of the first level in the previous round is updated to obtain the confidence information of the second level in the previous round.

[0034] The second-level confidence information in the previous round is the initial confidence information corresponding to the current round. The second-level codeword information in the previous round includes multiple lines of codeword information, and the first-level confidence information in the previous round includes multiple lines of confidence information.

[0035] Specifically, taking the first decoding method as the LDPC code decoding method as an example, in the process of performing the decoding operation according to the first decoding method in the last round, the flash memory controller will calculate the confidence information of the first level in the last round according to the calculation method specified in the LDPC code decoding method, using the initial codeword information corresponding to the last round, and the initial confidence information corresponding to the last round. Then, the flash memory controller can correct the codeword information of the first level in the last round according to the second decoding method and the verification information of the first level, and obtain the codeword information of the second level in the last round. In the processing of the current round, the flash memory controller can directly determine the codeword information of the second level in the last round as the initial confidence information corresponding to the current round. The codeword information of the second level in the last round can include the decision value of each bit in the second level in the last round, and the decision value of each bit in the second level in the last round is used as the initial decision value of each bit in the current round for subsequent iterative processing.

[0036] After obtaining the confidence information of the first level in the previous round and the codeword information of the second level in the previous round, the flash memory controller may execute step 2, which may be performed in the following two ways: Method 1: According to the second decoding method and the decision value of each bit at the second level in the previous round, the confidence of each bit at the second level in the previous round is determined. According to the confidence of each bit at the second level in the previous round, the confidences corresponding to all bits in the confidence information of the first level in the previous round are updated respectively to obtain the confidence information of the second level in the previous round.

[0037] Specifically, the second decoding method may specify a confidence calculation method, and the flash memory controller may calculate the confidence of each bit at the second level in the previous round according to the confidence calculation method in the second decoding method, using the decision value of each bit at the second level in the previous round (the specific calculation method may be similar to the above-mentioned method of calculating the initial confidence). Furthermore, the flash memory controller may update the confidences corresponding to all bits in the confidence information of the first level in the previous round according to the confidence of each bit at the second level in the previous round, and obtain the confidence information of the second level in the previous round (taking any bit as an example, the flash memory controller may update the confidence of the bit in the confidence of the first level in the previous round to the confidence of the bit at the second level in the previous round).

[0038] Alternatively, the flash memory controller may determine whether the decision value of the first bit included in the second-level codeword information in the previous round is consistent with the decision value of the second bit (any one of the multiple bits) included in the first-level codeword information in the previous round. If so, it is determined that the confidence of the second bit does not need to be updated, and the confidence of the second bit in the first level in the previous round can be directly determined as the confidence of the second bit in the second level in the previous round. If not, the confidence of the target bit in the second level in the previous round is calculated according to the value of the second bit included in the second-level codeword information in the previous round and the confidence calculation method specified in the second decoding method. By analogy, the confidence of all bits in the second level in the previous round can be obtained, and the confidence of all bits in the second level in the previous round together constitutes the confidence information of the second level in the previous round.

[0039] Method 2 Step 1: Using the second decoding method, each line of code word information in the second level code word information in the previous round is verified respectively to obtain a verification result corresponding to each line of code word information.

[0040] Step 2: According to the target verification result corresponding to the target row codeword information, an update operation corresponding to the target verification result is performed on the confidence information of the target row in the first-level confidence information in the previous round.

[0041] The target line of codeword information is any line of codeword information among the multiple lines of codeword information included in the second-level codeword information in the previous round.

[0042] Step three, after completing the update operation corresponding to the confidence information of each row, the confidence information of the second level in the previous round is obtained.

[0043] Specifically, taking the second decoding mode as the BCH code decoding mode as an example, the second decoding mode specifies a check equation for successful error correction (for example, a syndrome specified in the BCH code decoding mode), and the flash memory controller can determine whether the target row codeword information meets the condition given by the check equation, and if so, it can be determined that the target check result corresponding to the target row codeword information is a successful error correction. If not, it is determined that the target check result corresponding to the target row codeword information is a failed error correction.

[0044] In this way, the flash memory controller can perform an update operation corresponding to the target verification result on the confidence information of the target row according to the different target verification results: When the target verification result is that the error correction is successful, the flash memory controller may update the confidence information of the target row in the first-level confidence information in the previous round according to the target row codeword information and the correspondence between the pre-constructed decision value and the confidence. Accordingly, the flash memory controller may perform the update operation according to the following specific steps: Step 1: According to the decision value of the target bit and the pre-constructed correspondence between the decision value and the confidence, determine the target confidence corresponding to the decision value of the target bit.

[0045] The decision value of the target bit is the decision value of any one of the multiple bits included in the target row codeword information. The corresponding relationship between the decision value and the confidence level may include: the decision value is a first preset value, the confidence level corresponding to the first preset value is a maximum confidence level threshold, the decision value is a second preset value, and the confidence level corresponding to the second preset value is a minimum confidence level threshold. For example, {[1, 10], [0, -10]}.

[0046] Step 2: Update the confidence corresponding to the target bit in the confidence information of the first level in the previous round to the target confidence.

[0047] Step 3: Mark the confidence information corresponding to the target row in the confidence information of the first level in the previous round to indicate that the confidence corresponding to any bit in the target row will not be updated in the current round.

[0048] The marked information may be "no error".

[0049] When the target verification result is an error correction failure, the confidence information of the target row in the first-level confidence information in the previous round may not be updated, or the confidence information of the target row in the first-level confidence information in the previous round may be updated in a manner similar to method one, that is, according to the second decoding method and the codeword information of the second level in the previous round, the confidence information of the target row in the first-level confidence information in the previous round is updated.

[0050] After completing the judgment operation of each row and the confidence setting operation performed after judging the success of error correction, the confidence information of the second level in the previous round can be obtained.

[0051] Through the above scheme, when the codeword information of a row has been determined to be successfully corrected, its corresponding confidence information is marked as no longer updated, which can avoid repeated calculations of the row in subsequent iterations, reduce unnecessary computing overhead, and speed up the convergence of the entire decoding process. In this way, all data can be corrected in a shorter time, improving the overall computing efficiency. In addition, for those rows that have not yet been determined to be successfully corrected, continue to update the confidence and iteratively decode to ensure that these rows can gradually approach the optimal solution. For the rows that have been successfully corrected, fix their confidence and mark them, which can prevent them from being affected by errors in other rows in subsequent iterations, and thus avoid the introduction of new errors due to subsequent iterations, thereby improving the overall error correction accuracy.

[0052] Second, the flash memory controller may determine the acquired second-level codeword information in the previous round as the initial codeword information corresponding to the current round.

[0053] Step S202: determining the first-level codeword information in the current round according to the preconfigured first decoding mode, initial confidence information, and initial codeword information.

[0054] Specifically, the flash memory controller may determine the first-level codeword information in the current round according to the LLR-BP (Log-Likelihood Ratio Belief Propagation) algorithm or the LLR-NMS (Log-Likelihood Ratio Normalized Min-Sum) algorithm in the first decoding mode by using the initial confidence information and the initial codeword information, which may specifically include the following steps: Step 1: According to the first decoding method and the initial decision value of each bit in the current round, the initial confidence information is updated to obtain the first level of confidence information in the current round.

[0055] Step 2: According to the confidence information of the first level in the current round and the preset confidence threshold, the initial codeword information corresponding to the current round is updated to obtain the codeword information of the first level in the current round.

[0056] Among them, step 2 may specifically include: Step 1: Determine the decision value of each bit at the first level in the current round according to the confidence of each bit at the first level in the current round and a preset confidence threshold.

[0057] Step 2: Update the initial codeword information according to the first-level decision value of each bit in the current round and the initial decision value of each bit in the current round to obtain the first-level codeword information in the current round.

[0058] Specifically, taking the first decoding method as the LDPC code decoding method as an example, the first decoding method involves the concepts of variable nodes and check nodes, wherein the variable nodes are used to indicate bits, and the check nodes are used to indicate check methods or constraints. In addition, a check matrix can be pre-specified in the first decoding method. After obtaining the initial codeword information, the flash memory controller can determine the check nodes connected to each variable node based on the initial codeword information and the check matrix. In each iteration process, for each variable node, each variable node sends the initial LLR value of the current round to all the check nodes connected to it, and the check node updates the initial LLR values ​​of all variable nodes connected to it according to the initial LLR values ​​of the current round sent by all variable nodes received, and obtains the confidence information of the first level in the current round.

[0059] Furthermore, the flash memory controller may perform a hard decision operation based on the confidence information of the first level in the current round, which may be specifically: determining whether the confidence of the first bit at the first level in the current round is greater than a preset confidence threshold, wherein the first bit is any one of the multiple bits. When it is determined that the confidence of the first bit at the first level in the current round is greater than the preset confidence threshold, the first preset value is determined as the decision value of the first bit at the first level in the current round. Alternatively, when it is determined that the confidence of the first bit at the first level in the current round is less than or equal to the preset confidence threshold, the second preset value is determined as the decision value of the first bit at the first level in the current round (for example, if the confidence is greater than the preset threshold, the decision bit is 1, and if the confidence is less than or equal to the preset threshold, the decision bit is 0). After completing the decision operation of each bit, the decision value of each bit at the first level in the current round can be obtained.

[0060] Finally, the flash memory controller can update the initial codeword information according to the decision value corresponding to each bit to obtain the codeword information of the first level in the current round. Specifically, it can be: the flash memory controller can determine whether the decision value of the first level of the first bit is the same as the initial decision value of the first bit in the initial codeword information. When it is determined that the decision value of the first level of the first bit is different from the initial decision value of the first bit in the initial codeword information, the initial decision value of the first bit in the initial codeword information is updated to the decision value of the first level of the first bit. Alternatively, when it is determined that the decision value of the first level of the first bit is different from the initial decision value of the first bit in the initial codeword information, the initial decision value of the first bit in the initial codeword information is updated to the decision value of the first level of the first bit.

[0061] In this way, in each round, the confidence and decision value of each bit are gradually updated according to the initial codeword information and initial confidence information. This iterative process can gradually approach the optimal solution and significantly improve the error correction capability. Moreover, each round of updates will use the results of the previous round to form a cumulative effect. As the rounds increase, the errors are gradually corrected, and accurate codeword information is finally obtained. In addition, each update is equivalent to a re-check of the data, which can ensure the correctness of each bit and help significantly reduce the bit error rate, especially in high-noise environments.

[0062] For example, the initial codeword information is r=[1, 0, 1, 1, 0, 1, 1], and the initial confidence information is [0.8, -0.7, 0.9, 0.6, -0.5, 0.4, 0.3]. After updating, the confidence information of the first level in the current round can be [0.9, -0.8, 0.85, 0.65, -0.6, 0.45, 0.35]. Based on this, the codeword information of the first level in the current round can be [1, 0, 1, 1, 0, 1, 1].

[0063] Step S203: using the first decoding method to verify the codeword information of the first level in the current round, and obtaining a verification result corresponding to the codeword information of the first level in the current round.

[0064] Specifically, taking the first decoding method as the LDPC code decoding method, a check equation can be pre-defined in the first decoding method, and the flash memory controller can determine, in units of rows, whether the code word information of each row in the code word information of the first level in the current round meets the conditions indicated by the check equation. When the code word information of all rows meets the conditions indicated by the check equation, the check result can be obtained as success. Alternatively, when there is any row of code word information that does not meet the conditions indicated by the check equation, the check result can be obtained as failure.

[0065] Step S204: Correct the codeword information of the first level in the current round according to the preconfigured second decoding mode and the pre-acquired check information of the first level to obtain the codeword information of the second level in the current round.

[0066] Specifically, taking the BCH code decoding method as an example, the flash memory controller can use the first-level verification information to correct the decision values ​​of one or more bits included in the first-level code information in the current round according to the decoding rules specified in the BCH code decoding method, and obtain the decision value of each bit after error correction. The decision values ​​of all bits after error correction together constitute the second-level code information in the current round.

[0067] Step S205, when it is determined that the verification result and / or the number of iterations corresponding to the current round meets the preset condition, the iteration is stopped, and the codeword information of the second level in the current round is determined as the target decoding result.

[0068] Specifically, the flash memory controller can determine whether the verification result is successful, and whether the number of iterations corresponding to the current round reaches the preset number of iterations. When the verification result is determined to be successful, or the number of iterations corresponding to the current round reaches the preset number of iterations (that is, the preset condition is met), the iteration is stopped, and the codeword information of the second level in the current round is determined as the target decoding result. Alternatively, when the verification result is determined to be a failure, and the number of iterations corresponding to the current round does not reach the preset number of iterations (that is, the preset condition is not met), the next round of processing is continued until any processing round meets the preset condition, the iteration is stopped, and the codeword information of the second level in the last round is determined as the target decoding result.

[0069] When determining to continue the next round of processing, the flash memory controller may determine the initial confidence information and initial codeword information corresponding to the next round, so as to perform the next round of decoding process, which may specifically include the following steps: First, determining the initial confidence information corresponding to the next round may include the following steps: Step 1: According to the second decoding method and the codeword information of the second level in the current round, the confidence information of the first level in the current round is updated to obtain the confidence information of the second level in the current round.

[0070] Step 2: Determine the confidence information of the second level in the current round as the initial confidence information of the next round.

[0071] Among them, step one can adopt the following two methods: Method 1: According to the second decoding method and the decision value of each bit at the second level in the current round, the confidence of each bit at the second level in the current round is determined. According to the confidence of each bit at the second level in the current round, the confidences corresponding to all bits in the confidence information of the first level in the current round are updated respectively to obtain the confidence information of the second level in the current round.

[0072] Method 2: Using the second decoding method, each line of codeword information in the second level codeword information in the current round is verified respectively to obtain the verification result corresponding to each line of codeword information. According to the first verification result corresponding to the first line of codeword information, the confidence information of the first line in the first level confidence information in the current round is updated corresponding to the first verification result, wherein the first line of codeword information is any line of codeword information in the multiple lines of codeword information included in the second level codeword information in the current round. After completing the update operation corresponding to each line of confidence information, the confidence information of the second level in the current round is obtained.

[0073] Second, the codeword information of the second level in the current round is determined as the initial codeword information corresponding to the next round.

[0074] The decoding method provided by the embodiment of the present application performs decoding operations in each processing round through two decoding methods, that is, after obtaining the initial confidence information and initial codeword information corresponding to the current round, the first decoding method is first used to perform decoding operations on the initial confidence information and the initial codeword information to obtain the first-level codeword information in the current round, and then the second decoding method and the pre-acquired first-level codeword information are used to correct the result obtained by the first decoding method (the first-level codeword information in the current round) to obtain the second-level codeword information in the current round. In this way, through multiple rounds of iterations in cascade fusion decoding, the codeword information after error correction in the previous round can be used for decoding during the decoding operation corresponding to the first decoding method, and the confidence information in the decoding iteration process is continuously corrected, which can reduce the decoding error rate, thereby greatly reducing the number of iterations, reducing the decoding delay, and improving the overall performance of cascade decoding.

[0075] In some optional implementations, the flash memory controller may receive a decoding instruction sent by the central processor, and parse the decoding instruction to obtain indication information on whether the second decoding process participates in the iterative decoding process. If the indication information is used to indicate that the second decoding process participates in the iterative process, the following steps may be performed: Figure 2 The decoding operation is performed in the process shown in FIG. 1. If the indication information is used to indicate that the second decoding process does not participate in the iterative process, the decoding operation can be performed in the following manner: Figure 4 The process shown performs the decoding operation.

[0076] The embodiment of the present application provides a decoding method, which can be executed by the above-mentioned flash memory controller, wherein the second decoding method may not participate in the iterative decoding process, and accordingly, the flash memory controller may only obtain the initial codeword information and initial confidence information corresponding to the first round, and after obtaining the initial codeword information corresponding to the first round, according to Figure 4 The process shown in the figure performs a decoding operation, and the decoding method may include the following steps: Step S401, obtaining data to be decoded.

[0077] Step S402: Decode the data to be decoded according to the second decoding method to obtain initial codeword information corresponding to the current round and first-level verification information.

[0078] Step S401 and step S402 may refer to the specific steps of obtaining the initial codeword information corresponding to the current round in case 1 in step S201, which will not be described in detail here.

[0079] Step S403, iteratively decoding the initial codeword information corresponding to the current round according to the first decoding method, to obtain a decoding result corresponding to the first decoding method.

[0080] Specifically, taking the first decoding method as an LDPC code decoding method as an example, the flash memory controller can use the LLR-BP algorithm included in the first decoding method to iteratively decode the data to be decoded to obtain a decoding result corresponding to the first decoding method.

[0081] Step S404: According to the second decoding method and the check information of the first level, error correction is performed on the decoding result corresponding to the first decoding method to obtain a decoding result corresponding to the second decoding method.

[0082] Specifically, after completing the iterative decoding operation of the first decoding method, the flash memory controller can use the second decoding method and the first-level verification information to correct the decoding result corresponding to the first decoding method to obtain a decoding result corresponding to the second decoding method.

[0083] Step S405: determine the decoding result corresponding to the second decoding method as the target decoding result.

[0084] For example, when the first decoding mode is an LDPC code decoding mode and the second decoding mode is a BCH code decoding mode, the data flow of the decoding process can be as follows: Figure 5 As shown, the flash memory controller inputs the data to be decoded into the BCH decoder (the decoder corresponding to the second decoding method) for decoding to obtain initial codeword information and first-level check information, and inputs the initial codeword information into the LDPC decoder (the decoder corresponding to the first decoding method) for iterative decoding to obtain an intermediate decoding result (that is, a decoding result corresponding to the first decoding method), and inputs the intermediate decoding result into the BCH decoder again, so that the BCH decoding can use the first-level check information to correct the intermediate decoding result again to obtain the final target decoding result.

[0085] In the decoding method provided in the embodiment of the present application, the second decoding mode can participate in each iteration process (for example, Figure 2The decoding process shown in the figure) can also only participate in the first and last decoding, which is more flexible, allowing users to choose according to actual needs. For example, when the first decoding method is the LDPC code decoding method and the second decoding method is the BCH code decoding method, in the case of extremely high requirements for data integrity and reliability, or in the case of poor channel conditions (that is, the channel noise is greater than the preset noise threshold), after each LDPC code decoding operation, further error correction can be performed through the BCH code decoding method, and errors can be further checked and corrected, thereby ensuring that the output decoding result has extremely high reliability. On the contrary, when the channel conditions are good (channel noise), since the LDPC code can already correct most of the errors, additional BCH iterations may not bring significant performance improvements. Therefore, BCH code decoding can be performed after completing the LDPC iterative decoding process.

[0086] The embodiment of the present application provides an encoding method, which can be executed by the above-mentioned flash memory controller, such as Figure 6 As shown, the decoding method may include the following steps: Step S601, obtaining user data.

[0087] Specifically, after receiving the write data instruction sent by the central processing unit, the flash memory controller may parse the write data instruction to obtain the user data.

[0088] Step S602: Encode the user data according to a preconfigured first encoding method to obtain codeword information corresponding to the first encoding method.

[0089] Specifically, Figure 3 As shown, the user data can be divided into multiple lines according to a preset length. The flash memory controller can use a first encoding method to encode the multiple lines of user data to obtain multiple lines of first-type verification data.

[0090] Step S603: Encode the codeword information corresponding to the first encoding method according to the preconfigured second encoding method to obtain an encoding result.

[0091] The first encoding method corresponds to the first decoding method, and the second encoding method corresponds to the second decoding method.

[0092] Specifically, for each row of user data and / or each first type of verification data, the flash memory controller can use the second encoding method to encode each row of user data and / or each first type of verification data to obtain a final encoding result. For example, the encoding result can be as follows: Figure 3 The data to be decoded is shown.

[0093] Step S604: store the encoding result.

[0094] Specifically, the flash memory controller may store the encoding result in the flash memory.

[0095] The encoding method provided in the embodiment of the present application, since different encoding methods have their own advantages, therefore, cascade encoding of user data by two encoding methods can enhance error correction capability and data reliability and cover a wider range of error modes.

[0096] The following takes the case where the first decoding mode is an LDPC code decoding mode and the second decoding mode is a BCH code decoding mode as an example to illustrate the overall process of cascade coding and decoding.

[0097] Example 1, such as Figure 7 As shown, after obtaining the user data, the flash memory controller first performs LDPC encoding operation (encoding by the first encoding method) on the user data, and then performs BCH encoding operation (encoding by the second encoding method), and stores the encoding result in the flash memory. When the read instruction is obtained, the data to be decoded can be read from the flash memory. In the process of writing and reading data, the data will be interfered by noise during the channel transmission process, so that the read data is different from the original data, and error correction operation is required.

[0098] When decoding the data to be decoded, the multi-stage decoding of BCH (the second decoding method) and the iterative decoding of LDPC (the first decoding method) can be combined to perform cascade decoding on the data to be decoded to improve the decoding performance. Figure 8 As shown, the following steps are included: In step a, the flash memory controller inputs the acquired data to be decoded into its own BCH decoder, which performs a BCH decoding to obtain LDPC codeword information and BCH check information. The LDPC codeword information here is the initial codeword information corresponding to the first round, and the BCH check information is the first-level check information.

[0099] Step b: The flash memory controller sends the LDPC codeword information obtained after BCH decoding to its own LDPC decoder, and the BCH check information is cached by the BCH decoder and is not sent to the LDPC decoder.

[0100] Step c: After the LDPC decoder in the flash memory controller receives the LDPC codeword information input by the BCH decoder, it can perform subsequent decoding using an LLR-BP iterative decoding method.

[0101] The LDPC decoder can first generate the initial LLR table corresponding to the first round (that is, the initial confidence information corresponding to the first round) based on the LDPC codeword information first input by the BCH decoder. Then, the LDPC decoder can update the initial LLR table based on the information of the check node and the information of the variable node to obtain the LLR table after the first update of the current round (that is, the confidence information of the first level in the current round). After completing an LLR table update, the LDPC decoder can judge the LDPC codeword information based on the updated LLR table to obtain the LDPC codeword information after the first update of the current round (that is, the codeword information of the first level in the current round).

[0102] In step d, the LDPC decoder sends the LDPC codeword information after the first update back to the BCH decoder, and the BCH decoder performs a second BCH decoding to obtain BCH decoding data (that is, the codeword information after the second update in the current round, corresponding to the codeword information of the second level in the current round). Furthermore, the BCH decoder can update the LLR corresponding to the erroneous data in the BCH codeword in the LDPC updated LLR table according to the BCH decoding data, obtain the BCH updated LLR table (that is, obtain the LLR table after the second update in the current round, corresponding to the confidence information of the second level in the current round), and transmit it to the LDPC decoder.

[0103] In step e, after the LDPC decoder obtains the BCH updated LLR table and BCH decoding data, it starts the next decoding iteration process (that is, in the next round, the BCH updated LLR table is used as the initial confidence information corresponding to the next round, and the BCH decoding data is used as the initial codeword information corresponding to the next round).

[0104] Step f: until the LDPC decoding result is successful or the maximum number of LDPC decoding times is reached (that is, determining whether the decoding process corresponding to the first decoding method is completed), stop the LDPC iteration.

[0105] In step g, the LDPC decoder inputs the LDPC codeword information obtained in the last round of LDPC decoding process into the BCH decoder again, and the BCH decoder performs the final decoding.

[0106] In step h, the BCH decoder outputs the decoded LDPC codeword information as a decoding result to a subsequent module.

[0107] The decoding method provided by the embodiment of the present application has a relatively simple BCH decoding logic. Therefore, while the BCH decoding logic is cyclically used to reduce the LDPC decoding error rate, the decoding complexity will not be increased due to multiple rounds of BCH decoding. In addition, this solution will not destroy the original LDPC and BCH cascade coding data structure, and will not change the original cascade coding process, and will not introduce additional coding overhead. In addition, this solution has no requirements for the cascade coding data structure, and can be used as long as the LDPC and BCH cascade architectures that can be independently decoded can be used, and has high flexibility and adaptability.

[0108] Example 2 After obtaining the user data, the flash memory controller first performs LDPC encoding operation on the user data, and then performs BCH encoding operation, and stores the encoding result in the flash memory. In the read instruction obtained, the data to be decoded can be read from the flash memory. When performing the decoding operation on the data to be decoded, BCH decoding can be performed first, then LDPC iterative decoding, and finally BCH decoding can be performed again. Accordingly, the decoding process can include the following steps: In step a, the flash memory controller inputs the acquired data to be decoded into its own BCH decoder, and the BCH decoder performs a BCH decoding to obtain LDPC codeword information and BCH check information.

[0109] Step b: The flash memory controller sends the LDPC codeword information obtained after BCH decoding to its own LDPC decoder, and the BCH check information is cached by the BCH decoder and is not sent to the LDPC decoder.

[0110] Step c, after the LDPC decoder in the flash memory controller receives the LDPC codeword information input by the BCH decoder, it can use the LLR-BP iterative decoding method to iteratively decode the input LDPC codeword information, and after each iterative decoding, the obtained decoding result is verified. If the verification result is failure or the number of iterations has not reached the preset number of iterations, the next iterative decoding is performed. If the verification result is success, or the number of iterations reaches the preset number of iterations, the LDPC codeword information obtained in the last iterative process is used as the intermediate decoding result.

[0111] In step d, the LDPC decoder inputs the intermediate decoding result into the BCH decoder again, and the BCH decoder performs the final decoding.

[0112] In step f, the BCH decoder outputs the decoded LDPC codeword information as a decoding result to a subsequent module.

[0113] The decoding method provided by the embodiment of the present application can provide error correction capabilities at different levels by performing BCH decoding at the first bit and the last bit respectively. The first BCH decoding can preliminarily correct some obvious errors and reduce the burden of subsequent LDPC decoding. The final BCH decoding can further ensure that all remaining errors are fully corrected. Since BCH codes are good at handling a small number of concentrated errors, and LDPC codes are good at handling a large number of scattered errors, the combination of the two can cover a wider range of error modes and significantly improve the overall error correction capability of the system.

[0114] The following takes the case where the first decoding method is an LDPC code decoding method and the second decoding method is an RS code decoding method as an example to illustrate the overall process of cascade coding and decoding.

[0115] Example 1 After obtaining the user data, the flash memory controller first performs LDPC encoding on the user data, and then performs RS encoding, and stores the encoding result in the flash memory. When the read instruction is obtained, the data to be decoded can be read from the flash memory. In the process of writing and reading data, the data will be interfered by noise during the channel transmission process, so that the read data and the original data are different, and error correction operations are required. When performing decoding operations on the data to be decoded, RS decoding and LDPC iterative decoding can be combined, and cascade decoding of the data to be decoded can include the following steps: In step a, the flash memory controller inputs the acquired data to be decoded into its own RS decoder, which performs RS decoding to obtain LDPC codeword information and RS check information. The LDPC codeword information here is the initial codeword information corresponding to the first round, and the RS check information is the check information of the first level.

[0116] In step b, the flash memory controller sends the LDPC codeword information obtained after RS ​​decoding to its own LDPC decoder, and the RS check information is cached by the RS decoder and is not sent to the LDPC decoder.

[0117] Step c: After the LDPC decoder in the flash memory controller receives the LDPC codeword information input by the RS decoder, it can perform subsequent decoding using an LLR-BP iterative decoding method.

[0118] The LDPC decoder can first generate the initial LLR table corresponding to the first round (that is, the initial confidence information corresponding to the first round) based on the LDPC codeword information first input by the RS decoder. Then, the LDPC decoder can update the initial LLR table based on the information of the check node and the information of the variable node to obtain the LLR table after the first update of the current round (that is, the confidence information of the first level in the current round). After completing an LLR table update, the LDPC decoder can judge the LDPC codeword information based on the updated LLR table to obtain the LDPC codeword information after the first update of the current round (that is, the codeword information of the first level in the current round).

[0119] Step d, the LDPC decoder sends the LDPC codeword information after the first update back to the RS decoder, and the RS decoder performs a second RS decoding to obtain RS decoding data (that is, the codeword information after the second update in the current round, corresponding to the codeword information of the second level in the current round). Furthermore, the RS decoder can update the LLR corresponding to the erroneous data in the RS codeword in the LDPC updated LLR table according to the RS decoding data, obtain the RS updated LLR table (that is, obtain the LLR table after the second update in the current round, corresponding to the confidence information of the second level in the current round), and transmit it to the LDPC decoder.

[0120] In step e, after the LDPC decoder obtains the RS-updated LLR table and RS decoding data, it starts the next decoding iteration process (that is, in the next round, the RS-updated LLR table is used as the initial confidence information corresponding to the next round, and the RS decoding data is used as the initial codeword information corresponding to the next round).

[0121] Step f: Stop LDPC iteration until the LDPC decoding result is successful or the maximum number of LDPC decoding times is reached.

[0122] In step g, the LDPC decoder inputs the LDPC codeword information obtained in the last round of LDPC into the RS decoder again, and the RS decoder performs the final decoding.

[0123] In step h, the RS decoder outputs the decoded LDPC codeword information as a decoding result to a subsequent module.

[0124] In the decoding method provided by the embodiment of the present application, since the RS code is good at processing the situation where multiple consecutive bits are wrong, it is more efficient to use the RS code for decoding processing when the data block is large. By fusing the LDPC code decoding method and the RS code decoding method in an iterative processing manner, the decoding efficiency can be greatly improved.

[0125] Example 2 After obtaining the user data, the flash memory controller first performs LDPC encoding operation on the user data, and then performs RS encoding operation, and stores the encoding result in the flash memory. In the obtained read instruction, the data to be decoded can be read from the flash memory. When performing the decoding operation on the data to be decoded, RS decoding can be performed first, then LDPC iterative decoding, and finally RS decoding can be performed again. Accordingly, the decoding process can include the following steps: In step a, the flash memory controller inputs the acquired data to be decoded into its own RS decoder, which performs RS decoding to obtain LDPC codeword information and RS check information. The LDPC codeword information here is the initial codeword information corresponding to the first round, and the RS check information is the check information of the first level.

[0126] In step b, the flash memory controller sends the LDPC codeword information obtained after RS ​​decoding to its own LDPC decoder, and the RS check information is cached by the RS decoder and is not sent to the LDPC decoder.

[0127] Step c, after the LDPC decoder in the flash memory controller receives the LDPC codeword information input by the RS decoder, it can use the LLR-BP iterative decoding method to iteratively decode the input LDPC codeword information, and after each iterative decoding, the obtained decoding result is verified. If the verification result is failure or the number of iterations has not reached the preset number of iterations, the next iterative decoding is performed. If the verification result is success, or the number of iterations reaches the preset number of iterations, the LDPC codeword information obtained in the last iterative process is used as the intermediate decoding result.

[0128] In step d, the LDPC decoder inputs the intermediate decoding result into the RS decoder again, and the RS decoder performs the final decoding.

[0129] In step f, the RS decoder outputs the decoded LDPC codeword information as a decoding result to a subsequent module.

[0130] The decoding method provided in the embodiment of the present application can provide powerful error correction capabilities at different levels by performing RS decoding at the first and last bits respectively and performing multiple LDPC iterative decoding in the intermediate stage. RS decoding is not performed in each LDPC iteration, which can reduce unnecessary computing overhead.

[0131] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method.

[0132] The embodiment of the present application also provides a decoding device, such as Fig. 9 As shown, the decoding device comprises: The acquisition module 901 is used to acquire, in the current round, initial codeword information corresponding to the current round; and acquire initial confidence information corresponding to the current round; A determination module 902, configured to determine the first-level codeword information in the current round according to the preconfigured first decoding mode, the initial confidence information, and the initial codeword information; A verification module 903 is used to verify the codeword information of the first level in the current round by using the first decoding method, and obtain a verification result corresponding to the codeword information of the first level in the current round; An error correction module 904 is used to correct the codeword information of the first level in the current round according to the pre-configured second decoding mode and the pre-acquired first-level verification information to obtain the codeword information of the second level in the current round; The determination module 902 is further configured to stop the iteration when it is determined that the verification result and / or the number of iterations corresponding to the current round meet a preset condition, and determine the codeword information of the second level in the current round as the target decoding result.

[0133] In some optional implementations, the initial codeword information corresponding to the current round includes initial decision values ​​corresponding to a plurality of bits in the current round; The determination module 902 is specifically configured to: According to the first decoding method and the initial decision value of each bit in the current round, the initial confidence information is updated to obtain the first level of confidence information in the current round; According to the confidence information of the first level in the current round and the preset confidence threshold, the initial codeword information corresponding to the current round is updated to obtain the codeword information of the first level in the current round.

[0134] In some optional implementations, the confidence information of the first level in the current round includes the confidence of each bit in the first level in the current round; The determination module 902 is specifically configured to: Determine the decision value of each bit at the first level in the current round according to the confidence of each bit at the first level in the current round and the preset confidence threshold; According to the first-level decision value of each bit in the current round and the initial decision value of each bit in the current round, the initial codeword information is updated to obtain the first-level codeword information in the current round.

[0135] In some optional implementations, the determination module 902 is specifically configured to: Determine whether the confidence of a first bit at a first level in a current round is greater than a preset confidence threshold, wherein the first bit is any one of the multiple bits; When it is determined that the confidence of the first bit at the first level in the current round is greater than a preset confidence threshold, determining the first preset value as the decision value of the first bit at the first level in the current round; or, When it is determined that the confidence of the first bit at the first level in the current round is less than or equal to the preset confidence threshold, the second preset value is determined as the decision value of the first bit at the first level in the current round.

[0136] In some optional implementations, when the current round is not the first round, the acquisition module 901 is specifically configured to: Obtaining the codeword information of the second level in the previous round corresponding to the current round, and the confidence information of the first level in the previous round; According to the second decoding method and the codeword information of the second level in the previous round, the confidence information of the first level in the previous round is updated to obtain the confidence information of the second level in the previous round, wherein the confidence information of the second level in the previous round is the initial confidence information corresponding to the current round.

[0137] In some optional implementations, the initial codeword information corresponding to the current round is the second-level codeword information in the previous round.

[0138] In some optional implementations, the codeword information of the second level in the previous round includes the decision value of each bit at the second level in the previous round; The acquisition module 901 is specifically used for: Determine the confidence level of each bit at the second level in the previous round according to the second decoding mode and the decision value of each bit at the second level in the previous round; According to the confidence of each bit at the second level in the previous round, the confidences corresponding to all bits in the confidence information of the first level in the previous round are updated respectively to obtain the confidence information of the second level in the previous round.

[0139] In some optional implementations, the second-level codeword information in the previous round includes multiple lines of codeword information, and the first-level confidence information in the previous round includes multiple lines of confidence information; The acquisition module 901 is specifically used for: Using the second decoding method, each line of code word information in the second level code word information in the previous round is verified respectively to obtain a verification result corresponding to each line of code word information; According to the target verification result corresponding to the target row codeword information, an update operation corresponding to the target verification result is performed on the confidence information of the target row in the first-level confidence information in the previous round, wherein the target row codeword information is any row of codeword information among the multiple rows of codeword information included in the second-level codeword information in the previous round; After completing the update operation corresponding to the confidence information of each row, the confidence information of the second level in the previous round is obtained.

[0140] In some optional implementations, when the target verification result is that the error correction is successful, the acquisition module 901 is specifically used to: According to the target row codeword information and the pre-constructed correspondence between the decision value and the confidence, the confidence information of the target row in the first level confidence information in the previous round is updated.

[0141] In some optional implementations, each line of codeword information in the second level codeword information in the previous round includes decision values ​​of a plurality of bits at the second level in the previous round; The acquisition module 901 is specifically used for: According to the decision value of the target bit position and the correspondence between the pre-constructed decision value and the confidence level, a target confidence level corresponding to the decision value of the target bit position is determined, wherein the decision value of the target bit position is the decision value of any one of the multiple bits included in the target row codeword information; Update the confidence corresponding to the target bit in the confidence information of the first level in the previous round to the target confidence; And, the confidence information corresponding to the target row in the confidence information of the first level in the previous round is marked to indicate that the confidence corresponding to any bit in the target row will no longer be updated in the current round.

[0142] In some optional implementations, when the target verification result is an error correction failure, the acquisition module 901 is specifically configured to: According to the second decoding method and the second-level codeword information in the previous round, the confidence information of the target row in the first-level confidence information in the previous round is updated to obtain the second-level confidence information in the previous round.

[0143] In some optional implementations, when the current round is the first round, the acquisition module 901 is specifically configured to: Obtain data to be decoded; According to the second decoding method, the data to be decoded is decoded to obtain initial codeword information corresponding to the current round.

[0144] In some optional implementations, the acquisition module 901 is specifically configured to: Determine the initial confidence corresponding to each bit in the current round according to the first decoding mode and the initial decision value corresponding to each bit in the initial codeword information in the current round; According to the initial confidence corresponding to each bit in the current round, the initial confidence information corresponding to the current round is generated.

[0145] In some optional embodiments, the data to be decoded includes multiple rows of user data, multiple rows of first-class verification data, second-class verification data for protecting each row of user data, and second-class verification data for protecting each row of first-class verification data, wherein the first-class verification data is verification data corresponding to the first decoding method, and the second-class verification data is verification data corresponding to the second decoding method.

[0146] In some optional embodiments, the data to be decoded includes multiple rows of user data, multiple rows of first-class verification data, and second-class verification data for protecting each row of first-class verification data, wherein the first-class verification data is verification data corresponding to the first decoding method, and the second-class verification data is verification data corresponding to the second decoding method.

[0147] In some optional implementations, the device further includes an encoding module 905: The acquisition module 901 is also used to acquire user data; The encoding module 905 is used to encode the user data according to a preconfigured first encoding method to obtain codeword information corresponding to the first encoding method; encode the codeword information corresponding to the first encoding method according to a preconfigured second encoding method to obtain an encoding result, wherein the first encoding method corresponds to the first decoding method, and the second encoding method corresponds to the second decoding method; and store the encoding result.

[0148] The description of the features in the embodiment corresponding to the decoding device can refer to the relevant description of the embodiment corresponding to the decoding method, which will not be repeated here.

[0149] The embodiment of the present application also provides an electronic device, such as Fig.10 As shown, it includes a memory 10 and a processor 20. The memory 10 stores a computer program, and the processor 20 is configured to run the computer program to execute the steps in any one of the above decoding method embodiments. The electronic device may be the above flash memory controller.

[0150] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any one of the above decoding method embodiments when running.

[0151] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0152] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps in any one of the above decoding method embodiments are implemented.

[0153] An embodiment of the present application further provides another computer program product, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any of the above-mentioned decoding method embodiments are implemented.

[0154] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0155] The above is a detailed introduction to a decoding method, device, electronic device, storage medium, and program product provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application, and the description of the above embodiments is only used to help understand the method and core idea of ​​the present application. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. A decoding method, characterized in that: include: In a current round, obtaining initial codeword information corresponding to the current round; Obtaining initial confidence information corresponding to the current round; Determine the first-level codeword information in the current round according to the preconfigured first decoding mode, the initial confidence information, and the initial codeword information; Using the first decoding method, verifying the codeword information of the first level in the current round, and obtaining a verification result corresponding to the codeword information of the first level in the current round; According to the preconfigured second decoding mode and the pre-acquired first-level verification information, error correction is performed on the first-level codeword information in the current round to obtain the second-level codeword information in the current round; When it is determined that the verification result and / or the number of iterations corresponding to the current round meets a preset condition, the iteration is stopped, and the codeword information of the second level in the current round is determined as the target decoding result.

2. The decoding method according to claim 1, characterized in that: The initial codeword information corresponding to the current round includes initial decision values ​​corresponding to a plurality of bits in the current round; The determining, according to the preconfigured first decoding mode, the initial confidence information, and the initial codeword information, the codeword information of the first level in the current round includes: According to the first decoding mode and the initial decision value of each bit in the current round, the initial confidence information is updated to obtain the first level of confidence information in the current round; According to the confidence information of the first level in the current round and a preset confidence threshold, the initial codeword information corresponding to the current round is updated to obtain the codeword information of the first level in the current round.

3. The decoding method according to claim 2, characterized in that: The confidence information of the first level in the current round includes the confidence of each bit at the first level in the current round; The updating of the initial codeword information corresponding to the current round according to the confidence information of the first level in the current round and the preset confidence threshold to obtain the codeword information of the first level in the current round includes: Determining the decision value of each bit at the first level in the current round according to the confidence of each bit at the first level in the current round and the preset confidence threshold; The initial codeword information is updated according to the first-level decision value of each bit in the current round and the initial decision value of each bit in the current round to obtain the first-level codeword information in the current round.

4. The decoding method according to claim 3, characterized in that: The determining, according to the confidence of each bit at the first level in the current round and the preset confidence threshold, the decision value of each bit at the first level in the current round includes: Determine whether the confidence of a first bit at a first level in the current round is greater than the preset confidence threshold, wherein the first bit is any one of the multiple bits; When it is determined that the confidence of the first bit at the first level in the current round is greater than the preset confidence threshold, determining a first preset value as the decision value of the first bit at the first level in the current round; or, When it is determined that the confidence of the first bit at the first level in the current round is less than or equal to the preset confidence threshold, a second preset value is determined as the decision value of the first bit at the first level in the current round.

5. The decoding method according to any one of claims 2 to 4, characterized in that: When the current round is not the first round, the acquiring initial confidence information corresponding to the current round includes: Acquire codeword information of the second level in a previous round corresponding to the current round, and confidence information of the first level in the previous round; According to the second decoding method and the codeword information of the second level in the previous round, the confidence information of the first level in the previous round is updated to obtain the confidence information of the second level in the previous round, wherein the confidence information of the second level in the previous round is the initial confidence information corresponding to the current round.

6. The decoding method according to claim 5, characterized in that: The initial codeword information corresponding to the current round is the codeword information of the second level in the previous round.

7. The decoding method according to claim 5, characterized in that: The codeword information of the second level in the previous round includes the decision value of each bit at the second level in the previous round; The updating of the confidence information of the first level in the previous round according to the second decoding mode and the codeword information of the second level in the previous round to obtain the confidence information of the second level in the previous round includes: Determine the confidence level of each bit at the second level in the previous round according to the second decoding mode and the decision value of each bit at the second level in the previous round; According to the confidence of each bit at the second level in the previous round, the confidences corresponding to all bits in the confidence information of the first level in the previous round are updated respectively to obtain the confidence information of the second level in the previous round.

8. The decoding method according to claim 5, characterized in that: The second-level codeword information in the previous round includes multiple lines of codeword information, and the first-level confidence information in the previous round includes multiple lines of confidence information; The updating of the confidence information of the first level in the previous round according to the second decoding mode and the codeword information of the second level in the previous round to obtain the confidence information of the second level in the previous round includes: Using the second decoding method, verify each line of the code word information in the second level of the code word information in the previous round, and obtain a verification result corresponding to each line of the code word information; According to the target verification result corresponding to the target row codeword information, an update operation corresponding to the target verification result is performed on the confidence information of the target row in the confidence information of the first level in the previous round, wherein the target row codeword information is any row of codeword information among the multiple rows of codeword information included in the codeword information of the second level in the previous round; After completing the update operation corresponding to the confidence information of each row, the confidence information of the second level in the previous round is obtained.

9. The decoding method according to claim 8, characterized in that: When the target verification result is that the error correction is successful, the confidence information of the target row in the first-level confidence information in the previous round is updated according to the target verification result corresponding to the target row codeword information, including: According to the target row codeword information and the pre-constructed correspondence between the decision value and the confidence, the confidence information of the target row in the first-level confidence information in the previous round is updated.

10. The decoding method according to claim 9, characterized in that: Each row of the codeword information of the second level in the previous round includes the decision values ​​of a plurality of bits at the second level in the previous round; The updating of the confidence information of the target row in the first-level confidence information in the previous round according to the target row codeword information and the pre-constructed correspondence between the decision value and the confidence includes: Determine a target confidence level corresponding to the decision value of the target bit position according to the decision value of the target bit position and the correspondence between the pre-constructed decision value and the confidence level, wherein the decision value of the target bit position is the decision value of any one of the multiple bits included in the target row codeword information; Updating the confidence corresponding to the target bit in the confidence information of the first level in the previous round to the target confidence; And, the confidence information corresponding to the target row in the confidence information of the first level in the previous round is marked to indicate that the confidence corresponding to any bit in the target row will no longer be updated in the current round.

11. The decoding method according to claim 8, characterized in that: When the target verification result is an error correction failure, the updating operation corresponding to the target verification result is performed on the confidence information of the target row in the confidence information of the first level in the previous round according to the target verification result corresponding to the target row codeword information, including: According to the second decoding method and the second-level codeword information in the previous round, the confidence information of the target row in the first-level confidence information in the previous round is updated to obtain the second-level confidence information in the previous round.

12. The decoding method according to claim 2, characterized in that: When the current round is the first round, the acquiring initial codeword information corresponding to the current round includes: Obtain data to be decoded; According to the second decoding mode, the data to be decoded is decoded to obtain initial codeword information corresponding to the current round.

13. The decoding method according to claim 12, characterized in that: The acquiring of initial confidence information corresponding to the current round includes: Determine the initial confidence corresponding to each bit in the current round according to the first decoding mode and the initial decision value corresponding to each bit in the initial codeword information in the current round; According to the initial confidence corresponding to each of the bits in the current round, initial confidence information corresponding to the current round is generated.

14. The decoding method according to claim 12 or 13, characterized in that: The data to be decoded includes multiple rows of user data, multiple rows of first-type verification data, second-type verification data for protecting each row of the user data, and second-type verification data for protecting each row of the first-type verification data, wherein the first-type verification data is verification data corresponding to the first decoding method, and the second-type verification data is verification data corresponding to the second decoding method.

15. The decoding method according to claim 12 or 13, characterized in that: The data to be decoded includes multiple rows of user data, multiple rows of first-type verification data, and second-type verification data for protecting each row of the first-type verification data, wherein the first-type verification data is verification data corresponding to the first decoding method, and the second-type verification data is verification data corresponding to the second decoding method.

16. The decoding method according to any one of claims 1 to 4, characterized in that: The method further comprises: Get user data; Encode the user data according to a preconfigured first encoding method to obtain codeword information corresponding to the first encoding method; Encoding the codeword information corresponding to the first encoding mode according to a preconfigured second encoding mode to obtain an encoding result, wherein the first encoding mode corresponds to the first decoding mode, and the second encoding mode corresponds to the second decoding mode; The encoding result is stored.

17. A decoding device, characterized in that: include: An acquisition module, used to acquire, in a current round, initial codeword information corresponding to the current round; Obtaining initial confidence information corresponding to the current round; A determination module, configured to determine the codeword information of the first level in the current round according to a preconfigured first decoding mode, the initial confidence information, and the initial codeword information; A verification module, configured to verify the codeword information of the first level in the current round by using the first decoding method, and obtain a verification result corresponding to the codeword information of the first level in the current round; An error correction module, configured to correct the codeword information of the first level in the current round according to a preconfigured second decoding mode and pre-acquired first-level verification information, so as to obtain the codeword information of the second level in the current round; The determination module is further configured to stop iteration when it is determined that the verification result and / or the number of iterations corresponding to the current round meet a preset condition, and determine the codeword information of the second level in the current round as the target decoding result.

18. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the decoding method according to any one of claims 1 to 16 when executing the computer program.

19. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the decoding method according to any one of claims 1 to 16.

20. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the decoding method according to any one of claims 1 to 16 are implemented.

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