Two-end type all-silicon-based double-junction solar cell and preparation method thereof

By designing two-end all-silicon-based dual-junction solar cells, the problem of poor stability of perovskite batteries in double-junction stacked batteries is solved, and higher battery reliability and performance are achieved, and the process is simplified.

CN119866066AActive Publication Date: 2025-04-22HENGDIAN GRP DMEGC MAGNETICS CO LTD
View PDF 5 Cites 0 Cited by

Patent Information

Application Number
CN202510348080.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-24
Publication Date
2025-04-22
Estimated Expiration
2045-03-24

AI Technical Summary

Technical Problem

Currently, double junction stacked solar cells have challenges in terms of stability and reliability, especially the poor stability of the top perovskite batteries, resulting in insufficient overall battery reliability.

Method used

A two-end all-silicon-based dual-junction solar cell was designed. The top and bottom of the battery were silicon-based cells, eliminating perovskite cells. By designing the negative electrode area on the back, the light-shading damage is reduced and the battery performance is improved.

Benefits of technology

It effectively solves the problem of poor stability of perovskite batteries, improves the reliability and performance of the batteries, simplifies the process and reduces costs.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119866066A_ABST
    Figure CN119866066A_ABST
Patent Text Reader

Abstract

The invention relates to the field of solar cells, and discloses a two-end type all-silicon-based double-junction solar cell and a preparation method thereof. The two-end type all-silicon-based double-junction solar cell comprises an N-type silicon substrate, a pyramid suede and a passivation anti-reflection film which are sequentially arranged on the front surface of the N-type silicon substrate, and a positive electrode region and a negative electrode region which are arranged on the back surface of the N-type silicon substrate, the positive electrode region comprises an inner boron diffusion layer, a phosphorus diffusion layer, an outer boron diffusion layer and a passivation anti-reflection film which are sequentially arranged on the back surface of the N-type silicon substrate, and a positive electrode arranged on the surface of the outer boron diffusion layer; the negative electrode area comprises a passivation anti-reflection film arranged on the back face of the N-type silicon substrate and a negative electrode arranged on the back face of the N-type silicon substrate. The two-end type all-silicon-based double-junction laminated cell is designed for the first time, and the problem that a conventional laminated cell is poor in stability can be effectively solved. In addition, all electrodes are designed on the back surface of the battery through ingenious structural design, so that shading damage can be effectively reduced, and the performance of the battery can be improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the field of solar cells, and in particular to a two-terminal all-silicon-based double-junction solar cell and a preparation method thereof. Background Art

[0002] Different from conventional single-junction solar cells such as TOPCon cells, tandem cells are a new type of multi-junction solar cell. Since this type of cell is a combination of top and bottom cells in series, a higher open circuit voltage can be obtained (such as the perovskite-crystalline silicon tandem cell in patent CN118414005A). This serves as the basis for obtaining higher conversion efficiency and is currently the cutting-edge solar cell technology.

[0003] However, there are many difficulties in multi-junction stacked cells: first, the preparation steps of stacked cells are numerous and complex, and the cost is high; second, the top perovskite cell (ionic crystal) of the stacked cell is less stable than the bottom silicon-based cell (atomic crystal), which makes the overall battery reliability face huge challenges. Based on the above reasons, the overall development of double-junction stacked cells is still in the current state of "only blooming but not bearing fruit". Summary of the invention

[0004] In order to solve the above technical problems, the present invention provides a two-terminal all-silicon-based double-junction solar cell and a preparation method. The present invention innovatively designs a two-terminal all-silicon-based double-junction cell, which is not only simple in process, but also can effectively solve the problem of poor stability of conventional stacked double-junction cells. In addition, the present invention designs all electrodes on the back of the cell through a clever structural design, which can effectively reduce shading damage and is conducive to improving cell performance.

[0005] The specific technical scheme of the present invention is: In a first aspect, the present invention provides a two-terminal all-silicon-based double-junction solar cell, comprising: N-type silicon substrate, a pyramid velvet surface and a passivation anti-reflection film are sequentially arranged on the front side of the N-type silicon substrate, and a positive electrode region and a negative electrode region are arranged on the back side of the N-type silicon substrate. Wherein: The positive electrode region includes an inner boron diffusion layer, a phosphorus diffusion layer, an outer boron diffusion layer and a passivation anti-reflection film which are sequentially arranged on the back of the N-type silicon substrate, and a positive electrode which is arranged on the surface of the outer boron diffusion layer and penetrates the passivation anti-reflection film; The cathode region comprises a passivation anti-reflection film arranged on the back of the N-type silicon substrate, and a cathode arranged on the back of the N-type silicon substrate and penetrating the passivation anti-reflection film.

[0006] As described in the background technology section, since the current structure of double-junction stacked cells generally has a perovskite cell on the top and a silicon-based cell on the bottom, the perovskite cell (ionic crystal) is less stable than the silicon-based cell (atomic crystal), which will lead to insufficient reliability of the stacked cell as a whole. To this end, the present invention innovatively designs the above-mentioned all-silicon-based double-junction stacked cell (the top and bottom of the cell are all silicon-based cells, without perovskite cells), which effectively solves the problem of poor stability of perovskite cells. In addition, the present invention moves the front electrode of a conventional double-junction stacked cell to the back (the front and back of a conventional double-junction stacked cell are both provided with electrodes) through a clever structural design (design of the negative electrode area on the back), which can effectively reduce shading damage and help improve battery performance.

[0007] Preferably, the boron atom concentration in the inner boron diffusion layer is lower than the phosphorus atom concentration in the phosphorus diffusion layer, and the phosphorus atom concentration in the phosphorus diffusion layer is lower than the boron atom concentration in the outer boron diffusion layer.

[0008] Optionally, the positive electrode region and the negative electrode region are respectively located at two side regions of the back side of the N-type silicon substrate.

[0009] In a second aspect, the present invention provides a method for preparing a two-terminal all-silicon-based double-junction solar cell, which comprises the following steps: S1, N-type silicon substrate double-sided polishing.

[0010] S2. Perform a first boron diffusion on the back side to sequentially form an inner boron diffusion layer and a BSG layer on the back side of the N-type silicon substrate.

[0011] After the first boron diffusion, the back surface of the silicon substrate is transformed from N-type to P-type boron diffusion layer. Since the subsequent process of the present invention needs to perform phosphorus atom doping (phosphorus diffusion) and secondary boron atom doping (secondary boron diffusion) on the basis of the first boron diffusion, a part of the surface layer of the inner boron diffusion layer is transformed into a phosphorus diffusion layer and a high-concentration outer boron diffusion layer; therefore, the surface boron atom doping concentration in the first boron diffusion process needs to be designed to be relatively low (but higher than the phosphorus atom doping amount of the N-type silicon substrate itself, 1E15~1E16 cm -3 ), and the doping depth needs to be deeper.

[0012] S3, chain removal of the back BSG layer.

[0013] The presence of the back BSG layer will block the phosphorus atoms in the subsequent phosphorus diffusion and the boron atoms in the secondary boron diffusion from penetrating into the inner boron diffusion layer, so it needs to be removed in advance.

[0014] S4, back side phosphorus diffusion, so that the surface layer of the inner boron diffusion layer is converted into a phosphorus diffusion layer and a PSG layer.

[0015] In this process, since the first boron diffusion of S2 will simultaneously form a coating layer (boron diffusion layer and BSG layer) on the front side of the silicon substrate, the BSG layer can block the doped atoms in the subsequent phosphorus diffusion and the second boron diffusion from entering the front area. In addition, in order to form an ideal phosphorus diffusion layer, the phosphorus atom doping concentration after phosphorus diffusion must be higher than the boron atom concentration after the first boron diffusion, and the doping depth must be shallower than the first boron diffusion.

[0016] S5, chain removal of the back PSG layer.

[0017] The presence of the PSG layer on the back side will block the penetration of boron atoms into the phosphorus diffusion layer in the subsequent secondary boron diffusion, so it needs to be removed in advance.

[0018] S6. Secondary boron diffusion on the back side converts the surface layer of the phosphorus diffusion layer into an outer boron diffusion layer and a BSG layer.

[0019] Since the secondary boron diffusion needs to transform the surface of the phosphorus diffusion layer formed by S4 into a high-concentration outer boron diffusion layer, the surface boron atom doping concentration after the secondary boron diffusion needs to be higher than the phosphorus atom doping concentration in the phosphorus diffusion layer; in addition, the doping depth during the secondary boron diffusion process cannot be too large (the doping depth is less than the phosphorus doping depth in S4). After the secondary boron diffusion, a layered alternating NPNP (double junction) structure (N-type silicon substrate-P-type inner boron diffusion layer-N-type phosphorus diffusion layer-P-type outer boron diffusion layer) is formed on the back of the entire silicon substrate.

[0020] S7. Laser patterning is used to remove the BSG layer in the negative electrode region on the back side.

[0021] S8, chain removal of the BSG layer on the surface of the front side coating.

[0022] S9, cleaning and texturing to remove the deposited layer on the surface of the silicon substrate in the negative electrode area and form a pyramid texturing surface on the front side.

[0023] S10, double-sided coating, forming a passivation anti-reflection film on the front and back sides.

[0024] S11, screen printing, sintering, light injection, forming a positive electrode and a negative electrode in the positive electrode region and the negative electrode region respectively.

[0025] Preferably, the primary boron diffusion conditions are: boron diffusion temperature 900-950°C, diffusion time 20-80 min, BCl3 flow rate 20-100 sccm, O2 flow rate 200-1000 sccm; oxidation advancement temperature 1000-1050°C, O2 flow rate 1000-20000 sccm, advancement time 60-120 min, the thickness of the obtained BSG layer is 30-80 nm; surface boron atom doping concentration 1E17-5E18 cm -3 , doping depth 2~5 μm.

[0026] As mentioned above, since the subsequent process of the present invention needs to perform phosphorus diffusion and secondary boron diffusion on the basis of the primary boron diffusion, a part of the surface layer of the inner boron diffusion layer is transformed into a phosphorus diffusion layer and a high-concentration outer boron diffusion layer; therefore, the surface boron atom doping concentration in the primary boron diffusion process needs to be designed to be relatively low (but higher than the phosphorus atom doping amount of the N-type silicon substrate itself, 1E15~1E16 cm -3 ), and the doping depth needs to be deeper. Therefore, in order to achieve the above purpose, it is necessary to accurately control the process of primary boron diffusion. Finally, the present invention finds that the above purpose can be achieved under the above boron diffusion conditions (the main characteristics of the primary boron diffusion process of the present invention compared with the conventional boron diffusion process are: relatively less source flow; longer oxidation advancement time).

[0027] As a preferred method, the phosphorus diffusion conditions are as follows: phosphorus diffusion temperature 750-850°C, diffusion time 5-30 min, POCl3 carried by nitrogen with a flow rate of 200-500 sccm, O2 flow rate 300-1000 sccm; oxidation advancement temperature 850-950°C, O2 flow rate 500-3000 sccm, advancement time 30-90 min; the thickness of the obtained PSG layer is 30-70 nm, and the surface phosphorus atom doping concentration is 6E18-1E19 cm -3 , doping depth 1~2 μm.

[0028] In order to convert the surface layer of the inner boron diffusion layer into an N-type phosphorus diffusion layer, the phosphorus atom doping concentration after phosphorus diffusion must be higher than the boron atom concentration after the first boron diffusion, and the doping depth is shallower than the first boron diffusion. Similarly, the phosphorus diffusion process needs to be precisely controlled. Finally, the present invention found that the above purpose can be achieved under the above phosphorus diffusion conditions (the main feature of the phosphorus diffusion process of the present invention compared with the conventional phosphorus diffusion process is that the oxidation advancement time is longer).

[0029] As a preferred method, the secondary boron diffusion conditions are as follows: boron diffusion temperature 900-950°C, diffusion time 20-80 min, BCl3 flow rate 300-800 sccm, O2 flow rate 1000-5000 sccm; oxidation advancement temperature 1000-1050°C, O2 flow rate 5000-80000 sccm, advancement time 10-50 min, the obtained BSG layer thickness 20-60 nm, surface doping concentration 2E19-1E20 cm -3 , the doping depth is 0.3~1 μm.

[0030] As mentioned above, since the secondary boron diffusion needs to transform the surface of the phosphorus diffusion layer formed by S4 into a high-concentration outer boron diffusion layer, the surface boron atom doping concentration after the secondary boron diffusion needs to be higher, higher than the phosphorus atom doping concentration in the phosphorus diffusion layer; in addition, the doping depth during the secondary boron diffusion process cannot be too large (the doping depth is less than the phosphorus doping depth in S4). In the secondary boron diffusion of the present invention, the flow rate of the boron source is relatively large, so that the surface boron atom doping concentration is higher; at the same time, the oxidation advancement time is relatively short, so that the doping depth can be accurately controlled.

[0031] In a third aspect, the present invention provides another method for preparing a two-terminal all-silicon-based double-junction solar cell, comprising: S1, N-type silicon substrate double-sided polishing.

[0032] S2. A boron diffusion is performed once to form an inner boron diffusion layer on the back side of the N-type silicon substrate.

[0033] S3, phosphorus diffusion, so that the surface layer of the inner boron diffusion layer is converted into a phosphorus diffusion layer.

[0034] Since no obvious BSG layer is formed on the surface of S2 after the first boron diffusion, phosphorus atoms can directly enter the low-concentration inner boron diffusion layer during the phosphorus diffusion process, causing part of the layer to be transformed into a phosphorus diffusion layer.

[0035] S4. Secondary boron diffusion converts the surface layer of the phosphorus diffusion layer into an outer boron diffusion layer and a BSG layer.

[0036] Since no obvious PSG layer is formed on the surface after phosphorus diffusion, boron atoms can enter the phosphorus diffusion layer during the secondary boron diffusion process. In addition, with the effect of the high temperature of the secondary boron diffusion, the inner boron diffusion layer formed by the initial primary boron diffusion and the phosphorus diffusion layer formed by phosphorus diffusion will be further advanced synchronously, thereby meeting the process requirements.

[0037] S5. Laser patterning is used to remove the BSG layer in the negative electrode region.

[0038] S6. Chain-remove the BSG layer plated on the front side.

[0039] S7, cleaning and velveting to remove the surface deposited layer of the negative electrode area and form a pyramid velvet surface on the front side; S8, double-sided coating, forming a passivation anti-reflection film on the front and back sides.

[0040] S9, screen printing, forming a positive electrode and a negative electrode in the positive electrode area and the negative electrode area respectively, sintering, and light injection.

[0041] Among them, the phosphorus atom concentration of the N-type silicon substrate is less than the boron atom concentration of the first boron diffusion < the phosphorus atom concentration of the phosphorus diffusion < the boron atom concentration of the second boron diffusion; and the first boron diffusion depth is greater than the phosphorus diffusion depth > the second boron diffusion depth; and the first boron diffusion and the phosphorus diffusion are both promoted without oxygen, while the second boron diffusion is promoted with oxygen; the promotion time of the first boron diffusion and the phosphorus diffusion is shorter than that of the second boron diffusion.

[0042] The present invention team found that in the preparation method provided in the second aspect of the present application, the secondary boron diffusion high temperature advancement process will bring secondary high temperature effects to the boron diffusion layer formed by the primary boron diffusion and the phosphorus diffusion layer formed by the phosphorus diffusion, which will further increase the doping depth of each initial diffusion layer, seriously affecting the subsequent experimental results (due to the low temperature of the phosphorus diffusion process, the impact on the inner boron diffusion layer is small). Secondly, after a boron diffusion and a phosphorus diffusion, a BSG layer and a PSG layer will be formed respectively; separate steps need to be set to remove, which is not only cumbersome, but also the silicon substrate undergoes multiple rounds of high and low temperature treatment, which will increase its internal stress and increase the probability of silicon substrate fragmentation. To this end, the present invention further optimizes the process of primary boron diffusion and phosphorus diffusion, that is, a continuous high temperature diffusion process with "no need for oxygen and short advancement time" is adopted, which can not only accurately control the doping depth, but also will not generate a B / PSG layer, which can significantly shorten the cycle (conventional diffusion process: the first step is diffusion, the second step is oxidation advancement, and oxygen is involved in the oxidation advancement process, thereby forming a B / PSG layer on the surface, and the B / PSG layer is the key to subsequent wet alkali corrosion prevention).

[0043] As a preferred method, the primary boron diffusion conditions are as follows: boron diffusion temperature 900-950°C, diffusion time 20-80 min, BCl3 flow rate 20-100 sccm, O2 flow rate 200-1000 sccm; push temperature 1000-1050°C, push time 40-100 min; surface boron atom doping concentration 3E17-7E18 cm -3 (Due to the short advancement time, most of the surface boron atoms are still on the shallow surface, and the surface doping concentration is relatively higher), the doping depth is 1.5~4.5 μm (due to the short advancement time, the doping depth is correspondingly shallower).

[0044] In the above-mentioned single boron diffusion process, firstly, there is no oxygen involved in the high-temperature advancement process, and almost no BSG layer is generated on the surface, so there is no need to remove the BSG layer subsequently; secondly, since the subsequent secondary boron diffusion will have a secondary high-temperature advancement, the high-temperature advancement time of the first boron diffusion is relatively short, which can shorten the process time and reduce costs.

[0045] As a preferred method, phosphorus diffusion conditions are as follows: phosphorus diffusion temperature 750-850°C, diffusion time 5-30 min, POCl3 carried by nitrogen with a flow rate of 200-500 sccm, O2 flow rate 300-1000 sccm; push temperature 850-950°C, push time 10-50 min; surface phosphorus doping concentration 9E18-2E19 cm -3 , doping depth 0.8~1.5 μm.

[0046] In the phosphorus diffusion process, there is no oxygen involved in the high-temperature advancement process, and almost no PSG layer is generated on the surface, so there is no need to remove the PSG layer in the subsequent process. In addition, the high-temperature advancement time in the phosphorus diffusion process is shorter (the advancement temperature required for phosphorus diffusion is lower than the advancement temperature for boron diffusion, so the advancement time is shorter than the primary boron diffusion), and the high temperature in the subsequent secondary boron diffusion process will simultaneously advance the phosphorus diffusion layer to the expected depth.

[0047] As a preferred method, the secondary boron diffusion conditions are as follows: boron diffusion temperature 900-950°C, diffusion time 20-80 min, BCl3 flow rate 300-800 sccm, O2 flow rate 1000-5000 sccm; oxidation advancement temperature 1000-1050°C, O2 flow rate 5000-80000 sccm, advancement time 10-50 min, the resulting BSG layer thickness 20-60 nm; surface boron doping concentration 2E19-1E20 cm -3 , doping depth 0.3~1 μm.

[0048] In the above-mentioned secondary boron diffusion process, since no oxygen is passed through the high-temperature advancement process of phosphorus diffusion, a relatively obvious PSG layer is not formed on the surface, so boron atoms can enter the phosphorus diffusion layer during the secondary boron diffusion process. In addition, with the effect of the high temperature of the secondary boron diffusion, the inner boron diffusion layer formed by the initial primary boron diffusion and the phosphorus diffusion layer formed by the phosphorus diffusion will be further advanced synchronously, thereby meeting the process requirements.

[0049] Compared with the prior art, the beneficial effects of the present invention are: (1) The present invention innovatively designs the above-mentioned all-silicon-based double-junction stacked battery (the top and bottom of the battery are all silicon-based batteries, without perovskite batteries), effectively solving the problem of poor stability of perovskite batteries. In addition, the present invention moves the front electrode of the conventional double-junction stacked battery to the back (the front surface of the conventional double-junction stacked battery is provided with electrodes) through a clever structural design (design of the back negative electrode area), which can effectively reduce shading damage and help improve battery performance.

[0050] (2) The present invention provides two different methods for preparing the above-mentioned all-silicon-based double-junction stacked battery. The all-silicon-based double-junction stacked battery prepared by the method of the present invention has excellent performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1 This is a schematic diagram of the structure of the N-type silicon substrate after double-sided polishing in Example 1.

[0052] Figure 2 This is a schematic diagram of the structure of the N-type silicon substrate after one boron diffusion in Example 1.

[0053] Figure 3 This is a schematic diagram of the structure of the N-type silicon substrate after phosphorus diffusion in Example 1.

[0054] Figure 4 This is a schematic diagram of the structure of the N-type silicon substrate after secondary boron diffusion in Example 1.

[0055] Figure 5 This is a schematic diagram of the structure of the N-type silicon substrate after wet cleaning and texturing in Example 1.

[0056] Figure 6 It is a schematic structural diagram of a two-terminal all-silicon-based double-junction solar cell of the present invention.

[0057] Figure 7 Schematic diagram of the structure of unit cell B in Example 3 of the present invention.

[0058] Figure 8 Schematic diagram of the connection method of the battery assembly composed of unit cells A and unit cells B in Example 3 of the present invention.

[0059] The figures are marked as follows: N-type silicon substrate 1, inner boron diffusion layer 2, BSG layer 3, phosphorus diffusion layer 4, PSG layer 5, outer boron diffusion layer 6, pyramid velvet 7, passivation anti-reflection film 8, positive electrode 9, negative electrode 10, P-type silicon substrate 11, welding strip 12, inner phosphorus diffusion layer 13, boron diffusion layer 14, outer phosphorus diffusion layer 15. DETAILED DESCRIPTION

[0060] The present invention will be further described below in conjunction with the embodiments.

[0061] (1) A two-terminal all-silicon-based double-junction solar cell, comprising: an N-type silicon substrate, a pyramid velvet surface and a passivation anti-reflection film sequentially arranged on the front side of the N-type silicon substrate, and a positive electrode region and a negative electrode region arranged on the back side of the N-type silicon substrate. The positive electrode region comprises an inner boron diffusion layer, a phosphorus diffusion layer, an outer boron diffusion layer and a passivation anti-reflection film sequentially arranged on the back side of the N-type silicon substrate, and a positive electrode arranged on the surface of the outer boron diffusion layer and penetrating the passivation anti-reflection film; the negative electrode region comprises a passivation anti-reflection film arranged on the back side of the N-type silicon substrate, and a negative electrode arranged on the back side of the N-type silicon substrate and penetrating the passivation anti-reflection film.

[0062] In some preferred implementation cases, the concentration of boron atoms in the inner boron diffusion layer is lower than the concentration of phosphorus atoms in the phosphorus diffusion layer, and the concentration of phosphorus atoms in the phosphorus diffusion layer is lower than the concentration of boron atoms in the outer boron diffusion layer.

[0063] In some preferred implementation cases, the positive electrode region and the negative electrode region are respectively located on two side regions of the back side of the N-type silicon substrate.

[0064] (2) A method for preparing a two-terminal all-silicon-based double-junction solar cell, comprising the following steps: S1. Double-sided polishing of N-type silicon substrate: Select N-type silicon substrate cut by diamond wire, put it into alkaline polishing tank, maintain the temperature at 75~85℃, and perform double-sided polishing for 6~8 min. The polishing thickness is 3~7 μm and the thinning amount is 0.35~0.45 g.

[0065] S2, a boron diffusion on the back side, forming an inner boron diffusion layer and a BSG layer on the back side of the N-type silicon substrate in sequence. After the first boron diffusion, the back surface of the silicon substrate is transformed from N-type to a P-type boron diffusion layer. Since the subsequent process of the present invention needs to perform phosphorus atom doping (phosphorus diffusion) and secondary boron atom doping (secondary boron diffusion) on the basis of the first boron diffusion, a part of the surface layer of the inner boron diffusion layer is transformed into a phosphorus diffusion layer and a high-concentration outer boron diffusion layer; therefore, the surface boron atom doping concentration in the first boron diffusion process needs to be designed to be relatively low (but higher than the phosphorus atom doping amount of the N-type silicon substrate itself, 1E15~1E16 cm -3 ), and the doping depth needs to be deeper.

[0066] In some preferred implementation cases, the boron diffusion conditions are as follows: boron diffusion temperature 900-950°C, diffusion time 20-80 min, BCl3 flow rate 20-100 sccm, O2 flow rate 200-1000 sccm; oxidation advancement temperature 1000-1050°C, O2 flow rate 1000-20000 sccm, advancement time 60-120 min, the thickness of the obtained BSG layer 30-80 nm; surface boron atom doping concentration 1E17-5E18 cm -3 , doping depth 2~5 μm.

[0067] S3, chain removal of the back BSG layer. The presence of the back BSG layer will block the phosphorus atoms in the subsequent phosphorus diffusion and the boron atoms in the secondary boron diffusion from penetrating into the inner boron diffusion layer, so it needs to be removed in advance.

[0068] In some preferred implementation cases, a chain machine is used to remove the BSG layer on the back surface after a boron diffusion, wherein the concentration of the HF solution in the chain machine is 20-80 wt % and the belt speed is 0.5-5 m / min.

[0069] S4, back phosphorus diffusion, turns the surface layer of the inner boron diffusion layer into a phosphorus diffusion layer and a PSG layer. In this process, since the S2 primary boron diffusion will simultaneously form a coating layer (boron diffusion layer and BSG layer) on the front side of the silicon substrate, the BSG layer can block the doped atoms in the subsequent phosphorus diffusion and secondary boron diffusion from entering the front area. In addition, in order to form an ideal phosphorus diffusion layer, the phosphorus atom doping concentration after phosphorus diffusion must be higher than the boron atom concentration after primary boron diffusion, and the doping depth is shallower than the primary boron diffusion.

[0070] In some preferred implementation cases, the phosphorus diffusion conditions are as follows: phosphorus diffusion temperature 750-850°C, diffusion time 5-30 min, POCl3 carried by nitrogen with a flow rate of 200-500 sccm, O2 flow rate 300-1000 sccm; oxidation advancement temperature 850-950°C, O2 flow rate 500-3000 sccm, advancement time 30-90 min; the thickness of the obtained PSG layer is 30-70 nm, and the surface phosphorus atom doping concentration is 6E18-1E19 cm -3 , doping depth 1~2 μm.

[0071] S5. Chain removal of the back PSG layer. The presence of the back PSG layer will block the penetration of boron atoms into the phosphorus diffusion layer in the subsequent secondary boron diffusion, so it needs to be removed in advance.

[0072] In some preferred implementation cases, S5, a chain machine is used to remove the PSG layer on the back surface after phosphorus diffusion, wherein the concentration of the HF solution in the chain machine is 20-80 wt %, and the belt speed is 0.5-5 m / min.

[0073] S6, secondary boron diffusion on the back side, converts the surface of the phosphorus diffusion layer into an outer boron diffusion layer and a BSG layer. Since the secondary boron diffusion needs to convert the surface of the phosphorus diffusion layer formed by S4 into a high-concentration outer boron diffusion layer, the surface boron atom doping concentration after the secondary boron diffusion is required to be higher than the phosphorus atom doping concentration in the phosphorus diffusion layer; in addition, the doping depth during the secondary boron diffusion process cannot be too large (the doping depth is less than the phosphorus doping depth in S4). After the secondary boron diffusion, a layered alternating NPNP (double junction) structure (N-type silicon substrate-P-type inner boron diffusion layer-N-type phosphorus diffusion layer-P-type outer boron diffusion layer) is formed on the back side of the entire silicon substrate.

[0074] In some preferred implementation cases, the secondary boron diffusion conditions are: boron diffusion temperature 900-950°C, diffusion time 20-80 min, BCl3 flow rate 300-800 sccm, O2 flow rate 1000-5000 sccm; oxidation advancement temperature 1000-1050°C, O2 flow rate 5000-80000 sccm, advancement time 10-50 min, the resulting BSG layer thickness 20-60 nm, surface doping concentration 2E19-1E20 cm-3 , the doping depth is 0.3~1 μm.

[0075] S7. Laser patterning is used to remove the BSG layer in the negative electrode region on the back side.

[0076] In some preferred implementation cases, the conditions for laser patterning are: laser wavelength 400~600 nm, frequency 500~700 KHz, marking speed 40000~50000 mm / s, power 10~50 W, and processing time 1~5 s.

[0077] S8, chain-remove the BSG layer plated on the front side.

[0078] In some preferred implementation cases, a chain machine is used to remove the BSG layer on the front surface of the silicon substrate, wherein the concentration of the HF solution in the chain machine is 20-80 wt % and the belt speed is 0.5-5 m / min.

[0079] S9, cleaning and texturing to remove the deposited layer on the surface of the silicon substrate in the negative electrode area, and form a pyramid velvet surface on the front side: the silicon substrate is cleaned and texturized in an alkaline solution. Since the BSG layer on the back of the silicon substrate is removed by laser patterning in step S7, the high-concentration outer boron diffusion layer, medium-concentration phosphorus diffusion layer, and low-concentration inner boron diffusion layer at the bottom of the BSG layer can be removed by regulating the wet process conditions during the cleaning and texturing process, all the way to the silicon substrate. In the non-laser patterned area, since the BSG layer still exists on the back surface, the doping layers at the bottom of the area can be protected from being destroyed during the wet texturing process. For the front side of the silicon substrate, since the BSG layer has been removed in step S8, a pyramid velvet surface can be formed on the front side of the silicon substrate during the cleaning and texturing process. The acid (HF / HCl) cleaning tank that comes with the tank body can then remove the BSG layer remaining on the surface.

[0080] In some preferred implementation cases, the wet cleaning and texturing conditions are: 1.7-2.2 wt% KOH, temperature 70-85° C., time 6-10 min.

[0081] S10, double-sided coating, forming a passivation anti-reflection film on the front and back sides: ALD deposition method is used to deposit AlO on the front and back sides of the processed silicon substrate x The film is generated by the reaction of Al(CH3)3 and water vapor, with a thickness of 8~10 nm and a process temperature of 220~280℃. Then SiN is deposited on the front and back sides using a tubular PECVD device. x Films, including SiN xThe thickness of the film is 80~120 nm, and the refractive index is 1.9~2.1; the reaction gases in the tubular cavity are SiH4 and NH3, the working pressure is 1500~1700 mTorr, the power is 10000~15000 W, the temperature is 400~600℃, the SiH4 gas flow rate is 900~2000 sccm, the NH3 gas flow rate is 7000~12000 sccm, and the deposition time is 5~20 min.

[0082] S11, screen printing, sintering, light injection: The coated silicon substrate is subjected to a screen printing process, and the positive electrode is printed on the surface of the high-concentration external boron diffusion layer and the negative electrode is printed on the laser-patterned silicon substrate area (negative electrode area). Then, it is sintered at 700~800℃ to form an Ag-Si ohmic contact, and finally repaired by light injection to obtain the final finished battery.

[0083] (3) Another method for preparing a two-terminal all-silicon-based double-junction solar cell, comprising: S1, N-type silicon substrate double-sided polishing.

[0084] S2. A boron diffusion is performed once to form an inner boron diffusion layer on the back side of the N-type silicon substrate.

[0085] In some preferred implementation cases, the boron diffusion conditions are as follows: boron diffusion temperature 900-950°C, diffusion time 20-80 min, BCl3 flow rate 20-100 sccm, O2 flow rate 200-1000 sccm; push temperature 1000-1050°C, push time 40-100 min; surface boron atom doping concentration 3E17-7E18 cm -3 (Due to the short advancement time, most of the surface boron atoms are still on the shallow surface, and the surface doping concentration is relatively higher), the doping depth is 1.5~4.5 μm (due to the short advancement time, the doping depth is correspondingly shallower).

[0086] S3, phosphorus diffusion, turns the surface of the inner boron diffusion layer into a phosphorus diffusion layer. Since no obvious BSG layer is formed on the surface of S2 after the first boron diffusion, phosphorus atoms can directly enter the low-concentration inner boron diffusion layer during the phosphorus diffusion process, turning part of the layer into a phosphorus diffusion layer.

[0087] In some preferred implementation cases, phosphorus diffusion conditions are as follows: phosphorus diffusion temperature 750-850°C, diffusion time 5-30 min, POCl3 carried by nitrogen with a flow rate of 200-500 sccm, O2 flow rate 300-1000 sccm; push temperature 850-950°C, push time 10-50 min; surface phosphorus doping concentration 9E18-2E19 cm -3 , doping depth 0.8~1.5 μm.

[0088] S4. The secondary boron diffusion converts the surface of the phosphorus diffusion layer into an outer boron diffusion layer and a BSG layer. Since no obvious PSG layer is formed on the surface after phosphorus diffusion, boron atoms can enter the phosphorus diffusion layer during the secondary boron diffusion process. In addition, with the high temperature of the secondary boron diffusion, the inner boron diffusion layer formed by the initial primary boron diffusion and the phosphorus diffusion layer formed by phosphorus diffusion will be further advanced synchronously, thereby meeting the process requirements.

[0089] In some preferred implementation cases, the secondary boron diffusion conditions are as follows: boron diffusion temperature 900-950°C, diffusion time 20-80 min, BCl3 flow rate 300-800 sccm, O2 flow rate 1000-5000 sccm; oxidation advancement temperature 1000-1050°C, O2 flow rate 5000-80000 sccm, advancement time 10-50 min, the resulting BSG layer thickness 20-60 nm; surface boron doping concentration 2E19-1E20 cm -3 , doping depth 0.3~1 μm.

[0090] S5. Laser patterning is used to remove the BSG layer in the negative electrode region.

[0091] S6. Chain-remove the BSG layer plated on the front side.

[0092] S7, cleaning and velveting to remove the surface deposited layer of the negative electrode area and form a pyramid velvet surface on the front side; S8, double-sided coating, forming a passivation anti-reflection film on the front and back sides.

[0093] S9, screen printing, forming a positive electrode and a negative electrode in the positive electrode area and the negative electrode area respectively, sintering, and light injection.

[0094] Specific examples and comparative examples.

[0095] Example 1 A method for preparing a two-terminal all-silicon-based double-junction solar cell comprises the following steps: S1, N-type silicon substrate 1 double-sided polishing: N-type silicon substrate 1 (phosphorus atom doping amount 2E15cm) after diamond wire cutting is selected -3 ), put it into the alkaline polishing tank, maintain the temperature at 75℃, and polish it for 6 min. The polishing thickness is about 4 μm, and the thinning amount is about 0.42 g. Figure 1 shown.

[0096] S2, a boron diffusion on the back side, forming an inner boron diffusion layer 2 and a BSG layer 3 on the back side of the N-type silicon substrate in sequence, such as Figure 2As shown. After one boron diffusion, the back surface of the silicon substrate is transformed from N-type to P-type boron diffusion layer. Specifically, the conditions for the first boron diffusion are: boron diffusion temperature 930℃, diffusion time 25 min, BCl3 flow rate 40 sccm, O2 flow rate 500 sccm; oxidation push temperature 1045℃, O2 flow rate 5000 sccm, push time 90 min, the thickness of the obtained BSG layer is about 50 nm; the surface boron atom doping concentration is about 2E18 cm -3 , the doping depth is about 2.7 μm.

[0097] S3. A chain machine is used to remove the BSG layer on the back surface after the first boron expansion, wherein the concentration of the HF solution in the chain machine is 40wt% and the belt speed is 3 m / min.

[0098] S4, back phosphorus diffusion, so that the surface layer of the inner boron diffusion layer is converted into phosphorus diffusion layer 4, PSG layer 5, such as Figure 3 Specifically, the phosphorus diffusion conditions are as follows: phosphorus diffusion temperature 790°C, diffusion time 20 min, POCl3 carried by nitrogen with a flow rate of 300 sccm, O2 flow rate 600 sccm; oxidation push temperature 890°C, O2 flow rate 2000 sccm, push time 40 min; the thickness of the obtained PSG layer is about 39 nm, and the surface phosphorus atom doping concentration is about 9E18 cm -3 , the doping depth is about 1.2 μm.

[0099] S5. Use a chain machine to remove the PSG layer on the back surface after phosphorus diffusion, where the concentration of the HF solution in the chain machine is 20 wt% and the belt speed is 3 m / min.

[0100] S6, secondary boron diffusion on the back side, so that the surface of the phosphorus diffusion layer is converted into an outer boron diffusion layer 6, BSG layer 3, such as Figure 4 As shown. After the secondary boron diffusion, a layered alternating NPNP (double junction) structure (N-type silicon substrate-P-type inner boron diffusion layer-N-type phosphorus diffusion layer-P-type outer boron diffusion layer) is formed on the back of the entire silicon substrate. Specifically, the secondary boron diffusion conditions are: boron diffusion temperature 930°C, diffusion time 50 min, BCl3 flow rate 700 sccm, O2 flow rate 4000 sccm; oxidation push temperature 1045°C, O2 flow rate 20000 sccm, push time 15 min, the resulting BSG layer thickness is about 25 nm, and the surface doping concentration is about 5E19 cm -3 , the doping depth is about 0.4 μm.

[0101] S7, laser patterning to remove the BSG layer in the negative electrode region on the back side. The conditions for laser patterning are: laser wavelength 532nm, frequency 600KHz, marking speed 45000mm / s, power 50W, and processing time 3s.

[0102] S8. Use a chain machine to remove the BSG layer on the front surface of the silicon substrate, wherein the concentration of the HF solution in the chain machine is 40wt% and the belt speed is 3 m / min.

[0103] S9, cleaning and texturing to remove the deposited layer on the surface of the silicon substrate in the negative electrode region and form a pyramid velvet surface 7 on the front side, such as Figure 5 As shown. The silicon substrate is cleaned and texturized in an alkaline solution. Specifically, the wet cleaning and texturizing conditions are: 1.7 wt% KOH, temperature 75°C, time 8 min. Since the BSG layer on the back of the silicon substrate is removed by laser patterning in step S7, the high-concentration outer boron diffusion layer, medium-concentration phosphorus diffusion layer, and low-concentration inner boron diffusion layer at the bottom of the BSG layer can be removed all the way to the silicon substrate by regulating the wet process conditions during the cleaning and texturizing process. In the non-laser patterned area, since the BSG layer still exists on the back surface, the doping layers at the bottom of the area can be protected from being damaged during the wet texturizing process. For the front side of the silicon substrate, since the BSG layer has been removed in step S8, a pyramid velvet surface can be formed on the front side of the silicon substrate during the cleaning and texturizing process. The acid (HF / HCl) cleaning tank that comes with the tank body can then remove the BSG layer remaining on the surface.

[0104] S10, double-sided coating, forming a passivation anti-reflection film 8 on the front and back sides, such as Figure 6 Figure 2: AlO is deposited on the front and back of the treated silicon substrate using ALD deposition. x The film is generated by the reaction of Al(CH3)3 and water vapor, with a thickness of about 8 nm and a process temperature of 250°C. Then, SiN is deposited on the front and back sides using a tubular PECVD device. x Films, including SiN x The thickness of the film is about 85 nm and the refractive index is about 2.0; the reaction gases in the tubular cavity are SiH4 and NH3, the working pressure is 1600 mTorr, the power is 12000 W, the temperature is 440℃, the SiH4 gas flow rate is 1200 sccm, the NH3 gas flow rate is 9000 sccm, and the deposition time is 12 min.

[0105] S11, the coated silicon substrate is subjected to a screen printing process, and the positive electrode 9 is printed on the surface of the high-concentration outer boron diffusion layer, and the negative electrode 10 is printed on the laser-patterned silicon substrate area (negative electrode area), and then sintered at 700-800°C to form an Ag-Si ohmic contact, and finally the final finished battery is obtained through light injection repair, such as Figure 6 shown.

[0106] Comparative Example 1 Compared with Example 1, the only difference is the phosphorus diffusion process: S4, back phosphorus diffusion, phosphorus diffusion conditions are: phosphorus diffusion temperature 790℃, diffusion time 3 min, POCl3 carried by nitrogen with a flow rate of 150 sccm, O2 flow rate 270 sccm; oxidation push temperature 870℃, O2 flow rate 700 sccm, push time 20 min; the thickness of the obtained PSG layer is about 18 nm, and the surface phosphorus atom doping concentration is about 1.6E18 cm -3 , the doping depth is about 0.3 μm.

[0107] Comparative Example 2 Compared with Example 1, the only difference is the phosphorus diffusion process: S4, back phosphorus diffusion, phosphorus diffusion conditions are: phosphorus diffusion temperature 790℃, diffusion time 50 min, POCl3 carried by nitrogen with a flow rate of 700 sccm, O2 flow rate 2500 sccm; oxidation push temperature 890℃, O2 flow rate 5000 sccm, push time 120 min; the thickness of the obtained PSG layer is about 60 nm, and the surface phosphorus atom doping concentration is about 8E18 cm -3 , the doping depth is about 5.6 μm.

[0108] Comparative Example 3 Compared with Example 1, the only difference is the secondary boron diffusion process: S6, back secondary boron diffusion, secondary boron diffusion conditions: boron diffusion temperature 890℃, diffusion time 10 min, BCl3 flow rate 200 sccm, O2 flow rate 3000 sccm; oxidation push temperature 1010℃, O2 flow rate 7000 sccm, push time 8min, the resulting BSG layer thickness is about 13 nm, the surface doping concentration is about 1E18 cm -3 , the doping depth is about 0.2 μm.

[0109] Comparative Example 4 Compared with Example 1, the only difference is the secondary boron diffusion process: S6, back side secondary boron diffusion, secondary boron diffusion conditions: boron diffusion temperature 940℃, diffusion time 60 min, BCl3 flow rate 1200 sccm, O2 flow rate 8000 sccm; oxidation push temperature 1050℃, O2 flow rate 50000 sccm, push time 120 min, the obtained BSG layer thickness is about 75 nm, the surface doping concentration is about 2E20 cm -3 , the doping depth is about 5.7 μm.

[0110] Comparative Example 5 A conventional single-junction back-contact cell preparation method comprising: S1. Select N-type single crystal silicon wafers cut by diamond wire, put the cut silicon wafers into alkaline polishing tank, maintain the temperature at 75℃, and perform double-sided polishing for 6 min. The polishing thickness is about 4 μm and the thinning amount is about 0.42 g.

[0111] S2. Then, high-temperature boron diffusion is used to transform the back of the silicon wafer into a boron diffusion layer and a BSG layer. The boron diffusion temperature is 850°C, the diffusion time is 10 min, the BCl3 gas flow rate is 200 sccm, the O2 gas flow rate is 1200 sccm, the oxidation advancement temperature is 950°C, the O2 flow rate is 7000 sccm, the advancement time is 30 min, and the BSG layer thickness is about 45 nm. In this process, a boron diffusion layer and a BSG layer will be formed on the front and side of the silicon wafer.

[0112] S3. Use laser patterning to groove the BSG layer on the back of the silicon wafer so that the grooved position will serve as the subsequent negative electrode area. The laser wavelength used is 532 nm, the frequency is 600 KHZ, the marking speed is 45000 mm / s, the power is 50 W, and the processing time is 3 s.

[0113] S4. Use a chain acid cleaning machine to remove the BSG layer on the front and side surfaces of the silicon wafer, wherein the concentration of the HF solution in the chain machine is 40 wt% and the belt speed is 3 m / min.

[0114] S5. Then put the silicon wafer into an alkaline texturing tank for wet cleaning of the laser grooved area on the back and integrated texturing of the front. The KOH solution concentration in the texturing tank is 1.7 wt%, the temperature is maintained at 82°C, and the time is 7 min. Since the BSG layer on the front of the silicon wafer has been removed, an effective light-trapping texture surface can be formed during the texturing process; and in the laser patterning area on the back, the alkaline solution can effectively remove the boron diffusion layer until the N-type silicon substrate is exposed. In addition, since the BSG layer on the side of the silicon wafer is also removed, the corresponding side-expanded boron diffusion layer is also further cleaned and removed, preventing the occurrence of edge leakage. The subsequent acid (HF / HCl) cleaning tank of the texturing tank can further remove the residual BSG layer on the silicon wafer.

[0115] S6, double-sided coating, forming a passivation anti-reflection film on the front and back: ALD deposition method is used to deposit AlO on the front and back of the treated silicon substrate x The film is generated by the reaction of Al(CH3)3 and water vapor, with a thickness of about 8 nm and a process temperature of 250°C. Then, SiN is deposited on the front and back sides using a tubular PECVD device. x Films, including SiN xThe thickness of the film is about 85 nm and the refractive index is about 2.0; the reaction gases in the tubular cavity are SiH4 and NH3, the working pressure is 1600 mTorr, the power is 12000 W, the temperature is 440℃, the SiH4 gas flow rate is 1200 sccm, the NH3 gas flow rate is 9000 sccm, and the deposition time is 12 min.

[0116] S7. The coated film is screen-printed on the back to form a metal contact (the positive electrode is printed on the back boron diffusion layer, and the negative electrode is printed on the N-type silicon substrate), and then sintered at 770°C to form an Ag-Si ohmic contact. Finally, it is repaired by light injection to obtain the final conventional single-junction back-contact finished battery.

[0117] Example 2 A method for preparing a two-terminal all-silicon-based double-junction solar cell, comprising: S1. Double-sided polishing of the N-type silicon substrate, the specific process is the same as that of Example 1.

[0118] S2, a boron diffusion, forming an inner boron diffusion layer on the back of the N-type silicon substrate. Specifically, the conditions for the first boron diffusion are: boron diffusion temperature 930 ° C, diffusion time 25 min, BCl3 flow rate 40 sccm, O2 flow rate 500 sccm; push temperature 1045 ° C, push time 75 min; surface boron atom doping concentration is about 3E18 cm -3 , the doping depth is about 2.3 μm.

[0119] S3, phosphorus diffusion, so that the surface of the inner boron diffusion layer is converted into a phosphorus diffusion layer. Specifically, the phosphorus diffusion conditions are: phosphorus diffusion temperature 790 ° C, diffusion time 20 min, POCl3 is carried by nitrogen with a flow rate of 300 sccm, O2 flow rate 600 sccm; push temperature 890 ° C, push time 20 min; surface phosphorus doping concentration is about 1E19 cm -3 , the doping depth is about 1.0 μm.

[0120] S4. Secondary boron diffusion converts the surface of the phosphorus diffusion layer into an outer boron diffusion layer and a BSG layer. Specifically, the secondary boron diffusion conditions are: boron diffusion temperature 930°C, diffusion time 50 min, BCl3 flow rate 700 sccm, O2 flow rate 4000 sccm; oxidation advancement temperature 1045°C, O2 flow rate 20000 sccm, advancement time 15 min, the resulting BSG layer thickness is about 25 nm; surface boron doping concentration 5E19 cm -3 , the doping depth is about 0.4 μm.

[0121] S5. Laser patterning to remove the BSG layer in the negative electrode region. The specific process is the same as S7 in Example 1.

[0122] S6, chain-type removal of the BSG layer plated on the front side, the specific process is the same as S8 in Example 1.

[0123] S7, cleaning and texturing to remove the surface deposition layer of the negative electrode area and form a pyramid texturing surface on the front side. The specific process is the same as S9 of Example 1.

[0124] S8, double-sided coating to form a passivation anti-reflection film on the front and back surfaces. The specific process is the same as S10 in Example 1.

[0125] S9, screen printing, forming a positive electrode and a negative electrode in the positive electrode area and the negative electrode area respectively, sintering, and light injection. The specific process is the same as S11 in Example 1.

[0126] Example 3 A two-terminal all-silicon-based double-junction solar cell assembly comprises a unit cell A and a unit cell B which are staggered in series. The unit cell A is the two-terminal all-silicon-based double-junction solar cell prepared in Example 2.

[0127] The structure of unit cell B is similar to that of unit cell A, except that the polarity is opposite. The specific structure of unit cell B is as follows: Figure 7 As shown, it includes: a P-type silicon substrate 11, a pyramid velvet surface and a passivation anti-reflection film arranged on the front of the P-type silicon substrate in sequence, and a positive electrode region and a negative electrode region arranged on the back of the P-type silicon substrate (the positive electrode region and the negative electrode region are respectively located on the two side regions of the back of the P-type silicon substrate). Among them: the negative electrode region includes an inner phosphorus diffusion layer 13, a boron diffusion layer 14, an outer phosphorus diffusion layer 15 and a passivation anti-reflection film arranged on the back of the P-type silicon substrate in sequence, and a negative electrode arranged on the surface of the outer phosphorus diffusion layer and penetrating the passivation anti-reflection film; the positive electrode region includes a passivation anti-reflection film arranged on the back of the P-type silicon substrate, and a positive electrode arranged on the back of the P-type silicon substrate and penetrating the passivation anti-reflection film. Among them, the concentration of phosphorus atoms in the inner phosphorus diffusion layer is lower than the concentration of boron atoms in the boron diffusion layer, and the concentration of boron atoms in the boron diffusion layer is lower than the concentration of phosphorus atoms in the outer phosphorus diffusion layer.

[0128] The positive and negative electrodes of unit cell A and unit cell B are in opposite positions, such as Figure 8 As shown, their connection method is: the negative electrode of unit cell A is connected to the positive electrode of its subsequent adjacent unit cell B through a welding strip 12, and the positive electrode of unit cell A is connected to the negative electrode of its preceding adjacent unit cell B through a welding strip.

[0129] The connection method of the above components can realize the "I"-shaped positive / negative electrodes in series welding in the same direction on the back of the battery, avoiding the cumbersome process problems caused by cross welding (conventional stacked batteries are provided with electrodes on both sides, so they must be connected in series in a Z-shaped manner that alternates up and down. In this connection method, the welding ribbon will be interspersed between adjacent silicon wafers. The vertical interaction between the welding ribbon and the edge of the silicon wafer will cause greater stress on the silicon wafer, which is prone to damage and has a low yield rate).

[0130] Performance Testing The electrical properties of the solar cells obtained in the embodiments and comparative examples were tested, and the results are shown in Table 1.

[0131] Table 1

[0132] First, for Example 1, since the battery adopts a full silicon-based double junction back contact structure, its V oc The value is higher than that of the conventional single-junction back-contact cell (Comparative Example 5), and the back-contact structure can further reduce the shading loss of the front grid line of the cell. J sc The values ​​are also higher.

[0133] For Comparative Example 1, due to the insufficient phosphorus diffusion during the phosphorus diffusion process (low phosphorus doping amount), the surface layer of the inner boron diffusion layer cannot be transformed into a phosphorus diffusion layer, and thus the so-called back-side "layered" double junction structure cannot be formed, resulting in the battery terminal V oc The value is lower than that of Example 1; since the conventional structure of the back-contact battery is basically satisfied, the battery performance is not significantly reduced, but is lower than that of Example 1.

[0134] For Comparative Example 2, due to the excessive phosphorus diffusion during the phosphorus diffusion process (high phosphorus doping amount and deep doping depth), the inner boron diffusion layer is completely transformed into a phosphorus diffusion layer. After the secondary boron diffusion, the battery end cannot form the so-called back "layered" double junction structure, but it also basically meets the conventional structure of the back contact battery, so the battery performance is not greatly reduced. Due to the large amount of doping during the phosphorus diffusion process, the carrier recombination between the diffusion layers is large, and the corresponding battery V oc The value is low, and the overall electrical performance is lower than that of Example 1 and Comparative Example 1.

[0135] For Comparative Example 3, since the degree of boron diffusion is insufficient during the secondary boron diffusion process, the outer layer of the phosphorus diffusion layer cannot be transformed into an outer boron diffusion layer. On the one hand, a "layered" double junction structure cannot be formed on the back side, and on the other hand, the back side of the silicon wafer is entirely a negative electrode area (N-type silicon substrate, phosphorus diffusion layer), resulting in the lowest overall battery performance.

[0136] For Comparative Example 4, due to the high degree of boron diffusion in the secondary boron diffusion process, the phosphorus diffusion layer is completely transformed into a boron diffusion layer, and due to the high amount of boron doping on the surface, the surface recombination rate is higher, and the corresponding battery V oc The value is very low, but since it also meets the conventional structure of the back contact battery, the battery performance is higher than that of Comparative Example 3, but lower than that of the other groups.

[0137] For Comparative Example 5, since only a single junction back contact structure is used on the back of the battery, the battery V oc The value is lower than that of the double junction back contact structure, and the overall electrical performance is also lower than that of Example 1 and Example 2.

[0138] For Example 2, since the preparation process is further optimized and improved on the basis of Example 1, on the one hand, the complexity of the overall process is simplified, and on the other hand, the influence of high and low temperatures caused by repeated wet treatment before and after each diffusion process is avoided. Not only does it reduce the fragmentation rate of the silicon wafer, but it also indirectly improves the influence of internal stress of the silicon wafer, and the corresponding lattice will be more stable, so the overall electrical performance is the best.

[0139] The raw materials and equipment used in the present invention, unless otherwise specified, are all commonly used raw materials and equipment in the art; the methods used in the present invention, unless otherwise specified, are all conventional methods in the art.

[0140] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any way. Any simple modification, change and equivalent transformation made to the above embodiment based on the technical essence of the present invention still falls within the protection scope of the technical solution of the present invention.

Claims

1. A two-terminal all-silicon-based double-junction solar cell, characterized in that include: An N-type silicon substrate, a pyramid velvet surface and a passivation anti-reflection film are sequentially arranged on the front side of the N-type silicon substrate, and a positive electrode region and a negative electrode region are arranged on the back side of the N-type silicon substrate; wherein: The positive electrode region includes an inner boron diffusion layer, a phosphorus diffusion layer, an outer boron diffusion layer and a passivation anti-reflection film which are sequentially arranged on the back of the N-type silicon substrate, and a positive electrode arranged on the surface of the outer boron diffusion layer; The cathode region includes a passivation anti-reflection film disposed on the back of the N-type silicon substrate, and a cathode disposed on the back of the N-type silicon substrate; The boron concentration in the inner boron diffusion layer is lower than the phosphorus concentration in the phosphorus diffusion layer, and the phosphorus concentration in the phosphorus diffusion layer is lower than the boron concentration in the outer boron diffusion layer.

2. The two-terminal all-silicon-based double-junction solar cell according to claim 1, characterized in that: The positive electrode region and the negative electrode region are respectively located at two side regions of the back side of the N-type silicon substrate.

3. A method for preparing a two-terminal all-silicon-based double-junction solar cell according to claim 1 or 2, characterized in that include: S1, N-type silicon substrate double-sided polishing; S2, a boron diffusion, forming an inner boron diffusion layer and a BSG layer on the back side in sequence; S3, remove the BSG layer; S4, phosphorus diffusion, so that the surface layer of the inner boron diffusion layer is converted into a phosphorus diffusion layer and a PSG layer; S5, removing the PSG layer; S6, secondary boron diffusion, converting the surface of the phosphorus diffusion layer into an outer boron diffusion layer and a BSG layer; S7, removing the BSG layer in the negative electrode region; S8, removing the BSG layer plated on the front side; S9, cleaning and velveting to remove the surface deposition layer of the negative electrode area and form a pyramid velvet surface on the front side; S10, double-sided coating; S11, screen printing, sintering, light injection.

4. The preparation method according to claim 3, characterized in that: The phosphorus atom concentration of the N-type silicon substrate is less than the boron atom concentration of the first boron diffusion, less than the phosphorus atom concentration of the phosphorus diffusion, and less than the boron atom concentration of the second boron diffusion; and the first boron diffusion depth is greater than the phosphorus diffusion depth and the second boron diffusion depth.

5. The preparation method according to claim 4, characterized in that: The primary boron diffusion conditions are as follows: diffusion temperature 900-950°C, time 20-80 min, BCl3 flow rate 20-100 sccm, O2 flow rate 200-1000 sccm; oxidation push temperature 1000-1050°C, O2 flow rate 1000-20000 sccm, time 60-120 min; surface boron doping concentration 1E17-5E18 cm -3 , doping depth 2~5 μm; Phosphorus diffusion conditions are as follows: diffusion temperature 750-850°C, time 5-30 min, POCl3 flow rate 200-500 sccm, O2 flow rate 300-1000 sccm; oxidation advancement temperature 850-950°C, O2 flow rate 500-3000 sccm, time 30-90 min; surface phosphorus doping concentration 6E18-1E19 cm -3 , doping depth 1~2 μm; Secondary boron diffusion conditions: diffusion temperature 900-950°C, time 20-80 min, BCl3 flow rate 300-800 sccm, O2 flow rate 1000-5000 sccm; oxidation push temperature 1000-1050°C, O2 flow rate 5000-80000 sccm, time 10-50 min; surface boron doping concentration 2E19-1E20 cm -3 , the doping depth is 0.3~1 μm.

6. The preparation method according to claim 5, characterized in that: The BSG layer obtained after the first boron diffusion is 30 to 80 nm thick; The thickness of the PSG layer obtained after phosphorus diffusion is 30 to 70 nm; The thickness of the BSG layer obtained after secondary boron diffusion is 20 to 60 nm.

7. A method for preparing a two-terminal all-silicon-based double-junction solar cell according to claim 1 or 2, characterized in that include: S1, N-type silicon substrate double-sided polishing; S2, a boron diffusion is performed to form an inner boron diffusion layer on the back of the N-type silicon substrate; S3, phosphorus diffusion, so that the surface layer of the inner boron diffusion layer is converted into a phosphorus diffusion layer; S4, secondary boron diffusion converts the surface layer of the phosphorus diffusion layer into an outer boron diffusion layer and a BSG layer; S5, removing the BSG layer in the negative electrode region; S6, removing the BSG layer plated on the front side; S7, cleaning and velveting to remove the surface deposited layer of the negative electrode area and form a pyramid velvet surface on the front side; S8, double-sided coating; S9, screen printing, sintering, light injection.

8. The preparation method according to claim 7, characterized in that: The phosphorus atomic concentration of the N-type silicon substrate is less than the boron atomic concentration of the first boron diffusion, less than the phosphorus atomic concentration of the phosphorus diffusion, less than the boron atomic concentration of the second boron diffusion; and The primary boron diffusion depth > phosphorus diffusion depth > secondary boron diffusion depth; The primary boron diffusion and phosphorus diffusion are both promoted without oxygen, and the secondary boron diffusion is promoted with oxygen; the promotion time of the primary boron diffusion and phosphorus diffusion is shorter than that of the secondary boron diffusion.

9. The preparation method according to claim 8, characterized in that: Primary boron diffusion conditions: diffusion temperature 900-950°C, time 20-80 min, BCl3 flow rate 20-100 sccm, O2 flow rate 200-1000 sccm; push temperature 1000-1050°C, time 40-100 min; surface boron doping concentration 3E17-7E18 cm -3 , doping depth 1.5~4.5 μm; Phosphorus diffusion conditions: diffusion temperature 750-850°C, time 5-30 min, POCl3 flow rate 200-500 sccm, O2 flow rate 300-1000 sccm; push temperature 850-950°C, time 10-50 min; surface phosphorus doping concentration 9E18-2E19 cm -3 , doping depth 0.8~1.5 μm; Secondary boron diffusion conditions: diffusion temperature 900-950°C, time 20-80 min, BCl3 flow rate 300-800 sccm, O2 flow rate 1000-5000 sccm; oxidation push temperature 1000-1050°C, O2 flow rate 5000-80000 sccm, time 10-50 min; surface boron doping concentration 2E19-1E20 cm -3 , doping depth 0.3~1 μm.

10. The preparation method according to claim 7, characterized in that: The thickness of the BSG layer obtained after the secondary boron diffusion is 20 to 60 nm.

Citation Information

Patent Citations

  • Diffusion process for preparing solar cell

    CN107591461A

  • Impurity diffusion method and solar cell manufacturing method

    CN113782423A

  • Preparation method of IBC solar cell with passivation contact structure, cell, assembly and system

    CN115274913A

  • Solar cell and manufacturing method thereof, laminated cell and photovoltaic module

    CN118281096A

  • Backside silicon photovoltaic cell and method of manufacturing thereof

    US8486747B1