Preparation method of solar cell and solar cell

Abstract

The invention provides a preparation method of a solar cell and the solar cell, and the method comprises the steps: forming first tunneling layers and second tunneling layers, which are alternately distributed, on the back surface of a silicon substrate; forming a first doped amorphous silicon layer and a second doped amorphous silicon layer on the first tunneling layer and the second tunneling layer respectively; first heat treatment is carried out on the first doped amorphous silicon layer and the second doped amorphous silicon layer at the same time, the temperature of the first heat treatment is 500-640 DEG C, and at least part of the second doped amorphous silicon layer is converted into a second doped polycrystalline silicon layer after the first heat treatment; laser is used for carrying out second heat treatment on the first doped amorphous silicon layer, at least part of the first doped amorphous silicon layer is converted into a first doped polycrystalline silicon layer after being subjected to the first heat treatment and the second heat treatment, the first doped amorphous silicon layer is P-type doped, and the second doped amorphous silicon layer is N-type doped. According to the preparation method of the solar cell and the solar cell, parasitic absorption of N-type doped polycrystalline silicon can be reduced, and the efficiency of the solar cell is further improved.

Description

Technical Field

[0001] The present application mainly relates to the field of photovoltaic technology, and in particular to a method for preparing a solar cell and a solar cell. Background Art

[0002] TBC cells are equipped with P-type passivation contact structures and N-type passivation contact structures on the back of the cells. They have the advantages of high conversion efficiency and high compatibility with Topcon cell production lines, attracting the attention and R&D investment of many manufacturers in the photovoltaic field. However, the N-type doped polysilicon in the N-type passivation contact structure has a serious parasitic absorption problem. How to reduce the parasitic absorption of N-type doped polysilicon is a hot issue in this field. Summary of the invention

[0003] The technical problem to be solved by the present application is to provide a method for preparing a solar cell and a solar cell, wherein the method for preparing a solar cell and the solar cell can reduce the parasitic absorption of N-type doped polysilicon, thereby improving the efficiency of the solar cell.

[0004] To solve the above technical problems, the present application provides a method for preparing a solar cell, comprising: forming an alternating first tunneling layer and a second tunneling layer on the back side of a silicon substrate; forming a first doped amorphous silicon layer and a second doped amorphous silicon layer on the first tunneling layer and the second tunneling layer, respectively; simultaneously performing a first heat treatment on the first doped amorphous silicon layer and the second doped amorphous silicon layer, the temperature of the first heat treatment being 500°C to 640°C, and at least a portion of the second doped amorphous silicon layer being transformed into a second doped polycrystalline silicon layer after the first heat treatment; and performing a second heat treatment on the first doped amorphous silicon layer using a laser, and at least a portion of the first doped amorphous silicon layer being transformed into a first doped polycrystalline silicon layer after the first heat treatment and the second heat treatment, wherein the first doped amorphous silicon layer is P-type doped and the second doped amorphous silicon layer is N-type doped.

[0005] In an embodiment of the present application, the preparation method further includes: forming a first back passivation layer and a second back passivation layer on the first doped amorphous silicon layer and the second doped amorphous silicon layer.

[0006] In one embodiment of the present application, a first slurry and a second slurry are formed on the second back passivation layer, and the first doped amorphous silicon layer, the second doped amorphous silicon layer, the first slurry and the second slurry are simultaneously subjected to the first heat treatment, and the first slurry and the second slurry are respectively transformed into a first electrode and a second electrode after the first heat treatment.

[0007] In one embodiment of the present application, the power of the laser is 25W to 50W.

[0008] In one embodiment of the present application, the method for forming the first tunneling layer and the first doped amorphous silicon layer includes: forming an initial first tunneling layer and an initial first doped amorphous silicon layer covering the N region and the P region on the back side of the silicon substrate; removing the initial first tunneling layer and the initial first doped amorphous silicon layer located in the N region, and the initial first tunneling layer and the initial first doped amorphous silicon layer that are not removed form the first tunneling layer and the first doped amorphous silicon layer, respectively.

[0009] In one embodiment of the present application, the method for forming the second tunneling layer and the second doped amorphous silicon layer includes: forming an initial second tunneling layer and an initial second doped amorphous silicon layer covering the N region and the first doped amorphous silicon layer; removing the initial second tunneling layer and the initial second doped amorphous silicon layer located on the first doped amorphous silicon layer, and the initial second tunneling layer and the initial second doped amorphous silicon layer that are not removed form the second tunneling layer and the second doped amorphous silicon layer, respectively.

[0010] In one embodiment of the present application, the preparation method further includes: forming a first front passivation layer and a second front passivation layer on the front side of the silicon substrate.

[0011] On the other hand, the present application also proposes a solar cell, comprising: a silicon substrate having a relative front side and a back side; a first tunneling layer and a second tunneling layer, alternately distributed on the back side; a first doped polysilicon layer and a second doped polysilicon layer, respectively located on the first tunneling layer and the second tunneling layer, the thickness of the first doped polysilicon layer is greater than the thickness of the second doped polysilicon layer, the first doped polysilicon layer is P-type doped, and the second doped polysilicon layer is N-type doped; and a first electrode and a second electrode, respectively electrically connected to the first doped polysilicon layer and the second doped polysilicon layer.

[0012] In an embodiment of the present application, the thickness of the first doped polysilicon layer is 180 nm to 400 nm, and the thickness of the second doped polysilicon layer is 100 nm to 350 nm.

[0013] In an embodiment of the present application, the solar cell further includes a first front passivation layer and a second front passivation layer stacked on the front surface.

[0014] In one embodiment of the present application, the solar cell also includes a first back passivation layer and a second back passivation layer stacked on the first doped polysilicon layer and the second doped polysilicon layer, wherein the first electrode and the second electrode are electrically connected to the corresponding doped polysilicon layer through the first back passivation layer and the second back passivation layer.

[0015] Compared with the prior art, the present application has the following advantages: first, the P-type first doped amorphous silicon layer and the N-type second doped amorphous silicon layer are simultaneously subjected to overall low-temperature heat treatment, and then the P-type first doped amorphous silicon layer is selectively heat treated, so that the thickness of the N-type second doped polycrystalline silicon layer formed in this way is less than the thickness of the P-type first doped polycrystalline silicon layer, which takes into account the thicker P-type first doped polycrystalline silicon layer and the thinner N-type second doped polycrystalline silicon layer, and also reduces the parasitic absorption caused by the N-type second doped polycrystalline silicon layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The accompanying drawings are included to provide a further understanding of the present application. They are included and constitute a part of the present application. The accompanying drawings illustrate embodiments of the present application and together with the present specification serve to explain the principles of the present application. In the accompanying drawings:

[0017] Figure 1 is a schematic flow chart of a method for preparing a solar cell in one embodiment of the present application;

[0018] Figures 2 to 6 It is a schematic cross-sectional view of a solar cell at different steps in a preparation method in an embodiment of the present application.

[0019] Reference numerals

[0020] Silicon substrate 210 First doped amorphous silicon layer 240 Second back passivation layer 290

[0021] Back surface 211 Second doped amorphous silicon layer 250 First electrode 310

[0022] Front surface 212 Second doped polysilicon layer 260 Second electrode 320

[0023] First tunneling layer 220 First doped polysilicon layer 270 First front passivation layer 330

[0024] Second tunneling layer 230 First back passivation layer 280 Second front passivation layer 340 DETAILED DESCRIPTION

[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for the description of the embodiments. Obviously, the drawings described below are only some examples or embodiments of the present application. For ordinary technicians in this field, the present application can also be applied to other similar scenarios based on these drawings without creative work. Unless it is obvious from the language environment or otherwise explained, the same reference numerals in the figures represent the same structure or operation.

[0026] As shown in this application and claims, unless the context clearly indicates an exception, the words "a", "an", "an" and / or "the" do not refer to the singular and may also include the plural. Generally speaking, the terms "include" and "comprise" only indicate the inclusion of the steps and elements that have been clearly identified, and these steps and elements do not constitute an exclusive list. The method or device may also include other steps or elements.

[0027] Unless otherwise specifically stated, the relative arrangement, numerical expressions and numerical values ​​of the parts and steps set forth in these embodiments do not limit the scope of the present application. At the same time, it should be understood that, for ease of description, the sizes of the various parts shown in the accompanying drawings are not drawn according to the actual proportional relationship. The technology, method and equipment known to those of ordinary skill in the relevant field may not be discussed in detail, but in appropriate cases, the technology, method and equipment should be considered as a part of the authorization specification. In all examples shown and discussed here, any specific value should be interpreted as being merely exemplary, rather than as a limitation. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters represent similar items in the following drawings, so that once a certain item is defined in an accompanying drawing, it does not need to be further discussed in subsequent drawings.

[0028] In the description of the present application, it should be understood that the directions or positional relationships indicated by directional words such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom" are usually based on the directions or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description. Unless otherwise specified, these directional words do not indicate or imply that the device or element referred to must have a specific direction or be constructed and operated in a specific direction, and therefore cannot be understood as limiting the scope of protection of the present application; the directional words "inside and outside" refer to the inside and outside relative to the contours of each component itself.

[0029] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used here to describe the spatial positional relationship between a device or feature and other devices or features as shown in the figure. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figure. For example, if the device in the accompanying drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" can include both "above" and "below". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used here are interpreted accordingly.

[0030] In addition, it should be noted that the use of words such as "first" and "second" to define components is only for the convenience of distinguishing the corresponding components. If not otherwise stated, the above words have no special meaning and cannot be understood as limiting the scope of protection of this application. In addition, although the terms used in this application are selected from well-known and commonly used terms, some terms mentioned in the specification of this application may be selected by the applicant at his or her discretion, and their detailed meanings are explained in the relevant parts of the description of this article. In addition, it is required to understand this application not only by the actual terms used, but also by the meaning implied by each term.

[0031] Flowcharts are used in the present application to illustrate the operations performed by the system according to the embodiments of the present application. It should be understood that the preceding or following operations are not necessarily performed accurately in order. On the contrary, various steps may be processed in reverse order or simultaneously. At the same time, other operations may be added to these processes, or one or more operations may be removed from these processes.

[0032] Next, the preparation method of the solar cell and the solar cell of the present application are described through examples.

[0033] refer to Figure 1 The schematic flow chart of a preparation method in an embodiment is shown, and the preparation method in this embodiment includes the following steps S110 to S140.

[0034] Step S110: forming a first tunneling layer and a second tunneling layer alternately distributed on the back side of the silicon substrate;

[0035] Step S120: forming a first doped amorphous silicon layer and a second doped amorphous silicon layer on the first tunneling layer and the second tunneling layer respectively;

[0036] Step S130: performing a first heat treatment on the first doped amorphous silicon layer and the second doped amorphous silicon layer at the same time, wherein the temperature of the first heat treatment is 500° C. to 640° C., and at least a portion of the second doped amorphous silicon layer is transformed into a second doped polycrystalline silicon layer after the first heat treatment;

[0037] Step S140: performing a second heat treatment on the first doped amorphous silicon layer using a laser, so that at least a portion of the first doped amorphous silicon layer is transformed into a first doped polycrystalline silicon layer after the first heat treatment and the second heat treatment.

[0038] Next, steps S110 to S140 are described in detail.

[0039] refer to Figure 2 As shown, in step S110, the silicon substrate 210 has a back side 211 and a front side 212 opposite to each other in the thickness direction thereof, and a first tunnel layer 220 and a second tunnel layer 230 are formed on the back side 211. When the solar cell is working, the front side 212 faces the sun, the silicon substrate 210 can be N-type single crystal silicon or P-type single crystal silicon, the first tunnel layer 220 and the second tunnel layer 230 can be silicon oxide, and the first tunnel layer 220 and the second tunnel layer 230 can be prepared by a low pressure chemical vapor deposition (LPCVD) process.

[0040] Continue to refer Figure 2 As shown, in step S120, a first doped amorphous silicon layer 240 is formed on the surface of the first tunneling layer 220 away from the silicon substrate 210, and a second doped amorphous silicon layer 250 is formed on the surface of the second tunneling layer 230 away from the silicon substrate 210. The first doped amorphous silicon layer 240 is P-type doped, and the doping element may include boron (B). The second doped amorphous silicon layer 250 is N-type doped, and the doping element may include phosphorus (P). The first doped amorphous silicon layer 240 and the second doped amorphous silicon layer 250 can be prepared using a low-pressure chemical vapor deposition process.

[0041] In one embodiment, the first tunneling layer 220 and the first doped amorphous silicon layer 240 may be formed by the following method. First, an initial first tunneling layer and an initial first doped amorphous silicon layer covering the N region and the P region are formed on the back side 211 of the silicon substrate 210. For example, the initial first tunneling layer and the intrinsic amorphous silicon layer may be prepared by a low pressure chemical vapor deposition process, and the intrinsic amorphous silicon layer is P-doped (e.g., boron diffusion) to form an initial first doped amorphous silicon layer. Next, the initial first tunneling layer and the initial first doped amorphous silicon layer located in the N region are removed, and the initial first tunneling layer and the initial first doped amorphous silicon layer that are not removed form the first tunneling layer 220 and the first doped amorphous silicon layer 240, respectively. For example, a laser can be used to remove the borosilicate glass (BSG) located in the N region to expose the initial first doped amorphous silicon located in the N region, and an etching method is used to remove the exposed initial first doped amorphous silicon and the initial first tunneling layer. The power of the laser for removing the BSG can be 25W to 35W, the wavelength can be 500nm to 600nm, and the overlap rate can be 20% to 60%.

[0042] In one embodiment, the second tunneling layer 230 and the second doped amorphous silicon layer 250 may be formed by the following method. First, an initial second tunneling layer and an initial second doped amorphous silicon layer covering the N region and the first doped amorphous silicon layer are formed. For example, the initial second tunneling layer and the intrinsic amorphous silicon layer may be prepared by a low pressure chemical vapor deposition process, and the intrinsic amorphous silicon layer is N-type doped (e.g., phosphorus diffusion) to form an initial second doped amorphous silicon layer. Next, the initial second tunneling layer and the initial second doped amorphous silicon layer on the first doped amorphous silicon layer are removed, and the initial second tunneling layer and the initial second doped amorphous silicon layer that are not removed form a second tunneling layer and a second doped amorphous silicon layer, respectively. For example, a laser is used to remove the phosphosilicate glass (PSG) located in the P region to expose the initial second doped amorphous silicon layer located in the P region, and an etching method is used to remove the exposed initial second doped amorphous silicon layer and the initial second tunneling layer. The power of the laser for removing PSG can be 28W to 33W, the wavelength can be 500nm to 600nm, and the overlap rate can be 20% to 60%.

[0043] In one embodiment, the front side of the silicon substrate may be subjected to a texturing process to form a pyramid texturing surface morphology on the front side of the silicon substrate. The pyramid texturing surface morphology has a light trapping effect.

[0044] refer to Figure 2 and Figure 3As shown, in step S130, the first doped amorphous silicon layer 240 and the second doped amorphous silicon layer 250 are subjected to a first heat treatment at the same time, and the temperature of the first heat treatment is 500°C to 640°C, for example, the temperature is 500°C, 520°C, 540°C, 560°C, 580°C, 600°C, 620°C or 640°C, and at least part of the second doped amorphous silicon layer 250 is transformed into the second doped polycrystalline silicon layer 260 after the first heat treatment, and the percentage of the second doped amorphous silicon layer 250 transformed into the second doped polycrystalline silicon layer 260 can be controlled according to demand, for example, the entire second doped amorphous silicon layer 250 can be transformed into the second doped polycrystalline silicon layer 260. It can be understood that the doping type of the second doped polycrystalline silicon layer 260 is the same as that of the second doped amorphous silicon layer 250 (i.e., both are N-type doped).

[0045] refer to Figure 3 and Figure 4 As shown, in step S140, the first doped amorphous silicon layer 240 is subjected to a second heat treatment using a laser, and at least a portion of the first doped amorphous silicon layer 240 is transformed into a first doped polycrystalline silicon layer 270 after the first heat treatment and the second heat treatment. Compared with the second doped amorphous silicon layer 250, the first doped amorphous silicon layer 240 is also subjected to the second heat treatment, so the thickness of the first doped polycrystalline silicon layer 270 is greater than the thickness of the second doped polycrystalline silicon layer 260. The power of the laser for the second heat treatment is 25W to 50W, for example, the power is 25W, 30W, 35W, 40W, 45W or 50W.

[0046] If the P-type first doped polysilicon layer and the N-type second doped polysilicon layer are formed by performing an overall high-temperature (720°C to 800°C) heat treatment on the P-type first doped amorphous silicon layer and the N-type second doped amorphous silicon layer, the thickness of the N-type second doped polysilicon layer will be substantially the same as the thickness of the P-type first doped polysilicon layer, and the thicker N-type second doped polysilicon layer will cause serious parasitic absorption, thereby affecting the battery efficiency. The present application first performs an overall low-temperature heat treatment on the P-type first doped amorphous silicon layer and the N-type second doped amorphous silicon layer at the same time, and then selectively performs a heat treatment on the P-type first doped amorphous silicon layer, so that the thickness of the N-type second doped polysilicon layer formed is less than the thickness of the P-type first doped polysilicon layer, which takes into account the thicker P-type first doped polysilicon layer and the thinner N-type second doped polysilicon layer, and reduces the parasitic absorption caused by the N-type second doped polysilicon layer.

[0047] refer to Figure 5As shown, in one embodiment, the preparation method further includes: forming a first back passivation layer 280 and a second back passivation layer 290 on the first doped amorphous silicon layer 240 and the second doped amorphous silicon layer 250. Further, a first slurry and a second slurry can be formed on the second back passivation layer 290, and a first heat treatment is performed on the first doped amorphous silicon layer 240, the second doped amorphous silicon layer 250, the first slurry and the second slurry at the same time. After the first heat treatment, the first slurry and the second slurry are respectively transformed into the first electrode 310 and the second electrode 320, and the first doped amorphous silicon layer 240 is transformed into the first doped polycrystalline silicon layer 270. The first heat treatment can be a sintering treatment. Figure 6 As shown, in the final solar cell, the first electrode 310 passes through the first back passivation layer 280 and the second back passivation layer 290 and contacts the first doped polysilicon layer 270 and the second doped polysilicon layer 260. The first back passivation layer 280 may include aluminum oxide, and the second back passivation layer 290 may include silicon nitride.

[0048] Continue to refer Figure 6 As shown, in one embodiment, the preparation method further includes forming a first front passivation layer 330 and a second front passivation layer 340 on the front surface 212. The first front passivation layer 330 may include aluminum oxide, and the second front passivation layer 340 may include hydrogenated silicon nitride.

[0049] On the other hand, the present application also proposes a solar cell, Figure 6 As shown, the solar cell includes: a silicon substrate 210, a first tunneling layer 220, a second tunneling layer 230, a first doped polysilicon layer 270, a second doped polysilicon layer 260, a first electrode 310 and a second electrode 320. Specifically, the silicon substrate 210 has a front side and a back side opposite to each other, the first tunneling layer 220 and the second tunneling layer 230 are alternately distributed on the back side, the first doped polysilicon layer 270 and the second doped polysilicon layer 260 are respectively located on the first tunneling layer 220 and the second tunneling layer 230, the thickness of the first doped polysilicon layer 270 is greater than the thickness of the second doped polysilicon layer 260, the first doped polysilicon layer 270 is P-type doped, the second doped polysilicon layer 260 is N-type doped, and the first electrode 310 and the second electrode 320 are respectively electrically connected to the first doped polysilicon layer 270 and the second doped polysilicon layer 260.

[0050] In one embodiment, the thickness of the first doped polysilicon layer 270 is 180nm to 400nm, for example, the thickness is 180nm, 220nm, 260nm, 300nm, 340nm, 380nm or 400nm, and the thickness of the second doped polysilicon layer 260 is 100nm to 350nm, for example, the thickness is 100nm, 140nm, 180nm, 220nm, 260nm, 300nm, 340nm or 350nm.

[0051] In one embodiment, the solar cell may further include a first front passivation layer 330 and a second front passivation layer 340 stacked on the front surface. The solar cell may further include a first back passivation layer 280 and a second back passivation layer 290 stacked on the first doped polysilicon layer 270 and the second doped polysilicon layer 260, and the first electrode 310 and the second electrode 320 are electrically connected to the corresponding doped polysilicon layer through the first back passivation layer 280 and the second back passivation layer 290.

[0052] The solar cell of the present application takes into account both a thicker P-type first doped polysilicon layer and a thinner N-type second doped polysilicon layer, which reduces the parasitic absorption caused by the N-type second doped polysilicon layer.

[0053] For other descriptions about the solar cell of the present application, please refer to the description of the preparation method above, which will not be elaborated here.

[0054] The basic concepts have been described above. Obviously, for those skilled in the art, the above application disclosure is only an example and does not constitute a limitation of the present application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and amendments to the present application. Such modifications, improvements and amendments are suggested in the present application, so such modifications, improvements and amendments still belong to the spirit and scope of the exemplary embodiments of the present application.

[0055] At the same time, the present application uses specific words to describe the embodiments of the present application. For example, "one embodiment", "an embodiment", and / or "some embodiments" refer to a certain feature, structure or characteristic related to at least one embodiment of the present application. Therefore, it should be emphasized and noted that "one embodiment" or "an embodiment" or "an alternative embodiment" mentioned twice or more in different positions in this specification does not necessarily refer to the same embodiment. In addition, some features, structures or characteristics in one or more embodiments of the present application can be appropriately combined.

[0056] Similarly, it should be noted that in order to simplify the description of the disclosure of this application and thus help understand one or more application embodiments, in the above description of the embodiments of this application, multiple features are sometimes merged into one embodiment, figure or description thereof. However, this disclosure method does not mean that the features required by the object of this application are more than the features mentioned in the claims. In fact, the features of the embodiments are less than all the features of the single embodiment disclosed above.

[0057] In some embodiments, numbers describing the number of components and attributes are used. It should be understood that such numbers used in the description of the embodiments are modified by the modifiers "about", "approximately" or "substantially" in some examples. Unless otherwise specified, "about", "approximately" or "substantially" indicate that the numbers are allowed to vary by ±20%. Accordingly, in some embodiments, the numerical parameters used in the specification and claims are approximate values, which may change according to the required features of individual embodiments. In some embodiments, the numerical parameters should take into account the specified significant digits and adopt the general method of retaining digits. Although the numerical domains and parameters used to confirm the breadth of their range in some embodiments of the present application are approximate values, in specific embodiments, the setting of such numerical values ​​is as accurate as possible within the feasible range.

[0058] Although the present application has been described with reference to the current specific embodiments, ordinary technicians in this technical field should recognize that the above embodiments are only used to illustrate the present application, and various equivalent changes or substitutions may be made without departing from the spirit of the present application. Therefore, as long as the changes and modifications to the above embodiments are within the essential spirit of the present application, they will fall within the scope of the claims of the present application.

Claims

1. A method for preparing a solar cell, characterized in that: include: forming a first tunneling layer and a second tunneling layer which are alternately distributed on the back side of the silicon substrate; forming a first doped amorphous silicon layer and a second doped amorphous silicon layer on the first tunneling layer and the second tunneling layer respectively; performing a first heat treatment on the first doped amorphous silicon layer and the second doped amorphous silicon layer at the same time, wherein the temperature of the first heat treatment is 500° C. to 640° C., and at least a portion of the second doped amorphous silicon layer is transformed into a second doped polycrystalline silicon layer after the first heat treatment; as well as The first doped amorphous silicon layer is subjected to a second heat treatment using a laser, and at least a portion of the first doped amorphous silicon layer is transformed into a first doped polycrystalline silicon layer after the first heat treatment and the second heat treatment, wherein the first doped amorphous silicon layer is P-type doped and the second doped amorphous silicon layer is N-type doped.

2. The preparation method according to claim 1, characterized in that Also includes: A first back passivation layer and a second back passivation layer are formed on the first doped amorphous silicon layer and the second doped amorphous silicon layer.

3. The preparation method according to claim 2, characterized in that: A first slurry and a second slurry are formed on the second back passivation layer, and the first doped amorphous silicon layer, the second doped amorphous silicon layer, the first slurry and the second slurry are subjected to the first heat treatment at the same time, and the first slurry and the second slurry are transformed into a first electrode and a second electrode respectively after the first heat treatment.

4. The preparation method according to claim 1, characterized in that: The power of the laser is 25W-50W.

5. The preparation method according to claim 1, characterized in that: The method of forming the first tunneling layer and the first doped amorphous silicon layer includes: forming an initial first tunneling layer and an initial first doped amorphous silicon layer covering the N region and the P region on the back side of the silicon substrate; The initial first tunneling layer and the initial first doped amorphous silicon layer located in the N region are removed, and the initial first tunneling layer and the initial first doped amorphous silicon layer that are not removed form the first tunneling layer and the first doped amorphous silicon layer, respectively.

6. The preparation method according to claim 5, characterized in that: The method of forming the second tunneling layer and the second doped amorphous silicon layer includes: forming an initial second tunneling layer and an initial second doped amorphous silicon layer covering the N region and the first doped amorphous silicon layer; The initial second tunneling layer and the initial second doped amorphous silicon layer on the first doped amorphous silicon layer are removed, and the initial second tunneling layer and the initial second doped amorphous silicon layer that are not removed form the second tunneling layer and the second doped amorphous silicon layer, respectively.

7. The preparation method according to claim 1, characterized in that: The thickness of the first doped polysilicon layer is greater than the thickness of the second doped polysilicon layer.

8. A solar cell, characterized in that: include: a silicon substrate having opposing front and back sides; A first tunneling layer and a second tunneling layer are alternately distributed on the back surface; A first doped polysilicon layer and a second doped polysilicon layer are respectively located on the first tunneling layer and the second tunneling layer, the thickness of the first doped polysilicon layer is greater than the thickness of the second doped polysilicon layer, the first doped polysilicon layer is P-type doped, and the second doped polysilicon layer is N-type doped; as well as The first electrode and the second electrode are electrically connected to the first doped polysilicon layer and the second doped polysilicon layer, respectively.

9. The solar cell according to claim 8, characterized in that The thickness of the first doped polysilicon layer is 180 nm to 400 nm, and the thickness of the second doped polysilicon layer is 100 nm to 350 nm.

10. The solar cell according to claim 8, characterized in that The invention also includes a first front passivation layer and a second front passivation layer stacked on the front surface.

11. The solar cell according to claim 8, wherein: It also includes a first back passivation layer and a second back passivation layer stacked on the first doped polysilicon layer and the second doped polysilicon layer, wherein the first electrode and the second electrode are electrically connected to the corresponding doped polysilicon layer through the first back passivation layer and the second back passivation layer.

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