Microdisplay chip and its manufacturing method

Abstract

The present application provides a microdisplay chip and a method for manufacturing the same. The microdisplay chip includes: a driving substrate, and a plurality of light-emitting units arranged on the driving substrate and capable of being individually driven by the driving substrate respectively; each light-emitting unit includes: a bonding layer and an epitaxial layer; the bonding layer includes a first electrode layer, a reflective layer, and a transparent electrode layer arranged in sequence, the first electrode layer and the transparent electrode layer cover the reflective layer, and the epitaxial layer is disposed on the surface of the transparent electrode layer. In the microdisplay chip provided by the present application, the reflective layer is "embedded" in the bonding layer to prevent the overflow of high-reflectivity materials; the reflective layer is covered by the first electrode layer and the transparent electrode layer to improve the oxidation resistance of the reflective layer; the adhesion between the reflective layer and the first electrode layer and the transparent electrode layer is stronger, improving the product yield; by providing a transparent electrode layer with a relatively high transmittance, the reflective brightness of the reflective layer is ensured, and the light-emitting brightness is improved.

Description

Technical Field

[0001] This application relates to the technical field of display chips, and particularly to a micro-display chip and a preparation method thereof. Background Art

[0002] Micro-display Micro-LED, also known as micro light-emitting diode, is to integrate an array of micron-level LED light-emitting units on an active addressing driving substrate to achieve individual control and lighting, thereby outputting a display image. Full-color micro-displays have a wide range of application fields, especially near-eye displays (including AR, VR, etc.).

[0003] With the rapid development of modern social informatization, the brightness requirements for display devices are constantly increasing, and the requirements for the display brightness of micro-display chips or related devices based on Micro-LED are also getting higher and higher. To improve the display brightness of micro-display chips, silver mirror reflection is usually used in the prior art.

[0004] Chinese patent document CN115498088A discloses a micro light-emitting diode and a preparation method thereof. The structure of this patent document includes a bonding layer, a second barrier layer, a reflective layer, a first barrier layer, a conductive layer, and an LED unit from bottom to top. During its preparation process, a first opening is set at the position corresponding to the contact of the LED unit. The process of setting the first opening is to etch the LED unit, the conductive layer, the first barrier layer, and the reflective layer in sequence. And because the dry etching machines required for the first barrier layer and the reflective layer are different, different etching means are used for the first barrier layer and the reflective layer. During the etching process of Chinese patent document CN115498088A, the reflective layer is in a non-sealed state (i.e., parts such as the side walls of the reflective layer are exposed), and it is easy to have the phenomenon of overflow of the reflective layer material. Once the overflow of the reflective layer material occurs, irreversible defects will be generated, resulting in a low product yield of the micro-display chip. And it needs to change the etching means during the etching process, and the preparation process is relatively complex and the preparation difficulty is relatively high.

[0005] Chinese patent document CN114824047A discloses a micro light-emitting diode display chip and a preparation method thereof. The structure of this patent document is that the reflection unit array is arranged between the LED pixel points and the bonding layer, the reflection unit is correspondingly arranged with the LED pixel points, and the bonding layer covers the reflection unit. During the preparation process of Chinese patent document CN114824047A, although the phenomenon of overflow of the reflection unit material will not occur, the reflection unit is directly bonded under the LED pixel points, and the adhesion between the reflection unit material and the epitaxial layer material is poor. And the direct connection between the reflection unit and the LED pixel points will affect the antioxidant stability of the reflection unit, thereby reducing the lifespan of the micro-display chip.

[0006] How to improve the yield and lifespan of Micro-LED while enhancing its emission brightness has become an important issue that urgently needs to be addressed. Summary of the Invention

[0007] To solve the above problems, embodiments of the present application provide a microdisplay chip and a preparation method thereof. The reflective layer is "embedded" in the bonding layer to prevent the overflow of highly reflective materials. The reflective layer is coated by the first electrode layer and the transparent electrode layer to improve the antioxidant property of the reflective layer. The adhesion between the reflective layer and the first electrode layer and the transparent electrode layer is stronger, improving the product yield. By setting a transparent electrode layer with a relatively high transmittance, the reflective brightness of the reflective layer is ensured, and the emission brightness is enhanced.

[0008] Embodiments of the present application adopt the following technical solutions:

[0009] In a first aspect, a microdisplay chip is provided. The microdisplay chip includes: a driving substrate, and a plurality of light-emitting units arranged on the driving substrate and capable of being individually driven by the driving substrate respectively.

[0010] Each light-emitting unit includes: a bonding layer and an epitaxial layer.

[0011] Among them, the bonding layer includes a first electrode layer, a reflective layer, and a transparent electrode layer arranged in sequence. The first electrode layer and the transparent electrode layer coat the reflective layer, and the epitaxial layer is arranged on the surface of the transparent electrode layer.

[0012] In some embodiments, the reflective layer is arranged on a partial surface of the first electrode layer, and the transparent electrode layer coats the reflective layer and is arranged on other surfaces of the first electrode layer.

[0013] In some embodiments, the first electrode layer adopts a conductive thin-film material, and the conductive thin-film material includes at least one of Cr, Ti, Pt, Au, Al, Cu, Ge, Ni, Sn, Ag, Pb, or indium tin oxide.

[0014] In some embodiments, the reflective layer adopts a highly reflective material, and the highly reflective material includes at least one of Ag, Cu, Al, Pd, Ni, Rh.

[0015] In some embodiments, the thickness of the reflective layer is greater than 10 nm.

[0016] In some embodiments, the transparent electrode layer adopts a conductive high-transparency thin-film material, and the conductive high-transparency thin-film material includes at least one of indium tin compounds, conductive SiO2, conductive PI, molybdenum, silver.

[0017] In some embodiments, the epitaxial layer includes: a first semiconductor layer, a light-emitting layer, and a second semiconductor layer arranged in sequence. The first semiconductor layer is connected to the transparent electrode layer.

[0018] In some embodiments, the first electrode layers of adjacent light-emitting units are integrally connected, the transparent electrode layers of adjacent light-emitting units are integrally connected, and a plurality of first electrode contacts of the driving substrate are respectively located between adjacent epitaxial layers;

[0019] The integrally connected first electrode layer and the integrally connected transparent electrode layer have first openings at corresponding positions of each first electrode contact.

[0020] In some embodiments, the microdisplay chip further includes: a passivation layer;

[0021] Wherein, the passivation layer includes:

[0022] A first passivation layer located on the top surface of each epitaxial layer, and the first passivation layer has second openings corresponding to the top surface of each epitaxial layer;

[0023] A second passivation layer located on the side surface of each epitaxial layer, the top surface of the transparent electrode layer, and the side surface of each first opening;

[0024] The first passivation layer and the second passivation layer are integrally connected, and the passivation layer exposes a plurality of first electrode contacts.

[0025] In some embodiments, each light-emitting unit further includes: a second electrode layer;

[0026] Wherein, the second electrode layer is located on the passivation layer;

[0027] The second electrode layer connects the epitaxial layer and the corresponding first electrode contact through the second opening.

[0028] In a second aspect, a method for manufacturing a microdisplay chip is provided, and the manufacturing method includes:

[0029] Forming a plurality of light-emitting units on a driving substrate that can be individually driven by the driving substrate;

[0030] Wherein, each light-emitting unit includes: a bonding layer and an epitaxial layer;

[0031] The bonding layer includes a first electrode layer, a reflective layer, and a transparent electrode layer arranged in sequence, the first electrode layer and the transparent electrode layer cover the reflective layer, and the epitaxial layer is arranged on the surface of the transparent electrode layer.

[0032] In some embodiments, the manufacturing method includes the following steps:

[0033] Coating a transparent electrode material on an epitaxial material;

[0034] Coating a first electrode material on a driving substrate, and forming a plurality of reflective layers on the first electrode material, wherein each reflective layer is located between adjacent first electrode contacts of the driving substrate;

[0035] Bond the transparent electrode material facing the first electrode material;

[0036] Form multiple epitaxial layers, and open first openings at each first electrode contact of the transparent electrode material and the first electrode material, wherein each epitaxial layer faces each reflective layer respectively.

[0037] In some embodiments, forming a transparent electrode material on an epitaxial material includes:

[0038] Provide a substrate;

[0039] Deposit epitaxial material on the substrate by vacuum evaporation coating;

[0040] Deposit transparent electrode material on the epitaxial material by vacuum evaporation coating and perform high-temperature annealing.

[0041] In some embodiments, depositing a first electrode material on a driving substrate and forming multiple reflective layers on the first electrode material includes:

[0042] Deposit the first electrode material on the driving substrate by vacuum sputtering coating or vacuum ion coating;

[0043] Deposit a reflective material on the first electrode material by vacuum evaporation coating;

[0044] Etch the reflective material according to the pattern designed by the first patterning mask to form multiple reflective layers.

[0045] In some embodiments, bonding the transparent electrode material facing the first electrode material includes:

[0046] Bond the transparent electrode material and the first electrode layer material by high pressure and high temperature;

[0047] Remove the substrate.

[0048] In some embodiments, forming multiple epitaxial layers and opening first openings at each first electrode contact of the transparent electrode material and the first electrode material includes:

[0049] Etch the epitaxial material into a stepped structure, and the stepped structure makes the epitaxial material form multiple epitaxial layers;

[0050] Etch the transparent electrode material and the first electrode material according to the mesa pattern designed by the second patterning mask to form first openings corresponding to each first electrode contact.

[0051] In some embodiments, the preparation method further includes:

[0052] Deposit a passivation material;

[0053] Etch the passivation material corresponding to the top surface of each epitaxial layer to form a second opening;

[0054] Etch the passivation material corresponding to each first electrode contact to expose each first electrode contact.

[0055] In some embodiments, the manufacturing method further includes:

[0056] Evaporate and deposit a second electrode material;

[0057] Etch the second electrode material to form a plurality of second electrode layers, and each second electrode layer connects the epitaxial layer and the corresponding first electrode contact through the second opening respectively.

[0058] The above at least one technical solution adopted in the embodiments of the present application can achieve the following beneficial effects:

[0059] The chip provided in the present application includes: a driving substrate, and a plurality of light-emitting units arranged on the driving substrate and capable of being individually driven by the driving substrate respectively; each light-emitting unit includes: a bonding layer and an epitaxial layer; wherein, the bonding layer includes a first electrode layer, a reflective layer and a transparent electrode layer arranged in sequence, the first electrode layer and the transparent electrode layer cover the reflective layer, and the epitaxial layer is arranged on the surface of the transparent electrode layer.

[0060] In the micro-display chip proposed in the present application, the reflective layer is sealed by the first electrode layer and the transparent electrode layer, that is, the reflective layer is "embedded" in the bonding layer. In the subsequent process treatment, the high-reflectivity material will not overflow, and irreparable defects will not occur, thereby improving the yield of Micro-LED.

[0061] In the micro-display chip proposed in the present application, the adhesion between the reflective layer and the first electrode layer, and between the reflective layer and the transparent electrode layer is better. The reflective layer is covered by the first electrode layer and the transparent electrode layer, improving the antioxidant stability of the reflective layer and ensuring the quality and life of the micro-display chip.

[0062] In the micro-display chip proposed in the present application, the transparent electrode layer adopts a conductive high-transparency thin film material, and is subjected to high-temperature annealing treatment to further improve the transmittance, ensure the reflective brightness of the reflective layer, and further improve the light-emitting brightness. Description of the Drawings

[0063] The drawings described herein are used to provide a further understanding of the present application, and constitute a part of the present application. The schematic embodiments of the present application and their descriptions are used to explain the present application, and do not constitute an improper limitation to the present application. In the drawings:

[0064] Figure 1 A schematic structural diagram of a micro-display chip according to an embodiment of the present application is shown;

[0065] Figure 2 Schematic flow chart showing a method for fabricating a microdisplay chip according to an embodiment of the present application;

[0066] Figure 3 Schematic diagram showing the structure after depositing an epitaxial material on a substrate according to an embodiment of the present application;

[0067] Figure 4 Schematic diagram showing the structure after depositing a transparent electrode material on the epitaxial material according to an embodiment of the present application;

[0068] Figure 5 Schematic diagram showing the structure after depositing a first electrode material on a driving substrate according to an embodiment of the present application;

[0069] Figure 6 Schematic diagram showing the structure after depositing a reflective material on the first electrode material according to an embodiment of the present application;

[0070] Figure 7 Schematic diagram showing the structure after etching the reflective material according to an embodiment of the present application;

[0071] Figure 8 Schematic diagram showing bonding according to an embodiment of the present application;

[0072] Figure 9 Schematic diagram showing the structure after bonding according to an embodiment of the present application;

[0073] Figure 10 Schematic diagram showing the structure after etching the epitaxial material according to an embodiment of the present application;

[0074] Figure 11 Schematic diagram showing the structure after etching the bonding structure according to an embodiment of the present application;

[0075] Figure 12 Schematic diagram showing the structure after forming a passivation layer according to an embodiment of the present application;

[0076] Figure 13 Schematic diagram showing the structure after forming a second electrode layer according to an embodiment of the present application. Detailed implementation manners

[0077] Exemplary embodiments of the present application will be described in more detail below. However, it should be understood that the present application can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided so that the present application can be more thoroughly understood and the scope of the present application can be fully conveyed to those skilled in the art.

[0078] The disclosure of the present invention provides many different embodiments or examples for implementing different structures of the present invention. To simplify the disclosure of the present invention, components and settings of specific examples are described in the present invention. Of course, they are only examples and are not intended to limit the present invention. In addition, the present invention may repeat reference numerals and / or reference letters in different examples. Such repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present invention provides examples of various specific processes and materials, but those of ordinary skill in the art may be aware of the application of other processes and / or the use of other materials.

[0079] Generally, terms can be understood at least in part based on their usage in the present invention. For example, the term "one or more" used in the present invention can be understood at least in part based on the present invention, and can be used to describe any component, structure, or feature in the singular form, or can be used to describe a combination of components, structures, or features in the plural form. Similarly, terms such as "a", "an", or "the" can also be understood at least in part based on the present invention to convey singular usage or convey plural usage. Additionally, the term "based on..." can be understood as not necessarily intended to convey a set of exclusive factors, but instead, at least in part depending on the context, allows for the existence of additional factors that do not necessarily have to be explicitly described.

[0080] It should be noted that in the description of the present application, the meanings of terms such as "on", "above", "over", "above" should be interpreted in the broadest sense, meaning that the description containing these terms is interpreted as "a component can be arranged on another component in a directly contacting manner, or there can be intermediate components or layers between the components".

[0081] For ease of description, the present application may also use spatial relative terms such as "under", "beneath", "below", "underneath", "upper", "lower", etc. to describe the relationship between one component and another component shown in the drawings. In addition to the orientations described in the figures, the spatial relative terms are also intended to cover different orientations of the device during use or operation. The device can be oriented in other ways, and the spatial relative descriptions used in the present application can be correspondingly interpreted in the same way.

[0082] In the present application, the term "layer" refers to a portion of a material that includes a region having a certain thickness. The layer may extend over the entire underlying or overlying structure, or may extend over a partial extent of the underlying or overlying structure. In addition, the layer may be a region of a homogeneous or inhomogeneous continuous structure, the thickness of which is less than the thickness of the continuous structure. For example, the layer may be located between the top surface and the bottom surface of the continuous structure or between any pair of horizontal planes therebetween. The layer may extend horizontally, vertically, and / or along a conical surface. The substrate may be a layer, may include one or more layers therein, and / or may have one or more layers thereon, above, and / or below it. A layer may include multiple layers. For example, a semiconductor layer may include one or more doped or undoped semiconductor layers and may have the same or different materials.

[0083] Figure 1 The structural schematic diagram of a microdisplay chip proposed in an embodiment of the present application is shown. In Figure 1 the horizontal direction may correspond to the extension direction of the cross-section of the microdisplay chip, and the vertical direction may correspond to the ideal light beam propagation direction of the microdisplay chip.

[0084] Referring to Figure 1 , the microdisplay chip may include: a driving substrate 11, and a plurality of light-emitting units 12 arranged on the driving substrate 11 and capable of being individually driven by the driving substrate 11 respectively. Each light-emitting unit 12 includes: a bonding layer 121 and an epitaxial layer 122; wherein, the bonding layer 121 includes a first electrode layer 1211, a reflective layer 1212, and a transparent electrode layer 1213 arranged in sequence, the first electrode layer 1211 and the transparent electrode layer 1213 cover the reflective layer 1212, and the epitaxial layer 122 is disposed on the surface of the transparent electrode layer 1213.

[0085] The plurality of light-emitting units 12 may be arranged on the driving substrate 11 in a regular or irregular manner as the pixels of the microdisplay chip. The driving substrate 11 may refer to the control panel of the plurality of light-emitting units 12. The driving substrate 11 generates a driving signal based on the image to be displayed and applies it to the plurality of light-emitting units 12, so that each light-emitting unit 12 independently emits a light beam in response to the driving signal.

[0086] In some embodiments, the driving substrate 11 includes: a silicon-based CMOS backplane or a thin-film field-effect transistor.

[0087] The driving substrate 11 may include a substrate, a driving circuit, and a plurality of first electrode contacts 112 connected to the driving circuit. Among them, the driving substrate 11 may be provided with a circuit layer including a silicon-based CMOS (Complementary Metal Oxide Semiconductor) backplane, a TFT glass substrate, or a thin-film field-effect transistor, etc., to constitute the driving circuit. The material of the substrate may include semiconductor materials such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, cobalt phosphide, etc.; it may also include non-conductive materials such as glass, plastic, sapphire wafers, etc. The driving substrate 11 may be bonded to the corresponding light-emitting unit 12 through each first electrode contact 112.

[0088] For each light-emitting unit 12, it includes a bonding layer 121 and an epitaxial layer 122 stacked in sequence on the driving substrate 11. The bonding layer 121 includes a first electrode layer 1211, a reflective layer 1212, and a transparent electrode layer 1213 stacked in sequence on the driving substrate 11.

[0089] In some embodiments, the first electrode layer 1211 may be a conductive thin-film material, and the conductive thin-film material may include metal conductive thin films such as Cr, Ti, Pt, Au, Al, Cu, Ge, Ni, Sn, Ag, or Pb, etc., or non-metal conductive thin films such as indium tin oxide.

[0090] In some embodiments, the transparent electrode layer 1213 may be a conductive high-transparency thin-film material, and the conductive high-transparency thin-film material may include: indium tin compounds, conductive SiO2, conductive PI, molybdenum, silver, etc.

[0091] In some embodiments, the reflective layer 1212 may be a high-reflectivity material, and the high-reflectivity material may include Ag, Cu, Al, Pd, Ni, or Rh, etc.

[0092] During the preparation process of the microdisplay chip, if operations such as etching cause the reflective layer 1212 to splash onto the sidewalls of the first electrode layer 1211 and / or the transparent electrode layer 1213 and / or the epitaxial layer 122, it will cause irreparable defects in the microdisplay chip, which will not only affect the light-emitting effect but also reduce the yield of the microdisplay chip. Therefore, in order to ensure that the reflective layer 1212 does not overflow, the size of the reflective layer 1212 is limited as follows.

[0093] The size of the reflective layer 1212 is smaller than the sizes of the first electrode layer 1211 and the transparent electrode layer 1213. That is, the sizes of the first electrode layer 1211 and the transparent electrode layer 1213 are the same, serving as the size of the light-emitting point mesa. The size of the reflective layer 1212 needs to be smaller than the size of the light-emitting point mesa. For example, the size of the light-emitting point mesa can be 2 μm in diameter, then the diameter of the reflective layer 1212 is less than 2 μm. The reflective layer 1212 can be located at the center of the first electrode layer 1211. The upper surface and the side surfaces of the reflective layer 1212 are covered by the transparent electrode layer 1213. The lower surface of the transparent electrode layer 1213 that does not cover the reflective layer 1212 is bonded to the upper surface of the first electrode layer 1211 where the reflective layer 1212 is not provided.

[0094] In some embodiments, the thickness of the reflective layer 1212 is greater than 10 nm to ensure a good light-emitting effect.

[0095] In some embodiments, the epitaxial layer 122 includes: a first semiconductor layer, a light-emitting layer, and a second semiconductor layer; wherein, the first semiconductor layer is connected to the transparent electrode layer 1213.

[0096] For each epitaxial layer 122, it includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer that are sequentially stacked on the transparent electrode layer 1213. The first semiconductor layer and the transparent electrode layer 1213 can be continuously provided to improve the adhesion between the epitaxial layer 122 and the bonding layer 121 and prevent the epitaxial layer 122 from peeling off.

[0097] The sidewall of the epitaxial layer 122 can be inclined relative to the light-emitting surface, and the angle between the sidewall of the epitaxial layer 122 and the top surface can be an obtuse angle. That is, each light-emitting unit 12 is a trapezoidal structure and forms a trapezoidal light-emitting unit 12 array. Since the trapezoidal sidewall can reflect light, the trapezoidal sidewall helps to improve the light-emitting efficiency of the light-emitting unit 12.

[0098] The first semiconductor layer and / or the second semiconductor layer can be a doped semiconductor layer. At this time, the first semiconductor layer and / or the second semiconductor layer can include one or more layers based on II-VI materials (such as ZnSe or ZnO) or III-V materials (such as GaN, AlN, InN, InGaN, GaP, AlInGaP, AlGaAs and their alloys).

[0099] The light-emitting layer recombines the holes provided by the first semiconductor layer and the electrons provided by the second semiconductor layer and emits light of a specific wavelength. The light-emitting layer can have a single quantum well structure or a multi-quantum well structure with well layers and barrier layers alternately stacked.

[0100] In some embodiments, the epitaxial layer 122 can use a blue light-emitting material.

[0101] In some embodiments, the first electrode layers 1211 of adjacent light-emitting units 12 are integrally connected, the transparent electrode layers 1213 of adjacent light-emitting units 12 are integrally connected, and the plurality of first electrode contacts 112 of the driving substrate 11 are respectively located between adjacent epitaxial layers 122; the integrally connected first electrode layer 1211 and the integrally connected transparent electrode layer 1213 have first openings at positions corresponding to each first electrode contact 112.

[0102] Although each light-emitting unit 12 includes a first electrode layer 1211, the first electrode layers 1211 of each light-emitting unit 12 can be integrally connected and have only first openings at positions corresponding to the first electrode contacts 112. Although each light-emitting unit 12 includes a transparent electrode layer 1213, the transparent electrode layers 1213 of each light-emitting unit 12 can be integrally connected and have only first openings at positions corresponding to the first electrode contacts 112. That is, it is equivalent to each light-emitting unit 12 sharing the integrally connected first electrode layer 1211 and transparent electrode layer 1213.

[0103] In some embodiments, the microdisplay chip further includes: a passivation layer 123; wherein, the passivation layer 123 includes: a first passivation layer located on the top surface of each epitaxial layer 122, and the first passivation layer has second openings corresponding to the top surface of each epitaxial layer 122; a second passivation layer located on the side surface of each epitaxial layer 122, the top surface of the transparent electrode layer 1213, and the side surface of each first opening; the first passivation layer and the second passivation layer are integrally connected, and the passivation layer 123 exposes the plurality of first electrode contacts 112.

[0104] Second openings are formed on the top surface of the epitaxial layer 122, so that the second semiconductor layer of the epitaxial layer 122 is exposed through the second openings. The passivation layer 123 is deposited on the side surface of each first opening to expose the first electrode contacts 112. The passivation layer 123 can be used to protect and isolate the light-emitting points.

[0105] The passivation layer 123 and the epitaxial layer 122 may have different refractive indexes. By adjusting the inclination angle of the passivation layer 123, the light formed by the epitaxial layer 122 is totally reflected into the epitaxial layer 122, so that light only exits from the second openings. The material of the passivation layer 123 includes inorganic materials or organic materials. The inorganic materials include at least one of SiO2, Al2O3, ZrO2, TiO2, SiN, and HfO2; the organic materials include at least one of black matrix photoresist, color filter photoresist, polyimide, bank, overcoat, near-ultraviolet negative photoresist, and benzocyclobutene.

[0106] In some embodiments, each light-emitting unit 12 further includes: a second electrode layer 124; wherein, the second electrode layer 124 is located on the passivation layer 123; the second electrode layer 124 connects the epitaxial layer 122 and the corresponding first electrode contact 112 through the second opening.

[0107] The second electrode layer 124 may be located outside the passivation layer 123. One end of the second electrode layer 124 may be electrically connected to the second semiconductor layer of the epitaxial layer 122 through a second opening, and the other end of the second electrode layer 124 is electrically connected to the corresponding first electrode contact 112. At this time, the light-emitting unit 12 is individually driven through the corresponding first electrode contact 112.

[0108] The second electrode layer 124 may adopt a transparent conductive thin film.

[0109] The present application also provides a method for manufacturing a microdisplay chip, which includes:

[0110] Forming a plurality of light-emitting units on the driving substrate that can be individually driven by the driving substrate;

[0111] Wherein, each light-emitting unit includes: a bonding layer and an epitaxial layer;

[0112] The bonding layer includes a first electrode layer, a reflective layer, and a transparent electrode layer arranged in sequence. The first electrode layer and the transparent electrode layer cover the reflective layer, and the epitaxial layer is disposed on the surface of the transparent electrode layer.

[0113] Figure 2 Shows a schematic flow chart of the method for manufacturing a microdisplay chip proposed in an embodiment of the present application. Referring to Figure 2 , the present application provides a method for manufacturing a microdisplay chip. The manufacturing method includes the following steps:

[0114] S1, plating a transparent electrode material 1213-1 on the epitaxial material 122-1;

[0115] S2, plating a first electrode material 1211-1 on the driving substrate 11, and forming a plurality of reflective layers 1212 on the first electrode material 1211-1, wherein each reflective layer 1212 is located between adjacent first electrode contacts 112 of the driving substrate 11;

[0116] S3, bonding the transparent electrode material 1213-1 and the first electrode material 1211-1 face to face;

[0117] S4, forming a plurality of epitaxial layers 122, and opening first openings at the positions corresponding to each first electrode contact 112 of the transparent electrode material 1213-1 and the first electrode material 1211-1, wherein each epitaxial layer 122 is respectively face to face with each reflective layer 1212.

[0118] In some embodiments, the manufacturing method further includes:

[0119] S5, depositing a passivation material;

[0120] S6, etch the passivation material for each top surface of the epitaxial layer 122 to form a second opening, and etch the passivation material at each first electrode contact 112 to expose the first electrode contact 112.

[0121] In some embodiments, the preparation method further includes:

[0122] S7, evaporate and deposit a second electrode material;

[0123] S8, etch the second electrode material to form a plurality of second electrode layers 124, and each second electrode layer 124 connects the epitaxial layer 122 and the corresponding first electrode contact 112 through the second opening respectively.

[0124] Figures 3 to 13 Shows schematic diagrams of different stages in the preparation process of the microdisplay chip.

[0125] See Figures 3 to 4 , deposit a transparent electrode material 1213-1 on the epitaxial material 122-1.

[0126] In some embodiments, provide a substrate 13; deposit an epitaxial material 122-1 on the substrate 13 by vacuum evaporation coating, as Figure 3 shown; deposit a transparent electrode material 1213-1 on the epitaxial material 122-1 by vacuum evaporation coating, and perform high-temperature annealing, as Figure 4 shown.

[0127] The substrate 13 can be a semiconductor material, such as silicon, gallium nitride, etc.; or the substrate 13 can be a non-conductive material, such as sapphire or glass, etc. The epitaxial material 122-1 can adopt a blue light emitting material.

[0128] Deposit a transparent electrode material 1213-1 on the surface of the epitaxial material 122-1, and then perform high-temperature annealing treatment to further improve the light transmittance of the transparent electrode material 1213-1, so as to ensure the brightness of the reflective layer 1212. The transparent electrode material 1213-1 can include materials such as indium tin compounds, conductive SiO2, conductive PI, molybdenum, silver, etc.

[0129] See Figures 5 to 7 , deposit a first electrode material 1211-1 on the driving substrate 11, and form a plurality of reflective layers 1212 on the first electrode material 1211-1.

[0130] In some embodiments, deposit a first electrode material 1211-1 on the driving substrate 11 by vacuum sputtering coating or vacuum ion coating, as Figure 5 shown; deposit a reflective material 1212-1 on the first electrode material 1211-1 by vacuum evaporation coating, as Figure 6As shown; the reflective material 1212-1 is etched according to the pattern designed by the first patterning mask to form a plurality of reflective layers 1212, such as Figure 7 shown.

[0131] The driving substrate 11 can be a silicon-based CMOS backplane or a thin-film field-effect transistor. The driving substrate 11 includes a plurality of first electrode contacts 112.

[0132] The first electrode material 1211-1 is deposited on the driving substrate 11 by means of vacuum sputtering coating or vacuum ion coating, and the reflective material 1212-1 is evaporated on the first electrode material 1211-1. The first electrode material 1211-1 can be a conductive thin-film material, and the reflective material 1212-1 can be a highly reflective material. The thickness of the reflective material 1212-1 is greater than 10 nm.

[0133] According to the pattern designed by the first patterning mask, the reflective material 1212-1 is etched to form a plurality of reflective layers 1212. Each reflective layer 1212 is located between adjacent first electrode contacts 112 of the driving substrate 11.

[0134] See Figures 8 to 9 , and the transparent electrode material 1213-1 is bonded to the first electrode material 1211-1 face to face.

[0135] In some embodiments, the transparent electrode material 1213-1 and the first electrode material 1211-1 are bonded by means of high pressure and high temperature, such as Figure 8 shown; the substrate 13 is removed, such as Figure 9 shown.

[0136] The substrate 13 coated with the epitaxial material 122-1 and the transparent electrode material 1213-1 is turned over and bonded to the driving substrate 11 coated with the first electrode material 1211-1 and formed with the reflective layers 1212, so that a plurality of reflective layers 1212 are "embedded" between the transparent electrode material 1213-1 and the first electrode material 1211-1 to form a bonding structure.

[0137] The method for removing the substrate 13 can include, but is not limited to, laser lift-off, dry etching, wet etching, mechanical polishing, etc.

[0138] See Figures 10 to 11 , a plurality of epitaxial layers 122 are formed, and first openings are formed at each first electrode contact 112 corresponding to the transparent electrode material 1213-1 and the first electrode material 1211-1.

[0139] In some embodiments, the epitaxial material 122-1 is etched into a stepped structure, and the stepped structure causes the epitaxial material 122-1 to form a plurality of epitaxial layers 122, such as Figure 10As shown; according to the mesa pattern designed by the second patterning mask, the transparent electrode material 1213-1 and the first electrode material 1211-1 are etched to form first openings corresponding to each first electrode contact 112, as Figure 11 shown.

[0140] The epitaxial material 122-1 is etched into a stepped structure, which disconnects and electrically isolates the first semiconductor layer, the second semiconductor layer, and the light-emitting layer of adjacent light-emitting units 12 from each other.

[0141] Under the mesa pattern designed by the second patterning mask, after etching, the first electrode layer 1211 and the transparent electrode layer 1213 expose the first electrode contact 112, and ensure that the reflective layer 1212 is "embedded" in the first electrode layer 1211 and the transparent electrode layer 1213.

[0142] During the process of etching the epitaxial material 122-1 and / or the bonding structure, the reflective layer 1212 will not overflow, and will not splash back onto the sidewalls of the first electrode layer 1211, the transparent electrode layer 1213, and the epitaxial layer 122, thereby avoiding irreversible defects and improving the yield.

[0143] See Figure 12 , deposit a passivation material, and etch the passivation material to form a passivation layer 123.

[0144] In some embodiments, the passivation material is deposited by plasma-enhanced chemical vapor deposition; according to the mesa pattern designed by the third patterning mask, the passivation material is etched to form second openings corresponding to the top surfaces of each epitaxial layer 122, and openings exposing the first electrode contacts 112.

[0145] The passivation material can be an inorganic or organic dielectric material, which is used to passivate the light-emitting points and provide electrical isolation.

[0146] The passivation material can be evaporated, or deposited by PECVD (plasma-enhanced chemical vapor deposition).

[0147] See Figure 13 , evaporate the second electrode material, and etch the second electrode material to form a plurality of second electrode layers 124.

[0148] In some embodiments, the second electrode material is deposited by vacuum evaporation coating; according to the mesa pattern designed by the fourth patterning mask, the second electrode material is etched to form a plurality of second electrode layers 124, and each second electrode layer 124 connects the epitaxial layer 122 and the corresponding first electrode contact 112 through the second opening respectively.

[0149] The second electrode material can be a transparent conductive thin film.

[0150] Compared with the prior art, such as Chinese patent documents CN115498088A and CN114824047A, etc., for the microdisplay chip proposed in this application, the reflective layer is sealed by the first electrode layer and the transparent electrode layer, that is, the reflective layer is "embedded" in the bonding layer. During subsequent process treatments, the highly reflective material will not overflow and irreversible defects will not occur, thereby improving the yield of Micro-LEDs.

[0151] For the microdisplay chip proposed in this application, the adhesion between the reflective layer and the first electrode layer, and between the reflective layer and the transparent electrode layer is better. The reflective layer is coated by the first electrode layer and the transparent electrode layer, improving the antioxidant stability of the reflective layer and ensuring the quality and lifespan of the microdisplay chip.

[0152] For the microdisplay chip proposed in this application, the transparent electrode layer uses a conductive and highly light-transmissive thin film material, and high-temperature annealing treatment is carried out to further improve the transmittance, ensuring the reflective brightness of the reflective layer, and thus enhancing the emission brightness.

[0153] As described above, the above is only the specific implementation manner of this application. Under the above teachings of this application, those skilled in the art can make other improvements or deformations based on the above embodiments. Those skilled in the art should understand that the above specific description is only a better explanation of the purpose of this application, and the protection scope of this application should be subject to the protection scope of the claims.

[0154] In addition, those skilled in the art can understand that although some of the embodiments described herein include certain features included in other embodiments but not other features, the combination of the features of different embodiments means that it is within the scope of this application and forms different embodiments. For example, in the following claims, any one of the claimed embodiments can be used in any combination.

Claims

1. A micro display chip, characterized in that: The micro display chip includes: a driving substrate, and a plurality of light emitting units arranged on the driving substrate and capable of being driven individually by the driving substrate; Each of the light-emitting units comprises: a bonding layer and an epitaxial layer; The bonding layer includes a first electrode layer, a reflective layer and a transparent electrode layer which are arranged in sequence, the first electrode layer and the transparent electrode layer cover the reflective layer, and the epitaxial layer is arranged on the surface of the transparent electrode layer; The reflective layer is disposed on a portion of the surface of the first electrode layer, and the transparent electrode layer covers the reflective layer and is disposed on the other surface of the first electrode layer.

2. The micro display chip according to claim 1, characterized in that: The first electrode layer is made of a conductive film material, and the conductive film material includes at least one of Cr, Ti, Pt, Au, Al, Cu, Ge, Ni, Sn, Ag, Pb or indium tin oxide.

3. The micro display chip according to claim 1, characterized in that: The reflective layer is made of a highly reflective material, and the highly reflective material includes at least one of Ag, Cu, Al, Pd, Ni, and Rh.

4. The micro display chip according to claim 1, characterized in that: The thickness of the light reflecting layer is greater than 10 nm.

5. The micro display chip according to claim 1, characterized in that: The transparent electrode layer is made of a conductive high-light-transmittance film material, and the conductive high-light-transmittance film material includes: at least one of indium tin compound, conductive SiO2, conductive PI, molybdenum, and silver.

6. The micro display chip according to claim 1, characterized in that: The epitaxial layer includes: a first semiconductor layer, a light-emitting layer and a second semiconductor layer which are arranged in sequence, and the first semiconductor layer is connected to the transparent electrode layer.

7. The micro display chip according to claim 1, characterized in that: The first electrode layers of adjacent light-emitting units are connected as one, the transparent electrode layers of adjacent light-emitting units are connected as one, and a plurality of first electrode contacts of the driving substrate are respectively located between adjacent epitaxial layers; The first electrode layer connected in one piece and the transparent electrode layer connected in one piece have a first opening at a location corresponding to each of the first electrode contacts.

8. The micro display chip according to claim 7, characterized in that: The micro display chip further comprises: a passivation layer; Wherein, the passivation layer comprises: A first passivation layer located on the top surface of each epitaxial layer, wherein the first passivation layer has a second opening corresponding to the top surface of each epitaxial layer; A second passivation layer located on each side surface of the epitaxial layer, the top surface of the transparent electrode layer, and each side surface of the first opening; The first passivation layer is integrally connected to the second passivation layer, and the passivation layer exposes a plurality of the first electrode contacts.

9. The micro display chip according to claim 8, characterized in that: Each of the light-emitting units further comprises: a second electrode layer; Wherein, the second electrode layer is located on the passivation layer; The second electrode layer connects the epitaxial layer and the corresponding first electrode contact through the second opening.

10. A method for preparing a micro display chip, characterized in that: The preparation method comprises: forming a plurality of light emitting units on a driving substrate, each of which can be driven individually by the driving substrate; Wherein, each of the light-emitting units comprises: a bonding layer and an epitaxial layer; The bonding layer comprises a first electrode layer, a reflective layer and a transparent electrode layer which are arranged in sequence, the first electrode layer and the transparent electrode layer cover the reflective layer, and the epitaxial layer is arranged on the surface of the transparent electrode layer; The light reflecting layer is disposed on a portion of the surface of the first electrode layer, and the transparent electrode layer covers the light reflecting layer and is disposed on the other surface of the first electrode layer.

11. The method for preparing a micro display chip according to claim 10, characterized in that: The preparation method comprises the following steps: coating a transparent electrode material on the epitaxial material; Plating a first electrode material on the driving substrate, and forming a plurality of the light reflecting layers on the first electrode material, wherein each of the light reflecting layers is located between adjacent first electrode contacts of the driving substrate; Bonding the transparent electrode material and the first electrode material facing each other; A plurality of epitaxial layers are formed, and a first opening is opened in the transparent electrode material and the first electrode material at a position corresponding to each of the first electrode contacts, wherein each of the epitaxial layers is directly opposite to each of the light reflecting layers.

12. The method for preparing a micro display chip according to claim 11, characterized in that: The step of plating a transparent electrode material on the epitaxial material comprises: providing a substrate; coating the epitaxial material on the substrate by vacuum evaporation coating; The transparent electrode material is plated on the epitaxial material by vacuum evaporation coating, and high-temperature annealing is performed.

13. The method for preparing a micro display chip according to claim 11, characterized in that: The step of plating a first electrode material on the driving substrate and forming a plurality of light reflecting layers on the first electrode material comprises: Plating the first electrode material on the driving substrate by vacuum sputtering or vacuum ion plating; coating the first electrode material with a reflective material by vacuum evaporation coating; The reflective material is etched according to the pattern designed by the first patterned mask to form a plurality of reflective layers.

14. The method for preparing a micro display chip according to claim 12, characterized in that: The step of bonding the transparent electrode material and the first electrode material facing each other comprises: Bonding the transparent electrode material and the first electrode material by means of high pressure and high temperature; The substrate is removed.

15. The method for preparing a micro display chip according to claim 11, characterized in that: The forming of the plurality of epitaxial layers and the opening of a first opening at each of the transparent electrode material and the first electrode material corresponding to each of the first electrode contacts comprises: Etching the epitaxial material into a step structure, wherein the step structure enables the epitaxial material to form a plurality of epitaxial layers; The transparent electrode material and the first electrode material are etched according to the mesa pattern designed by the second patterned mask to form the first opening corresponding to each of the first electrode contacts.

16. The method for preparing a micro display chip according to claim 11, characterized in that: The preparation method further comprises: Depositing passivation materials; Corresponding to the top surface of each epitaxial layer, the passivation material is etched to form a second opening; The passivation material is etched corresponding to each of the first electrode contacts to expose each of the first electrode contacts.

17. The method for preparing a micro display chip according to claim 16, characterized in that: The preparation method further comprises: Evaporating a second electrode material; The second electrode material is etched to form a plurality of second electrode layers, and each of the second electrode layers connects the epitaxial layer and the corresponding first electrode contact through the second opening.

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