Chip Attachment Film, Semiconductor Package Including The Same, And Method Of Manufacturing Semiconductor Package
By using a chip attachment film with improved thickness uniformity in the semiconductor package, the problem of insufficient size and structural reliability of the semiconductor package in the prior art is solved, and a smaller size and higher structural reliability are achieved.
Patent Information
- Application Number
- CN202411465900.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-10-24
- Filing Date
- 2024-10-21
- Publication Date
- 2025-04-25
AI Technical Summary
The existing semiconductor packages have shortcomings in terms of size and structural reliability, especially in terms of thickness uniformity and mechanical properties of the chip attachment film.
A chip attachment film including an adhesive layer and a dispersed organic material filler is employed, with a thickness of about 0.5 μm to about 3 μm, and the average particle diameter of the filler is equal to or greater than about 0.8 times and less than about 1 times the thickness of the chip attachment film.
The size of the semiconductor package is reduced and its structural reliability is improved while maintaining the thickness uniformity of the chip attachment film.
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Figure CN119875526A_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application is based on and claims the benefit of priority from Korean Patent Application No. 10-2023-0143250 filed in the Korean Intellectual Property Office on October 24, 2023, the disclosure of which is incorporated herein in its entirety by reference. Technical Field
[0003] The present invention relates to a chip attach (attachment) film, a semiconductor package (package) including the chip attach film, and a method for manufacturing the semiconductor package. More specifically, the present invention relates to a chip attach film including an organic filler, a semiconductor package including the chip attach film, and a method for manufacturing the semiconductor package. Background Art
[0004] According to the development of the electronics industry and the needs of users, electronic devices have become more compact and lighter. Therefore, for semiconductor packages used in electronic devices, large capacity and high integration may be required. According to the requirements, the semiconductor package can be implemented in a stacked structure of a semiconductor package. In such a semiconductor package structure, the semiconductor chip can be combined and fixed on a package substrate or another semiconductor chip by using a chip attach film. Recently, for the convenience of performing the process, a semiconductor package is manufactured as follows: a chip attach film is attached to the back side of a wafer before a wafer sawing process, and a semiconductor chip with a chip attach film attached to the semiconductor chip is stacked on a package substrate or another semiconductor chip after wafer sawing. Summary of the invention
[0005] Embodiments of the inventive concept may provide a die attach film that is relatively thin and has improved thickness uniformity.
[0006] Embodiments of the inventive concept may provide a semiconductor package having a reduced size and improved structural reliability.
[0007] According to one aspect of the present inventive concept, a chip attach film is provided, comprising: an adhesive layer (adhesive layer), and a filler dispersed in the adhesive layer and comprising an organic material, wherein the thickness of the adhesive layer is about 0.5 μm to about 3 μm, and wherein the average particle diameter of the filler is equal to or greater than about 0.8 times the thickness of the adhesive layer and less than about 1 times the thickness of the adhesive layer.
[0008] According to another aspect of the present invention, a semiconductor package is provided, comprising: a substrate, a first semiconductor chip on the substrate, a chip stack on the substrate, and bonding wires (leads) connected to the chip stack and the substrate, the chip stack comprising a plurality of second semiconductor chips stacked in a second direction and spaced apart from the first semiconductor chip in a first direction, wherein the chip stack further comprises a chip attaching film between the stacked plurality of second semiconductor chips, and wherein the chip attaching film comprises an adhesive layer, and a filler dispersed in the adhesive layer and comprising an organic material, the thickness of the chip attaching film is approximately 0.5 μm to approximately 3 μm, and the average particle diameter of the filler is equal to or greater than approximately 0.8 times the thickness of the chip attaching film and less than approximately 1 times the thickness of the chip attaching film.
[0009] According to another aspect of the present invention, a method for manufacturing a semiconductor package is provided, comprising: mounting a first semiconductor chip on a substrate, forming a chip stack spaced apart from the first semiconductor chip in a first direction on the substrate, forming a bonding wire connected to the chip stack and the substrate, and forming a molding layer on the first semiconductor chip, the chip stack, and the bonding wire, wherein forming the chip stack comprises stacking a plurality of second semiconductor chips in a second direction, the plurality of second semiconductor chips comprising a chip attach film formed on one surface of the plurality of second semiconductor chips, and wherein the chip attach film comprises an adhesive layer, and a filler dispersed in the adhesive layer and comprising an organic material, the thickness of the chip attach film is about 0.5 μm to about 3 μm, and the average particle diameter of the filler is equal to or greater than about 0.8 times the thickness of the chip attach film and less than about 1 times the thickness of the chip attach film. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] The embodiments will be more clearly understood from the following detailed description considered in conjunction with the accompanying drawings, in which:
[0011] Figure 1 is a cross-sectional view of a die attach film according to an embodiment;
[0012] Figure 2 is a conceptual diagram of materials included in a die attach film according to an embodiment;
[0013] Figure 3 is a cross-sectional view of a semiconductor package according to an embodiment;
[0014] Figure 4 for Figure 3 an enlarged view of area EX1 in FIG.
[0015] Figure 5 ,6A , 6B, 7A, 7B, 8, and 9 are cross-sectional views illustrating a method of manufacturing a semiconductor package according to an embodiment. DETAILED DESCRIPTION
[0016] Hereinafter, embodiments of the inventive concept are described in detail with reference to the accompanying drawings. The same reference numerals are used for the same constituent elements in the accompanying drawings, and their repeated descriptions are omitted. As used herein, the term "and / or" includes any and all combinations of one or more of the related enumerated items. Note that the aspects described for one embodiment may be introduced into different embodiments, although not specifically described therewith. That is, all embodiments and / or features of any embodiment may be combined in any manner and / or combination. As used herein, for the specific orientation of the chip attach film and / or semiconductor package illustrated in the accompanying drawings, the horizontal direction or the first direction and the vertical direction or the second direction may be mentioned. It will be understood that the chip attach film and / or the semiconductor package may be oriented in different ways or observed from different viewing angles that change the horizontal and vertical planes.
[0017] Figure 1 is a cross-sectional view of a die attach film 10 according to an embodiment. Figure 2 is a conceptual diagram of materials included in the die attach film 10 according to an embodiment.
[0018] refer to Figure 1 and 2 , the chip attach film 10 may include an adhesive layer 11 and a filler 13. When manufacturing a semiconductor package, the chip attach film 10 may be used as a film for bonding stacked semiconductor chips to each other.
[0019] In an embodiment, the thickness 10H of the chip attach film 10 may be about 0.5 μm to about 3 μm. For example, the thickness 10H of the chip attach film 10 may be about 1 μm. In this example, the thickness 10H of the chip attach film 10 may refer to the vertical or second direction length of the chip attach film 10. When the thickness 10H of the chip attach film 10 is too large, it may be difficult to manufacture an electronic device having a relatively thin profile to which the chip attach film 10 is applied.
[0020] The adhesive layer 11 may have a film shape. Since the adhesive layer 11 has a film shape, the thickness 10H of the die attach film 10 may be substantially the same as the thickness of the adhesive layer 11 .
[0021] The adhesive layer 11 may include a thermosetting polymer TSR and a binder polymer TPR. Figure 2, the thermosetting polymer TSR may be shown as an ellipse, and the binder polymer TPR may be shown as a solid strand. The thermosetting polymer TSR and the binder polymer TPR may be combined with each other by using a curing process and may constitute a polymer matrix, which constitutes the adhesive layer 11. The curing process may include, for example, heat treatment, but the embodiment is not limited thereto.
[0022] In some embodiments, the thermosetting polymer TSR may be one or more selected from the group including, for example, epoxy-based polymers and bismaleimide-based polymers.
[0023] The epoxy-based polymer may include, for example, bisphenol A epoxy resin, bisphenol F epoxy resin, naphthalene epoxy resin, aminophenol epoxy resin, hydrogenated bisphenol epoxy resin, alicyclic epoxy resin, alcohol ether epoxy resin, cycloaliphatic epoxy resin, fluorene epoxy resin, siloxane-based epoxy resin, etc., but the embodiment is not limited thereto. These resins may be used alone or in a mixture of two or more.
[0024] The bismaleimide-based polymer may include a polymer obtained by polymerization of a maleimide monomer including one or more or two or more maleimide groups.
[0025] The maleimide monomer may include, for example, N-phenylmaleimide, N-(2-methylphenyl)maleimide, N-(4-methylphenyl)maleimide, N-(2,6-dimethylphenyl)maleimide, bis(4-maleimidophenyl)methane, 2,2-bis(4-(4-maleimidophenoxy)-phenyl)propane, bis(3,5-dimethyl-4-maleimidophenyl)methane, bis(3-ethyl-5-methyl-4-maleimidophenyl)methane, bis(3,5-diethyl-4-maleimidophenyl)methane, polyphenylmethane bismaleimide (polyphenylmethane bismaleimide), or maleimide having a biphenyl structure (maleimide having a biphenyl structure), but embodiments of the inventive concept are not limited thereto.
[0026] In addition, the bismaleimide-based polymer may be obtained from a prepolymer including a maleimide group, and the prepolymer may include, for example, any one of the following or a mixture of at least two: N-phenylmaleimide prepolymer, N-(2-methylphenyl)maleimide prepolymer, N-(4-methylphenyl)maleimide prepolymer, N-(2,6-methylphenyl)maleimide prepolymer, bis(4-maleimidophenyl)methane prepolymer, 2,2-bis(4-(4-maleimidophenyl)methane prepolymer, oxy)-phenyl) propane prepolymer, bis(3,5-dimethyl-4-maleimidophenyl) methane prepolymer, bis(3-ethyl-5-methyl-4-maleimidophenyl) methane prepolymer, bis(3,5-diethyl-4-maleimidophenyl) methane prepolymer, polyphenylmethane bismaleimide prepolymer, maleimide prepolymer having a biphenyl structure (maleimide prepolymer having a biphenyl structure), prepolymers including N-phenylmaleimide and amine-based compounds, and prepolymers including N- A prepolymer comprising (4-methylphenyl) maleimide and an amine-based compound, a prepolymer comprising N-(2,6-dimethylphenyl) maleimide and an amine-based compound, a prepolymer comprising bis(4-maleimidophenyl) methane and an amine-based compound, a prepolymer comprising 2,2-bis(4-(4-maleimidophenoxy)-phenyl) propane and an amine-based compound, a prepolymer comprising bis(3,5-dimethyl-4-maleimidophenyl) methane and an amine-based compound, a prepolymer comprising bis( 3-ethyl-5-methyl-4-maleimidophenyl)methane and a prepolymer based on an amine compound, a prepolymer including bis(3,5-diethyl-4-maleimidophenyl)methane and an amine-based compound, a prepolymer including maleimide containing a biphenyl structure and an amine-based compound (including a prepolymer including maleimide containing a biphenyl structure and an amine-based compound), or a prepolymer including polyphenylmethane bismaleimide and an amine-based compound, but embodiments of the present inventive concept are not limited thereto.
[0027] In some embodiments, the content of the thermosetting polymer TSR may be about 20 parts by weight to about 60 parts by weight based on 100 parts by weight of the die attach film 10. For example, the content of the thermosetting polymer TSR may be about 20 parts by weight to about 60 parts by weight, about 20 parts by weight to about 50 parts by weight, or about 30 parts by weight to about 50 parts by weight based on 100 parts by weight of the die attach film 10.
[0028] In some embodiments, the binder polymer TPR may include a thermoplastic polymer. The thermoplastic polymer may include one or more materials, for example, an acryl-based polymer and / or a phenoxy-based polymer.
[0029] The acryl-based polymer may include an acryl-based polymer obtained by using radical polymerization using an acryl-based monomer as a raw material.
[0030] In some embodiments, the acryl-based monomer may include, for example, one or more of the following: methyl (meth)acrylate, ethyl (meth)acrylate, propyl (meth)acrylate, isopropyl (meth)acrylate, butyl (meth)acrylate, isobutyl (meth)acrylate, hexyl (meth)acrylate, 2-ethylhexyl (meth)acrylate, n-octyl (meth)acrylate, isooctyl (meth)acrylate, n-nonyl (meth)acrylate, isononyl (meth)acrylate, n-decyl (meth)acrylate, isodecyl (meth)acrylate, n-dodecyl (meth)acrylate, n-tridecyl (meth)acrylate, n-tetradecyl (meth)acrylate, 2-hydroxyethyl (meth)acrylate, 2-hydroxypropyl (meth)acrylate, and 2-ethylhexyl (meth)acrylate. 4-Hydroxybutyl acrylate, 6-hydroxyhexyl (meth)acrylate, 8-hydroxyoctyl (meth)acrylate, 10-hydroxydecyl (meth)acrylate, 12-hydroxydodecyl (meth)acrylate, (4-hydroxymethylcyclohexyl) methacrylate, N-hydroxymethyl (meth)acrylamide, ethylene glycol di(meth)acrylate, diethylene glycol di(meth)acrylate, tetraethylene glycol di(meth)acrylate, neopentyl glycol di(meth)acrylate, 1,6-hexanediol di(meth)acrylate, trimethylolpropane tri(meth)acrylate, pentaerythritol tri(meth)acrylate, dipentaerythritol hexa(meth)acrylate, divinylbenzene, N,N'-methylenebisacrylamide, and the like, but embodiments of the inventive concept are not limited thereto.
[0031] The phenoxy-based polymer may include a polymer obtained by polymerizing monomers such as one or more of the following: phenoxyethyl acrylate, phenoxy glycol acrylate, phenoxy polyethylene glycol acrylate, nonylphenoxy polyethylene glycol acrylate, nonylphenoxy polypropylene glycol acrylate, nonylphenoxy ethylene glycol acrylate, and (meth) acrylate 2-hydroxy-3-phenoxypropyl ester. In some embodiments, the phenoxy-based polymer may include poly (2,6-dilauryl-1,4-phenylene) ether, poly (2,6-diphenyl-1,4-phenylene) ether, poly (2-methyl-6-phenyl-1,4-phenylene) ether, poly (2,6-dibenzyl-1,4-phenylene) ether, poly (2,6-dimethyl-1,4-phenylene) ether, poly (2,6-diethyl-1,4-phenylene) ether, poly (2-methyl-6-ethyl-1,4-phenylene) ether, poly (2,6-dimethyl-1,4-phenylene) ether, poly (2,6-di ...methyl-1,4-phenylene) propyl-1,4-phenylene) ether, poly(2-ethyl-6-propyl-1,4-phenylene) ether, poly(2-methyl-1,4-phenylene) ether, poly(3-methyl-1,4-phenylene) ether, poly(2-methyl-6-allyl-1,4-phenylene) ether, poly(2,3,6-trimethyl-1,4-phenylene) ether, poly(2,3,5,6-tetramethyl-1,4-phenylene) ether, poly(2,5-dimethyl-1,4-phenylene) ether, etc., but embodiments of the inventive concept are not limited thereto.
[0032] In some embodiments, the content of the binder polymer TPR may be about 10 parts by weight to about 40 parts by weight based on 100 parts by weight of the die attach film 10. For example, the content of the thermosetting polymer TSR may be about 10 parts by weight to about 40 parts by weight, about 20 parts by weight to about 40 parts by weight, or about 30 parts by weight to about 40 parts by weight based on 100 parts by weight of the die attach film 10.
[0033] The filler 13 may be dispersed in the adhesive layer 11. For example, the filler 13 may be dispersed throughout the entire area of the adhesive layer 11. Figure 2 In FIG. 1 , the filler 13 can be shown as a group of circles.
[0034] Even when the die attach film 10 is pressed according to stacking of semiconductor chips during a manufacturing process, the thickness 10H of the die attach film 10 may not be excessively reduced due to the filler 13 supporting the adhesive layer 11 and may be maintained at a certain level.
[0035] In addition, since the filler 13 is dispersed throughout the entire area of the chip attach film 10, even when the chip attach film is pressed when the semiconductor chips are stacked during the manufacturing process of the semiconductor package, the thickness 10H of the chip attach film 10 can be kept relatively uniform throughout the entire area of the chip attach film 10 in which the filler 13 is dispersed. For example, even when the semiconductor chips are stacked and the chip attach film 10 is pressed during the manufacturing process of the semiconductor package, the total thickness uniformity throughout the entire area of the chip attach film 10 can be high, for example, the total thickness variation throughout the entire area of the chip attach film 10 can be about 0.1 μm or less.
[0036] The filler 13 may have a spherical shape. In some embodiments, the filler 13 may include a spherical monodisperse filler. For example, the filler 13 may include a spherical monodisperse filler having an average particle diameter 13H of about 1 μm.
[0037] In some embodiments, the filler 13 may include an organic material. In an embodiment, the filler 13 may include an organic material having a glass transition temperature of about 120°C or less. For example, the filler 13 may include an organic material having a glass transition temperature of about 80°C to about 120°C.
[0038] In some embodiments, filler 13 may include a thermoplastic polymer. The thermoplastic polymer may include, for example, one or more of polystyrene, polymethyl methacrylate, and / or polyurethane.
[0039] In some embodiments, the average particle diameter 13H of the filler 13 may be about 0.8 times or more of the thickness 10H of the chip attach film 10 and less than about 1 times of the thickness 10H of the chip attach film 10. For example, the average particle diameter 13H of the filler 13 may be about 0.9 times the thickness 10H of the chip attach film 10. When the average particle diameter 13H of the filler 13 is too large, there may be limitations in thinning the chip attach film 10. On the contrary, when the average particle diameter 13H of the filler 13 is too small and the chip attach film 10 is pressed when the semiconductor chips are stacked during the manufacturing process of the semiconductor package, the filler 13 may not be able to support the adhesive layer 11, and the thickness 10H of the chip attach film 10 may be excessively reduced.
[0040] In some embodiments, the content of the filler 13 may be about 0.01 parts by weight to about 2 parts by weight based on 100 parts by weight of the die attach film 10. For example, the content of the filler 13 may be about 0.01 parts by weight to about 2 parts by weight, about 0.1 parts by weight to about 2 parts by weight, about 0.5 parts by weight to about 2 parts by weight, or about 1 part by weight to about 2 parts by weight based on 100 parts by weight of the die attach film 10. When the content of the filler 13 is too large, the content of the adhesive layer 11 may be relatively reduced, and thus the mechanical properties of the die attach film 10 may be reduced, and the thermal expansion coefficient of the die attach film 10 may be increased. In addition, when the content of the filler 13 exceeds about 2 parts by weight, it may be difficult to achieve the thickness 10H of the die attach film 10.
[0041] In some embodiments, the die attach film 10 may further include a cross-linking agent. The cross-linking agent may accelerate the curing of the adhesive layer 11 or change the curing reaction temperature of the adhesive layer 11 to room temperature.
[0042] The crosslinking agent may include anhydride-based crosslinking agents such as one or more of tetrahydrophthalic anhydride, methyltetrahydrophthalic anhydride, methylhexahydrophthalic anhydride, hexahydrophthalic anhydride, trialkyltetrahydrophthalic anhydride, phthalic anhydride, maleic anhydride, and pyromellitic anhydride; aromatic amine crosslinking agents such as methylphenylenediamine, diaminophenylmethane, and diaminophenylsulfone; aliphatic amine crosslinking agents such as diethylenetriamine and triethylenetetramine; Amine; phenolic crosslinking agents such as phenol aralkyl type phenolic resin, phenol novolac type phenolic resin, xylok type phenolic resin, cresol novolac type phenolic resin, naphthol type phenolic resin, terpene type phenolic resin, multifunctional phenolic resin, dicyclopentadiene phenolic resin, naphthalene type phenolic resin, and novolac type phenolic resin synthesized from bisphenol A and methyl phenolic resin; latent crosslinking agents such as dicyandiamide; etc., but the embodiments of the present inventive concept are not limited thereto. These crosslinking agents can be used alone or in a mixture of two or more.
[0043] In some embodiments, the die attach film 10 may further include a curing speed regulator.
[0044] The curing speed regulator may include, for example, one or more of 1-methylimidazole, 2-methylimidazole, dimethylbenzylimidazole, 1-decyl-2-methylimidazole, benzyldimethylamine, trimethylamine, triethylamine, diethylaminopropylamine, pyridine, 1,8-diazabicyclo[5.4.0]undec-7-ene, 2-hexadecylimidazole, boron trifluoride monoethylamine, 1-[3-(2-hydroxyphenyl)-prop-2-enyl]imidazole, etc. However, embodiments of the inventive concept are not limited thereto.
[0045] The die attach film 10 according to an embodiment of the present inventive concept may include an adhesive layer 11 and a filler 13 dispersed in the adhesive layer 11, and the average particle diameter 13H of the filler 13 may be about 0.8 times or more of the thickness 10H of the die attach film 10 and less than about 1 times of the thickness 10H of the die attach film 10. Therefore, when manufacturing a semiconductor package, even when the die attach film 10 is pressed when stacking semiconductor chips, the filler 13 may support the adhesive layer 11, and the thickness 10H of the die attach film 10 may not be excessively reduced, but maintained at a substantially constant level. In addition, since the filler 13 is dispersed throughout the entire area of the die attach film 10, the thickness 10H of the die attach film 10 remains relatively uniform throughout the entire area of the die attach film 10. In addition, since the die attach film 10 includes a relatively small content of filler (e.g., about 0.01 parts by weight to about 2 parts by weight for 100 parts by weight of the die attach film 10), the die attach film 10 may be formed to have a relatively small thickness.
[0046] Figure 3 is a cross-sectional view of a semiconductor package 100 according to an embodiment. Figure 4 for Figure 3 Magnified view of area EX1 in FIG.
[0047] refer to Figure 3 and 4 , the semiconductor package 100 may include a substrate 110 , a first semiconductor chip 120 , a chip stack CS, and a mold layer 160 .
[0048] The substrate 110 may include a printed circuit board (PCB), a flexible substrate, a tape substrate, or the like.
[0049] Substrate 110 may include one or more materials such as phenolic resin, epoxy resin, and / or polyimide. For example, substrate 110 may include flame retardant 4 (FR4), tetrafunctional epoxy, polyphenylene oxide, epoxy / polyphenylene oxide, bismaleimide triazine (BT), Thermount, cyanate ester, polyimide, and / or liquid crystal polymer.
[0050] The substrate 110 may include a plurality of lower pads 111 and a plurality of upper pads 113. The plurality of lower pads 111 may be disposed on the lower surface of the substrate 110, and the plurality of upper pads 113 may be disposed on the upper surface of the substrate 110, such as Figure 3 The plurality of lower pads 111 and the plurality of upper pads 113 may be electrically connected to each other via a conductive pattern (not shown) disposed inside the substrate 110. The plurality of lower pads 111, the plurality of upper pads 113, and the conductive pattern may each include a metal such as aluminum, copper, tungsten, and / or titanium.
[0051] A plurality of external connection terminals 171 may be arranged on the lower surface of each of the plurality of lower pads 111. The plurality of external connection terminals 171 may be connected to the plurality of lower pads 111, respectively. The external connection terminals 171 may include, for example, solder balls. The external connection terminals 171 may include a solder material (solder), for example, tin (Sn), silver (Ag), zinc (Zn), and / or a combination thereof.
[0052] The first semiconductor chip 120 may be disposed on the upper surface of the substrate 110. The first semiconductor chip 120 may be disposed in a region of a relatively central portion on the upper surface of the substrate 110.
[0053] The first semiconductor chip 120 may include a first semiconductor substrate 121. The first semiconductor substrate 121 may include semiconductor materials such as silicon (Si) and / or germanium (Ge), and / or compound semiconductor materials such as silicon carbide (SiC), gallium arsenide (GaAs), and / or indium phosphide (InP). The first semiconductor substrate 121 may include a conductive (electrical conductivity) region, for example, a well doped with impurities. The first semiconductor substrate 121 may have various element isolation structures such as a shallow trench isolation (STI) structure.
[0054] The first semiconductor substrate 121 may include a first active surface and a first inactive surface opposite to the first active surface. The first active surface may include multiple types of individual devices. The multiple individual devices may include various microelectronic devices, for example, metal-oxide-semiconductor (MOS) field effect transistors (MOSFETs) like complementary MOS (CMOS) transistors, system large-scale integration (LSI), and image sensors such as CMOS imaging sensors (CIS); and logic devices such as microelectromechanical systems (MEMS), active devices, passive devices, central processing units (CPUs), microprocessors (MPUs), graphics processing units (GPUs), application processors (APs), microcontrollers, and / or application-specific integrated circuits (ASICs).
[0055] The first connection terminal 123 may be arranged under the lower surface of the first semiconductor chip 120. The first connection terminal 123 may electrically connect the first semiconductor chip 120 to the substrate 110. The first connection terminal 123 may include, for example, a solder ball or a solder bump (bump). The first connection terminal 123 may include a solder material, for example, tin (Sn), silver (Ag), zinc (Zn), and / or a combination thereof.
[0056] An under-fill layer 125 may be in a region between a lower surface of the first semiconductor chip 120 and an upper surface of the substrate 110 and at least partially fill the region. The under-fill layer 125 may at least partially surround the first connection terminal 123 disposed under the lower surface of the first semiconductor chip 120. The under-fill layer 125 may include, for example, an insulating material, but embodiments are not limited thereto.
[0057] The chip stack body CS may be arranged above the upper surface of the substrate 110. The chip stack body CS may be horizontally spaced apart from the first semiconductor chip 120 on the substrate 110. For example, the chip stack body CS may be arranged on the substrate 110 on an edge region of the substrate 110 to be horizontally spaced apart from the first semiconductor chip 120. The chip stack body CS may include a plurality of second semiconductor chips 130 stacked in a vertical or second direction on the substrate 110. The plurality of second semiconductor chips 130 included in the chip stack body CS may be stacked in a stepped structure or a cascade structure in a horizontal or first direction.
[0058] In some embodiments, Figure 3 , the chip stack body CS may also be arranged on the first semiconductor chip 120. In this case, the plurality of second semiconductor chips 130 of the chip stack body CS may be stacked in the vertical or second direction on the first semiconductor chip 120, and the second semiconductor chip 130 at the lowermost end among the plurality of second semiconductor chips 130 and the first semiconductor chip 120 may be bonded and fixed to each other by using a chip attach film 140 formed under the inactive surface 131S of the second semiconductor chip 130 located at the lowermost end.
[0059] The plurality of second semiconductor chips 130 may each include a second semiconductor substrate 131. The second semiconductor substrate 131 may have substantially the same material as the first semiconductor substrate 121 of the first semiconductor chip 120. The second semiconductor substrate 131 may include a conductive region, for example, a well doped with impurities. The second semiconductor substrate 131 may have various device isolation structures, such as a shallow trench isolation (STI) structure.
[0060] The second semiconductor substrate 131 may include a second active surface 131F and an inactive surface 131S opposite to the second active surface 131F. Various types of individual devices may be formed on the second active surface 131F of the second semiconductor substrate 131.
[0061] The chip pad 133 may be disposed on the second active surface 131F of the second semiconductor substrate 131. In a plan view, the chip pad 133 may be arranged adjacent to one side surface relatively far from the first semiconductor chip 120 between two side surfaces of the second semiconductor substrate 131. The chip pad 133 may include a metal, for example, aluminum, copper, and / or titanium.
[0062] The chip attach film 140 may be disposed on the inactive surface 131S of each of the plurality of second semiconductor chips 130. The chip attach film 140 may bond and fix the chip stack CS to the substrate 110, and bond and fix the plurality of second semiconductor chips 130 to each other. Since the plurality of second semiconductor chips 130 are stacked in a stepped structure or a cascade structure in the horizontal or first direction, the chip attach film 140 may not cover or overlap the chip pads 133 of each of the plurality of second semiconductor chips 130 in the vertical or second direction.
[0063] The chip attach film 140 may extend and protrude from the side surface of each of the plurality of second semiconductor chips 130 in a lateral direction.
[0064] The die attach film 140 may include an adhesive layer 141 and a filler 143. The adhesive layer 141 and the filler 143 of the die attach film 140 may be respectively Figure 1 and 2 The adhesive layer 11 and the filler 13 of the described die attach film 10 are substantially the same.
[0065] The first semiconductor chip 120 and the second semiconductor chip 130 may include a memory chip or a logic chip. For example, the first semiconductor chip 120 may include a logic chip, and the second semiconductor chip 130 may include a memory chip. The memory chip may include, for example, a volatile memory semiconductor chip such as a dynamic random access memory (RAM) (DRAM) and a static RAM (SRAM), or a non-volatile memory chip such as a phase change RAM (PRAM), a magnetoresistive RAM (MRAM), a ferroelectric RAM (FeRAM), and / or a resistive RAM (RRAM). In addition, the logic chip may include, for example, a microprocessor, an analog element, a digital signal processor, etc.
[0066] In some embodiments, the first semiconductor chip 120 and the second semiconductor chip 130 may include the same type of semiconductor chip. For example, the first semiconductor chip 120 and the second semiconductor chip 130 may include memory chips.
[0067] In some embodiments, the first semiconductor chip 120 and the second semiconductor chip 130 may include different types of semiconductor chips. For example, the first semiconductor chip 120 may include a logic chip, and the second semiconductor chip 130 may include a memory chip.
[0068] The bonding wires 150 may be disposed on the chip pads 133 of each of the plurality of second semiconductor chips 130. The bonding wires 150 may connect the chip pads 133 of the second semiconductor chips 130 to the upper pads 113 of the substrate 110, or may connect the chip pads 133 of each of the plurality of second semiconductor chips 130 to each other. Therefore, the plurality of second semiconductor chips 130 may be electrically connected to the substrate 110 via the bonding wires 150, or the plurality of second semiconductor chips 130 may be electrically connected to each other via the bonding wires 150. The bonding wires 150 may include a metal, for example, gold (Au) or a gold alloy.
[0069] The mold layer 160 may be disposed on the substrate 110. The mold layer 160 may at least partially cover the first semiconductor chip 120, the plurality of second semiconductor chips 130, and the bonding wires 150. The mold layer 160 may include, for example, an epoxy molding compound (EMC) material.
[0070] The semiconductor package 100 according to the embodiment may include a chip stack body CS including a plurality of second semiconductor chips 130 and a chip attach film 140 between each of the plurality of second semiconductor chips 130, the chip attach film 140 including an adhesive layer 141 and a filler 143 dispersed in the adhesive layer 141. In this case, the average particle diameter of the filler 143 may be about 0.8 times or more of the thickness of the chip attach film 140 and less than about 1 times of the thickness of the chip attach film 140. Therefore, when the semiconductor package 100 is manufactured, even when the chip attach film 140 is pressed when the second semiconductor chips 130 are stacked, the filler 143 may support the adhesive layer 141, so that the thickness of the chip attach film 140 may not be excessively reduced, but may be maintained at a substantially constant level, and the thickness of the chip attach film 140 may be relatively uniform over the entire region of the chip attach film 140 in which the filler 143 is dispersed. Therefore, the plurality of second semiconductor chips 130 may not be tilted and stacked, and thus, the structural reliability of the semiconductor package 100 may be improved. In addition, since the chip attach film 140 includes a relatively small content of the filler 143 (e.g., about 0.01 parts by weight to about 2 parts by weight for 100 parts by weight of the chip attach film 140), the chip attach film 140 may have a relatively small thickness. Therefore, the size of the semiconductor package 100 for bonding and fixing the plurality of second semiconductor chips 130 by using the chip attach film 140 may be reduced.
[0071] Figure 5 , 6A 7A, 8, and 9 are cross-sectional views illustrating a method of manufacturing the semiconductor package 100 according to an embodiment. Figure 5 , 6A 7A, 8, and 9 are cross-sectional views of respective operations of the method of manufacturing the semiconductor package 100, and Figure 6B and 7B They are Fig. 6A and 7A An enlarged cross-sectional view of area EX1 in FIG.
[0072] refer to Figure 5 First, the first semiconductor chip 120 may be mounted on the substrate 110. In particular, the first semiconductor chip 120 including the first connection terminal 123 formed on the lower surface thereof may be mounted on a central portion of the substrate 110. Next, the lower filling layer 125 may be in the space between the lower surface of the first semiconductor chip 120 and the upper surface of the substrate 110 and at least partially fill the space.
[0073] Next, refer to Fig. 6A , 6B , 7A, and 7B, by stacking the plurality of second semiconductor chips 130 on the substrate 110 in the vertical or second direction, a chip stack body CS may be formed to be horizontally spaced apart from the first semiconductor chip 120.
[0074] First, a chip attach film 140 may be formed on one surface of a wafer including a plurality of second semiconductor chips 130. The one surface of the wafer may include a ground surface and may correspond to an inactive surface 131S of each of the plurality of second semiconductor chips 130. The chip attach film 140 may be formed by coating the thermosetting polymer (reference Figure 2 TSR in), the binder polymer (reference Figure 2 The TPR in the wafer, the filler 143, etc. are mixed to form an attachment composition, and the attachment composition is laminated on one surface of the wafer. Next, by integrating (singulating) the wafer including the chip attachment film 140 formed on one surface thereof, a plurality of second semiconductor chips 130 including the chip attachment film 140 formed on the inactive surface 131S thereof can be provided.
[0075] The chip attach film 140 formed on the inactive surface 131S of the second semiconductor chip 130 may have a Figure 6B The first thickness H1 in the vertical or second direction shown in , may not extend from the side surface of the second semiconductor chip 130 in the lateral direction, and may have the same horizontal area as the second semiconductor chip 130 .
[0076] Next, the chip stack body CS may be formed by stacking each of the plurality of second semiconductor chips 130 including the chip attach films 140 formed on the respective inactive surfaces 131S of the plurality of second semiconductor chips 130 in the vertical or second direction.
[0077] First, one second semiconductor chip 130 may be arranged on a peripheral (surrounding) region of the substrate 110 horizontally spaced apart from the first semiconductor chip 120. Next, the second semiconductor chip 130 and the substrate 110 may be bonded and fixed to each other by using a die attach film 140 by performing a thermal compression process.
[0078] Next, another second semiconductor chip 130 may be arranged on the one second semiconductor chip 130 that has been arranged on the peripheral area of the substrate 110. In this case, the another second semiconductor chip 130 may be arranged on the one second semiconductor chip 130 so that the another second semiconductor chip 130 forms a step structure or a cascade structure in the horizontal or first direction with the one second semiconductor chip 130. Next, by performing the thermal compression process, the one second semiconductor chip 130 may be bonded and fixed to the another second semiconductor chip 130 by using a die attach film 140.
[0079] Thereafter, by repeatedly performing the above-described stacking process, a chip stack body CS including a plurality of second semiconductor chips 130 may be formed.
[0080] In an embodiment, the thermal pressing process may be performed at a temperature higher than or equal to a glass transition temperature of the filler 143 included in the die attach film 140. For example, the glass transition temperature of the organic material included in the filler 143 may be about 120° C., and the thermal pressing process may be performed at a temperature of about 120° C. or higher.
[0081] On the other hand, in the stacking process of the plurality of second semiconductor chips 130, the die attach film 140 may be pressed by subjecting it to a thermal press process. Figure 7B As shown in FIG. 1 , the chip attach film 140 in the chip stack CS may extend from the side surface of the second semiconductor chip 130 and protrude therefrom.
[0082] In addition, by applying a compression process thereto, the chip attach film 140 may have a Figure 6B The first thickness H1 shown in FIG. is smaller than the second thickness H3. For example, Figure 7B The second thickness H3 shown in FIG. Figure 6B The first thickness H1 shown in FIG. 1 is smaller than a value of about 10% to about 20%. For example, Figure 7BThe second thickness H3 shown in may be about 0.5 μm to about 3 μm. In this case, the second thickness H3 may be greater than the average particle diameter H2 of the filler 143, or may be substantially the same as the average particle diameter H2 of the filler 143. The reason may be that even when the chip attach film 140 is pressed due to the hot pressing process, the filler 143 supports the adhesive layer 141 and the second thickness H3 of the chip attach film 140 remains equal to or greater than the average particle diameter H2. Therefore, the second thickness H3 of the chip attach film 140 may not be excessively reduced even after the hot pressing process is completed, and may be maintained at a substantially constant level.
[0083] Next, refer to Figure 8 , bonding wires 150 may be formed on the chip pads 133 of the plurality of second semiconductor chips 130 and the upper pads 113 of the substrate 110. The bonding wires 150 may be formed by using, for example, heat pressing or ultrasonic waves, but the embodiment is not limited thereto.
[0084] Next, refer to Fig. 9 , a mold layer 160 may be formed on and at least partially cover the first semiconductor chip 120 , the plurality of second semiconductor chips 130 , and the bonding wires 150 .
[0085] Next, by Fig. 9 The resulting product has an external connection terminal 171 formed on the lower pad 111 on the lower surface of the substrate 110, and can be manufactured Figure 3 The semiconductor package 100 is shown in FIG.
[0086] While the present invention has been particularly shown and described with reference to embodiments thereof, it will be understood that various changes in form and details may be made therein without departing from the spirit and scope of the appended claims.
Claims
1. A die attach film comprising: Adhesive layer; and a filler dispersed in the adhesive layer and comprising an organic material, wherein the thickness of the adhesive layer is from about 0.5 μm to about 3 μm, and The average particle diameter of the filler is equal to or greater than about 0.8 times the thickness of the adhesive layer and less than about 1 times the thickness of the adhesive layer. 2 . The die attach film of claim 1 , wherein the filler is included in an amount of about 0.01 parts by weight to about 2 parts by weight based on 100 parts by weight of the die attach film. 3 . The die attach film of claim 1 , wherein the filler comprises a spherical monodisperse filler. The die attach film of claim 1 , wherein the filler comprises a thermoplastic polymer. 5 . The die attach film of claim 4 , wherein the thermoplastic polymer comprises polystyrene, polyurethane, or polymethyl methacrylate. The die attach film of claim 1 , wherein the adhesive layer comprises a binder polymer and a thermosetting polymer. 7 . The die attach film of claim 6 , wherein the binder polymer is included in an amount of about 10 parts by weight to about 40 parts by weight based on 100 parts by weight of the die attach film. 8 . The die attach film of claim 6 , wherein the content of the thermosetting polymer is about 20 parts by weight to about 60 parts by weight based on 100 parts by weight of the die attach film.
9. The die attach film according to claim 6, The binder polymer includes a thermoplastic polymer, and the thermoplastic polymer includes an acryl-based polymer or a phenoxy-based polymer. 10 . The die attach film of claim 6 , wherein the thermosetting polymer comprises an epoxy-based polymer. 11 . The die attach film of claim 1 , wherein the filler comprises an organic material having a glass transition temperature of about 120° C. or less.
12. Semiconductor package, comprising: substrate; a first semiconductor chip on the substrate; a chip stack on the substrate, comprising a plurality of second semiconductor chips stacked in a second direction and spaced apart from the first semiconductor chips in the first direction; as well as bonding wires connected to the chip stack and the substrate, The chip stack further comprises a chip attach film according to any one of claims 1 to 11 between the stacked plurality of second semiconductor chips.
13. A method for manufacturing a semiconductor package, the method comprising: mounting a first semiconductor chip on a substrate; forming a chip stack on the substrate that is spaced apart from the first semiconductor chip in a first direction; forming bonding wires connected to the chip stack and the substrate; as well as forming a molding layer on the first semiconductor chip, the chip stack, and the bonding wires, The forming of the chip stack includes stacking a plurality of second semiconductor chips in a second direction, the plurality of second semiconductor chips including the chip attach film according to any one of claims 1 to 11 formed on one surface of the plurality of second semiconductor chips.
14. The method according to claim 13, The stacking of the plurality of second semiconductor chips in the second direction includes performing a thermal pressing process, and the thermal pressing process is performed at a temperature equal to or greater than a glass transition temperature of the filler.
Citation Information
Patent Citations
Gamma correction method for a display device
KR1020230143250A