Display device inspection method

Abstract

An inspection method of a display device is provided. The inspection method of the display device includes the steps of: measuring a first brightness of each first pixel included in a first group of a plurality of pixels included in a display panel and a first correction brightness of the correction pixel while the first group and the correction pixel are turned on; measuring a second luminance of each second pixel included in a second group of the plurality of pixels and a second correction luminance of the correction pixel while the correction pixel and the second group of the plurality of pixels are turned on; measuring a third luminance of each third pixel included in a third group of the plurality of pixels and a third correction luminance of the correction pixel while the third group and the correction pixel are turned on; and measuring a fourth luminance of each fourth pixel included in a fourth group of the plurality of pixels and a fourth correction luminance of the correction pixel while the fourth group and the correction pixel are turned on.

Description

Technical Field

[0001] The invention relates to a method for inspecting a display device. Background Art

[0002] A wearable device is being developed that is developed in the form of glasses or helmets and forms a focus at a close distance in front of the user's eyes. For example, the wearable device may be a head mounted display (HMD) device or AR glasses. This wearable device provides the user with an augmented reality (hereinafter, "AR") screen or a virtual reality (hereinafter, "VR") screen.

[0003] Wearable devices such as HMD devices or AR glasses require display specifications of at least 2000 PPI (pixels per inch) to allow users to use them for a long time without dizziness. For this reason, OLEDoS (Organic Light Emitting Diode on Silicon) technology, which is a small organic light-emitting display device with high resolution, is emerging. OLEDoS (Organic Light Emitting Diode on Silicon) is a technology that arranges organic light-emitting diodes (OLED: Organic Light Emitting Diode) on a semiconductor wafer substrate on which complementary metal oxide semiconductors (CMOS: Complementary Metal Oxide Semiconductor) are arranged.

[0004] The inspection method for inspecting whether a display panel is defective includes a short range uniformity (SRU) evaluation that evaluates the brightness uniformity of pixels by evaluating a narrow area of ​​the screen displayed in the display panel. However, since display panels using OLEDoS technology are manufactured to have ultra-high resolution pixels, there is a problem that SRU evaluation is not easy to perform. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a method for inspecting a display device that can easily perform short range uniformity (SRU) evaluation for evaluating the brightness uniformity of pixels.

[0006] The technical problems of the present invention are not limited to the technical problems mentioned above, and ordinary technicians in the technical field to which the present invention belongs can clearly understand other technical problems not mentioned through the following records.

[0007] According to an embodiment of a display device inspection method for solving the above technical problems, the method comprises the following steps: during a period when a first group of a plurality of pixels included in a display panel and a correction pixel are illuminated, measuring a first brightness of each first pixel included in the first group, and measuring a first corrected brightness of the correction pixel; during a period when a second group of the plurality of pixels and the correction pixel are illuminated, measuring a second brightness of each second pixel included in the second group, and measuring a second corrected brightness of the correction pixel; during a period when a third group of the plurality of pixels and the correction pixel are illuminated, measuring a third brightness of each third pixel included in the third group, and measuring a third corrected brightness of the correction pixel; during a period when a fourth group of the plurality of pixels and the correction pixel are illuminated, measuring a fourth brightness of each fourth pixel included in the fourth group, and measuring a fourth corrected brightness of the correction pixel; determining an average corrected brightness by calculating an average value of the first corrected brightness to the fourth corrected brightness; calculating a first conversion brightness, a second conversion brightness, a third conversion brightness, and a fourth conversion brightness by dividing each of the first to the fourth brightness by the average corrected brightness; and determining whether the display panel is defective or not based on the dispersion of the first conversion brightness to the fourth conversion brightness.

[0008] The first pixel included in the first group among the multiple pixels is a pixel arranged in the first row and first column among 2×2 pixels arranged adjacent to each other, the second pixel included in the second group among the multiple pixels is a pixel arranged in the first row and second column among the 2×2 pixels arranged adjacent to each other, the third pixel included in the third group among the multiple pixels is a pixel arranged in the second row and first column among the 2×2 pixels arranged adjacent to each other, and the fourth pixel included in the fourth group among the multiple pixels is a pixel arranged in the second row and second column among the 2×2 pixels arranged adjacent to each other.

[0009] While the first group and the correction pixels are illuminated, the pixels of the second to fourth groups are kept in an off state.

[0010] While the second group and the correction pixels are illuminated, the pixels of the first group, the third group and the fourth group are kept in an off state.

[0011] While the third group and the correction pixels are illuminated, the pixels of the first group, the second group, and the fourth group are kept in an off state.

[0012] While the fourth group and the correction pixels are turned on, the pixels of the first to third groups are kept turned off.

[0013] The correction pixels are arranged at the periphery of the display panel.

[0014] The correction pixel includes a plurality of correction pixels.

[0015] The inspection method of the display device further includes the following step: while the pixels of the first group to the fourth group are sequentially lit up, the plurality of correction pixels are always lit up.

[0016] The inspection method of the display device further includes the following step: if the dispersion exceeds 2% with the average value as the center, the display panel is determined to be defective.

[0017] Details of other embodiments are included in the detailed description and drawings.

[0018] According to the inspection method of the display device of the embodiment, short range uniformity (SRU) evaluation for evaluating luminance uniformity of pixels can be easily performed, thereby improving productivity.

[0019] The effects according to the embodiment are not limited to the contents of the above examples, and more various effects are included in this specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a perspective view showing a head mounted display device according to an embodiment.

[0021] Figure 2 It is shown Figure 1 An exploded perspective view of an example of a head-mounted display device.

[0022] Figure 3 is a perspective view showing a head mounted display device according to another embodiment.

[0023] Figure 4 is an exploded perspective view showing a display device according to an embodiment.

[0024] Figure 5 is a cross-sectional view showing an example of cutting a portion of a display panel according to an embodiment.

[0025] Figure 6 is a layout diagram illustrating a plurality of pixels and correction pixels included in a display panel according to an embodiment.

[0026] Figure 7 is a flow chart illustrating a method for inspecting a display panel according to an embodiment.

[0027] Figure 8 is a plan view of a display panel illustrating a time period for lighting a first pixel of a first group according to an embodiment.

[0028] Fig. 9 is a plan view of a display panel illustrating a time period for lighting a second pixel of a second group according to an embodiment.

[0029] Fig.10 is a plan view of a display panel illustrating a time period during which a third pixel of a third group according to an embodiment is lit.

[0030] Fig.11 is a plan view of a display panel illustrating a time period during which a fourth pixel of a fourth group according to an embodiment is lit.

[0031] Fig.12 FIG. 4 is a dispersion curve diagram for measuring the brightness uniformity of pixels of a display panel according to an embodiment.

[0032] Description of Reference Numerals G1: Pixels of the first group G2: Pixels of the second group G3: The third group of pixels G4: The fourth group of pixels DETAILED DESCRIPTION

[0033] The advantages and features of the present invention and the methods for achieving the advantages and features will become clear with reference to the embodiments described in detail below in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below and can be implemented in various forms. The embodiments are only provided to make the disclosure of the present invention complete and to fully inform the scope of the invention to the technicians with ordinary knowledge in the technical field to which the present invention belongs. The present invention is only defined by the scope of the claims.

[0034] When an element or layer is referred to as being "on" another element or layer, all situations where the element or layer is directly above or sandwiched with another layer or other element are included. Throughout the specification, the same reference numerals represent the same constituent elements. The shapes, sizes, ratios, angles, quantities, etc. disclosed in the drawings for illustrating the embodiments are exemplary, and therefore the present invention is not limited to the matters illustrated.

[0035] Although "first", "second", etc. are used to describe various components, these components are obviously not limited by these terms. These terms are only used to distinguish one component from another component. Therefore, the first component mentioned below can obviously also be the second component within the technical concept of the present invention.

[0036] Each feature of the multiple embodiments of the present invention may be partially or completely combined or combined with each other, and may be technically linked and driven in a variety of ways. The various embodiments may be implemented independently of each other, or may be implemented together in an associated relationship.

[0037] Hereinafter, specific embodiments will be described with reference to the accompanying drawings.

[0038] Figure 1 is a perspective view showing a head mounted display device according to an embodiment. Figure 2 It is shown Figure 1 An exploded perspective view of an example of a head-mounted display device.

[0039] Reference Figure 1 and Figure 2 According to one embodiment, a head mounted display device 1 includes a first display device 10_1, a second display device 10_2, a display device storage portion 110, a storage portion cover 120, a first eyepiece lens 131, a second eyepiece lens 132, a head strap 140, an intermediate frame 160, a first optical component 151, a second optical component 152, a control circuit board 170, and a connector.

[0040] The first display device 10_1 provides an image to the left eye of the user, and the second display device 10_2 provides an image to the right eye of the user. Figures 4 to 5 The display devices 10 described are substantially the same. Therefore, the description of the first display device 10_1 and the second display device 10_2 will be referred to in detail. Figures 4 to 5 Description instead.

[0041] The first optical member 151 may be disposed between the first display device 10_1 and the first eyepiece lens 131. The second optical member 152 may be disposed between the second display device 10_2 and the second eyepiece lens 132. Each of the first optical member 151 and the second optical member 152 may include at least one convex lens.

[0042] The middle frame 160 may be disposed between the first display device 10_1 and the control circuit board 170, and may be disposed between the second display device 10_2 and the control circuit board 170. The middle frame 160 plays a role in supporting and fixing the first display device 10_1, the second display device 10_2, and the control circuit board 170.

[0043] The control circuit board 170 may be disposed between the middle frame 160 and the display device receiving portion 110. The control circuit board 170 may be connected to the first display device 10_1 and the second display device 10_2 through a connector. The control circuit board 170 may convert an image source input from the outside into digital video data (DATA), and may transmit the digital video data (DATA) to the first display device 10_1 and the second display device 10_2 through the connector.

[0044] The control circuit board 170 may transmit digital video data (DATA) corresponding to a left-eye image optimized for the left eye of the user to the first display device 10_1, and may transmit digital video data (DATA) corresponding to a right-eye image optimized for the right eye of the user to the second display device 10_2. Alternatively, the control circuit board 170 may transmit the same digital video data (DATA) to the first display device 10_1 and the second display device 10_2.

[0045] The display device storage portion 110 serves to store the first display device 10_1, the second display device 10_2, the middle frame 160, the first optical component 151, the second optical component 152, the control circuit board 170 and the connector. The storage portion cover 120 is arranged to cover an open surface of the display device storage portion 110. The storage portion cover 120 may include a first eyepiece lens 131 arranged for the user's left eye and a second eyepiece lens 132 arranged for the user's right eye. Figure 1 and Figure 2 2 illustrates a case where the first eyepiece lens 131 and the second eyepiece lens 132 are separately arranged, but the embodiments of the present specification are not limited thereto. The first eyepiece lens 131 and the second eyepiece lens 132 may be combined into one.

[0046] The first eyepiece lens 131 may be aligned with the first display device 10_1 and the first optical component 151, and the second eyepiece lens 132 may be aligned with the second display device 10_2 and the second optical component 152. Therefore, the user may see the image of the first display device 10_1 magnified as a virtual image by the first optical component 151 through the first eyepiece lens 131, and may see the image of the second display device 10_2 magnified as a virtual image by the second optical component 152 through the second eyepiece lens 132.

[0047] The headband 140 serves to fix the display device storage unit 110 on the user's head so that the first eyepiece lens 131 and the second eyepiece lens 132 of the storage unit cover 120 can remain arranged at the user's left eye and right eye, respectively. In the case where the display device storage unit 110 is implemented as a lightweight and compact head-mounted display device 1, the head-mounted display device 1 can be equipped with a Figure 3 The eyeglass frames shown are used instead of the headband 140.

[0048] In addition, the head mounted display device 1 may also be equipped with a battery for supplying power, an external memory slot capable of accommodating an external memory, an external connection port for receiving an image source, and a wireless communication module. The external connection port may be a universal serial bus (USB) terminal, a display port, or a high-definition multimedia interface (HDMI) terminal, and the wireless communication module may be a 5G communication module, a 4G communication module, a Wi-Fi module, or a Bluetooth module.

[0049] Figure 3 is a perspective view showing a head mounted display device according to another embodiment.

[0050] Reference Figure 3 According to another embodiment, the head mounted display device 1_1 may be a display device in which the display device storage portion 120_1 is implemented as a lightweight and miniaturized glasses form. According to another embodiment, the head mounted display device 1_1 may be equipped with a display device 10_3, a left eyeglass 311, a right eyeglass 312, a support frame 350, eyeglass frame legs 341, 342, an optical component 320, an optical path conversion component 330, and a display device storage portion 120_1.

[0051] Figure 3 The display device 10_3 shown is similar to the reference Figures 4 to 5 Therefore, the description of the display device 10_3 will be referred to as the display device 10_3. Figures 4 to 5 Description instead.

[0052] The display device storage portion 120_1 can store the display device 10_3, the optical component 320, and the optical path conversion component 330. The image displayed on the display device 10_3 can be magnified by the optical component 320, and the optical path can be converted by the optical path conversion component 330, so that it can be provided to the right eye of the user through the right eye lens 312. Therefore, the user can view the augmented reality image in which the virtual image displayed on the display device 10_3 and the real image seen through the right eye lens 312 are superimposed through the right eye.

[0053] exist Figure 3, the display device storage portion 120_1 is illustrated as being arranged at the right end of the support frame 350, but the embodiments of the present specification are not limited thereto. For example, the display device storage portion 120_1 may be arranged at the left end of the support frame 350, in which case the image of the display device 10_3 may be provided to the left eye of the user. Alternatively, the display device storage portion 120_1 may be arranged at both the left end and the right end of the support frame 350, in which case the user may view the image displayed on the display device 10_3 through both the left eye and the right eye.

[0054] Figure 4 is an exploded perspective view showing a display device according to an embodiment.

[0055] Reference Figure 4 According to one embodiment, the display device 10 is a device for displaying dynamic images or still images. According to one embodiment, the display device 10 can be applied to portable electronic devices such as mobile phones, smart phones, tablet PCs, mobile communication terminals, electronic notepads, electronic books, portable multimedia players (PMP: Portable Multimedia Player), navigators, ultra-mobile personal computers (UMPC: UltraMobile PC), etc. For example, the display device 10 can be used as a display part of a television, a laptop computer, a monitor, a billboard, or an Internet of Things (IoT: Internet Of Things) device. Alternatively, the display device 10 can be applied to a smart watch (Smart Watch), a watch phone (Watch Phone), and a head-mounted display (HMD: Head Mounted Display) for realizing virtual reality and augmented reality.

[0056] According to an embodiment, a display device 10 includes a display panel 410 , a heat dissipation layer 420 , a circuit board 430 , a driving circuit 440 , and a power supply circuit 450 .

[0057] The display panel 410 may be configured in a planar form similar to a quadrilateral. For example, the display panel 410 may have a planar form similar to a quadrilateral having short sides in a first direction DR1 and long sides in a second direction DR2 intersecting the first direction DR1. In the display panel 410, the corner where the short side in the first direction DR1 intersects the long side in the second direction DR2 may be formed into a circle or a right angle in a manner having a predetermined curvature. The planar form of the display panel 410 is not limited to a quadrilateral, and may be formed similar to other polygons, circles, or ellipses. The planar form of the display device 10 may follow the planar form of the display panel 410, but the embodiments of the present specification are not limited thereto.

[0058] The display panel 410 includes a display area where an image is displayed and a non-display area where no image is displayed.

[0059] The display area includes a plurality of pixels, each of which includes a plurality of sub-pixels SP1, SP2, SP3 ( Figure 5 ). The plurality of sub-pixels SP1, SP2, and SP3 include a plurality of pixel transistors. The plurality of pixel transistors may be formed by a semiconductor process and may be arranged on a semiconductor substrate ( Figure 5 For example, a plurality of pixel transistors may be formed by a complementary metal oxide semiconductor (CMOS: Complementary Metal Oxide Semiconductor).

[0060] The heat dissipation layer 420 may overlap the display panel 410 in the third direction DR3, which is the thickness direction of the display panel 410. The heat dissipation layer 420 may be arranged on one surface (e.g., the back surface) of the display panel 410. The heat dissipation layer 420 plays a role in releasing heat generated by the display panel 410. The heat dissipation layer 420 may include a metal layer such as graphite, silver (Ag), copper (Cu), or aluminum (Al) having high thermal conductivity.

[0061] The circuit board 430 may be electrically connected to a plurality of pads of the pad area of ​​the display panel 410 using a conductive adhesive member such as an anisotropic conductive film. The circuit board 430 may be a flexible printed circuit board or a flexible film having a flexible substance. Figure 44 illustrates a case where the circuit board 430 is unfolded, but the circuit board 430 may be bent. In this case, one end of the circuit board 430 may be arranged on the back surface of the display panel 410. The one end of the circuit board 430 may be an opposite end of the other end of the circuit board 430 connected to the plurality of pads of the pad area of ​​the display panel 410 using a conductive adhesive member.

[0062] The driving circuit 440 may receive digital video data and a timing signal from the outside, and may generate a scanning timing control signal, a light emission timing control signal, and a data timing control signal for controlling the display panel 410 according to the timing signal.

[0063] The power supply circuit 450 may generate a plurality of panel driving voltages according to a power voltage from the outside.

[0064] The driving circuit 440 and the power supply circuit 450 may be formed as integrated circuits (ICs) and attached to a surface of the circuit board 430 .

[0065] Figure 5 is a cross-sectional view showing an example of cutting a portion of a display panel according to an embodiment. For example, Figure 5 shows a plurality of sub-pixels ( Figure 5 Partial cross-sectional structure of the display area of ​​SP1, SP2, SP3).

[0066] Reference Figure 5 The display panel 410 includes a semiconductor backplane SBP, a light emitting element backplane EBP, a light emitting element layer EML, an encapsulation layer TFE, an optical layer OPL, a cover layer CVL and a polarizer (not shown).

[0067] The semiconductor backplane SBP includes: a semiconductor substrate SSUB including a plurality of pixel transistors PTR; a plurality of semiconductor insulating films SINS covering the plurality of pixel transistors PTR; and a plurality of contact terminals CTE electrically connected to the plurality of pixel transistors PTR respectively.

[0068] The semiconductor substrate SSUB may be a silicon substrate, a germanium substrate, or a silicon-germanium substrate. The semiconductor substrate SSUB may be a substrate doped with a first-type impurity. A plurality of well regions WA may be arranged on the upper surface of the semiconductor substrate SSUB. The plurality of well regions WA may be regions doped with a second-type impurity. The second-type impurity may be different from the first-type impurity described above. For example, in the case where the first-type impurity is a p-type impurity, the second-type impurity may be an n-type impurity. Alternatively, in the case where the first-type impurity is an n-type impurity, the second-type impurity may be a p-type impurity.

[0069] Each of the plurality of well regions WA includes a source region SA corresponding to a source electrode of the pixel transistor PTR, a drain region DA corresponding to a drain electrode, and a channel region CH disposed between the source region SA and the drain region DA.

[0070] Each of the source region SA and the drain region DA may be a region doped with first-type impurities. The gate electrode GE of the pixel transistor PTR may overlap the well region WA in the third direction DR3. The channel region CH may overlap the gate electrode GE in the third direction DR3. The source region SA may be arranged on one side of the gate electrode GE, and the drain region SA may be arranged on the other side of the gate electrode GE.

[0071] Each of the plurality of well regions WA further includes a first low-concentration impurity region disposed between the channel region CH and the source region SA and a second low-concentration impurity region disposed between the channel region CH and the drain region DA. The first low-concentration impurity region may be a region having a lower impurity concentration than the source region SA. The second low-concentration impurity region may be a region having a lower impurity concentration than the drain region DA. The distance between the source region SA and the drain region DA may be increased by the first low-concentration impurity region and the second low-concentration impurity region. Therefore, the length of the channel region CH of each pixel transistor PTR may be increased, thereby preventing a punch-through phenomenon and a hot carrier phenomenon caused by a short channel.

[0072] The first semiconductor insulating film SINS1 may be disposed on the semiconductor substrate SSUB. The first semiconductor insulating film SINS1 may be made of silicon carbon nitride (SiCN) or silicon oxide (SiO x ) series of inorganic films are formed, but the embodiments of this specification are not limited to this.

[0073] The second semiconductor insulating film SINS2 may be disposed on the first semiconductor insulating film SINS1. The second semiconductor insulating film SINS2 may be made of silicon oxide (SiO x ) series of inorganic films are formed, but the embodiments of this specification are not limited to this.

[0074] A plurality of contact terminals CTE may be arranged on the second semiconductor insulating film SINS2. Each of the plurality of contact terminals CTE may be connected to one of the gate electrode GE, the source region SA, and the drain region DA of each of the pixel transistors PTR through a hole penetrating the first semiconductor insulating film SINS1 and the second semiconductor insulating film SINS2. The plurality of contact terminals CTE may be composed of one of copper (Cu), aluminum (Al), tungsten (W), molybdenum (Mo), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), and neodymium (Nd), or an alloy containing one of them.

[0075] A third semiconductor insulating film SINS3 may be arranged on a side surface of each of the plurality of contact terminals CTE. An upper surface of each of the plurality of contact terminals CTE may be exposed without being covered by the third semiconductor insulating film SINS3. The third semiconductor insulating film SINS3 may be made of silicon oxide (SiO x ) series of inorganic films are formed, but the embodiments of this specification are not limited to this.

[0076] The semiconductor substrate SSUB may be replaced by a glass substrate or a polymer resin substrate such as polyimide. In this case, thin film transistors may be arranged on the glass substrate or the polymer resin substrate. The glass substrate may be a rigid substrate that does not bend, and the polymer resin substrate may be a flexible substrate that is bendable or foldable.

[0077] The light emitting element back plate EBP includes first to eighth metal layers ML1 to ML8, reflective electrodes RL1 to RL4, a plurality of vias VA1 to VA10, and a step layer STPL. In addition, the light emitting element back plate EBP also includes a plurality of interlayer insulating films INS1 to INS10 covering the first to eighth metal layers ML1 to ML8.

[0078] The first metal layer ML1 to the eighth metal layer ML8 serve to connect a plurality of contact terminals CTE exposed on the semiconductor backplane SBP to implement the circuit of the first sub-pixel SP1 .

[0079] The first interlayer insulating film INS1 may be disposed on the semiconductor backplane SBP. Each of the first vias VA1 may penetrate the first interlayer insulating film INS1 and be connected to the contact terminal CTE exposed at the semiconductor backplane SBP. Each of the first metal layers ML1 may be disposed on the first interlayer insulating film INS1 and be connected to the first vias VA1.

[0080] The second interlayer insulating film INS2 may be disposed on the first interlayer insulating film INS1 and the first metal layer ML1. Each of the second vias VA2 may penetrate the second interlayer insulating film INS2 and be connected to the exposed first metal layer ML1. Each of the second metal layers ML2 may be disposed on the second interlayer insulating film INS2 and be connected to the second vias VA2.

[0081] The third interlayer insulating film INS3 may be disposed on the second interlayer insulating film INS2 and the second metal layer ML2. Each of the third vias VA3 may penetrate the third interlayer insulating film INS3 and be connected to the exposed second metal layer ML2. Each of the third metal layers ML3 may be disposed on the third interlayer insulating film INS3 and be connected to the third vias VA3.

[0082] The fourth interlayer insulating film INS4 may be disposed on the third interlayer insulating film INS3 and the third metal layer ML3. Each of the fourth vias VA4 may penetrate the fourth interlayer insulating film INS4 and be connected to the exposed third metal layer ML3. Each of the fourth metal layers ML4 may be disposed on the fourth interlayer insulating film INS4 and be connected to the fourth vias VA4.

[0083] The fifth interlayer insulating film INS5 may be disposed on the fourth interlayer insulating film INS4 and the fourth metal layer ML4. Each of the fifth vias VA5 may penetrate the fifth interlayer insulating film INS5 and be connected to the exposed fourth metal layer ML4. Each of the fifth metal layers ML5 may be disposed on the fifth interlayer insulating film INS5 and be connected to the fifth vias VA5.

[0084] The sixth interlayer insulating film INS6 may be disposed on the fifth interlayer insulating film INS5 and the fifth metal layer ML5. Each of the sixth vias VA6 may penetrate the sixth interlayer insulating film INS6 and be connected to the exposed fifth metal layer ML5. Each of the sixth metal layers ML6 may be disposed on the sixth interlayer insulating film INS6 and be connected to the sixth vias VA6.

[0085] The seventh interlayer insulating film INS7 may be disposed on the sixth interlayer insulating film INS6 and the sixth metal layer ML6. Each of the seventh vias VA7 may penetrate the seventh interlayer insulating film INS7 and be connected to the exposed sixth metal layer ML6. Each of the seventh metal layers ML7 may be disposed on the seventh interlayer insulating film INS7 and be connected to the seventh vias VA7.

[0086] The eighth interlayer insulating film INS8 may be disposed on the seventh interlayer insulating film INS7 and the seventh metal layer ML7. Each of the eighth vias VA8 may penetrate the eighth interlayer insulating film INS8 and be connected to the exposed seventh metal layer ML7. Each of the eighth metal layers ML8 may be disposed on the eighth interlayer insulating film INS8 and be connected to the eighth vias VA8.

[0087] The first metal layer ML1 to the eighth metal layer ML8 and the first via holes VA1 to the eighth via holes VA8 may be formed of substantially the same material. The first metal layer ML1 to the eighth metal layer ML8 and the first via holes VA1 to the eighth via holes VA8 may be formed of one of copper (Cu), aluminum (Al), tungsten (W), molybdenum (Mo), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni) and neodymium (Nd) or an alloy containing one of them. The first via holes VA1 to the eighth via holes VA8 may be formed of substantially the same material. The first interlayer insulating film INS1 to the eighth interlayer insulating film ILD8 may be formed of silicon oxide (SiO x ) series of inorganic films are formed, but the embodiments of this specification are not limited to this.

[0088] Each of the thickness of the first metal layer ML1, the thickness of the second metal layer ML2, the thickness of the third metal layer ML3, the thickness of the fourth metal layer ML4, the thickness of the fifth metal layer ML5, and the thickness of the sixth metal layer ML6 may be greater than each of the thickness of the first via VA1, the thickness of the second via VA2, the thickness of the third via VA3, the thickness of the fourth via VA4, the thickness of the fifth via VA5, and the thickness of the sixth via VA6. Each of the thickness of the second metal layer ML2, the thickness of the third metal layer ML3, the thickness of the fourth metal layer ML4, the thickness of the fifth metal layer ML5, and the thickness of the sixth metal layer ML6 may be greater than the thickness of the first metal layer ML1. The thickness of the second metal layer ML2, the thickness of the third metal layer ML3, the thickness of the fourth metal layer ML4, the thickness of the fifth metal layer ML5, and the thickness of the sixth metal layer ML6 may be substantially the same.

[0089] Each of the thickness of the seventh metal layer ML7 and the thickness of the eighth metal layer ML8 is greater than each of the thickness of the first metal layer ML1, the thickness of the second metal layer ML2, the thickness of the third metal layer ML3, the thickness of the fourth metal layer ML4, the thickness of the fifth metal layer ML5, and the thickness of the sixth metal layer ML6. Each of the thickness of the seventh metal layer ML7 and the thickness of the eighth metal layer ML8 may be greater than the thickness of the seventh via VA7 and the thickness of the eighth via VA8. Each of the thickness of the seventh via VA7 and the thickness of the eighth via VA8 may be greater than each of the thickness of the first via VA1, the thickness of the second via VA2, the thickness of the third via VA3, the thickness of the fourth via VA4, the thickness of the fifth via VA5, and the thickness of the sixth via VA6. The thickness of the seventh metal layer ML7 and the thickness of the eighth metal layer ML8 may be substantially the same.

[0090] The ninth interlayer insulating film INS9 may be disposed on the eighth interlayer insulating film INS8 and the eighth metal layer ML8. The ninth interlayer insulating film INS9 may be made of silicon oxide (SiO x ) series of inorganic films are formed, but the embodiments of this specification are not limited to this.

[0091] Each of the ninth via holes VA9 may be connected to the exposed eighth metal layer ML8 by penetrating the ninth interlayer insulating film INS9. The ninth via hole VA9 may be formed of one of copper (Cu), aluminum (Al), tungsten (W), molybdenum (Mo), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), and neodymium (Nd), or an alloy containing one of them.

[0092] Each of the first reflective electrodes RL1 may be disposed on the ninth interlayer insulating film INS9 and may be connected to the ninth via hole VA9. The first reflective electrode RL1 may be formed of one of copper (Cu), aluminum (Al), tungsten (W), molybdenum (Mo), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), and neodymium (Nd), or an alloy containing one of them.

[0093] Each of the second reflective electrodes RL2 may be disposed on the first reflective electrode RL1. The second reflective electrode RL2 may be formed of one of copper (Cu), aluminum (Al), tungsten (W), molybdenum (Mo), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), and neodymium (Nd), or an alloy containing one of them. For example, the second reflective electrode RL2 may be titanium nitride (TiN).

[0094] In the first sub-pixel SP1, a step layer STPL may be arranged on the second reflective electrode RL2. Each of the second sub-pixel SP2 and the third sub-pixel SP3 may not be arranged with the step layer STPL. In order to facilitate reflection of the first color light emitted from the light-emitting layer EML of the first sub-pixel SP1, the thickness of the step layer STPL may be set in consideration of the wavelength of the first color light and the distance from the light-emitting layer EML of the first sub-pixel SP1 to the fourth reflective electrode RL4. The step layer STPL may be made of silicon carbon nitride (SiCN) or silicon oxide (SiO x ) series of inorganic films are formed, but the embodiments of this specification are not limited to this.

[0095] In the first subpixel SP1, the third reflective electrode RL3 may be disposed on the second reflective electrode RL2 and the step layer STPL. In the second subpixel SP2 and the third subpixel SP3, the third reflective electrode RL3 may be disposed on the second reflective electrode RL2. The third reflective electrode RL3 may be formed of one of copper (Cu), aluminum (Al), tungsten (W), molybdenum (Mo), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), and neodymium (Nd), or an alloy containing one of them.

[0096] At least one of the first reflective electrode RL1 , the second reflective electrode RL2 , and the third reflective electrode RL3 may be omitted.

[0097] Each of the fourth reflective electrodes RL4 may be disposed on the third reflective electrode RL3. The fourth reflective electrode RL4 may be a layer that reflects light from the light emitting layer EML. The fourth reflective electrode RL4 may include a metal with high reflectivity to facilitate reflection of light. The fourth reflective electrode RL4 may be formed of aluminum (Al), a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of aluminum and ITO (ITO / Al / ITO), an APC alloy that is an alloy of silver (Ag), palladium (Pd), and copper (Cu), and a stacked structure of an APC alloy and ITO (ITO / APC / ITO), but the embodiments of the present specification are not limited thereto.

[0098] The tenth interlayer insulating film INS10 may be disposed on the ninth interlayer insulating film INS9 and the fourth reflective electrode RL4. The tenth interlayer insulating film INS10 may be made of silicon oxide (SiO x ) series of inorganic films are formed, but the embodiments of this specification are not limited to this.

[0099] Each of the tenth via holes VA10 may penetrate the tenth interlayer insulating film INS10 and be connected to the fourth reflective electrode RL4. The tenth via hole VA10 may be formed of one of copper (Cu), aluminum (Al), tungsten (W), molybdenum (Mo), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), and neodymium (Nd), or an alloy containing one of them. Due to the step layer STPL, the thickness of the tenth via hole VA10 in the first sub-pixel SP1 may be less than the thickness of the tenth via hole VA10 in each of the second sub-pixel SP2 and the third sub-pixel SP3.

[0100] The light emitting element layer EML may be disposed on the light emitting element backplane EBP. The light emitting element layer EML may include a light emitting element LE and a pixel definition layer PDL including a first electrode AND, an intermediate layer IL, and a second electrode CAT, respectively.

[0101] The first electrode AND of each light emitting element LE may be arranged on the tenth interlayer insulating film INS10 and may be connected to the tenth via VA10. The first electrode AND of each light emitting element LE may be connected to the drain area DA or the source area SA of the pixel transistor PTR through the tenth via VA10, the first reflective electrode RL1 to the fourth reflective electrode RL4, the first via VA1 to the ninth via VA9, the first metal layer ML1 to the eighth metal layer ML8, and the contact terminal CTE. The first electrode AND of each light emitting element LE may be formed of one of copper (Cu), aluminum (Al), tungsten (W), molybdenum (Mo), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), and neodymium (Nd) or an alloy containing one of them. For example, the first electrode AND of each light emitting element LE may be titanium nitride (TiN).

[0102] The pixel definition film PDL may be disposed on a partial area of ​​the first electrode AND of each light emitting element LE. The pixel definition film PDL may cover the edge of the first electrode AND of each light emitting element LE. The pixel definition film PDL plays a role in dividing the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3.

[0103] The first light emitting area EA1 may be defined as an area where the first electrode AND, the intermediate layer IL, and the second electrode CAT are sequentially stacked in the first sub-pixel SP1 and emit light. The second light emitting area EA2 may be defined as an area where the first electrode AND, the intermediate layer IL, and the second electrode CAT are sequentially stacked in the second sub-pixel SP2 and emit light. The third light emitting area EA3 may be defined as an area where the first electrode AND, the intermediate layer IL, and the second electrode CAT are sequentially stacked in the third sub-pixel SP3 and emit light.

[0104] The pixel definition film PDL may include a first pixel definition film PDL1, a second pixel definition film PDL2, and a third pixel definition film PDL3. The first pixel definition film PDL1 may be arranged on the edge of the first electrode AND of each light emitting element LE, the second pixel definition film PDL2 may be arranged on the first pixel definition film PDL1, and the third pixel definition film PDL3 may be arranged on the second pixel definition film PDL2. The first pixel definition film PDL1, the second pixel definition film PDL2, and the third pixel definition film PDL3 may be made of silicon oxide (SiO x ) series of inorganic films are formed, but the embodiments of this specification are not limited to this.

[0105] The intermediate layer IL may include a first intermediate layer IL1 , a second intermediate layer IL2 , and a third intermediate layer IL3 .

[0106] The intermediate layer IL may have a series structure including a plurality of intermediate layers IL1, IL2, IL3 emitting light different from each other. For example, the intermediate layer IL may include a first intermediate layer IL1 emitting light of a first color, a second intermediate layer IL2 emitting light of a second color, and a third intermediate layer IL3 emitting light of a third color. The first intermediate layer IL1, the second intermediate layer IL2, and the third intermediate layer IL3 may be stacked in sequence.

[0107] The first intermediate layer IL1 may have a structure in which a first hole transport layer, a first organic light emitting layer emitting light of a first color, and a first electron transport layer are stacked in sequence. The second intermediate layer IL2 may have a structure in which a second hole transport layer, a second organic light emitting layer emitting light of a second color, and a second electron transport layer are stacked in sequence. The third intermediate layer IL3 may have a structure in which a third hole transport layer, a third organic light emitting layer emitting light of a third color, and a third electron transport layer are stacked in sequence.

[0108] The intermediate layer IL may cover the first electrode AND at the opening of the pixel definition film PDL, may cover the pixel definition film PDL between the adjacently arranged sub-pixels SP1 , SP2 , and SP3 , and may be partially disconnected.

[0109] In one embodiment, the intermediate layer IL can be separated (disconnected) between adjacent sub-pixels SP1, SP2, SP3, so that leakage current between adjacent sub-pixels SP1, SP2, SP3 can be prevented, and color interference phenomenon can be prevented. The color interference phenomenon refers to, for example, a phenomenon in which a red sub-pixel adjacent to a blue sub-pixel is accidentally lit during the period in which the blue sub-pixel emits blue light. The color interference phenomenon occurs due to leakage current, and may occur when a blue sub-pixel and a red sub-pixel having a large voltage difference in driving the pixel are adjacent. For example, leakage current is a phenomenon in which a portion of the driving current is transmitted to the red sub-pixel through at least a portion of the conductive layer of the intermediate layer IL during the period in which a driving current is supplied to the light-emitting element LE of the blue sub-pixel in order to light up the blue sub-pixel. If leakage current occurs, the red sub-pixel may be accidentally lit during the period in which the blue sub-pixel is lit.

[0110] The number of intermediate layers IL1, IL2, IL3 that emit light different from each other is not limited to Figure 5 . For example, the intermediate layer IL may include two intermediate layers. In this case, one of the two intermediate layers may be substantially the same as the first intermediate layer IL1, and the other may include a second hole transport layer, a second organic light emitting layer, a second organic light emitting layer, and a second electron transport layer. In this case, a charge generation layer for supplying electrons to one intermediate layer and supplying charges to the other intermediate layer may be arranged between the two intermediate layers.

[0111] exist Figure 5 , the first intermediate layer IL1, the second intermediate layer IL2, and the third intermediate layer IL3 are all arranged in the first light-emitting area EA1, the second light-emitting area EA2, and the third light-emitting area EA3, but the embodiments of the present specification are not limited thereto. For example, the first intermediate layer IL1 may be arranged in the first light-emitting area EA1, but may not be arranged in the second light-emitting area EA2 and the third light-emitting area EA3. In addition, the second intermediate layer IL2 may be arranged in the second light-emitting area EA2, but may not be arranged in the first light-emitting area EA1 and the third light-emitting area EA3. In addition, the third intermediate layer IL3 may be arranged in the third light-emitting area EA3, but may not be arranged in the first light-emitting area EA1 and the second light-emitting area EA2. In this case, the first color filter CF1, the second color filter CF2, and the third color filter CF3 of the optical layer OPL may be omitted.

[0112] The second electrode CAT may be arranged on the third intermediate layer IL3. The second electrode CAT may be arranged on the third intermediate layer IL3 in each of the plurality of light emitting element layers EML. The second electrode CAT may be formed of a transparent conductive material (TCO: Transparent Conductive Material) such as ITO, IZO, or a semi-transmissive metal material (Semi-transmissive Conductive Material) such as magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag). In the case where the second electrode CAT is formed of a semi-transmissive metal material, a microcavity may be used to improve the light extraction efficiency of each of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3.

[0113] The encapsulation layer TFE may be arranged on the light emitting element layer EML. The encapsulation layer TFE may include at least one inorganic film to prevent oxygen or moisture from penetrating into the light emitting element layer EML. In addition, the encapsulation layer TFE may include at least one organic film to protect the light emitting element layer EML from foreign matter such as dust. For example, the encapsulation layer TFE may include a first encapsulation inorganic film TFE1, an encapsulation organic film TFE2, and a second encapsulation inorganic film TFE3.

[0114] The first encapsulation inorganic film TFE1 may be disposed on the second electrode CAT, the encapsulation organic film TFE2 may be disposed on the first encapsulation inorganic film TFE1, and the second encapsulation inorganic film TFE3 may be disposed on the encapsulation organic film TFE2. The first encapsulation inorganic film TFE1 and the second encapsulation inorganic film TFE3 may be formed of silicon nitride (SiN x ), silicon oxynitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ) and aluminum oxide (AlO x ) are alternately stacked. The encapsulating organic film TFE2 may be a monomer. Alternatively, the encapsulating organic film TFE2 may be an organic film such as acryl resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0115] The adhesive layer ADL may be a layer for bonding the encapsulation layer TFE and the optical layer OPL. The adhesive layer ADL may be a double-sided adhesive member. In addition, the adhesive layer ADL may be a transparent adhesive member (such as a transparent adhesive or a transparent adhesive resin).

[0116] The optical layer OPL includes a plurality of color filters CF1, CF2, CF3, a plurality of lenses LNS, and a filling layer FIL. The plurality of color filters CF1, CF2, CF3 may include a first color filter CF1, a second color filter CF2, and a third color filter CF3. The first color filter CF1, the second color filter CF2, and the third color filter CF3 may be arranged on the adhesive layer ADL.

[0117] The first color filter CF1 may overlap the first emission area EA1 of the first subpixel SP1. The first color filter CF1 may transmit light of the first color (i.e., light of a blue wavelength band). The blue wavelength band may be about 370 nm to 460 nm. Therefore, the first color filter CF1 may transmit light of the first color among the light emitted from the first emission area EA1.

[0118] The second color filter CF2 may overlap the second light emitting area EA2 of the second sub-pixel SP2. The second color filter CF2 may transmit light of the second color (i.e., light of a green wavelength band). The green wavelength band may be about 480 nm to 560 nm. Therefore, the second color filter CF2 may transmit light of the second color in the light emitted from the second light emitting area EA2.

[0119] The third color filter CF3 may overlap the third light emitting area EA3 of the third sub-pixel SP3. The third color filter CF3 may transmit light of a third color (i.e., light of a red wavelength band). The red wavelength band may be about 600nm to 750nm. Therefore, the third color filter CF3 may transmit light of a third color in the light emitted from the third light emitting area EA3.

[0120] Each of the plurality of lenses LNS may be disposed on the first color filter CF1, the second color filter CF2, and the third color filter CF3, respectively. Each of the plurality of lenses LNS may be a structure for increasing the ratio of light toward the front of the display device 10. Each of the plurality of lenses LNS may have a cross-sectional shape convex toward the upper direction.

[0121] The filling layer FIL may be arranged on the plurality of lenses LNS. The filling layer FIL may have a predetermined refractive index so that light travels in the third direction DR3 at the interface between the plurality of lenses LNS and the filling layer FIL. In addition, the filling layer FIL may be a planarization layer. The filling layer FIL may be an organic film such as acryl resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0122] The covering layer CVL may be arranged on the filling layer FIL. The covering layer CVL may be a glass substrate or a polymer resin such as resin. When the covering layer CVL is a glass substrate, it may be attached to the filling layer FIL. In this case, the filling layer FIL may serve to bond the covering layer CVL. When the covering layer CVL is a glass substrate, it may be used as a packaging substrate. When the covering layer CVL is a polymer resin such as resin, it may be directly coated on the filling layer FIL.

[0123] A polarizing plate (not shown) may be arranged on one surface of the cover layer CVL. The polarizing plate may be a structure for preventing visibility reduction caused by external light reflection. The polarizing plate may include a linear polarizing plate and a phase delay film. For example, the phase delay film may be a λ / 4 plate, but the embodiments of the present specification are not limited thereto. However, in the case where visibility caused by external light reflection is sufficiently improved by the first color filter CF1, the second color filter CF2, and the third color filter CF3, the polarizing plate may also be omitted.

[0124] Figure 6 4 is a layout diagram showing a plurality of pixels 601 , 602 , 603 , 604 and a correction pixel CP included in a display panel 410 according to an embodiment.

[0125] Reference Figure 6 In the display panel 410 according to an embodiment, a plurality of pixels 601, 602, 603, 604 are arranged in a matrix form. In addition to the plurality of pixels 601, 602, 603, 604, the display panel 410 according to an embodiment further includes at least one correction pixel CP. The correction pixel CP may be arranged at the periphery of the display panel 410. The correction pixel CP is a dummy pixel utilized in the inspection process for measuring the brightness uniformity of the display panel 410. The correction pixel CP is a pixel that is always lit during the inspection process for measuring the brightness uniformity of the display panel 410. Since such a correction pixel CP is always lit, it is used as an indicator reflecting the aging characteristics of the display panel 410.

[0126] According to an embodiment, the plurality of pixels 601, 602, 603, 604 are divided into a first group G1, a second group G2, a third group G3, and a fourth group G4. The plurality of pixels 601, 602, 603, 604 can be divided into the first group G1, the second group G2, the third group G3, and the fourth group G4 in units of 2×2 pixels arranged adjacent to each other.

[0127] Among the plurality of pixels 601, 602, 603, 604, the first pixel 601 included in the first group G1 is a pixel arranged in the first row and the first column among 2×2 pixels arranged adjacent to each other. For example, in the odd-numbered rows of the plurality of pixels 601, 602, 603, 604, the first pixels 601 included in the first group G1 are arranged at intervals in the row direction (i.e., the lateral direction).

[0128] Among the plurality of pixels 601, 602, 603, 604, the second pixel 602 included in the second group G2 is a pixel arranged in the first row and the second column among 2×2 pixels arranged adjacent to each other. For example, in the odd-numbered rows of the plurality of pixels 601, 602, 603, 604, the second pixels 602 included in the second group G2 are arranged at intervals in the row direction. The second pixels 602 and the first pixels 601 may be alternately arranged in the row direction in the odd-numbered rows.

[0129] Among the plurality of pixels 601, 602, 603, 604, the third pixel 603 included in the third group G3 is a pixel arranged in the second row and the first column among the 2×2 pixels arranged adjacent to each other. For example, in the even-numbered rows of the plurality of pixels 601, 602, 603, 604, the third pixels 603 included in the third group G3 are arranged at intervals along the row direction.

[0130] Among the plurality of pixels 601, 602, 603, 604, the fourth pixel 604 included in the fourth group G4 is a pixel arranged in the second row and the second column among the 2×2 pixels arranged adjacent to each other. For example, in the even-numbered rows of the plurality of pixels 601, 602, 603, 604, the fourth pixels 604 included in the fourth group G4 are arranged at intervals along the row direction. The third pixel 603 and the fourth pixel 604 may be alternately arranged along the row direction in the even-numbered rows.

[0131] According to an embodiment, the first group G1 , the second group G2 , the third group G3 , and the fourth group G4 may include a plurality of sub-pixels SP1 , SP2 , and SP3 , respectively.

[0132] According to an embodiment, the correction pixel CP may include a plurality of sub-pixels SP1 , SP2 , and SP3 .

[0133] According to an embodiment, the shape of each of the first group G1, the second group G2, the third group G3 and the fourth group G4 and the shape of the correction pixel CP may be the same. For example, each of the first group G1, the second group G2, the third group G3 and the fourth group G4 includes four sub-pixels SP1, SP2 and SP3, and the correction pixel CP also includes four sub-pixels SP1, SP2 and SP3.

[0134] In this specification, the case where the plurality of pixels 601, 602, 603, 604 are divided into the first group G1, the second group G2, the third group G3, and the fourth group G4 is described, but this is only an example and the present invention is not limited thereto. For example, the plurality of pixels 601, 602, 603, 604 may be in any form as long as they can be divided into a plurality of groups.

[0135] Figure 7 is a flow chart illustrating a method for inspecting a display panel 410 according to an embodiment. Figure 8 4 is a plan view of the display panel 410 illustrating a time period (hereinafter, a first shot time period) in which the first pixels 601 of the first group G1 according to an embodiment are lit. Fig. 9 4 is a plan view of the display panel 410 illustrating a time period (hereinafter, a second light emitting time period) during which the second pixels 602 of the second group G2 according to an embodiment are lit. Fig.10 4 is a plan view of the display panel 410 illustrating a time period (hereinafter, a third light emitting time period) during which the third pixel 603 of the third group G3 according to an embodiment is lit. Fig.11 4 is a plan view of the display panel 410 illustrating a time period (hereinafter, a fourth light emitting time period) in which a fourth pixel 604 of a fourth group G4 according to an embodiment is lit.

[0136] The following, combined Figures 7 to 11 A method for inspecting the display panel 410 according to an embodiment is described below.

[0137] Reference Figure 7 and Figure 8 In step 710, the first brightness of each first pixel 601 of the first group G1 and the first corrected brightness of the correction pixel CP are measured. For example, during the period when the first group G1 and the correction pixel CP of the plurality of pixels 601, 602, 603, 604 included in the display panel 410 are illuminated, the first brightness of each first pixel 601 included in the first group G1 is measured, and the first corrected brightness of the correction pixel CP is measured.

[0138] In step 710, the first brightness is measured for each first pixel 601. As shown in the second row of Table 1, the first brightness measured for each first pixel 601 may be measured as a nit value indicating a brightness level per unit area.

[0139] While the first group G1 and the correction pixel CP are turned on, the pixels 602 , 603 , and 604 of the second group G2 , the third group G3 , and the fourth group G4 remain turned off.

[0140] In addition, the correction pixel CP includes a plurality of correction pixels CP. For example, during the period when the first pixel 601 of the first group G1 is illuminated, a plurality of correction pixels CP may be illuminated. Such a plurality of correction pixels CP are set to be always illuminated during the period when the pixels 601, 602, 603, and 604 of the first group G1, the second group G2, the third group G3, and the fourth group G4 are illuminated in sequence in a subsequent inspection process. Since the correction pixel CP is always illuminated, the brightness of such correction pixel CP reflects the aging characteristics of the display panel 410.

[0141] Reference Figure 7 and Fig. 9 In step 720, the second brightness of each second pixel 602 of the second group G2 and the second corrected brightness of the correction pixel CP are measured. For example, during the period when the second group G2 and the correction pixel CP of the plurality of pixels 601, 602, 603, 604 are illuminated, the second brightness of each second pixel 602 included in the second group G2 is measured, and the second corrected brightness of the correction pixel CP is measured.

[0142] In step 720, the second brightness is measured for each second pixel 602. As shown in the third row of Table 1, the second brightness measured for each second pixel 602 may be measured as a nit value indicating a brightness level per unit area.

[0143] While the second group G2 and the correction pixel CP are turned on, the pixels 601 , 603 , and 604 of the first group G1 , the third group G3 , and the fourth group G4 remain turned off.

[0144] Reference Figure 7 and Fig.10 In step 730, the third brightness of each third pixel 603 of the third group G3 and the third corrected brightness of the correction pixel CP are measured. For example, during the period when the correction pixel CP and the third group G3 of the plurality of pixels 601, 602, 603, 604 are illuminated, the third brightness of each third pixel 603 included in the third group G3 is measured, and the third corrected brightness of the correction pixel CP is measured.

[0145] In step 730, the third brightness is measured for each third pixel 603. As shown in the fourth row of Table 1, the third brightness measured for each third pixel 603 may be measured as a nit value indicating a brightness level per unit area.

[0146] While the third group G3 and the correction pixel CP are turned on, the pixels 601 , 602 , and 604 of the first group G1 , the second group G2 , and the fourth group G4 remain turned off.

[0147] Reference Figure 7 and Fig.11In step 740, the fourth brightness of each fourth pixel 604 of the fourth group G4 and the fourth corrected brightness of the correction pixel CP are measured. For example, during the period when the correction pixel CP and the fourth group G4 of the plurality of pixels 601, 602, 603, 604 are illuminated, the fourth brightness of each fourth pixel 604 included in the fourth group G4 is measured, and the fourth corrected brightness of the correction pixel CP is measured.

[0148] In step 740, the fourth brightness is measured for each fourth pixel 604. As shown in the fifth row of Table 1, the fourth brightness measured for each fourth pixel 604 may be measured as a nit value indicating a brightness level per unit area.

[0149] While the fourth group G4 and the correction pixel CP are turned on, the pixels 601 , 602 , and 603 of the first group G1 , the second group G2 , and the third group G3 remain turned off.

[0150] [Table 1]

[0151] Reference Figure 7 In step 750, the average corrected brightness is determined by calculating the average of the first corrected brightness to the fourth corrected brightness.

[0152] [Table 2]

[0153] Table 2 is a table showing brightness measured from a plurality of correction pixels CP. In Table 2, it is assumed that the plurality of correction pixels CP is four in total.

[0154] In Table 2, the second column shows the brightness value measured from the first correction pixel CP among the plurality of correction pixels CP.

[0155] In Table 2, the third column shows the brightness value measured from the second correction pixel CP among the plurality of correction pixels CP.

[0156] In Table 2, the fourth column shows the brightness value measured from the third correction pixel CP among the plurality of correction pixels CP.

[0157] In Table 2, the fifth column shows the brightness value measured from the fourth correction pixel CP among the plurality of correction pixels CP.

[0158] In Table 2, the sixth column shows the average value of the luminance values ​​measured in each correction pixel CP.

[0159] In Table 2, the second row shows first corrected luminance values ​​measured by the correction pixel CP during a first shot period in which the first pixel 601 of the first group G1 is lit.

[0160] In Table 2, the third row shows second corrected luminance values ​​measured by the correction pixel CP during a second shot period in which the second pixel 602 of the second group G2 is lit.

[0161] In Table 2, the fourth row shows the third corrected brightness value measured by the correction pixel CP during the third light emitting period when the third pixel 603 of the third group G3 is lit.

[0162] In Table 2, the fifth row shows fourth corrected brightness values ​​measured by the correction pixel CP during a fourth light emitting period in which the fourth pixel 604 of the fourth group G4 is lit.

[0163] Although Table 2 shows a case where the number of correction pixels CP is four, this is merely an example and the present invention is not limited thereto.

[0164] Reference Figure 7 In step 760, the first conversion brightness to the fourth conversion brightness are calculated by dividing each of the first brightness to the fourth brightness by the average value of the correction brightness. For example, the first conversion brightness to the fourth conversion brightness can be calculated by calculating the average value of the first correction brightness to the fourth correction brightness to determine the average correction brightness, and each of the first brightness to the fourth brightness is divided by the determined average correction brightness. Alternatively, the formula for calculating the first conversion brightness to the fourth conversion brightness can be as shown in Math Formulas 1 to 4.

[0165] [Mathematical formula 1] First conversion brightness of each first pixel = first brightness of each first pixel ÷ average value of first correction brightness Referring to Mathematical Formula 1, the first conversion brightness can be calculated by dividing the brightness value measured at the first pixel 601 by about 666.7 nits, which is the average value of the first corrected brightness. For example, as shown in Table 1, during the first light-emitting period, the brightness of the first pixel 601 corresponding to #1 can be measured as about 677.5 nits, and this value is divided by about 666.7 nits, which is the average value of the first corrected brightness (e.g., average corrected brightness). As a result, the first conversion brightness corresponding to about 1.016 can be calculated.

[0166] [Mathematical formula 2] The second conversion brightness of each second pixel = the second brightness of each second pixel ÷ the average value of the second correction brightness Referring to Mathematical Formula 2, the second conversion brightness can be calculated by dividing the brightness value measured at the second pixel 602 by about 660.6 nits, which is the average value of the second corrected brightness. For example, as shown in Table 1, during the second light-emitting period, the brightness of the second pixel 602 corresponding to #1 can be measured as about 692.2 nits, and this value is divided by about 660.6 nits, which is the average value of the second corrected brightness (e.g., average corrected brightness). As a result, the second conversion brightness corresponding to about 1.047 can be calculated.

[0167] [Mathematical formula 3] The second conversion brightness of each third pixel = the second brightness of each third pixel ÷ the average value of the third correction brightness Referring to Mathematical Formula 3, the third conversion brightness can be calculated by dividing the brightness value measured at the third pixel 603 by about 662.2 nits, which is the average value of the third corrected brightness. For example, as shown in Table 1, during the third light-emitting period, the brightness of the third pixel 603 corresponding to #1 can be measured as about 708.0 nits, and this value is divided by about 662.2 nits, which is the average value of the third corrected brightness (e.g., average corrected brightness). As a result, the third conversion brightness corresponding to about 1.069 can be calculated.

[0168] [Formula 4] The second converted brightness of each fourth pixel = the second brightness of each fourth pixel / the average value of the fourth corrected brightness Referring to Mathematical Formula 4, the fourth conversion brightness can be calculated by dividing the brightness value measured at the fourth pixel 604 by about 658.9 nits, which is the average value of the fourth corrected brightness. For example, as shown in Table 1, during the fourth light-emitting period, the brightness of the fourth pixel 604 corresponding to #1 can be measured as about 727.3 nits, and this value is divided by about 658.9 nits, which is the average value of the fourth corrected brightness (e.g., average corrected brightness). As a result, the fourth conversion brightness corresponding to about 1.103 can be calculated.

[0169] If the average value of all values ​​of the first to fourth conversion brightness is converted to 100%, each of the first to fourth conversion brightness may be expressed in the form of percentage as shown in Table 3.

[0170] [Table 3]

[0171] As shown in Table 3, the brightness measured per each lighting period and per a plurality of pixels may be corrected and confirmed in the form of a percentage.

[0172] Reference Figure 7 In step 770, the display panel 410 is determined to be defective based on the dispersion of the first conversion brightness to the fourth conversion brightness. For example, a brightness evaluation table as shown in Table 3 is derived, and the degree of dispersion of the brightness of the entire pixel from the average value is determined based on this. For example, if the dispersion exceeds about 2% with the average value as the center, the display panel 410 can be determined to be defective.

[0173] Fig.12 4 is a graph showing a dispersion of luminance uniformity of pixels of a display panel 410 according to an embodiment of the present invention.

[0174] exist Fig.12 In the figure, the horizontal axis represents the brightness rate in percentage. Fig.12 In , the vertical axis represents the number of pixels. Fig.12 The center, which corresponds to 100%, corresponds to the overall mean.

[0175] exist Fig.12 In FIG. 1 , the dotted line is a curve showing dispersion of pixel brightness before correction according to the present invention.

[0176] exist Fig.12 In FIG. 1 , the solid line is a curve showing dispersion of pixel brightness after correction according to the present invention.

[0177] Reference Fig.12 According to an inspection method of an embodiment, it can be confirmed that as a result of converting the brightness measured at each pixel based on the correction brightness, the brightness value measured from the same pixel each time is close to the average value, thereby reducing dispersion.

[0178] As a result of the brightness measurement according to an embodiment, if the dispersion exceeds about 2% around the average value, the display panel 410 may be determined to be defective. Fig.12 At points 1201 and 1202, when the brightness dispersion exceeds about 2% around the average value, it can be determined that the corresponding display panel 410 is defective.

[0179] The embodiments of the present invention are described above with reference to the accompanying drawings, but a person skilled in the art with ordinary knowledge in the technical field to which the present invention belongs can understand that the present invention can also be implemented in other specific forms without changing the technical concept or essential features of the present invention. Therefore, it should be understood that the embodiments described above are exemplary in all aspects and are not restrictive.

Claims

1. A method for inspecting a display device, comprising the following steps: During a period in which a first group of a plurality of pixels included in the display panel and a correction pixel are illuminated, measuring a first brightness of each first pixel included in the first group, and measuring a first corrected brightness of the correction pixel; During the period when the second group of the plurality of pixels and the correction pixel are illuminated, measuring a second brightness of each second pixel included in the second group, and measuring a second corrected brightness of the correction pixel; During the period when a third group of the plurality of pixels and the correction pixel are illuminated, measuring a third brightness of each third pixel included in the third group, and measuring a third corrected brightness of the correction pixel; During a period in which a fourth group of the plurality of pixels and the correction pixel are illuminated, measuring a fourth brightness of each fourth pixel included in the fourth group, and measuring a fourth corrected brightness of the correction pixel; determining an average corrected brightness by calculating an average of the first corrected brightness to the fourth corrected brightness; calculating a first conversion brightness, a second conversion brightness, a third conversion brightness, and a fourth conversion brightness by dividing each of the first brightness to the fourth brightness by the average corrected brightness; as well as Whether the display panel is defective or not is determined based on the dispersion degree of the first conversion luminance to the fourth conversion luminance.

2. The method for inspecting a display device according to claim 1, wherein: the first pixel included in the first group among the plurality of pixels is a pixel arranged in a first row and a first column among 2×2 pixels arranged adjacent to each other, the second pixel included in the second group among the plurality of pixels is a pixel arranged in the first row and the second column among the 2×2 pixels arranged adjacent to each other, The third pixel included in the third group among the plurality of pixels is a pixel arranged in the second row and the first column among the 2×2 pixels arranged adjacent to each other, The fourth pixel included in the fourth group among the plurality of pixels is a pixel arranged in the second row and the second column among the 2×2 pixels arranged adjacent to each other.

3. The method for inspecting a display device according to claim 1, wherein: While the first group and the correction pixels are illuminated, the pixels of the second to fourth groups are kept in an off state.

4. The method for inspecting a display device according to claim 1, wherein: While the second group and the correction pixels are illuminated, the pixels of the first group, the third group and the fourth group are kept in an off state.

5. The method for inspecting a display device according to claim 1, wherein: While the third group and the correction pixels are illuminated, the pixels of the first group, the second group, and the fourth group are kept in an off state.

6. The method for inspecting a display device according to claim 1, wherein: While the fourth group and the correction pixels are turned on, the pixels of the first to third groups are kept turned off.

7. The method for inspecting a display device according to claim 1, wherein: The correction pixels are arranged at the periphery of the display panel.

8. The method for inspecting a display device according to claim 1, wherein: The correction pixel includes a plurality of correction pixels.

9. The method for inspecting a display device according to claim 8, further comprising the following steps: While the pixels of the first to fourth groups are sequentially lit, the plurality of correction pixels are always lit.

10. The method for inspecting a display device according to claim 1, further comprising the following steps: If the dispersion exceeds 2% based on the average value, the display panel is determined to be defective.

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