Amplitude and phase controllable AC voltage generation method and device

Abstract

The invention discloses an amplitude and phase controllable AC voltage generation method and device. The method comprises the following steps: performing frequency synthesis on a Beidou second pulse signal through a frequency synthesis technology to generate a square wave signal; inputting the square wave signal as a clock into a direct current frequency modulation module to generate three paths of direct current square wave signals with variable frequency; inputting the square wave signal as a clock into an alternating current frequency modulation module to generate three paths of alternating current square wave signals with adjustable frequency; inputting the three paths of direct-current square wave signals into a frequency voltage conversion circuit to output direct-current voltage signals, and inputting the three paths of alternating-current square wave signals into the frequency voltage conversion circuit to output alternating-current voltage signals; and respectively inputting the direct-current voltage signal and the alternating-current voltage signal to two ends of a multiplier to generate amplitude and phase controllable alternating-current voltage.

Description

Technical Field

[0001] The present invention relates to the technical field of remote calibration measurement, and more specifically, to a method and device for generating an amplitude-phase controllable AC voltage. Background Art

[0002] In the 1950s and 1960s, the method for calibrating transformer testers was to calibrate each component of the tester separately, and then determine the overall error of the tester after combining the component errors of each part. This method is called the item-by-item calibration method. This method has poor operability and does not have the versatility of tester calibration. Moreover, since the working state of the circuit is completely different from the actual working state of the circuit when each component or module is calibrated, the error of the calibration result of the tester is large, so it was quickly eliminated. Later, the calibration of transformer testers was carried out by the overall calibration of transformer testers. The device for calibrating the tester is called the transformer tester inspection device. The transformer tester inspection device is generally composed of a standard proportional source, a voltage divider, a phase shifter, a control power supply, etc. By adjusting the phase shifter, the standard in-phase component and the orthogonal component output by the standard proportional source are transmitted to the transformer tester to be tested, thereby meeting the electrical component requirements of the transformer tester.

[0003] The calibration of the transformer tester requires accurate reference voltage and differential voltage, and the ratio difference and phase difference between the reference voltage and the differential voltage need to be sufficiently accurate. However, the traditional transformer tester calibration device, which provides reference voltage and differential voltage respectively through a precision signal source, still has two drawbacks: first, after changing the calibration location, the precision signal source is easily affected by the environment during transportation; second, the precision signal source lacks correlation, and the accuracy of the ratio difference and phase difference between the two cannot be guaranteed. Summary of the invention

[0004] In view of the deficiencies in the prior art, the present invention provides a method and device for generating an amplitude-phase controllable AC voltage.

[0005] According to one aspect of the present invention, there is provided a method for generating an amplitude-phase controllable AC voltage, comprising:

[0006] The Beidou second pulse signal is frequency synthesized through frequency synthesis technology to generate a square wave signal;

[0007] Input the square wave signal as a clock into a DC frequency modulation module to generate three DC square wave signals with variable frequencies;

[0008] Inputting the square wave signal as a clock into an AC frequency modulation module to generate three frequency-adjustable AC square wave signals;

[0009] Input the three DC square wave signals into a frequency-voltage conversion circuit to output a DC voltage signal, and input the three AC square wave signals into a frequency-voltage conversion circuit to output an AC voltage signal;

[0010] The DC voltage signal and the AC voltage signal are respectively input to two ends of a multiplier to generate an amplitude-phase controllable AC voltage.

[0011] Optionally, the frequency of the square wave signal is 10 MHz, and the duty cycle is 50%.

[0012] Optionally, the frequency-to-voltage conversion circuit includes a current source (I charge ), a first controllable switch (SW1), a second controllable switch (SW2), a third controllable switch (SW3), a diode (D), a first operational amplifier (A1), a second operational amplifier (A2), a first capacitor (C1), a second capacitor (C2), a first discharge resistor (R1), a second discharge resistor (R3) and an RC filter circuit, wherein the RC filter circuit includes a filter resistor (R2) and a third capacitor (C3), and,

[0013] The current source (I charge ) is connected to the positive end of the first controllable switch (SW1) and the positive end of the diode (D); one end of the first discharge resistor (R1) is connected to the negative end of the first controllable switch (SW1), and the other end of the first discharge resistor (R1) is grounded; the negative end of the diode (D) is connected to the positive end of the third controllable switch (SW3), one end of the first capacitor (C1), and the positive end of the first operational amplifier (A1), and the other end of the first capacitor (C1) is connected; the negative end of the third controllable switch (SW3) is connected to one end of the second discharge resistor (R3), and the other end of the second discharge resistor (R3) is grounded;

[0014] The negative end of the first operational amplifier (A1) is connected to the output end of the first operational amplifier (A1); the output end of the first operational amplifier (A1) is connected to the positive end of the second controllable switch (SW2); the negative end of the third controllable switch (SW3) is connected to one end of the second capacitor (C2) and the positive end of the second operational amplifier (A2); the negative end of the second operational amplifier (A2) is connected to the output end of the second operational amplifier (A2); the output end of the second operational amplifier (A2) is connected to one end of the filter resistor (R2); the other end of the filter resistor (R2) is connected to one end of the third capacitor (C3); and the other end of the third capacitor (C3) is grounded.

[0015] Optionally, the three frequency-variable DC square wave signals are a first DC square wave signal S1, a second DC square wave signal S2, and a third DC square wave signal S3, and

[0016] Inputting the three DC square wave signals into a frequency-voltage conversion circuit to output a DC voltage signal comprises:

[0017] When the first DC square wave signal S1 is at a high level, and the second DC square wave signal S2 and the third DC square wave signal S3 are at a low level, a first DC voltage signal is output;

[0018] When the second DC square wave signal S2 is at a high level, and the first DC square wave signal S1 and the third DC square wave signal S3 are at a low level, a second DC voltage signal is output;

[0019] When the third DC square wave signal S3 is at a high level, and the first DC square wave signal S1 and the second DC square wave signal S2 are at a low level, a third DC voltage signal is output;

[0020] The DC voltage signal is output according to the first DC voltage signal, the second DC voltage signal and the third DC voltage signal.

[0021] Optionally, when the first DC square wave signal S1 is at a high level, and the second DC square wave signal S2 and the third DC square wave signal S3 are at a low level, outputting a first DC voltage signal comprises:

[0022] When the first DC square wave signal S1 is at a high level and the second DC square wave signal S2 and the third DC square wave signal S3 are at a low level, the first controllable switch (SW1), the second controllable switch (SW2) and the third controllable switch (SW3) are all disconnected, the diode (D) is turned on, and the current source charges the first capacitor (C1) through the diode (D) to output a first DC voltage signal.

[0023] Optionally, the first DC voltage signal is:

[0024]

[0025] In the formula, I C is the current source current, F in is the frequency of the first DC square wave signal S1 of the first switch (SW1), and C1 is the size of the first capacitor (C1).

[0026] Optionally, when the second DC square wave signal S2 is at a high level and the first DC square wave signal S1 and the third DC square wave signal S3 are at a low level, outputting a second DC voltage signal comprises:

[0027] When the second DC square wave signal S2 is at a high level and the first DC square wave signal S1 and the third DC square wave signal S3 are at a low level, the first controllable switch (SW1) and the second controllable switch (SW2) are turned on, the third controllable switch (SW3) is turned off, the diode (D) is cut off, the first capacitor (C1) starts to discharge, and the second capacitor (C2) is charged at the same time, until the voltage between the first capacitor (C1) and the second capacitor (C2) reaches a balance, and a second DC voltage signal is output.

[0028] Optionally, the second DC voltage signal is:

[0029]

[0030] In the formula, I C is the current source current, F in is the frequency of the first DC square wave signal S1 of the first switch (SW1), and C1 is the size of the first capacitor (C1).

[0031] Optionally, when the third DC square wave signal S3 is at a high level and the first DC square wave signal S1 and the second DC square wave signal S2 are at a low level, outputting a third DC voltage signal comprises:

[0032] When the third DC square wave signal S3 is at a high level and the first DC square wave signal S1 and the second DC square wave signal S2 are at a low level, the first controllable switch (SW1) and the third controllable switch (SW3) are turned on, the second controllable switch (SW2) is turned off, the residual voltage on the first capacitor (C1) is gradually released through the second discharge resistor (R3), and the voltage on the second capacitor (C2) is processed by the second operational amplifier (A2) to output a third DC voltage signal.

[0033] Optionally, the third DC voltage signal is:

[0034]

[0035] In the formula, I C is the current source current, F in is the frequency of the first DC square wave signal S1 of the first switch (SW1), and C1 is the size of the first capacitor (C1).

[0036] According to another aspect of the present invention, there is provided an amplitude and phase controllable AC voltage generating device, comprising:

[0037] A synthesis module is used to perform frequency synthesis on the Beidou second pulse signal through frequency synthesis technology to generate a square wave signal;

[0038] A first generating module, used for inputting the square wave signal as a clock into a DC frequency modulation module to generate three DC square wave signals with variable frequencies;

[0039] A second generating module is used to input the square wave signal as a clock into the AC frequency modulation module to generate three frequency-adjustable AC square wave signals;

[0040] An output module, used to input the three DC square wave signals into a frequency-voltage conversion circuit to output a DC voltage signal, and to input the three AC square wave signals into a frequency-voltage conversion circuit to output an AC voltage signal;

[0041] The generating module is used to input the DC voltage signal and the AC voltage signal to two ends of a multiplier respectively, so as to generate an amplitude-phase controllable AC voltage.

[0042] Thus, the present invention uses frequency synthesis technology to perform frequency synthesis on Beidou second pulse signals to generate square wave signals; the square wave signal is input as a clock into the DC frequency modulation module to generate three frequency-variable DC square wave signals; the square wave signal is input as a clock into the AC frequency modulation module to generate three frequency-adjustable AC square wave signals; the three DC square wave signals are input into the frequency-voltage conversion circuit to output DC voltage signals, and the three AC square wave signals are input into the frequency-voltage conversion circuit to output AC voltage signals; the DC voltage signal and the AC voltage signal are respectively input into the two ends of the multiplier to generate an amplitude-phase controllable AC voltage. Based on the amplitude and frequency conversion technology of Beidou time-frequency synchronization, the amplitude and phase control technology of the industrial frequency signal based on Beidou time-frequency synchronization is studied, and the problem of accurately reproducing the reference voltage and difference voltage of the transformer tester is solved. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] A more complete understanding of exemplary embodiments of the present invention may be obtained by referring to the following drawings:

[0044] Figure 1 It is a flow chart of a method for generating an amplitude-phase controllable AC voltage provided by an exemplary embodiment of the present invention;

[0045] Figure 2 It is a high-precision frequency-voltage conversion flow chart based on Beidou second pulse provided by an exemplary embodiment of the present invention;

[0046] Figure 3 is a frequency-voltage conversion principle diagram provided by an exemplary embodiment of the present invention;

[0047] Figure 4 is a control signal waveform diagram of a switch provided by an exemplary embodiment of the present invention;

[0048] Figure 5 is a schematic diagram of frequency conversion of an input control signal S1 provided by an exemplary embodiment of the present invention;

[0049] Figure 6 is a block diagram of an AC signal amplitude control scheme provided by an exemplary embodiment of the present invention;

[0050] Figure 7 is a block diagram of an AC signal phase control scheme provided by an exemplary embodiment of the present invention;

[0051] Figure 8 It is a structural schematic diagram of an amplitude and phase controllable AC voltage generating device provided by an exemplary embodiment of the present invention. DETAILED DESCRIPTION

[0052] Below, the exemplary embodiments according to the present invention will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments of the present invention, and it should be understood that the present invention is not limited to the exemplary embodiments described here.

[0053] It should be noted that the relative arrangement of components and steps, the numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.

[0054] Those skilled in the art can understand that the terms "first" and "second" in the embodiments of the present invention are only used to distinguish different steps, devices or modules, etc., and neither represent any specific technical meaning nor indicate the necessary logical order between them.

[0055] It should also be understood that, in the embodiments of the present invention, “plurality” may refer to two or more than two, and “at least one” may refer to one, two or more than two.

[0056] It should also be understood that any component, data or structure mentioned in the embodiments of the present invention can generally be understood as one or more, unless explicitly limited or otherwise indicated in the context.

[0057] In addition, the term "and / or" in the present invention is only a description of the association relationship of the associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in the present invention generally indicates that the associated objects before and after are in an "or" relationship.

[0058] It should also be understood that the description of the various embodiments of the present invention focuses on the differences between the various embodiments, and the same or similar aspects thereof can be referenced to each other, and for the sake of brevity, they will not be described one by one.

[0059] At the same time, it should be understood that for the convenience of description, the sizes of the various parts shown in the drawings are not drawn according to the actual proportional relationship.

[0060] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

[0061] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered part of the specification.

[0062] It should be noted that like reference numerals and letters refer to similar items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0063] Embodiments of the present invention can be applied to electronic devices such as terminal devices, computer systems, servers, etc., which can operate with many other general or special computing system environments or configurations. Examples of well-known terminal devices, computing systems, environments and / or configurations suitable for use with electronic devices such as terminal devices, computer systems, servers, etc. include, but are not limited to: personal computer systems, server computer systems, thin clients, thick clients, handheld or laptop devices, microprocessor-based systems, set-top boxes, programmable consumer electronics, network personal computers, small computer systems, large computer systems, and distributed cloud computing technology environments including any of the above systems, etc.

[0064] Electronic devices such as terminal devices, computer systems, servers, etc. can be described in the general context of computer system executable instructions (such as program modules) executed by computer systems. Generally, program modules can include routines, programs, object programs, components, logic, data structures, etc., which perform specific tasks or implement specific abstract data types. Computer systems / servers can be implemented in a distributed cloud computing environment, where tasks are performed by remote processing devices linked through a communication network. In a distributed cloud computing environment, program modules can be located on local or remote computing system storage media including storage devices.

[0065] Exemplary Methods

[0066] Figure 1 FIG. 1 is a flow chart of a method for generating an amplitude-phase controllable AC voltage according to an exemplary embodiment of the present invention. This embodiment can be applied to electronic devices, such as Figure 1 As shown, the amplitude-phase controllable AC voltage generation method 100 includes the following steps:

[0067] Step 101, frequency synthesis is performed on the Beidou pulse second signal by frequency synthesis technology to generate a square wave signal;

[0068] Step 102, inputting the square wave signal as a clock into a DC frequency modulation module to generate three DC square wave signals with variable frequencies;

[0069] Step 103, inputting the square wave signal as a clock into an AC frequency modulation module to generate three frequency-adjustable AC square wave signals;

[0070] Step 104, input the three DC square wave signals into a frequency-voltage conversion circuit to output a DC voltage signal, and input the three AC square wave signals into a frequency-voltage conversion circuit to output an AC voltage signal;

[0071] Step 105: input the DC voltage signal and the AC voltage signal to two ends of a multiplier respectively to generate an amplitude-phase controllable AC voltage.

[0072] Specifically, in order to provide accurate reference voltage and differential voltage, and ensure the accuracy of the ratio difference and phase difference between the two, the present invention proposes a frequency-voltage conversion device based on FPGA, studies the amplitude and frequency conversion technology based on Beidou time-frequency synchronization, studies the power frequency signal amplitude and phase control technology based on Beidou time-frequency synchronization, and solves the problem of accurately reproducing the reference voltage and differential voltage of the transformer tester.

[0073] In order to accurately reproduce the ratio difference signal and phase difference signal of the transformer tester, it is necessary to generate a high-precision 50Hz AC signal, and the amplitude and phase of the AC signal can be accurately controlled. The present invention uses the existing Beidou second signal to generate a 10MHz, 50% duty cycle square wave signal S0 through frequency synthesis technology. The square wave signal S0 is used as the clock for FPGA operation and input into the FPGA. At the same time, in the FPGA, the DC control RTL code is written to output three frequency-variable square wave signals S1, S2, and S3. S1 is used to control the switch SW1 after being inverted, S2 directly controls SW2, and S3 directly controls SW3. It is input into the high-precision voltage-frequency conversion module to output a DC voltage signal with controllable amplitude, recorded as V1.

[0074] At the same time, the square wave signal S0 is input into the FPGA, and the AC control RTL code is written to output square wave signals S1`, S2`, and S3` that change according to the 50Hz sine waveform. They are input into the high-precision voltage-frequency conversion module to output a 50Hz AC voltage signal with controllable phase and constant amplitude, which is recorded as V2.

[0075] Input V1 and V2 into the multiplier together, and output an AC voltage signal with controllable amplitude and phase. The amplitude of the AC voltage V2 is controlled by the DC voltage V1; the phase of the AC voltage V2 is controlled by inputting instructions to the FPGA through the serial port to control S1`, S2`, S3`, thereby controlling the phase of the AC voltage. The overall principle block diagram is shown below. Figure 2 shown.

[0076] 1) Frequency-to-voltage conversion technology (frequency signal generates DC signal)

[0077] The key to high-precision frequency-to-voltage conversion technology based on Beidou second pulses lies in the frequency-to-voltage conversion (FVC) module. The frequency signal S0 obtained by frequency synthesis is input into the FPGA, and the three control signals S1, S2, and S3 are output to act on the frequency-to-voltage conversion circuit. The schematic diagram of the frequency-to-voltage conversion circuit is shown in the figure. Figure 3 shown.

[0078] Since the switch is a voltage-controlled switch, its two ends are defined as a positive end and a negative end respectively. The positive end of the current source is connected to the positive end of the switch SW1 and the positive end of the diode D; one end of the resistor R1 is connected to the negative end of the switch SW1, and the other end of R1 is grounded; the negative end of the diode D is connected to the positive end of the switch SW3, one end of the capacitor C1, and the positive end of the operational amplifier A1, and the other end of the capacitor C1 is connected; the negative end of the switch SW3 is connected to one end of R3, and the other end of R3 is grounded. The negative end of the operational amplifier A1 is connected to the output end of the operational amplifier A1; the output end of the operational amplifier A1 is connected to the positive end of the switch SW2; the negative end of the switch SW3 is connected to one end of the capacitor C2 and the positive end of the operational amplifier A2; the negative end of the operational amplifier A2 is connected to the output end of the operational amplifier A2; the output end of the operational amplifier A2 is connected to one end of the resistor R2; the other end of the resistor R2 is connected to one end of the capacitor C3; the other end of the capacitor C3 is grounded

[0079] The FVC module includes a current source I charge , controllable switches SW1, SW2, SW3, diode D, operational amplifiers A1, A2 and capacitors C1, C2, discharge resistors R1, R3, RC filter circuits R2 and C3, are designed to convert the frequency input by Beidou into a stable DC voltage signal. Through the precise design of the module, the circuit can respond quickly to control signals S1, S2, S3 in different frequency ranges, and use the high-speed switching of analog electronic switches to flexibly respond to changes in wide-band input signals, thereby achieving efficient conversion of frequency signals to DC voltage signals.

[0080] In each working cycle, the circuit operation is mainly divided into three main stages, where the control signals S1, S2, S3 are as follows Figure 4 shown.

[0081] Phase 1: S1 is high level, S2 and S3 are low level, and capacitor C1 is charged.

[0082] When the input S1 is high level and S2 and S3 are low level, switches SW1, SW2 and SW3 are all disconnected, diode D is turned on, and the current source charges capacitor C1 through diode D. During this process, SW2 and SW3 remain disconnected to ensure that the charging current only passes through capacitor C1, thereby charging it. After this stage, the voltage of capacitor C1 is:

[0083]

[0084] In this stage, the charging speed of capacitor C1 is determined by the high level duration of input signal S1, so that the voltage on C1 changes with the duration of the high level. The circuit can accurately capture and control the charging of frequency signals in a wide frequency band by quickly responding to high-frequency input signals.

[0085] Phase 2: S2 is high level, S1 and S3 are low level, and capacitor C2 is charged.

[0086] When the input S2 is high and S1 and S3 are low, switches SW1 and SW2 are turned on and SW3 is turned off. Diode D is cut off and the current no longer flows to C1. In order to prevent the current source from overloading, switch SW1 is turned on and the current flows through the bypass loop of resistor R1. At this time, switch SW2 is turned on and SW3 is turned off, capacitor C1 starts to discharge and capacitor C2 is charged at the same time until the voltage between C1 and C2 reaches equilibrium. The voltage of capacitor C2 is:

[0087]

[0088] In this stage, operational amplifier A1 acts as a voltage follower and can ensure that the voltage between C1 and C2 can be quickly balanced through the feedback loop, effectively processing signal changes in different frequency ranges.

[0089] Phase 3: S3 high level, S1, S2 low level, capacitor C1 discharges.

[0090] When the input S3 is high level, S1, S2 are low level. At this time, switches SW1, SW3 are turned on, and SW2 is turned off. The remaining voltage on capacitor C1 is gradually released through resistor R3, and the voltage on C2 is processed by operational amplifier A2 and output to the final output port. The output end is filtered by an RC filter circuit composed of resistor R2 and capacitor C3 to ensure that the circuit can output a stable DC signal. The RC filter circuit can effectively filter signals with a wider frequency, so that the circuit still maintains a high output stability under the processing of wide-band input signals.

[0091] The circuit works by completing the above three stages in each cycle. At the end of each cycle, capacitor C1 completes charging and discharging, the charge between capacitor C2 and C1 gradually balances, and finally outputs a stable DC voltage. Due to the existence of voltage follower A1, the output voltage reaches a stable state after one clock cycle, and the subsequent charging and discharging stages will not change the voltage at point C. The final output result is shown in the following formula:

[0092]

[0093] 2) AC voltage signal generation technology based on frequency-voltage conversion (generating AC voltage signal based on 1)

[0094] The first section introduces how to convert the three control signals S1, S2, and S3 output by FPGA into DC voltage signals. If the frequency of the input control signals S1, S2, and S3 is changed to S1`, S2`, and S3, so that the frequency of the control square wave signal can change with the instantaneous value of the sine wave, the frequency-to-voltage conversion circuit of the present invention will output an AC voltage signal. The change process of the control signal S1 is shown in Figure 5 shown.

[0095] Then the frequency of the voltage signal output by the FVC circuit is exactly equal to the frequency of the sinusoidal carrier in the above figure, and the amplitude of the output AC voltage signal is fixed; by changing the initial phase of the sinusoidal carrier, the phase of the output AC voltage signal can be adjusted.

[0096] 3) Amplitude and phase control of AC voltage signal

[0097] The second section introduces the generation of AC voltage signals. Since the phase of the generated AC voltage signal is easy to control, that is, just changing the initial phase of the sinusoidal carrier, we will now introduce in detail how to control the amplitude of the AC voltage signal.

[0098] According to the analysis in the first section, when the frequency of the input control signals S1, S2, and S3 is changed, the output DC voltage will also change. The output DC voltage signal is connected to one end of the high-precision multiplier, and the AC voltage signal output in the second section is output to the other end of the multiplier. When the frequency of the input control signals S1, S2, and S3 is changed, the amplitude of the output AC voltage signal will change, thereby indirectly controlling the final output AC voltage amplitude by controlling the DC voltage amplitude. The specific schematic diagram is as follows Figure 2 shown.

[0099] In one embodiment of the present invention, the specific implementation is as follows:

[0100] 1) Example of frequency-to-voltage conversion circuit

[0101] Step 1: S1 is high level, S2 and S3 are low level, and capacitor C1 is charged.

[0102] When the input S1 is high and S2 and S3 are low, switches SW1, SW2 and SW3 are all disconnected, diode D is turned on, and the current source charges capacitor C1 through diode D. During this process, SW2 and SW3 remain disconnected to ensure that the charging current only passes through capacitor C1, thereby charging it. In this stage, the charging speed of capacitor C1 is determined by the high-level duration of the input signal, so that the voltage on C1 changes with the duration of the high level. This circuit achieves accurate capture and charging control of frequency signals within a wide band by quickly responding to high-frequency input signals.

[0103] High-speed analog switch SW1 and diode D are used to control capacitor C1 to charge with a constant current. charge , ensuring the stability and accuracy of the charging process. C1 and C2 use mica capacitors as circuit capacitors to ensure that the entire charging process is not only stable but also extremely accurate, and through the fine adjustment of the parameters of capacitors C1 and C2, the DC voltage output can be precisely controlled;

[0104] Step 2: S2 is high level, S1 and S3 are low level, and capacitor C2 is charged.

[0105] When the input S2 is high and S1 and S3 are low, switches SW1 and SW2 are turned on and SW3 is turned off. Diode D is cut off and the current no longer flows to C1. In order to prevent the current source from overloading, switch SW1 is turned on and the current flows through the bypass loop of resistor R1. At this time, switch SW2 is turned on and SW3 is turned off, capacitor C1 begins to discharge and capacitor C2 is charged at the same time until the voltage between C1 and C2 reaches equilibrium. In this stage, operational amplifier A1 acts as a voltage follower and can ensure that the voltage between C1 and C2 can be quickly balanced through the feedback loop, effectively handling signal changes in different frequency ranges.

[0106] A voltage follower composed of an operational amplifier A1 is used to ensure that the voltages at both ends of C2 are balanced within a frequency cycle of a control signal, thereby achieving high-speed voltage-frequency conversion.

[0107] Step 3: S3 is high level, S1 and S2 are low level, and capacitor C1 is discharged.

[0108] When the input S3 is high level, S1, S2 is low level. At this time, switches SW1, SW3 are turned on, and SW2 is turned off. The residual voltage on capacitor C1 is gradually released through resistor R3, and the voltage on C2 is processed by operational amplifier A2 and output to the final output port. The output end is filtered by an RC filter circuit composed of resistor R2 and capacitor C3 to ensure that the circuit can output a stable DC signal. The RC filter circuit can effectively filter signals with a wider frequency, so that the circuit still maintains a high output stability under the processing of broadband input signals. The circuit works to complete the above three stages in each cycle. At the end of each cycle, capacitor C1 completes charging and discharging, and the charge between capacitors C2 and C1 is gradually balanced, and finally a stable DC voltage is output. Due to the existence of voltage follower A1, the output voltage reaches a stable state after one clock cycle, and the subsequent charging and discharging stages will not change the voltage at point c.

[0109] The discharge speed of capacitor C1 is controlled by resistor R3 to ensure that there is no voltage difference between the two ends of C1 after the discharge process is completed; R1 is used as the current source I charge The bypass ensures that the current source can work normally when charging and does not affect other parts of the circuit. The RC filter circuit composed of R2 and C3 filters out high-frequency interference in the circuit.

[0110] 2) Generation of DC and AC voltages and amplitude and phase control of AC voltages

[0111] (1) DC voltage signal

[0112] The timing of the DC voltage generating the required control signals S1, S2, S3 is as above Figure 4 As shown in the figure, while ensuring that the frequencies of the three control signals are the same, the timing of S2 and S3 is precisely controlled.

[0113] The timing of S2 and S3 is precisely controlled by FPGA, and thus the charging time of C2 and the discharging time of C1 are precisely controlled, thereby ensuring the accuracy of the conversion of the frequency-to-voltage conversion module.

[0114] (2) AC voltage signal

[0115] To generate AC voltage, the control signals S1, S2, S3 must satisfy Figure 3 The timing shown, the frequency of the control signal changes with the instantaneous value of the sine wave, specifically:

[0116] The present invention uses FPGA to perform sine wave modulation on the square wave signal generated by frequency synthesis. First, a sine wave of one cycle is sampled, 1024 points are sampled evenly, and the sine wave data is stored in the ROM of the FPGA. Then a timer is designed to read the instantaneous value of the sine wave stored in the ROM at a certain speed, and the instantaneous value is mapped to the frequency of the control signal S1, S2, S3 at a certain ratio, so that the frequency of the control signal meets the above Figure 4 timing requirements.

[0117] (3) Amplitude and phase control of AC voltage

[0118] The block diagram of the AC voltage amplitude control scheme is as follows Figure 6 shown.

[0119] The FPGA serial port controls the parameters of the DC control unit, changes the frequency of the control signals S1, S2, and S3, and thus controls the magnitude of the DC voltage generated by the FVC. The DC voltage is output to the multiplier, and the standard AC voltage is output to the other end of the multiplier, thereby generating an AC voltage with controllable amplitude.

[0120] The block diagram of the AC voltage phase control scheme is as follows Figure 7 shown.

[0121] In the above FPGA solution for implementing precise phase control, the phase increment determines the phase of the output signal. A phase accumulator is designed in the FPGA, which adds a fixed phase increment value in each clock cycle. This phase increment value is used to determine the phase step of the accumulator in each clock cycle, thereby determining the phase of the output signal.

[0122] Precision phase control is divided into two parts. The first step is the coarse adjustment of the phase. First, use the python script to write code to obtain the sine wave data of 1024 points in a cycle and store it in ROM. Then one point occupies 360° / 1024 of the entire cycle, that is, 0.352°. Output instructions through the serial port to change the initial value of the ROM address read by the FPGA, thereby achieving phase offset. At this time, the resolution of phase control is 0.352°.

[0123] If the phase resolution is to be further improved on the basis of 0.352° resolution, it is necessary to use FPGA to build a phase accumulator, which will perform further delay on the basis of 0.352°. Assuming the number of bits of the phase accumulator is N, the maximum delay that the accumulator can perform is:

[0124] T=(2 N -1) / f clk

[0125] The number of bits of the phase accumulator is now assumed to be 10 bits. After conversion, the theoretical minimum phase resolution that the accumulator can achieve is 0.352° / 1024, which is 0.0003°.

[0126] Therefore, the present invention uses the Beidou satellite clock signal in combination with a high-precision frequency-voltage conversion module (FVC) to convert the frequency signal into a voltage signal. The core of the Beidou satellite clock signal is the rubidium atomic clock, and its accuracy mainly refers to the frequency stability, which is directly related to the intensity of the atomic transition signal and is not affected by factors such as region and ambient temperature; at the same time, in the FVC module, the core part of the frequency-to-voltage conversion is strongly associated with passive precision resistors and capacitors, reducing its dependence on active devices, thereby greatly reducing the impact of the environment on the stability of the output voltage.

[0127] The present invention uses FPGA to control the amplitude and phase of the power frequency voltage signal, and uses the characteristics of FPGA's high speed and high stability to control the phase and amplitude of the reference voltage and the difference voltage at the same time, ensuring the strong correlation between the two. In addition, the present invention takes advantage of FPGA's advantages in timing control, parallel processing, and reconfigurability: it can achieve high-precision control at nanosecond accuracy to ensure accurate and reliable operation; it can process multiple timing tasks at the same time, improve the overall processing speed, and reduce delays; it allows flexible programming of timing control logic to cope with different application requirements and design changes. The timing control implemented by the present invention through hardware is faster and more efficient than traditional software.

[0128] Exemplary Devices

[0129] Figure 8 1 is a schematic diagram of the structure of an amplitude-phase controllable AC voltage generating device provided by an exemplary embodiment of the present invention. Figure 8 As shown, the device 800 includes:

[0130] The synthesis module 810 is used to perform frequency synthesis on the Beidou pulse second signal through frequency synthesis technology to generate a square wave signal;

[0131] A first generating module 820 is used to input the square wave signal as a clock into a DC frequency modulation module to generate three DC square wave signals with variable frequencies;

[0132] The second generating module 830 is used to input the square wave signal as a clock into the AC frequency modulation module to generate three frequency-adjustable AC square wave signals;

[0133] The output module 840 is used to input the three DC square wave signals into the frequency-voltage conversion circuit to output a DC voltage signal, and to input the three AC square wave signals into the frequency-voltage conversion circuit to output an AC voltage signal;

[0134] The generating module 850 is used to input the DC voltage signal and the AC voltage signal to two ends of a multiplier respectively, so as to generate an amplitude-phase controllable AC voltage.

[0135] Optionally, the frequency of the square wave signal is 10 MHz, and the duty cycle is 50%.

[0136] Optionally, the frequency-to-voltage conversion circuit includes a current source (I charge ), a first controllable switch (SW1), a second controllable switch (SW2), a third controllable switch (SW3), a diode (D), a first operational amplifier (A1), a second operational amplifier (A2), a first capacitor (C1), a second capacitor (C2), a first discharge resistor (R1), a second discharge resistor (R3) and an RC filter circuit, wherein the RC filter circuit includes a filter resistor (R2) and a third capacitor (C3), and,

[0137] The current source (I charge ) is connected to the positive end of the first controllable switch (SW1) and the positive end of the diode (D); one end of the first discharge resistor (R1) is connected to the negative end of the first controllable switch (SW1), and the other end of the first discharge resistor (R1) is grounded; the negative end of the diode (D) is connected to the positive end of the third controllable switch (SW3), one end of the first capacitor (C1), and the positive end of the first operational amplifier (A1), and the other end of the first capacitor (C1) is connected; the negative end of the third controllable switch (SW3) is connected to one end of the second discharge resistor (R3), and the other end of the second discharge resistor (R3) is grounded;

[0138] The negative end of the first operational amplifier (A1) is connected to the output end of the first operational amplifier (A1); the output end of the first operational amplifier (A1) is connected to the positive end of the second controllable switch (SW2); the negative end of the third controllable switch (SW3) is connected to one end of the second capacitor (C2) and the positive end of the second operational amplifier (A2); the negative end of the second operational amplifier (A2) is connected to the output end of the second operational amplifier (A2); the output end of the second operational amplifier (A2) is connected to one end of the filter resistor (R2); the other end of the filter resistor (R2) is connected to one end of the third capacitor (C3); and the other end of the third capacitor (C3) is grounded.

[0139] Optionally, the three frequency-variable DC square wave signals are a first DC square wave signal S1, a second DC square wave signal S2, and a third DC square wave signal S3, and

[0140] The output module 840 inputs the three DC square wave signals into the frequency-to-voltage conversion circuit to output a DC voltage signal, including:

[0141] A first output submodule, configured to output a first DC voltage signal when the first DC square wave signal S1 is at a high level, and the second DC square wave signal S2 and the third DC square wave signal S3 are at low levels;

[0142] A second output submodule, configured to output a second DC voltage signal when the second DC square wave signal S2 is at a high level and the first DC square wave signal S1 and the third DC square wave signal S3 are at low levels;

[0143] a third output submodule, configured to output a third DC voltage signal when the third DC square wave signal S3 is at a high level and the first DC square wave signal S1 and the second DC square wave signal S2 are at low levels;

[0144] The fourth output submodule is used to output the DC voltage signal according to the first DC voltage signal, the second DC voltage signal and the third DC voltage signal.

[0145] Optionally, the first output submodule includes:

[0146] The first output unit is used for, when the first DC square wave signal S1 is at a high level and the second DC square wave signal S2 and the third DC square wave signal S3 are at a low level, the first controllable switch (SW1), the second controllable switch (SW2) and the third controllable switch (SW3) are all disconnected, the diode (D) is turned on, and the current source charges the first capacitor (C1) through the diode (D), and outputs a first DC voltage signal.

[0147] Optionally, the first DC voltage signal is:

[0148]

[0149] In the formula, I C is the current source current, F in is the frequency of the first DC square wave signal S1 of the first switch (SW1), and C1 is the size of the first capacitor (C1).

[0150] Optionally, the second output submodule includes:

[0151] The second output unit is used for, when the second DC square wave signal S2 is at a high level and the first DC square wave signal S1 and the third DC square wave signal S3 are at a low level, the first controllable switch (SW1) and the second controllable switch (SW2) are turned on, the third controllable switch (SW3) is turned off, the diode (D) is turned off, the first capacitor (C1) starts to discharge, and the second capacitor (C2) is charged at the same time, until the voltage between the first capacitor (C1) and the second capacitor (C2) reaches a balance, and outputs a second DC voltage signal.

[0152] Optionally, the second DC voltage signal is:

[0153]

[0154] In the formula, I C is the current source current, F in is the frequency of the first DC square wave signal S1 of the first switch (SW1), and C1 is the size of the first capacitor (C1).

[0155] Optionally, the third output submodule includes:

[0156] A third output unit is used for, when the third DC square wave signal S3 is at a high level and the first DC square wave signal S1 and the second DC square wave signal S2 are at a low level, the first controllable switch (SW1) and the third controllable switch (SW3) are turned on, the second controllable switch (SW2) is turned off, the residual voltage on the first capacitor (C1) is gradually released through the second discharge resistor (R3), and the voltage on the second capacitor (C2) is processed by the second operational amplifier (A2) to output a third DC voltage signal.

[0157] Optionally, the third DC voltage signal is:

[0158]

[0159] In the formula, I C is the current source current, F in is the frequency of the first DC square wave signal S1 of the first switch (SW1), and C1 is the size of the first capacitor (C1).

[0160] The above description has been given for the purpose of illustration and description. In addition, this description is not intended to limit the embodiments of the present invention to the forms disclosed herein. Although a number of example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, changes, additions and sub-combinations thereof.

Claims

1. A method for generating an amplitude-phase controllable AC voltage, characterized in that: include: The Beidou second pulse signal is frequency synthesized through frequency synthesis technology to generate a square wave signal; Input the square wave signal as a clock into a DC frequency modulation module to generate three DC square wave signals with variable frequencies; Inputting the square wave signal as a clock into an AC frequency modulation module to generate three frequency-adjustable AC square wave signals; Input the three DC square wave signals into a frequency-voltage conversion circuit to output a DC voltage signal, and input the three AC square wave signals into a frequency-voltage conversion circuit to output an AC voltage signal; The DC voltage signal and the AC voltage signal are respectively input to two ends of a multiplier to generate an amplitude-phase controllable AC voltage.

2. The method according to claim 1, characterized in that: The frequency of the square wave signal is 10 MHz, and the duty cycle is 50%.

3. The method according to claim 1, characterized in that The frequency-to-voltage conversion circuit includes a current source (I charge ), a first controllable switch (SW1), a second controllable switch (SW2), a third controllable switch (SW3), a diode (D), a first operational amplifier (A1), a second operational amplifier (A2), a first capacitor (C1), a second capacitor (C2), a first discharge resistor (R1), a second discharge resistor (R3) and an RC filter circuit, wherein the RC filter circuit includes a filter resistor (R2) and a third capacitor (C3), and, The current source (I charge ) is connected to the positive end of the first controllable switch (SW1) and the positive end of the diode (D); one end of the first discharge resistor (R1) is connected to the negative end of the first controllable switch (SW1), and the other end of the first discharge resistor (R1) is grounded; the negative end of the diode (D) is connected to the positive end of the third controllable switch (SW3), one end of the first capacitor (C1), and the positive end of the first operational amplifier (A1), and the other end of the first capacitor (C1) is connected; the negative end of the third controllable switch (SW3) is connected to one end of the second discharge resistor (R3), and the other end of the second discharge resistor (R3) is grounded; The negative end of the first operational amplifier (A1) is connected to the output end of the first operational amplifier (A1); the output end of the first operational amplifier (A1) is connected to the positive end of the second controllable switch (SW2); the negative end of the third controllable switch (SW3) is connected to one end of the second capacitor (C2) and the positive end of the second operational amplifier (A2); the negative end of the second operational amplifier (A2) is connected to the output end of the second operational amplifier (A2); the output end of the second operational amplifier (A2) is connected to one end of the filter resistor (R2); the other end of the filter resistor (R2) is connected to one end of the third capacitor (C3); and the other end of the third capacitor (C3) is grounded.

4. The method according to claim 3, characterized in that The three frequency-variable DC square wave signals are a first DC square wave signal S1, a second DC square wave signal S2, and a third DC square wave signal S3, and Inputting the three DC square wave signals into a frequency-voltage conversion circuit to output a DC voltage signal comprises: When the first DC square wave signal S1 is at a high level, and the second DC square wave signal S2 and the third DC square wave signal S3 are at a low level, a first DC voltage signal is output; When the second DC square wave signal S2 is at a high level, and the first DC square wave signal S1 and the third DC square wave signal S3 are at a low level, a second DC voltage signal is output; When the third DC square wave signal S3 is at a high level, and the first DC square wave signal S1 and the second DC square wave signal S2 are at a low level, a third DC voltage signal is output; The DC voltage signal is output according to the first DC voltage signal, the second DC voltage signal and the third DC voltage signal.

5. The method according to claim 4, characterized in that When the first DC square wave signal S1 is at a high level, and the second DC square wave signal S2 and the third DC square wave signal S3 are at a low level, outputting a first DC voltage signal comprises: When the first DC square wave signal S1 is at a high level and the second DC square wave signal S2 and the third DC square wave signal S3 are at a low level, the first controllable switch (SW1), the second controllable switch (SW2) and the third controllable switch (SW3) are all disconnected, the diode (D) is turned on, and the current source charges the first capacitor (C1) through the diode (D) to output a first DC voltage signal.

6. The method according to claim 5, characterized in that The first DC voltage signal is: In the formula, I C is the current source current, F in is the frequency of the first DC square wave signal S1 of the first switch (SW1), and C1 is the size of the first capacitor (C1).

7. The method according to claim 4, characterized in that When the second DC square wave signal S2 is at a high level, and the first DC square wave signal S1 and the third DC square wave signal S3 are at a low level, outputting a second DC voltage signal comprises: When the second DC square wave signal S2 is at a high level and the first DC square wave signal S1 and the third DC square wave signal S3 are at a low level, the first controllable switch (SW1) and the second controllable switch (SW2) are turned on, the third controllable switch (SW3) is turned off, the diode (D) is cut off, the first capacitor (C1) starts to discharge, and the second capacitor (C2) is charged at the same time, until the voltage between the first capacitor (C1) and the second capacitor (C2) reaches a balance, and a second DC voltage signal is output.

8. The method according to claim 7, characterized in that The second DC voltage signal is: In the formula, I C is the current source current, F in is the frequency of the first DC square wave signal S1 of the first switch (SW1), and C1 is the size of the first capacitor (C1).

9. The method according to claim 4, characterized in that When the third DC square wave signal S3 is at a high level and the first DC square wave signal S1 and the second DC square wave signal S2 are at a low level, outputting a third DC voltage signal comprises: When the third DC square wave signal S3 is at a high level and the first DC square wave signal S1 and the second DC square wave signal S2 are at a low level, the first controllable switch (SW1) and the third controllable switch (SW3) are turned on, the second controllable switch (SW2) is turned off, the residual voltage on the first capacitor (C1) is gradually released through the second discharge resistor (R3), and the voltage on the second capacitor (C2) is processed by the second operational amplifier (A2) to output a third DC voltage signal.

10. The method according to claim 9, characterized in that The third DC voltage signal is: In the formula, I C is the current source current, F in is the frequency of the first DC square wave signal S1 of the first switch (SW1), and C1 is the size of the first capacitor (C1).

11. An amplitude and phase controllable AC voltage generating device, characterized in that: include: A synthesis module is used to perform frequency synthesis on the Beidou second pulse signal through frequency synthesis technology to generate a square wave signal; A first generating module, used for inputting the square wave signal as a clock into a DC frequency modulation module to generate three DC square wave signals with variable frequencies; A second generating module is used to input the square wave signal as a clock into the AC frequency modulation module to generate three frequency-adjustable AC square wave signals; An output module, used to input the three DC square wave signals into a frequency-voltage conversion circuit to output a DC voltage signal, and to input the three AC square wave signals into a frequency-voltage conversion circuit to output an AC voltage signal; The generating module is used to input the DC voltage signal and the AC voltage signal to two ends of a multiplier respectively, so as to generate an amplitude-phase controllable AC voltage.

12. The device according to claim 11, characterized in that The frequency of the square wave signal is 10 MHz, and the duty cycle is 50%.

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