Implementation method of omega-k algorithm based on cubic spline interpolation improvement on FPGA (Field Programmable Gate Array)

By using cubic spline interpolation improvement method in the ω-k algorithm, the problems of large delay in Stolt mapping calculation, high resource occupation and difficult interpolation accuracy control on the FPGA platform are solved, and more efficient and more accurate interpolation processing is achieved.

CN119881893APending Publication Date: 2025-04-25BEIJING INST OF TECH
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Patent Information

Application Number
CN202411954944.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-27
Publication Date
2025-04-25

AI Technical Summary

Technical Problem

The implementation of existing Stolt mapping on the FPGA platform has problems such as large computing delay, high resource usage and difficulty in controlling interpolation accuracy.

Method used

Using the ω-k algorithm based on cubic spline interpolation, a tridiagonal linear equation system is constructed by obtaining radar echo data and Stolt mapped matrix data, a cubic spline coefficient is solved, and the interpolation operation is performed based on these coefficients, combining the matrix data mapped by Stolt.

Benefits of technology

It reduces the hardware resource consumption caused by traditional sinc interpolation, simplifies the Stolt mapping process, improves the interpolation accuracy, and meets the real-time processing requirements of high efficiency and low latency.

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Abstract

The embodiment of the invention provides a method for realizing an omega-k algorithm based on cubic spline interpolation improvement on an FPGA (Field Programmable Gate Array), and the method comprises the steps: obtaining radar echo data and matrix data after Stolt mapping, the radar echo data comprising an original distance direction frequency axis and single-row distance direction echo data; constructing a three-diagonal linear equation set through the original distance direction frequency axis and the one-way distance direction echo data; solving a cubic spline coefficient of the tridiagonal linear equation set based on a set algorithm; processing an original distance direction frequency axis, and querying an interpolation interval segment index of a data point; on the basis of the interpolation interval segment index and the cubic spline coefficient, performing interpolation operation on the interpolation point to obtain interpolation data corresponding to the interpolation point, and combining the interpolation data with the matrix data subjected to Stolt mapping; therefore, the Stolt mapping in the omega-k imaging algorithm is optimized, the hardware resource consumption caused by sinc interpolation in a traditional mode is reduced, the Stolt mapping process is simplified, and the interpolation precision is effectively improved.
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Description

Technical Field

[0001] The present application relates to the technical field of imaging signal processing, and in particular to a method for implementing an improved ω-k algorithm based on cubic spline interpolation on an FPGA. Background Art

[0002] Radar imaging technology has been widely used in the fields of ground monitoring, aerial reconnaissance and astronomical observation. The ω-k algorithm is a commonly used synthetic aperture radar (SAR) imaging algorithm that achieves high-resolution image reconstruction through frequency domain processing. In this SAR imaging algorithm, Stolt mapping is a key step, which is used to remap non-uniformly sampled data to a uniform grid for fast Fourier transform (FFT). Traditionally, Stolt mapping mostly uses the sinc interpolation method. Although this method can provide high-precision interpolation results, the implementation of the sinc function requires the calculation of trigonometric functions. Generally, the Cordic algorithm is used to calculate the sine and cosine values, but the Cordic (Coordinate Rotation Digital Computer) algorithm has many calculation iterations, easy accumulation of iteration errors, and difficulty in implementation. Therefore, the implementation of the sinc interpolation method on FPGA usually consumes a lot of computing resources (such as multipliers and memory), resulting in complex hardware design, increased power consumption, and the system is difficult to meet the requirements of efficient and low-latency real-time processing.

[0003] At present, the processing system of SAR includes DSP (Digital Signal Processing) + FPGA (Field-Programmable Gate Array), ASIC (Application-Specific Integrated Circuit) and FPGA. However, the performance of DSP cannot meet the high timeliness of SAR system, and ASIC has problems such as long R&D cycle and high cost. In recent years, due to the rapid development of ultra-large-scale integrated circuits, FPGA has gradually been widely used in the field of digital signal processing. FPGA has high parallel processing capability and can achieve higher parallelism and stronger pipeline performance than DSP. Compared with ASIC, FPGA has lower development cost and is not inferior to ASIC in parallel processing. Therefore, deploying the ω-k algorithm on FPGA for accelerated processing becomes an effective solution.

[0004] In the existing technical solution, the Stolt mapping in the ω-k imaging algorithm is implemented by sinc interpolation. Taking a 16-point sinc interpolation kernel with an interpolation accuracy of 0.001 and a length of 17000 as an example, according to the principle of sinc interpolation, it is necessary to obtain the data of 16 points around the interpolation point (including the interpolation point itself) and the corresponding sinc interpolation coefficients at the same time, and store the data in 16 dual-port RAMs in sequence. When the data is stored, interpolation operation is performed, and then data is read from the 16 RAMs according to the position of the interpolation point, and the 16-point sinc interpolation kernel coefficients are calculated at the same time. Finally, the data and the interpolation kernel coefficients are correspondingly multiplied and added to obtain the result of the Stolt mapping.

[0005] However, the existing implementation methods of Stolt mapping on FPGA platforms have the following problems: 1. large calculation delay and high resource occupation; 2. difficulty in controlling interpolation accuracy. Summary of the invention

[0006] The purpose of the embodiment of the present application is to provide an implementation method of an improved ω-k algorithm based on cubic spline interpolation on an FPGA, so as to solve the problems of large calculation delay, high resource occupation and difficult interpolation accuracy control in the Stolt mapping method in the prior art.

[0007] In a first aspect, an embodiment of the present application provides a method for implementing an improved ω-k algorithm based on cubic spline interpolation on an FPGA, comprising:

[0008] Acquire radar echo data and matrix data after Stolt mapping, wherein the radar echo data includes the original range frequency axis and a single row of range echo data;

[0009] A tridiagonal linear equation system is constructed by using the original range frequency axis and a single line of range echo data;

[0010] Solve the cubic spline coefficients of the tridiagonal linear equations based on the set algorithm;

[0011] Process the original distance to the frequency axis and query the interpolation interval index of the data point;

[0012] Based on the interpolation interval segment index and the cubic spline coefficient, an interpolation operation is performed on the interpolation point to obtain the interpolation data corresponding to the interpolation point, and the interpolation data is combined with the matrix data after Stolt mapping.

[0013] In the above implementation process, radar echo data and matrix data after Stolt mapping are obtained, wherein the radar echo data includes the original range-frequency axis and a single-row range-echo data; a tridiagonal linear equation group is constructed through the original range-frequency axis and the single-row range-echo data; the cubic spline coefficients of the tridiagonal linear equation group are solved based on the set algorithm; the original range-frequency axis is processed, and the interpolation interval segment index of the data point is queried; based on the interpolation interval segment index and the cubic spline coefficient, the interpolation point is interpolated to obtain the interpolation data corresponding to the interpolation point, and the interpolation data is combined with the matrix data after Stolt mapping; thereby realizing the optimization of Stolt mapping in the ω-k imaging algorithm, reducing the hardware resource consumption caused by sinc interpolation in the traditional way, simplifying the Stolt mapping process, and effectively improving the interpolation accuracy.

[0014] Further, the obtaining of radar echo data and matrix data after Stolt mapping includes:

[0015] The radar echo data and the matrix data after Stolt mapping are stored in an off-chip DDR double rate synchronous dynamic random access memory;

[0016] The original range-frequency axis is constructed and stored in the first BRAM block random access memory and the single-line range echo data retrieved from the DDR is stored in the second BRAM.

[0017] Further, solving the cubic spline coefficients of the tridiagonal linear equations based on the set algorithm includes:

[0018] The tridiagonal matrix algorithm is used to solve the cubic spline coefficients between every two frequency axes in the same row of the tridiagonal linear equations, and four BRAMs are used to sequentially store the four coefficients of the cubic spline function.

[0019] In the above implementation process, the four coefficients of the tridiagonal linear equations are stored separately for interpolation budgeting.

[0020] Furthermore, the processing of the original distance to the frequency axis to query the interpolation interval segment index of the data point includes:

[0021] The data points obtained by Stolt mapping the original distance in the first BRAM to the frequency axis are stored in the third BRAM;

[0022] Searching the data point of the original distance-to-frequency axis corresponding to the third BRAM point by point in the first BRAM, and when the data point is inconsistent with the data point of the first BRAM, recording the index of the interval where the data point is located;

[0023] Complete the query of the index of the interpolation interval segments of all data points.

[0024] In the above implementation process, the interpolation interval end index of the data point is queried to perform interpolation.

[0025] Furthermore, the interpolation operation is performed on the interpolation point based on the interpolation interval segment index and the cubic spline coefficient to obtain the interpolation data corresponding to the interpolation point, including:

[0026] Perform interpolation operation on the interpolation point of the queried index of the interval segment to which it belongs, use the index to find the corresponding coefficient from the four BRAMs storing the cubic spline function coefficients for interpolation operation, and obtain the interpolation data corresponding to the interpolation point;

[0027] When interpolating the last interpolation point, the index of the interpolation interval is queried for the next interpolation point.

[0028] In the above implementation process, the data points of the Stolt map are improved through the difference operation.

[0029] Furthermore, the interpolation data is combined with the matrix data after Stolt mapping, including:

[0030] The interpolation data is stored in the fourth BRAM. After the interpolation of all data points in the third BRAM is completed, the data in the fourth BRAM is written back to the location in the DDR where the matrix data after Stolt mapping of the row was originally stored.

[0031] In the above implementation process, the Stolt mapping in the optimized ω-k imaging algorithm is realized.

[0032] In a second aspect, the embodiment of the present application provides an implementation device of an improved ω-k algorithm based on cubic spline interpolation on an FPGA, comprising:

[0033] A data acquisition module is used to acquire radar echo data and matrix data after Stolt mapping, wherein the radar echo data includes the original range frequency axis and a single row of range echo data;

[0034] An equation building module for building a tridiagonal linear equation system using the original range-frequency axis and a single row of range-echo data;

[0035] The coefficient solving module is used to solve the cubic spline coefficients of the tridiagonal linear equations based on the set algorithm;

[0036] The interval index module is used to process the original distance to the frequency axis and query the interpolation interval segment index of the data point;

[0037] The interpolation operation module is used to perform interpolation operations on interpolation points based on the interpolation interval segment index and the cubic spline coefficients, obtain interpolation data corresponding to the interpolation point, and combine the interpolation data with the matrix data after Stolt mapping.

[0038] In a third aspect, an embodiment of the present application provides an electronic device, including:

[0039] A processor, a memory and a bus, wherein the processor is connected to the memory via the bus, and the memory stores computer-readable instructions. When the computer-readable instructions are executed by the processor, the method for implementing the improved ω-k algorithm based on cubic spline interpolation on FPGA is implemented.

[0040] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a server, the method for implementing the improved ω-k algorithm based on cubic spline interpolation on an FPGA as described above is implemented.

[0041] In a fifth aspect, an embodiment of the present application provides a computer program product, which includes instructions, and when the instructions are executed by a computer, the computer implements the method as described above. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0043] Figure 1 A schematic diagram of the flow of the ω-k algorithm provided in an embodiment of the present application;

[0044] Figure 2 A schematic diagram of a Stolt mapping architecture of a prior art solution provided in an embodiment of the present application;

[0045] Figure 3 A flowchart of a method for implementing an improved ω-k algorithm based on cubic spline interpolation on an FPGA provided in an embodiment of the present application;

[0046] Figure 4 A schematic diagram of cubic spline interpolation based on an improved ω-k algorithm for implementing a method on FPGA provided in an embodiment of the present application;

[0047] Figure 5It is a structural schematic diagram of a device for implementing an improved ω-k algorithm based on cubic spline interpolation on an FPGA provided in an embodiment of the present application;

[0048] Figure 6 It is a structural schematic diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0049] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0050] It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of this application, the terms "first", "second", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0051] FFT (fast Fourier transform), fast Fourier transform, is a general term for efficient and fast calculation methods of discrete Fourier transform (DFT) using computers, referred to as FFT. Fast Fourier transform was proposed by JW Cooley and TW Tukey in 1965. The use of this algorithm can greatly reduce the number of multiplications required for computer calculation of discrete Fourier transform, especially the more the number of sample points N to be transformed, the more significant the savings in the calculation amount of FFT algorithm.

[0052] SAR (Synthetic Aperture Radar) is an active earth observation system that can be installed on aircraft, satellites, spacecraft and other flying platforms to observe the earth around the clock and in all weather conditions, and has a certain surface penetration capability. Therefore, the SAR system has unique advantages in disaster monitoring, environmental monitoring, ocean monitoring, resource exploration, crop yield estimation, mapping and military applications, and can play a role that other remote sensing methods cannot play, so it is increasingly valued by countries around the world.

[0053] Stolt mapping is a mathematical transformation technique for ω-k imaging, which is mainly used to convert radar echo data from the time domain to the frequency domain to achieve image reconstruction. This mapping facilitates subsequent signal processing and interpolation calculations by converting non-uniform sampling data into a uniform grid. The accuracy and efficiency of Stolt mapping are crucial to improving the overall performance of SAR imaging systems and are widely used in remote sensing, aerial monitoring, geological exploration and other fields.

[0054] Radar imaging technology has been widely used in the fields of ground monitoring, aerial reconnaissance and astronomical observation. The ω-k algorithm is a commonly used synthetic aperture radar (SAR) imaging algorithm that achieves high-resolution image reconstruction through frequency domain processing. In this SAR imaging algorithm, Stolt mapping is a key step, which is used to remap non-uniformly sampled data to a uniform grid for fast Fourier transform (FFT). Traditionally, Stolt mapping mostly uses the sinc interpolation method. Although this method can provide high-precision interpolation results, the implementation of the sinc function requires the calculation of trigonometric functions. Generally, the Cordic algorithm is used to calculate the sine and cosine values, but the Cordic (Coordinate Rotation Digital Computer) algorithm has many calculation iterations, easy accumulation of iteration errors, and difficulty in implementation. Therefore, the implementation of the sinc interpolation method on FPGA usually consumes a lot of computing resources (such as multipliers and memory), resulting in complex hardware design, increased power consumption, and the system is difficult to meet the requirements of efficient and low-latency real-time processing.

[0055] At present, the processing system of SAR includes DSP (Digital Signal Processing) + FPGA (Field-Programmable Gate Array), ASIC (Application-Specific Integrated Circuit) and FPGA. However, the performance of DSP cannot meet the high timeliness of SAR system, and ASIC has problems such as long R&D cycle and high cost. In recent years, due to the rapid development of ultra-large-scale integrated circuits, FPGA has gradually been widely used in the field of digital signal processing. FPGA has high parallel processing capability and can achieve higher parallelism and stronger pipeline performance than DSP. Compared with ASIC, FPGA has lower development cost and is not inferior to ASIC in parallel processing. Therefore, deploying the ω-k algorithm on FPGA for accelerated processing becomes an effective solution.

[0056] The ω-k imaging algorithm is an efficient imaging technology widely used in the field of synthetic aperture radar (SAR). The algorithm takes advantage of frequency domain processing and converts radar echo data into frequency domain information to quickly and accurately reconstruct the target scene, thereby generating high-resolution images. The core of the ω-k algorithm is to process complex echo signals through beam domain interpolation technology to overcome the limitations of traditional time domain imaging methods. Although the ω-k algorithm has good imaging performance, in practical applications, its computational complexity and processor resource requirements are still an important challenge for on-orbit equipment. Therefore, when implementing the algorithm, it is necessary to comprehensively consider the allocation of computing resources and the optimization of algorithm performance to ensure the effective operation of the on-orbit system. Its algorithm flow can be divided into two-dimensional FFT, reference function multiplication, Stolt mapping, and two-dimensional IFFT, such as Figure 1 shown.

[0057] In the existing technical solutions, the Stolt mapping in the ω-k imaging algorithm is implemented through sinc interpolation. Take a 16-point sinc interpolation kernel with an interpolation accuracy of 0.001 and a length of 17000 as an example. According to the principle of sinc interpolation, it is necessary to obtain the data of 16 points around the interpolation point (including the interpolation point itself) and the corresponding sinc interpolation coefficients at the same time, and store the data in 16 dual-port RAMs in sequence. After the data is stored, interpolation operation is performed, and then data is read from the 16 RAMs according to the position of the interpolation point, and the 16-point sinc interpolation kernel coefficients are calculated at the same time. Finally, the data is multiplied and accumulated correspondingly with the interpolation kernel coefficients to obtain the result of the Stolt mapping. The specific interpolation architecture is as follows: Figure 2 shown.

[0058] The existing implementation method of Stolt mapping on FPGA platform has the following problems:

[0059] 1. Large computational delay and high resource usage. Taking the 16-point sinc interpolation kernel as an example, before sinc interpolation, it is necessary to obtain the data of 16 points around the interpolation point (including the interpolation point itself) and the corresponding interpolation coefficients, and the interpolation coefficients need to be solved by the Cordic algorithm. Although the Cordic algorithm can effectively implement trigonometric functions and other mathematical operations, its calculation process is relatively complex and requires multiple iterations to achieve the required accuracy. This may lead to higher latency, especially when processing long signals or large data sets, thereby affecting the real-time performance of the entire Stolt mapping. In addition, the hardware implementation of Cordic may require more resources, limiting the FPGA resources available for other functional modules.

[0060] 2. It is difficult to control the interpolation accuracy. Sinc interpolation relies on the weighted sum of multiple sampling points to estimate the interpolation value. Therefore, during the interpolation process, any numerical error introduced by the Cordic algorithm may be magnified in the final result. This may have a significant impact on SAR imaging with high precision requirements. Therefore, in order to ensure the accuracy of interpolation, it is necessary to adjust the accuracy settings of the Cordic algorithm and determine the relevant parameters of the sinc kernel, including the length of the kernel, whether it is truncated, weighting coefficients, etc., to prevent the loss of precision from causing distortion of the reconstructed image.

[0061] Based on the above problems, an embodiment of the present application proposes an implementation method of an improved ω-k algorithm based on cubic spline interpolation on an FPGA to solve the above problems.

[0062] Please see Figure 3 , Figure 3 A flowchart of a method for implementing an improved ω-k algorithm based on cubic spline interpolation on an FPGA is provided in an embodiment of the present application. The method for implementing an improved ω-k algorithm based on cubic spline interpolation on an FPGA includes:

[0063] 100. Acquire radar echo data and matrix data after Stolt mapping, wherein the radar echo data includes an original range-frequency axis and a single-row range-echo data.

[0064] Optionally, acquisition cards and radar equipment can be used to obtain radar echo data: acquisition cards can be used to collect echo data for millimeter-wave radars. These acquisition cards can collect the original echo data of radars and can be parsed and processed by software such as MATLAB. Optionally, professional radar data sources can be directly obtained. For the acquired radar data, professional radar data parsing software can be used to convert the raw data into a readable format and store the parsed data in the database.

[0065] As you can understand, the original range frequency axis: an array containing frequency values, indicating the frequency distribution of the radar signal in the range direction. Single-line range echo data: the range data collected by the radar at a specific azimuth (or time), usually a complex array, indicating the amplitude and phase information of the signal.

[0066] Among them, Stolt mapping is a two-dimensional frequency domain to space domain interpolation method used in radar imaging, which is used for synthetic aperture radar (SAR) imaging, so that matrix data is obtained after Stolt mapping of radar echo data.

[0067] 110. Store the radar echo data and the matrix data after Stolt mapping in an off-chip DDR double rate synchronous dynamic random access memory.

[0068] 120. Construct an original range-frequency axis and store it in a first BRAM block random access memory, and store a single line of range echo data retrieved from DDR in a second BRAM.

[0069] Specifically, the embodiment of the present application stores the radar echo data (4096×3414) and the matrix data after Stolt mapping in the off-chip DDR, constructs the original range-frequency axis and stores it in the BRAM (fr_yuan), and stores the single-row range-echo data taken out from the DDR in the BRAM (echo), and constructs a tridiagonal linear equation group based on the two sets of data, the original range-frequency axis and the single-row range-echo data.

[0070] 200. Construct a tridiagonal linear equation system through the original range-frequency axis and the single-line range-echo data.

[0071] Optionally, the original range frequency axis data is subjected to an inverse Fourier transform (IFFT) to convert it from the frequency domain to the time domain to obtain the range time series data; the single-line range echo data is subjected to necessary preprocessing, such as denoising, filtering, etc. Features are extracted from the converted range time series data, which may be signal strength, phase, arrival time, etc.; the intervals and relationships between features are determined based on the parameters of the radar or sonar system (such as pulse width, sampling rate, etc.). Based on the extracted features and the relationships between them, the coefficient matrix and right-hand side terms of the tridiagonal linear equations are constructed; the main diagonal elements of the coefficient matrix may represent the direct contribution of each feature point, while the upper and lower adjacent diagonal elements may represent the mutual influence between adjacent feature points; the right-hand side term may be composed of a specific processing result (such as integration, average value, etc.) of the single-line range echo data.

[0072] 300. Solve the cubic spline coefficients of the tridiagonal linear equations based on the set algorithm.

[0073] Optionally, the tridiagonal matrix Thomas algorithm is used to solve the cubic spline coefficients between every two distance frequency axes in the same row of the tridiagonal linear equations, and four BRAMs are used to sequentially store the four coefficients of the cubic spline function, which are stored in BRAM(ai), BRAM(bi), BRAM(ci), and BRAM(di), respectively.

[0074] For example, suppose there is a 4th order tridiagonal linear equation system:

[0075]

[0076] Through the forward elimination step: Step 1:

[0077]

[0078] The updated matrix:

[0079] Step 2:

[0080]

[0081] The updated matrix:

[0082] Step 3:

[0083]

[0084] The updated matrix:

[0085]

[0086] At this point, the matrix has been converted to upper triangular form.

[0087] Back-substitution solution steps:

[0088] The fourth equation and the corresponding solution:

[0089]

[0090] The third equation and the corresponding solution:

[0091]

[0092] The second equation and the corresponding solution:

[0093]

[0094] The first equation and the corresponding solution:

[0095]

[0096] After the forward elimination is completed, by back-substituting from the last equation, the values ​​of all unknowns x4, x3, x2 and x1 are gradually solved. The above is the implementation principle of the Thomas algorithm for solving tridiagonal linear equations.

[0097] 400. Process the original distance frequency axis and query the interpolation interval segment index of the data point.

[0098] 410. Store the data points obtained by Stolt mapping the original distance in the first BRAM to the frequency axis in the third BRAM.

[0099] 420. Search the first BRAM point by point for a data point on the original distance-frequency axis corresponding to the third BRAM. When the data point is inconsistent with the data point of the first BRAM, record the index of the interval where the data point is located.

[0100] 430. Complete the query of the index of the interpolation interval segments of all data points.

[0101] Exemplarily, the data points in the distance-to-frequency axis BRAM (fr_new) after Stolt mapping are searched point by point in the original distance-to-frequency axis BRAM (fr_yuan). When the data point is larger than the original distance-to-frequency axis data point for the first time, the index of the interval in which it is located is recorded, that is, the interval number, so as to complete the indexing of the interpolation interval segment of the data point. This operation will be performed for each data point in BRAM (fr_new).

[0102] 500. Based on the interpolation interval segment index and the cubic spline coefficient, perform an interpolation operation on the interpolation point to obtain interpolation data corresponding to the interpolation point, and combine the interpolation data with the matrix data after Stolt mapping.

[0103] 510. Perform an interpolation operation on the interpolation point of the queried index of the interval segment to which it belongs, and use the index to find the corresponding coefficient from four BRAMs storing cubic spline function coefficients to perform interpolation operation to obtain interpolation data corresponding to the interpolation point.

[0104] 520. When interpolating the previous interpolation point, query the index of the interpolation interval for the next interpolation point.

[0105] 530. Store the interpolated data in the fourth BRAM. After the interpolation of all data points in the third BRAM is completed, write the data in the fourth BRAM back to the location in the DDR where the matrix data after Stolt mapping of the row is originally stored.

[0106] Exemplarily, the interpolation operation is performed on the interpolation point of the index of the interval segment to which it belongs, and the corresponding coefficient is found from the four BRAMs storing the cubic spline function coefficients using the index to perform interpolation operation, and the interpolation data corresponding to the interpolation point is obtained, and the interpolation data is stored in the BRAM (echo_stolt). After the interpolation of all data points in the BRAM (fr_new) is completed, the data in the BRAM (echo_stolt) is written back to the location in the DDR where the matrix data after the Stolt mapping of the row was originally stored. Because it is necessary to query the interval segment index and interpolation operation, the embodiment of the present application interpolates the previous interpolation point while indexing the interpolation interval segment for the next interpolation point.

[0107] For example, assuming there are n+1 data points, they can be divided into n intervals, and each interval constructs a cubic function, so there are n cubic functions (S0(x), S1(x), ..., S n-1 (x)), the cubic spline interpolation diagram is as follows Figure 4 shown.

[0108] The cubic polynomial function defined in the embodiment of the present application is defined by the following equation:

[0109] S i (x) = a i +b i (xx i )+c i (xx i ) 2 +d i (xx i ) 3 ,i=0,1,...,n-1.;

[0110] Then the mathematical expression of the cubic function corresponding to n intervals is as follows:

[0111]

[0112] Remember M i =S i ”(x),h i =x i+1 -x i ,y i =S i (x), combined with the three mathematical conditions mentioned above, we can get M at each interpolation point i ,h i and i At each interpolation point x i Department, M i Depends on M at adjacent interpolation points i-1 and M i+1 By combining the continuity conditions of each interval, we can write the relationship between M1, M2, ..., M n-1 The linear equation system, for the i-th interval [x i-1 ,x i ] and the i+1th interval [x i ,x i+1 ], we can get:

[0113]

[0114] At the interpolation point x i At this point, the relationship is:

[0115]

[0116] By i The continuity conditions are sorted out, and finally a linear equation system containing n-1 equations is obtained, and its matrix representation is:

[0117] AM = b;

[0118] in,

[0119]

[0120] The solution of this system of equations is for each interpolation point x i The second derivative M i After calculating M i Then the coefficients of the cubic polynomial can be determined.

[0121] The coefficient of the cubic polynomial is a i Corresponding to node x i Function value at:

[0122] a i =y i ;

[0123] Coefficient b i YesS i (x) in x i The first-order derivative at can be calculated using the following relationship:

[0124]

[0125] Coefficient c i YesS i (x) in x i Half of the second derivative at :

[0126]

[0127] Coefficient d i YesS i The cubic coefficient of (x) can be expressed as:

[0128]

[0129] After solving the coefficients of the cubic polynomial, the expression of the cubic polynomial of each curve segment is obtained, so as to perform interpolation operation.

[0130] As described above, the embodiment of the present application obtains radar echo data and matrix data after Stolt mapping, wherein the radar echo data includes an original range-frequency axis and a single row of range-frequency echo data; a tridiagonal linear equation group is constructed through the original range-frequency axis and the single row of range-frequency echo data; the cubic spline coefficients of the tridiagonal linear equation group are solved based on a set algorithm; the original range-frequency axis is processed, and the interpolation interval segment index of the data point is queried; based on the interpolation interval segment index and the cubic spline coefficient, an interpolation operation is performed on the interpolation point to obtain the interpolation data corresponding to the interpolation point, and the interpolation data is combined with the matrix data after Stolt mapping; thereby optimizing the Stolt mapping in the ω-k imaging algorithm, reducing the hardware resource consumption caused by sinc interpolation in the traditional way, simplifying the Stolt mapping process, and effectively improving the interpolation accuracy.

[0131] The embodiment of the present application realizes Stolt mapping through cubic spline interpolation, and combines the Thomas algorithm to solve the tridiagonal linear equations, which can effectively solve the linear equations generated in the interpolation process. The embodiment of the present application can reduce the hardware resource consumption of sinc implementation in the traditional way, simplify the Stolt mapping process, and provide a new implementation scheme for the key step of Stolt mapping in the imaging algorithm.

[0132] The above steps are not to be performed in a strict order as described in the numbers, but should be understood as an overall solution.

[0133] In the second aspect, based on the above embodiments, Figure 5 A schematic diagram of a device for implementing an improved ω-k algorithm based on cubic spline interpolation on an FPGA according to an embodiment of the present application. Figure 5 The implementation device of the improved ω-k algorithm based on cubic spline interpolation provided in this embodiment on FPGA specifically includes: a data acquisition module 501, an equation construction module 502, a coefficient solution module 503, an interval index module 504 and an interpolation operation module 505.

[0134] Among them, the data acquisition module 501 is used to obtain radar echo data and matrix data after Stolt mapping, wherein the radar echo data includes the original range-frequency axis and a single row of range-frequency echo data; the equation construction module 502 is used to construct a tridiagonal linear equation group through the original range-frequency axis and the single row of range-frequency echo data; the coefficient solving module 503 is used to solve the cubic spline coefficients of the tridiagonal linear equation group based on the set algorithm; the interval index module 504 is used to process the original range-frequency axis and query the interpolation interval segment index of the data point; the interpolation operation module 505 is used to perform an interpolation operation on the interpolation point based on the interpolation interval segment index and the cubic spline coefficient to obtain the interpolation data corresponding to the interpolation point, and combine the interpolation data with the matrix data after Stolt mapping.

[0135] As described above, the embodiment of the present application obtains radar echo data and matrix data after Stolt mapping, wherein the radar echo data includes an original range-frequency axis and a single row of range-frequency echo data; a tridiagonal linear equation group is constructed through the original range-frequency axis and the single row of range-frequency echo data; the cubic spline coefficients of the tridiagonal linear equation group are solved based on a set algorithm; the original range-frequency axis is processed, and the interpolation interval segment index of the data point is queried; based on the interpolation interval segment index and the cubic spline coefficient, an interpolation operation is performed on the interpolation point to obtain the interpolation data corresponding to the interpolation point, and the interpolation data is combined with the matrix data after Stolt mapping; thereby optimizing the Stolt mapping in the ω-k imaging algorithm, reducing the hardware resource consumption caused by sinc interpolation in the traditional way, simplifying the Stolt mapping process, and effectively improving the interpolation accuracy.

[0136] The implementation device of the improved ω-k algorithm based on cubic spline interpolation on FPGA provided in the embodiment of the present application can be used to execute the implementation method of the improved ω-k algorithm based on cubic spline interpolation on FPGA provided in the above embodiment, and has corresponding functions and beneficial effects.

[0137] In a third aspect, an embodiment of the present application further provides an electronic device that can integrate an implementation device on an FPGA of the improved ω-k algorithm based on cubic spline interpolation provided in an embodiment of the present application. Figure 6 Schematic diagram of the structure of an electronic device provided by an embodiment of the present application. Figure 6The electronic device includes: an input device 63, an output device 64, a memory 62 and one or more processors 61; the memory 62 is used to store one or more programs; when the one or more programs are executed by the one or more processors 61, the one or more processors 61 implement the implementation method of the ω-k algorithm based on the improved cubic spline interpolation on the FPGA as provided in the above embodiment. The input device 63, the output device 64, the memory 62 and the processor 61 can be connected by a bus or other means, Figure 6 The example of connecting through bus is taken in the following.

[0138] The processor 61 executes various functional applications and data processing of the device by running the software programs, instructions and modules stored in the memory 62, that is, realizes the above-mentioned implementation method of the improved ω-k algorithm based on cubic spline interpolation on FPGA.

[0139] The electronic device provided above can be used to execute the implementation method of the improved ω-k algorithm based on cubic spline interpolation on FPGA provided in the above embodiment, and has corresponding functions and beneficial effects.

[0140] In a fourth aspect, an embodiment of the present application also provides a computer-readable storage medium, the computer-readable storage medium including a stored computer program; wherein, when the computer program is running, the device where the computer-readable storage medium is located is controlled to execute the above-mentioned improved ω-k algorithm based on cubic spline interpolation on FPGA, and the same beneficial effects can be achieved.

[0141] Of course, the storage medium containing computer executable instructions provided in an embodiment of the present application is not limited to the implementation method of the improved ω-k algorithm based on cubic spline interpolation on FPGA as described above, and can also execute related operations in the implementation method of the improved ω-k algorithm based on cubic spline interpolation on FPGA provided in any embodiment of the present application.

[0142] In a fifth aspect, the embodiments of the present application also provide a computer program product, and the methods described in the various embodiments of the present application can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instruction is loaded and executed on a computer, the process or function described in the various embodiments of the present application is executed in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a network device, a user device, a core network device, an OAM (Open Application Model) or other programmable device.

[0143] The computer program or instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer program or instructions may be transmitted from one website, computer, server or data center to another website, computer, server or data center by wired or wireless means. The computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or data center that integrates one or more available media. The available medium may be a magnetic medium, such as a floppy disk, a hard disk, or a magnetic tape; it may also be an optical medium, such as a digital video disk; it may also be a semiconductor medium, such as a solid-state drive. The computer-readable storage medium may be a volatile or non-volatile storage medium, or may include both volatile and non-volatile types of storage media.

[0144] In several embodiments provided in the present application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely schematic. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of the present application. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of a code, and the module, a program segment or a part of a code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of dedicated hardware and computer instructions.

[0145] In addition, the functional modules in the various embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

[0146] If the function is implemented in the form of a software function module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium, including several instructions for an electronic device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0147] The above description is only an embodiment of the present application and is not intended to limit the scope of protection of the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application should be included in the scope of protection of the present application. It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.

[0148] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

[0149] It should be noted that, in the embodiments of the present application, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements includes not only those elements, but also includes other elements that are not clearly listed, or also includes elements inherent to such process, method, article or equipment. In the absence of more restrictions, the elements limited by the sentence "comprise one..." do not exclude the existence of other identical elements in the process, method, article or equipment including the elements.

Claims

1. A method for implementing an improved ω-k algorithm based on cubic spline interpolation on FPGA, characterized in that: include: Acquire radar echo data and matrix data after Stolt mapping, wherein the radar echo data includes the original range frequency axis and a single row of range echo data; A tridiagonal linear equation system is constructed by using the original range frequency axis and a single line of range echo data; Solve the cubic spline coefficients of the tridiagonal linear equations based on the set algorithm; Process the original distance to the frequency axis and query the interpolation interval index of the data point; Based on the interpolation interval segment index and the cubic spline coefficient, an interpolation operation is performed on the interpolation point to obtain the interpolation data corresponding to the interpolation point, and the interpolation data is combined with the matrix data after Stolt mapping.

2. The method for implementing the improved ω-k algorithm based on cubic spline interpolation on FPGA according to claim 1 is characterized in that: The step of acquiring radar echo data and matrix data after Stolt mapping includes: The radar echo data and the matrix data after Stolt mapping are stored in an off-chip DDR double rate synchronous dynamic random access memory; The original range-frequency axis is constructed and stored in the first BRAM block random access memory and the single-line range echo data retrieved from the DDR is stored in the second BRAM.

3. The method for implementing the improved ω-k algorithm based on cubic spline interpolation on FPGA according to claim 1 is characterized in that: The method of solving the cubic spline coefficients of the tridiagonal linear equations based on a set algorithm includes: The tridiagonal matrix algorithm is used to solve the cubic spline coefficients between every two frequency axes in the same row of the tridiagonal linear equations, and four BRAMs are used to sequentially store the four coefficients of the cubic spline function.

4. The method for implementing the improved ω-k algorithm based on cubic spline interpolation on FPGA according to claim 1 is characterized in that: The processing of the original distance to the frequency axis to query the interpolation interval segment index of the data point includes: The data points obtained by Stolt mapping the original distance in the first BRAM to the frequency axis are stored in the third BRAM; Searching the data point of the original distance-to-frequency axis corresponding to the third BRAM point by point in the first BRAM, and when the data point is inconsistent with the data point of the first BRAM, recording the index of the interval where the data point is located; Complete the query of the index of the interpolation interval segments of all data points.

5. The method for implementing the improved ω-k algorithm based on cubic spline interpolation on FPGA according to claim 1 is characterized in that: The interpolation operation is performed on the interpolation point based on the interpolation interval segment index and the cubic spline coefficient to obtain the interpolation data corresponding to the interpolation point, including: Perform interpolation operation on the interpolation point of the queried index of the interval segment to which it belongs, use the index to find the corresponding coefficient from the four BRAMs storing the cubic spline function coefficients for interpolation operation, and obtain the interpolation data corresponding to the interpolation point; When interpolating the last interpolation point, the index of the interpolation interval is queried for the next interpolation point.

6. The method for implementing the improved ω-k algorithm based on cubic spline interpolation on FPGA according to claim 5 is characterized in that: The step of combining the interpolation data with the matrix data after Stolt mapping includes: The interpolation data is stored in the fourth BRAM. After the interpolation of all data points in the third BRAM is completed, the data in the fourth BRAM is written back to the location in the DDR where the matrix data after Stolt mapping of the row was originally stored.

7. A device for implementing the improved ω-k algorithm based on cubic spline interpolation on FPGA, characterized in that: include: A data acquisition module is used to acquire radar echo data and matrix data after Stolt mapping, wherein the radar echo data includes the original range frequency axis and a single row of range echo data; An equation building module for building a tridiagonal linear equation system using the original range-frequency axis and a single row of range-echo data; The coefficient solving module is used to solve the cubic spline coefficients of the tridiagonal linear equations based on the set algorithm; The interval index module is used to process the original distance to the frequency axis and query the interpolation interval segment index of the data point; The interpolation operation module is used to perform interpolation operations on interpolation points based on the interpolation interval segment index and the cubic spline coefficient, obtain interpolation data corresponding to the interpolation point, and combine the interpolation data with the matrix data after Stolt mapping.

8. An electronic device, characterized in that: include: A processor, a memory and a bus, wherein the processor is connected to the memory via the bus, and the memory stores computer-readable instructions. When the computer-readable instructions are executed by the processor, the method for implementing the improved ω-k algorithm based on cubic spline interpolation on FPGA as described in any one of claims 1 to 6 is implemented.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, which, when executed by a server, implements the method for implementing the improved ω-k algorithm based on cubic spline interpolation on an FPGA as described in any one of claims 1 to 6.

10. A computer program product, characterized in that The computer program product comprises instructions which, when executed by a computer, cause the computer to implement the method according to any one of claims 1-6.

Citation Information

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