Vacuum transport simulation method, device and equipment for integrated circuit manufacturing process and medium

Abstract

The invention discloses a vacuum transport simulation method, a vacuum transport simulation device, vacuum transport simulation equipment and a medium for an integrated circuit manufacturing process, and relates to the field of simulation of the integrated circuit manufacturing process. An initial position of a transport particle, a motion direction vector of a simulation particle and a sub-node area of a simulation area are used as input of a finite-state machine, motion of the transport particle is simulated by combining a two-dimensional line segment tree method, the transport particle is moved grid by grid in the prior art, and then the motion process of the transport particle is analyzed, so that the transport particle is simulated. The simulation process is converted into the process of dividing the simulation area through the two-dimensional line segment tree, and the state of the transport particles is updated in combination with the finite-state machine, so that the time complexity in the simulation process is reduced, and the operation efficiency of simulation is improved.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit manufacturing process simulation, and in particular to an integrated circuit manufacturing process vacuum transport simulation method, device, equipment and medium. Background Art

[0002] Integrated circuit manufacturing process technology is one of the core technologies of the modern electronic information industry, including a series of complex process steps such as lithography, etching, ion implantation, chemical vapor deposition, physical vapor deposition, metallization, packaging and testing.

[0003] With the continuous advancement of technology, integrated circuit manufacturing is developing in the direction of small size, high integration and low power consumption. Among them, thin film deposition processes represented by chemical vapor deposition and physical vapor deposition are key processes in large-scale integrated circuit manufacturing. Both the front-end process and the back-end process have a large number of thin films that need to be grown graphically with the help of deposition processes. For example, in the front-end process, the high-k dielectric layer material hafnium oxide (HfO2), the sidewall spacer materials silicon dioxide (SiO2), silicon nitride (SiNx), etc.; in the back-end process, the interconnected metal material copper (Cu), the diffusion barrier layer material tantalum nitride (TaN), etc.

[0004] For manufacturing processes such as thin film deposition and etching, simulation involves macroscopic fluid process simulation at the equipment scale, surface generation process simulation at the microscopic reaction scale, and growth morphology simulation at the characteristic size scale. Among them, a mainstream simulation scheme is implemented through the Monte Carlo simulation (MC) method. This scheme divides the movement process of particles into two parts: vacuum phase transport and movement in the solid phase. Among them, the vacuum phase part usually assumes that the simulated characteristic size is much smaller than the mean free path of the particles. Therefore, it can be considered that the particles are moving in a uniform straight line in this part. However, the existing simulation method usually moves the particles one grid at a time according to a certain logic to keep them in straight line motion until they encounter the solid phase.

[0005] However, this method has a high time complexity, and as the simulation area expands, the running efficiency of the simulation program will be seriously reduced, and the calculation cost is high. Summary of the invention

[0006] In view of the above-mentioned technical status, the present application provides a method, device, equipment and medium for simulating vacuum transportation of integrated circuit manufacturing process to reduce the time complexity of simulation and improve the running efficiency of simulation program.

[0007] In order to achieve the above object, the present invention provides the following technical solutions:

[0008] A vacuum transport simulation method for integrated circuit manufacturing process, comprising:

[0009] Using a two-dimensional line segment tree method, taking the simulation area corresponding to the substrate as a root node for region division, and obtaining sub-node areas corresponding to a plurality of sub-nodes of the root node;

[0010] Inputting each of the subnode regions, the initial position of the transport particle, and the motion direction vector of the transport particle into a finite state machine, so that the initial position of the transport particle and the motion direction vector are used as the first state of the transport particle through the finite state machine, and simulating the motion of the transport particle according to the first state to determine the motion position of the transport particle and the subnode region where the motion position is located;

[0011] When the particle density of the subnode region where the moving position of the transport particle is located is vacuum or dense, determining the final state of the transport particle according to the moving position of the transport particle and the adsorption information of the transport particle;

[0012] In the case where the particle density of the sub-node area where the moving position of the transport particle is located is a coefficient, the two-dimensional line segment tree method is used to divide the sub-node area as the parent node to obtain the sub-node areas corresponding to the multiple child nodes of the parent node; the first state is updated according to the moving position of the transport particle; and the movement of the transport particle is simulated according to the first state to determine the moving position of the transport particle and the sub-node area where the moving position is located.

[0013] In an optional implementation of the present application, it also includes:

[0014] According to the crystal stacking mode of the substrate, the simulation region is lattice-divided to obtain a lattice network of the simulation region;

[0015] Wherein, the spatial volume corresponding to the grid unit of the lattice network is larger than the unit cell volume of the substrate.

[0016] In an optional implementation manner of the present application, the method of using a two-dimensional segment tree to divide the simulation area corresponding to the substrate into regions as a root node, and obtaining sub-node regions corresponding to multiple sub-nodes of the root node, includes:

[0017] Determining the vertex coordinates of each vertex of the simulation area;

[0018] Based on the vertex coordinates, the simulation area is divided into regions to obtain sub-node regions corresponding to the multiple sub-nodes of the root node.

[0019] In an optional embodiment of the present application, when the particle density of the subnode region where the moving position of the transport particle is located is vacuum or dense, determining the final state of the transport particle according to the moving position of the transport particle and the adsorption information of the transport particle includes:

[0020] When the particle density of the subnode region where the moving position of the transport particle is located is vacuum, the moving position of the transport particle is located at the region boundary of the subnode region, and the adsorption information of the transport particle is adsorbed, determining that the final state of the transport particle is that the transport particle moves to the last position of the subnode region and is adsorbed;

[0021] When the particle density of the subnode region where the moving position of the transport particle is located is vacuum and the adsorption information of the transport particle is not adsorbed, determining that the final state of the transport particle is that the transport particle moves to other subnode regions outside the subnode region;

[0022] When the particle density of the subnode region where the moving position of the transport particle is located is dense and the adsorption information of the transport particle is adsorbed, determining that the final state of the transport particle is moving to the subnode region and being adsorbed;

[0023] When the particle density of the subnode region where the moving position of the transport particle is located is dense and the adsorption information of the transport particle is not adsorbed, it is determined that the final state of the transport particle is not adsorbed.

[0024] In an optional implementation of the present application, it also includes:

[0025] In the case where the terminal position of the transport particle is not in the sub-node region corresponding to the plurality of sub-nodes of the root node, it is determined that the final state of the transport particle is that the transport particle exceeds the simulation boundary.

[0026] In an optional implementation of the present application, it also includes:

[0027] obtaining a substrate image of the substrate;

[0028] Based on the contour recognition of the substrate image, a simulation area corresponding to the substrate is determined.

[0029] Compared with the prior art, the integrated circuit manufacturing process vacuum transport simulation method provided by the present invention takes the initial position of the transport particle, the movement direction vector of the simulated particle, and the sub-node area of ​​the simulation area as the input of the finite state machine, and simulates the movement of the transport particle by combining the two-dimensional segment tree method. The process of moving the transport particle grid by grid in the prior art and then analyzing the movement of the transport particle is converted into a process of dividing the simulation area through a two-dimensional segment tree and updating the state of the transport particle in combination with the finite state machine, which is beneficial to reducing the time complexity of the simulation process and improving the operation efficiency of the simulation.

[0030] The present invention also provides a vacuum transport simulation device for integrated circuit manufacturing process, comprising:

[0031] A region processing unit, used to use a two-dimensional line segment tree method to divide the simulation region corresponding to the substrate as a root node to obtain sub-node regions corresponding to multiple sub-nodes of the root node;

[0032] A state machine processing unit is used to input each of the sub-node regions, the initial position of the transport particle and the movement direction vector of the transport particle into a finite state machine, so that the initial position of the transport particle and the movement direction vector are used as the first state of the transport particle through the finite state machine, and according to the first state, the movement of the transport particle is simulated to determine the movement position of the transport particle and the sub-node region where the movement position is located; when the particle density of the sub-node region where the movement position of the transport particle is located is vacuum or dense, the final state of the transport particle is determined according to the movement position of the transport particle and the adsorption information of the transport particle; when the particle density of the sub-node region where the movement position of the transport particle is located is a coefficient, the sub-node region is divided as a parent node by using the two-dimensional line segment tree method to obtain the sub-node regions corresponding to the multiple child nodes of the parent node; the first state is updated according to the movement position of the transport particle; and the movement of the transport particle is simulated according to the first state to determine the movement position of the transport particle and the sub-node region where the movement position is located.

[0033] Compared with the prior art, the beneficial effects of the integrated circuit manufacturing process vacuum transportation simulation device provided by the present invention are the same as the beneficial effects of the integrated circuit manufacturing process vacuum transportation simulation method described in the above technical solution, and will not be repeated here.

[0034] The present invention also provides an electronic device, comprising:

[0035] processor;

[0036] a memory for storing instructions executable by the processor;

[0037] The processor is used to execute the above-mentioned integrated circuit manufacturing process vacuum transport simulation method by running the instructions in the memory.

[0038] Compared with the prior art, the beneficial effects of the electronic device provided by the present invention are the same as the beneficial effects of the vacuum transport simulation method for integrated circuit manufacturing process described in the above technical solution, and will not be elaborated here.

[0039] The present invention also provides a computer storage medium, in which instructions are stored. When the instructions are executed, the above-mentioned integrated circuit manufacturing process vacuum transport simulation method is implemented.

[0040] Compared with the prior art, the beneficial effects of the computer storage medium provided by the present invention are the same as the beneficial effects of the vacuum transport simulation method for integrated circuit manufacturing process described in the above technical solution, and will not be elaborated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0042] Figure 1 A flow chart of a vacuum transport simulation method for integrated circuit manufacturing process provided in an embodiment of the present application;

[0043] Figure 2 A schematic diagram of the division of the root node provided in the embodiment of the present application;

[0044] Figure 3 A directed graph of a finite state machine provided in an embodiment of the present application;

[0045] Figure 4 A structural diagram of a vacuum transport simulation device for integrated circuit manufacturing process provided in an embodiment of the present application;

[0046] Figure 5 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0047] In order to clearly describe the technical solutions of the embodiments of the present invention, in the embodiments of the present invention, words such as "first" and "second" are used to distinguish the same items or similar items with basically the same functions and effects. For example, the first threshold and the second threshold are only used to distinguish different thresholds, and their order is not limited. Those skilled in the art can understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit them to be different.

[0048] It should be noted that, in the present invention, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the present invention should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0049] In the present invention, "at least one" means one or more, and "plurality" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, the combination of a and b, the combination of a and c, the combination of b and c, or the combination of a, b and c, where a, b, c can be single or multiple.

[0050] The manufacturing process technology of integrated circuits is one of the core technologies of the modern electronic information industry, including a series of complex process steps such as lithography, etching, ion implantation, chemical vapor deposition, physical vapor deposition, metallization, packaging and testing. With the continuous advancement of technology, integrated circuit manufacturing is developing in the direction of small size, high integration and low power consumption. Among them, thin film deposition processes represented by chemical vapor deposition and physical vapor deposition are key processes in large-scale integrated circuit manufacturing processes. Both the front-end process and the back-end process have a large number of thin films that need to be graphically grown with the help of deposition processes. For example, the high-k dielectric layer material hafnium oxide (HfO2) in the front-end process, the sidewall spacer materials silicon dioxide (SiO2), silicon nitride (SiNx), etc.; the interconnected metal material copper (Cu) in the back-end process, the diffusion barrier layer material tantalum nitride (TaN), etc.

[0051] Taking thin film preparation as an example, substrate surface defects, internal hole defects generated during the deposition process, and inappropriate process conditions can cause the film to fail and affect the execution of subsequent processes. Currently, the process industry mainly uses experimental design to optimize existing processes and develop new processes. However, this requires designing a large number of experiments to find the key factors and degree of influence that affect the process, which is very time-consuming and has high R&D costs.

[0052] For manufacturing processes such as thin film deposition and etching, simulation involves macroscopic fluid process simulation at the equipment scale, surface generation process simulation at the microscopic reaction scale, and growth morphology simulation at the characteristic size scale. Among them, a mainstream simulation scheme is implemented through the Monte Carlo simulation (MC) method. This scheme divides the movement process of particles into two parts: vacuum phase transport and movement in the solid phase. Among them, the vacuum phase part usually assumes that the simulated characteristic size is much smaller than the mean free path of the particles. Therefore, it can be considered that the particles are moving in a uniform straight line in this part. However, the existing simulation method usually moves the particles one grid at a time according to a certain logic to keep them in straight line motion until they encounter the solid phase.

[0053] However, this method has a high time complexity, and as the simulation area expands, the running efficiency of the simulation program will be seriously reduced, and the calculation cost is high.

[0054] In view of the above-mentioned technical status, the embodiments of the present application provide a method, device, equipment and medium for simulating vacuum transport in an integrated circuit manufacturing process, which are described in detail one by one in the following embodiments.

[0055] The present application embodiment first provides a vacuum transport simulation method for integrated circuit manufacturing process, please refer to Figure 1 , Figure 1 A flow chart of a vacuum transport simulation method for integrated circuit manufacturing process provided in an embodiment of the present application.

[0056] like Figure 1 As shown, the integrated circuit manufacturing process vacuum transport simulation method includes the following S101 to S104:

[0057] S101, using a two-dimensional line segment tree method, taking a simulation area corresponding to a substrate as a root node for region division, and obtaining sub-node areas corresponding to a plurality of sub-nodes of the root node.

[0058] Segment Tree is a binary tree based on the divide-and-conquer concept, used for information statistics on intervals. Each node corresponds to an interval [1, r), and each leaf node represents a unit interval. The left leaf node of each non-leaf node [1, r) represents an interval [1, (1+r) / 2), and the right leaf node represents an interval [(1+r) / 2, r). There are two main ways to write a two-dimensional segment tree. One is a segment tree within a segment tree, that is, define a segment tree in which each node represents the horizontal column information of the matrix, and use a segment tree to save the vertical column information of the horizontal column interval. Another way is a quadtree. Each node of this method corresponds to a matrix area [1, r)×[b, t), and each leaf node represents an area of ​​unit size (such as the number of grids is 1). The four child nodes of each non-leaf node [1, r)×[b, t) are the four quadrant sub-regions of the region represented by the node [(l+r) / 2, r)×[(t+b) / 2, t), [l, (l+r) / 2)×[(t+b) / 2, t), [l, (l+r) / 2)×[b, (t+b) / 2), [(l+r) / 2, r)×[b, (t+b) / 2). Although the time complexity of this method for rectangular region query operations may be greater than that of the segment tree nesting method under certain circumstances, for real process conditions, this extreme situation that causes time complexity degradation will hardly occur. Its calculation constant is relatively excellent and it can be extended to three-dimensional situations by simply changing to an octree.

[0059] Furthermore, the simulation area corresponding to the substrate can be obtained based on the substrate image, wherein the substrate image refers to the micro-nano structure pattern of the substrate, including but not limited to the micro-nano image structure of a certain process step generated during the manufacturing process of integrated circuit microelectronic devices, optoelectronic devices, micro-electromechanical system devices, organic light-emitting materials, etc. Specifically, it can be a non-planar substrate structure generated by previous etching, lithography, deposition and other processes, including right-angle steps, inclined steps, right-angle grooves, inclined grooves, T-shaped structures, cantilever beam structures or more complex single or periodic patterns. In the embodiment of the present application, the minimum size of the substrate structure can be a few nanometers, and the maximum size can be tens of microns.

[0060] The substrate image may be a scanning electron microscope image or a user-defined non-planar substrate structure image.

[0061] Furthermore, in order to improve the quality of the substrate image and improve the accuracy of subsequent processing of the simulation area, the substrate image can also be preprocessed, and the preprocessing includes but is not limited to steps such as cropping the image, denoising, adjusting contrast, contour recognition, edge extraction, and smoothing.

[0062] Furthermore, the method of using a two-dimensional line segment tree to divide the simulation area corresponding to the substrate into regions as a root node, and obtaining sub-node regions corresponding to multiple sub-nodes of the root node, includes:

[0063] Determining the vertex coordinates of each vertex of the simulation area;

[0064] Based on the vertex coordinates, the simulation area is divided into regions to obtain sub-node regions corresponding to the multiple sub-nodes of the root node.

[0065] Please refer to Figure 2 , Figure 2 A schematic diagram of the division of the parent nodes of a two-dimensional segment tree provided in an embodiment of the present application.

[0066] like Figure 2 As shown, the coordinates of the four vertices of the simulation area corresponding to the parent node are (γ, α), (γ, β), (δ, α), (δ, β), that is, the horizontal axis range of the child node area corresponding to the parent node is γ~δ, and the vertical axis range is α~β. On this basis, the child node area is divided. Specifically, the division rule is: insert the horizontal axis y=(γ+δ) / 2; insert the vertical axis x=(α+β) / 2, and then the child node area is further divided into 4 child node areas.

[0067] In the embodiment of the present application, the regional division of the region (including the simulation region) is carried out along with the transport of the transport particles, that is, the region is further divided into regions in combination with the movement position of the transport particles and the region where the movement position is located. In other words, for the simulation region, it will eventually be divided into a plurality of sub-node regions of different levels. Among them, the size of the sub-node region represented by the node at the bottom layer should be larger than the volume of a primitive cell to ensure computational efficiency.

[0068] Therefore, the embodiment of the present application also includes:

[0069] According to the crystal stacking mode of the substrate, the simulation region is lattice-divided to obtain a lattice network of the simulation region;

[0070] Wherein, the spatial volume corresponding to the grid unit of the lattice network is larger than the unit cell volume of the substrate.

[0071] That is, the vacuum region and the substrate solid phase region are gridded according to the stacking mode of the actual deposited crystals, such as square lattice or hexagonal lattice in two-dimensional case, simple cubic stacking or hexagonal closest stacking in three-dimensional case, etc., to form the basic sites that particles can occupy. According to the experimental surface, the use of the correct lattice can greatly reduce the roughness of the solid surface of the overall Monte Carlo simulation, and has no effect on the vacuum transport itself.

[0072] S102, input each of the sub-node regions, the initial position of the transport particle and the movement direction vector of the transport particle into a finite state machine, so that the initial position of the transport particle and the movement direction vector are used as the first state of the transport particle through the finite state machine, and based on the first state, the movement of the transport particle is simulated to determine the movement position of the transport particle and the sub-node region where the movement position is located.

[0073] The finite state machine (FSM) is a mathematical model used to describe the behavior of a system with a finite number of states. FSM can be represented as a five-tuple (Q, Σ, δ, q, F). Where Q is a finite set of states, Σ is an input event set (alphabet), δ is a state transition function, q is the initial state (start state), and F is the terminal state set (accept states). It can be represented as a directed graph.

[0074] Please refer to Figure 3 , Figure 3 A directed graph of a finite state machine provided in an embodiment of the present application. Figure 3 As shown, q1, q2, and q3 are three possible states, where the initial state is q1, the intermediate state is q2, and the final state is q3. 0 and 1 are possible input values ​​of the finite state machine.

[0075] After inputting each of the sub-node regions, the initial position of the transport particle and the movement direction vector of the transport particle into the finite state machine, the finite state machine will use the initial position of the transport particle and the movement direction vector of the transport particle as the first state of the transport particle, and simulate the movement of the transport particle based on this state to obtain the movement position of the transport particle and the sub-node region where the movement position is located.

[0076] In an embodiment of the present application, the input of the finite state machine includes the sub-node area of ​​the simulation area corresponding to the substrate, the initial position of the transport particle and the movement direction vector of the transport particle. The finite state machine simulates the movement of the transport particle in the simulation area based on the initial position and the movement direction vector of the transport particle. During this process, the movement position of the transport particle input by the finite state machine changes as the simulation progresses until the transport particle is adsorbed by the substrate or the transport particle moves beyond the boundary of the simulation area.

[0077] At the same time, in the simulation process, in order to accelerate the vacuum transport of particles, the sub-node area represented by the current node will be further divided into states based on the particle density of the sub-node area where the transport particle's movement position is located, so as to accurately locate the final state of the transport particle in the sub-node area, whether it is adsorption or transport leaving the sub-node and entering other sub-node areas.

[0078] It should be noted that the movement of transport particles between sub-node areas is determined by the movement direction vector of the transport particles. In actual application, the sub-node areas of each level can be sorted based on the movement direction vector of the transport particles, and then an ordered set of sub-node areas of each level can be obtained, which facilitates the finite state machine to simulate the movement of transport particles between sub-node areas of different levels.

[0079] S103, when the particle density of the subnode region where the moving position of the transport particle is located is vacuum or dense, determine the final state of the transport particle according to the moving position of the transport particle and the adsorption information of the transport particle.

[0080] After the sub-node region where the moving position of the transported particle is located is determined through the above S102, the particle density and adsorption information of the sub-node region where the moving position is located is further determined.

[0081] When the particle density in the subnode area is vacuum, the moving position of the transport particle is the boundary of the subnode area, and the transport particle is adsorbed, the final state of the transport particle is determined as: the transport particle moves to the last position of the subnode area and is adsorbed.

[0082] When the particle density of the subnode region where the moving position of the transport particle is located is vacuum and the adsorption information of the transport particle is not adsorbed, it is determined that the final state of the transport particle is moving to other subnode regions outside the subnode region.

[0083] When the particle density of the subnode region where the moving position of the transport particle is located is dense and the adsorption information of the transport particle is adsorbed, determining that the final state of the transport particle is moving to the subnode region and being adsorbed;

[0084] When the particle density of the subnode region where the moving position of the transport particle is located is dense and the adsorption information of the transport particle is not adsorbed, it is determined that the final state of the transport particle is not adsorbed.

[0085] When the particle density of the sub-node region where the moving position of the transported particle is located is sparse, the following S104 is further performed.

[0086] S104, when the particle density of the sub-node area where the moving position of the transport particle is located is a coefficient, the two-dimensional line segment tree method is used to divide the sub-node area as the parent node to obtain the sub-node areas corresponding to the multiple child nodes of the parent node; the first state is updated according to the moving position of the transport particle; and the movement of the transport particle is simulated according to the first state to determine the moving position of the transport particle and the sub-node area where the moving position is located.

[0087] When the particle density of the sub-node region where the moving position of the transport particle is located is sparse, the two-dimensional line segment tree method is continued to be used to divide the sub-node region where the moving position of the transport particle is located as the parent node to obtain the sub-node region corresponding to the parent node.

[0088] Afterwards, in combination with the moving position of the transport particle, the first state of the transport particle is updated, that is, the initial position of the input finite state machine is updated to the moving state, the movement of the transport particle continues to be simulated, and the next moving position of the transport particle and the sub-node area corresponding to the moving position are determined when the input of the finite state machine is the moving position, that is, return to execute the step of simulating the movement of the transport particle according to the first state in the above S102 to determine the moving position of the transport particle and the sub-node area where the moving position is located.

[0089] Furthermore, when the final position of the transport particle is not in the sub-node area corresponding to the multiple sub-nodes of the root node (that is, when the final position of the transport particle is not in the simulation area), the final state of the transport particle is determined as the transport particle exceeding the simulation boundary.

[0090] Specifically, the process of determining the final state of the transported particles by means of a finite state machine can be implemented by means of a vacuum transport function.

[0091] The vacuum transport function can be implemented by the following code. The nodes in the code corresponding to the vacuum transport function (including nodes at each level are defined as t, attributes are t.filt.size, child nodes of the nodes are located as t.chi, where i=0, 1, 2, 3, and the root node is defined as root):

[0092] Vacuum transport:

[0093] VT(t, P1, P2): t is the subnode area where the transport particle is located, P1 represents the initial position of the transport particle, and P2 represents the moving direction vector of the transport particle.

[0094] ins_ret_code = 0; / / initialization return code

[0095] state=cautch(t,P1,P2); / / state is the input value of the state machine, obtained by the cautch function

[0096] switch(state):

[0097] case 0: return 0; / / State 0: Transport particles to other sub-node areas outside the sub-node area corresponding to the moving position

[0098] case 1: return 1; / / State 1: The transport particle moves to the last position of the subnode area and is adsorbed

[0099] case 2: / / State 2

[0100] D = passdomain(t, P1); / / Calculate the child nodes of t that the transport particle passes through during the movement and return them in order, and save them in array D

[0101]

[0102] case 3: return 1; / / State 3: transport particles are adsorbed

[0103] case 4: return 0; / / State 4: transport particles are not adsorbed

[0104] case 5: return 2; / / State 5: transport particles exceed simulation boundaries

[0105] In the code corresponding to the above "vacuum transport", cautch(t, P1, P2) refers to the input information of the finite state machine. In actual application, the P1 input of the finite state machine changes with the movement of the transported particles. VT(t, P1, P2) is the first input of the finite state machine, where P1 is the initial position of the input particle.

[0106] Furthermore, cautch(t, P1, P2) is obtained by the following code:

[0107]

[0108]

[0109] In the process of practical application, a simulation experiment was conducted on the integrated circuit manufacturing process vacuum transport simulation method provided by the embodiment of the present application. The experimental results show that, taking the vacuum transport of one million random particles as an example, a U-shaped groove with a depth-to-width ratio of 1:1 is deposited on a two-dimensional area of ​​4096*4096. The existing method uses single-threaded C language coding and uses a single-core Intel(R) Core(TM) i7-1065G7@1.30GHz1.50GHz CPU to run for about one hour. Under the same equipment conditions, the method only takes about 11 seconds, which greatly improves the overall calculation efficiency. In terms of theoretical expected time complexity, for a simulation area of ​​n*n size, the time complexity of the integrated circuit manufacturing process vacuum transport simulation method provided by this embodiment is lower than the simulation method in the prior art. In addition, during the experiment, the simulation of the vacuum phase and the solid phase is parallel, and parallelization technology can be used more conveniently to improve the overall efficiency of the simulation. After the simulation area is expanded, the advantage of the scheme in calculation efficiency is more obvious.

[0110] In summary, the integrated circuit manufacturing process vacuum transport simulation method provided in the embodiment of the present application takes the initial position of the transport particle, the movement direction vector of the simulated particle, and the sub-node area of ​​the simulation area as the input of the finite state machine, and simulates the movement of the transport particle by combining the two-dimensional segment tree method. The process of moving the transport particle grid by grid in the prior art and then analyzing the movement of the transport particle is converted into a process of dividing the simulation area through a two-dimensional segment tree and updating the state of the transport particle in combination with the finite state machine, which is beneficial to reducing the time complexity of the simulation process and improving the operation efficiency of the simulation.

[0111] This application also provides a vacuum transport simulation device for integrated circuit manufacturing process, please refer to Figure 3 , Figure 3 This is a structural diagram of the integrated circuit manufacturing process vacuum transport simulation device provided in an embodiment of the present application.

[0112] like Figure 4 As shown, the integrated circuit manufacturing process vacuum transport simulation device comprises:

[0113] The region processing unit 401 is used to use a two-dimensional line segment tree method to divide the simulation region corresponding to the substrate as a root node to obtain sub-node regions corresponding to multiple sub-nodes of the root node;

[0114] The state machine processing unit 402 is used to input each of the sub-node regions, the initial position of the transport particle and the movement direction vector of the transport particle into a finite state machine, so that the initial position of the transport particle and the movement direction vector are used as the first state of the transport particle through the finite state machine, and according to the first state, the movement of the transport particle is simulated to determine the movement position of the transport particle and the sub-node region where the movement position is located; when the particle density of the sub-node region where the movement position of the transport particle is located is vacuum or dense, the final state of the transport particle is determined according to the movement position of the transport particle and the adsorption information of the transport particle; when the particle density of the sub-node region where the movement position of the transport particle is located is a coefficient, the sub-node region is divided into regions by using the two-dimensional line segment tree method as a parent node to obtain sub-node regions corresponding to multiple child nodes of the parent node; the first state is updated according to the movement position of the transport particle; and the simulation of the movement of the transport particle according to the first state is returned to determine the movement position of the transport particle and the sub-node region where the movement position is located.

[0115] In an optional embodiment of the present application, the device is also used for:

[0116] According to the crystal stacking mode of the substrate, the simulation region is lattice-divided to obtain a lattice network of the simulation region;

[0117] Wherein, the spatial volume corresponding to the grid unit of the lattice network is larger than the unit cell volume of the substrate.

[0118] In an optional implementation manner of the present application, the method of using a two-dimensional segment tree to divide the simulation area corresponding to the substrate into regions as a root node, and obtaining sub-node regions corresponding to multiple sub-nodes of the root node, includes:

[0119] Determining the vertex coordinates of each vertex of the simulation area;

[0120] Based on the vertex coordinates, the simulation area is divided into regions to obtain sub-node regions corresponding to the multiple sub-nodes of the root node.

[0121] In an optional embodiment of the present application, when the particle density of the subnode region where the moving position of the transport particle is located is vacuum or dense, determining the final state of the transport particle according to the moving position of the transport particle and the adsorption information of the transport particle includes:

[0122] When the particle density of the subnode region where the moving position of the transport particle is located is vacuum, the moving position of the transport particle is located at the region boundary of the subnode region, and the adsorption information of the transport particle is adsorbed, determining that the final state of the transport particle is that the transport particle moves to the last position of the subnode region and is adsorbed;

[0123] When the particle density of the subnode region where the moving position of the transport particle is located is vacuum and the adsorption information of the transport particle is not adsorbed, determining that the final state of the transport particle is that the transport particle moves to other subnode regions outside the subnode region;

[0124] When the particle density of the subnode region where the moving position of the transport particle is located is dense and the adsorption information of the transport particle is adsorbed, determining that the final state of the transport particle is moving to the subnode region and being adsorbed;

[0125] When the particle density of the subnode region where the moving position of the transport particle is located is dense and the adsorption information of the transport particle is not adsorbed, it is determined that the final state of the transport particle is not adsorbed.

[0126] In an optional embodiment of the present application, the device is also used for:

[0127] In the case where the terminal position of the transport particle is not in the sub-node region corresponding to the plurality of sub-nodes of the root node, it is determined that the final state of the transport particle is that the transport particle exceeds the simulation boundary.

[0128] In an optional embodiment of the present application, the device is also used for:

[0129] obtaining a substrate image of the substrate;

[0130] Based on the contour recognition of the substrate image, a simulation area corresponding to the substrate is determined.

[0131] The above-mentioned device embodiment provided in this embodiment and the method embodiment of the present application belong to the same application concept. For the technical details not fully described in this embodiment, please refer to the specific processing content of the vacuum transport simulation method of the integrated circuit manufacturing process provided in the above-mentioned embodiment of the present application, which will not be repeated here.

[0132] The present application also provides an electronic device, such as Figure 5 As shown, Figure 5 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application.

[0133] like Figure 5 As shown, the electronic device comprises:

[0134] Processor 210;

[0135] A memory 200 for storing instructions executable by the processor 210;

[0136] The processor 210 is used to execute the integrated circuit manufacturing process vacuum transport simulation method disclosed in any of the above embodiments by running the instructions in the memory 200.

[0137] The processor 210, the memory 200, the communication interface 220, the input device 230 and the output device 240 are connected to each other via a bus.

[0138] A bus may include a pathway that transfers information between components of a computer system.

[0139] The processor 210 may be a general-purpose processor, such as a general-purpose central processing unit (CPU), a microprocessor, etc., or an application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of the program of the scheme of the present invention. It may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

[0140] The processor 210 may include a main processor, and may also include a baseband chip, a modem, and the like.

[0141] The memory 200 stores a program for executing the technical solution of the present invention, and may also store an operating system and other key services. Specifically, the program may include a program code, and the program code includes a computer operation instruction. More specifically, the memory 200 may include a read-only memory (ROM), other types of static storage devices that can store static information and instructions, a random access memory (RAM), other types of dynamic storage devices that can store information and instructions, a disk storage, a flash, and the like.

[0142] The input device 230 may include a device for receiving data and information input by a user, such as a keyboard, a mouse, a camera, a scanner, a touch screen, etc.

[0143] Output device 240 may include devices that allow information to be output to a user, such as a display screen, printer, speaker, etc.

[0144] The communication interface 220 may include any transceiver or the like to communicate with other devices or communication networks, such as Ethernet, Radio Access Network (RAN), Wireless Local Area Network (WLAN), etc.

[0145] The processor 210 executes the program stored in the memory 200 and calls other devices, and can be used to implement each step of any integrated circuit manufacturing process vacuum transport simulation method provided in the above embodiments of the present application.

[0146] In addition to the above-mentioned methods and devices, an embodiment of the present application may also be a computer program product, which includes computer program instructions, which, when executed by a processor, enable the processor to execute the steps in the integrated circuit manufacturing process vacuum transport simulation method of various embodiments of the present application.

[0147] The computer program product may be written in any combination of one or more programming languages ​​to write program codes for performing the operations of the embodiments of the present application, including object-oriented programming languages, such as Java, C++, etc., and conventional procedural programming languages, such as "C" language or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, as an independent software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0148] In addition, the embodiments of the present application may also be a storage medium on which a computer program is stored, and the computer program is executed by a processor to execute the steps of the integrated circuit manufacturing process vacuum transport simulation method of various embodiments of the present application.

[0149] For the aforementioned method embodiments, for the sake of simplicity, they are all described as a series of action combinations, but those skilled in the art should be aware that the present application is not limited by the order of the actions described, because according to the present application, some steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present application.

[0150] It should be noted that each embodiment in this specification is described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other. For the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0151] The steps in the methods of each embodiment of the present application can be adjusted in order, combined and deleted according to actual needs, and the technical features recorded in each embodiment can be replaced or combined.

[0152] The modules and sub-modules in the devices and terminals in the various embodiments of the present application can be combined, divided and deleted according to actual needs.

[0153] In the several embodiments provided in the present application, it should be understood that the disclosed terminals, devices and methods can be implemented in other ways. For example, the terminal embodiments described above are only schematic, for example, the division of modules or submodules is only a logical function division, and there may be other division methods in actual implementation, for example, multiple submodules or modules can be combined or integrated into another module, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or modules, which can be electrical, mechanical or other forms.

[0154] The modules or submodules described as separate components may or may not be physically separated, and the components of the modules or submodules may or may not be physical modules or submodules, that is, they may be located in one place, or they may be distributed on multiple network modules or submodules. Some or all of the modules or submodules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0155] In addition, each functional module or submodule in each embodiment of the present application may be integrated into one processing module, or each module or submodule may exist physically separately, or two or more modules or submodules may be integrated into one module. The above-mentioned integrated modules or submodules may be implemented in the form of hardware or in the form of software functional modules or submodules.

[0156] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0157] The steps of the method or algorithm described in conjunction with the embodiments disclosed herein may be implemented directly by hardware, software units executed by a processor, or a combination of the two. The software units may be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0158] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0159] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A vacuum transport simulation method for integrated circuit manufacturing process, characterized in that: include: Using a two-dimensional line segment tree method, taking the simulation area corresponding to the substrate as a root node for region division, and obtaining sub-node areas corresponding to a plurality of sub-nodes of the root node; Inputting each of the subnode regions, the initial position of the transport particle, and the motion direction vector of the transport particle into a finite state machine, so that the initial position of the transport particle and the motion direction vector are used as the first state of the transport particle through the finite state machine, and simulating the motion of the transport particle according to the first state to determine the motion position of the transport particle and the subnode region where the motion position is located; When the particle density of the subnode region where the moving position of the transport particle is located is vacuum or dense, determining the final state of the transport particle according to the moving position of the transport particle and the adsorption information of the transport particle; In the case where the particle density of the sub-node area where the moving position of the transport particle is located is a coefficient, the two-dimensional line segment tree method is used to divide the sub-node area as the parent node to obtain the sub-node areas corresponding to the multiple child nodes of the parent node; the first state is updated according to the moving position of the transport particle; and the movement of the transport particle is simulated according to the first state to determine the moving position of the transport particle and the sub-node area where the moving position is located.

2. The method according to claim 1, characterized in that Also includes: According to the crystal stacking mode of the substrate, the simulation region is lattice-divided to obtain a lattice network of the simulation region; Wherein, the spatial volume corresponding to the grid unit of the lattice network is larger than the unit cell volume of the substrate.

3. The method according to claim 1, characterized in that The method of using a two-dimensional line segment tree to divide the simulation area corresponding to the substrate into regions as a root node, and obtaining sub-node regions corresponding to a plurality of sub-nodes of the root node, includes: Determining the vertex coordinates of each vertex of the simulation area; Based on the vertex coordinates, the simulation area is divided into regions to obtain sub-node regions corresponding to the multiple sub-nodes of the root node.

4. The method according to claim 1, characterized in that: In the case where the particle density of the subnode region where the moving position of the transport particle is located is vacuum or dense, determining the final state of the transport particle according to the moving position of the transport particle and the adsorption information of the transport particle includes: When the particle density of the subnode region where the moving position of the transport particle is located is vacuum, the moving position of the transport particle is located at the region boundary of the subnode region, and the adsorption information of the transport particle is adsorbed, determining that the final state of the transport particle is that the transport particle moves to the last position of the subnode region and is adsorbed; When the particle density of the subnode region where the moving position of the transport particle is located is vacuum and the adsorption information of the transport particle is not adsorbed, determining that the final state of the transport particle is that the transport particle moves to other subnode regions outside the subnode region; When the particle density of the subnode region where the moving position of the transport particle is located is dense and the adsorption information of the transport particle is adsorbed, determining that the final state of the transport particle is moving to the subnode region and being adsorbed; When the particle density of the subnode region where the moving position of the transport particle is located is dense and the adsorption information of the transport particle is not adsorbed, it is determined that the final state of the transport particle is not adsorbed.

5. The method according to claim 1, characterized in that Also includes: In the case where the terminal position of the transport particle is not in the sub-node region corresponding to the plurality of sub-nodes of the root node, it is determined that the final state of the transport particle is that the transport particle exceeds the simulation boundary.

6. The method according to claim 1, characterized in that Also includes: obtaining a substrate image of the substrate; Based on the contour recognition of the substrate image, a simulation area corresponding to the substrate is determined.

7. An integrated circuit manufacturing process vacuum transport simulation device, characterized in that: include: A region processing unit, configured to use a two-dimensional line segment tree method to divide the simulation region corresponding to the substrate into regions as a root node, and obtain sub-node regions corresponding to a plurality of sub-nodes of the root node; A state machine processing unit is used to input each of the sub-node regions, the initial position of the transport particle and the movement direction vector of the transport particle into a finite state machine, so that the initial position of the transport particle and the movement direction vector are used as the first state of the transport particle through the finite state machine, and according to the first state, the movement of the transport particle is simulated to determine the movement position of the transport particle and the sub-node region where the movement position is located; when the particle density of the sub-node region where the movement position of the transport particle is located is vacuum or dense, the final state of the transport particle is determined according to the movement position of the transport particle and the adsorption information of the transport particle; when the particle density of the sub-node region where the movement position of the transport particle is located is a coefficient, the sub-node region is divided as a parent node by using the two-dimensional line segment tree method to obtain the sub-node regions corresponding to the multiple child nodes of the parent node; the first state is updated according to the movement position of the transport particle; and the movement of the transport particle is simulated according to the first state to determine the movement position of the transport particle and the sub-node region where the movement position is located.

8. An electronic device, characterized in that: include: processor; a memory for storing instructions executable by the processor; The processor is used to execute the integrated circuit manufacturing process vacuum transport simulation method according to any one of claims 1 to 6 by running instructions in the memory.

9. A computer storage medium, characterized in that The computer storage medium stores instructions, and when the instructions are executed, the integrated circuit manufacturing process vacuum transport simulation method according to any one of claims 1 to 6 is executed.

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