Simulation test method, device and system and simulation equipment

Abstract

The invention provides a simulation test method, device and system and simulation equipment, and belongs to the technical field of quantum chips, and the method comprises the steps: obtaining a to-be-simulated task of a quantum chip, determining the first computing resource information needed by the to-be-simulated task of the quantum chip, and obtaining the first computing resource information of the to-be-simulated task of the quantum chip according to the first computing resource information. Second computing resource information of the simulation equipment is obtained, the to-be-simulated task of the quantum chip is divided based on the first computing resource information and the second computing resource information, at least one corresponding to-be-simulated sub-task is obtained, and computing resources needed by the to-be-simulated sub-task are smaller than or equal to computing resources of the simulation equipment; and performing simulation processing on the to-be-simulated sub-task based on the simulation equipment to obtain a simulation processing result. According to the method, the to-be-simulated task can be divided by combining the to-be-simulated task of the quantum chip and the computing resource condition of the simulation equipment, so that the simulation computing resource allocation can be dynamically optimized under the condition of limited hardware resources, and the simulation efficiency is improved.

Description

Technical Field

[0001] The present disclosure relates to the field of quantum chip technology, and in particular to a simulation test method, device, system and simulation equipment. Background Art

[0002] With the development of quantum chip technology, the complexity of quantum chip electromagnetic simulation test methods has also increased dramatically. At present, electromagnetic simulation testing of quantum chips is mainly achieved through multi-core resource testing of test models. However, the limited resource configuration of the test model leads to low efficiency of electromagnetic simulation testing of quantum chips. Therefore, how to improve test efficiency under limited resource configuration has become a technical problem that needs to be solved urgently. Summary of the invention

[0003] The present disclosure provides a simulation test method, apparatus, system and simulation equipment.

[0004] According to a first aspect of the present disclosure, a simulation test method is provided, the method comprising: Get the quantum chip tasks to be simulated; Determining first computing resource information required for the task to be simulated on the quantum chip; Acquire second computing resource information of the simulation device; Divide the quantum chip task to be simulated based on the first computing resource information and the second computing resource information to obtain at least one corresponding subtask to be simulated, wherein the computing resources required by the subtask to be simulated are less than or equal to the computing resources of the simulation device; The simulation device performs simulation processing on the subtask to be simulated to obtain a simulation processing result.

[0005] In one possible implementation, a plurality of simulation devices are included, and the division of the quantum chip task to be simulated based on the first computing resource information and the second computing resource information to obtain at least one corresponding subtask to be simulated includes: According to the first computing resource information and the second computing resource information of each simulation device, the tasks to be simulated of the quantum chip are divided into a plurality of simulation task groups, each simulation device corresponds to a simulation task group, and each simulation task group includes at least one subtask to be simulated.

[0006] In one embodiment, the method further comprises: Monitoring the simulation process of the subtask to be simulated to obtain simulation status data; If the simulation status data indicates that there is an abnormality in the simulation process, generating simulation abnormality alarm information; The simulation abnormality alarm information is displayed.

[0007] In one embodiment, the method further comprises: If the simulation status data indicates that there is an abnormality in the simulation process, locate the abnormal device and the cause of the abnormality based on the simulation status data; Based on the abnormal cause, the simulation configuration data corresponding to the abnormal device of the quantum device is adjusted.

[0008] In one possible implementation manner, obtaining a quantum chip task to be simulated includes: Get the quantum chip simulation layout file; Based on the simulation data templates corresponding to the various devices of the quantum chip, the simulation configuration data is configured for each device included in the quantum chip simulation layout file to obtain the quantum chip task to be simulated.

[0009] In one possible implementation manner, dividing the quantum chip task to be simulated based on the first computing resource information and the second computing resource information to obtain at least one corresponding subtask to be simulated includes: Determining the computing resources required for each quantum device of the quantum chip according to the first computing resource information; For each quantum device, if the computing resources required by the quantum device are less than or equal to the available computing resources of the simulation device, the task corresponding to the quantum device in the task to be simulated of the quantum chip is determined as a subtask to be simulated, and the second computing resource information includes the available computing resource information of the simulation device; If the computing resources required by the quantum device are greater than the available computing resources of the simulation device, the task corresponding to the quantum device in the task to be simulated of the quantum chip is divided into a plurality of subtasks to be simulated.

[0010] In one possible implementation manner, the simulating the subtask to be simulated based on the simulation device includes: Obtain information on the functional requirements of quantum chips from target users; Sorting each of the subtasks to be simulated according to the functional requirement degree information; Based on the simulation device, simulation processing is performed on each of the subtasks to be simulated according to the sorting result.

[0011] According to a second aspect of the present disclosure, a simulation test device is provided, the device comprising: Task acquisition module, used to obtain the tasks to be simulated for quantum chips; A resource information acquisition module, used to determine the first computing resource information required for the task to be simulated by the quantum chip; and to acquire the second computing resource information of the simulation device; A task division module, used to divide the quantum chip task to be simulated based on the first computing resource information and the second computing resource information to obtain at least one corresponding subtask to be simulated, wherein the computing resources required by the subtask to be simulated are less than or equal to the computing resources of the simulation device; The simulation processing module is used to perform simulation processing on the subtask to be simulated based on the simulation device to obtain a simulation processing result.

[0012] In one possible implementation, multiple simulation devices are included, and the task division module is specifically used to divide the quantum chip tasks to be simulated into multiple simulation task groups according to the first computing resource information and the second computing resource information of each simulation device, each of the simulation devices corresponds to a simulation task group, and each of the simulation task groups includes at least one subtask to be simulated.

[0013] In one possible implementation, the device also includes a status monitoring module for monitoring the simulation processing process for the subtask to be simulated and obtaining simulation status data; if the simulation status data indicates that there is an abnormality in the simulation process, generating simulation abnormality alarm information; and displaying the simulation abnormality alarm information.

[0014] In one possible implementation manner, the simulation processing module is further used to locate the abnormal device and the cause of the abnormality based on the simulation status data if the simulation status data indicates that there is an abnormality in the simulation process; and adjust the simulation configuration data corresponding to the abnormal device of the quantum device based on the cause of the abnormality.

[0015] In one possible implementation, the task acquisition module is specifically used to obtain a quantum chip simulation layout file; based on the simulation data template corresponding to each device of the quantum chip, the simulation configuration data is configured for each device included in the quantum chip simulation layout file to obtain the quantum chip task to be simulated.

[0016] In one possible implementation mode, the task division module is specifically used to determine the computing resources required for each quantum device of the quantum chip according to the first computing resource information; for each quantum device, if the computing resources required by the quantum device are less than or equal to the available computing resources of the simulation device, the task corresponding to the quantum device in the task to be simulated of the quantum chip is determined as a subtask to be simulated, and the second computing resource information includes the available computing resource information of the simulation device; if the computing resources required by the quantum device are greater than the available computing resources of the simulation device, the task corresponding to the quantum device in the task to be simulated of the quantum chip is divided into multiple subtasks to be simulated.

[0017] In one possible implementation, the simulation processing module is specifically used to obtain the target user's functional requirement level information for the quantum chip; sort each of the subtasks to be simulated according to the functional requirement level information; and based on the simulation device, simulate each of the subtasks to be simulated according to the sorting result.

[0018] According to a third aspect of the present disclosure, there is provided a simulation test system, comprising a server and a plurality of simulation devices; The server is used to obtain a quantum chip task to be simulated, determine the first computing resource information required for the quantum chip task to be simulated, obtain the second computing resource information of each of the simulation devices, divide the quantum chip task to be simulated into a plurality of simulation task groups according to the first computing resource information and the second computing resource information of each of the simulation devices, each of the simulation devices corresponds to a simulation task group, and send each simulation task group to the corresponding simulation device, each of the simulation task groups includes at least one subtask to be simulated, and the computing resources required for the subtask to be simulated included in each of the simulation task groups are less than or equal to the computing resources of the corresponding simulation device; Each of the simulation devices is used to receive the simulation task group sent by the server, and perform simulation processing on each subtask to be simulated included in the simulation task group to obtain a simulation processing result.

[0019] According to a fourth aspect of the present disclosure, there is provided an electronic device, including: at least one processor; and a memory communicatively coupled to the at least one processor; The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the method described in the present disclosure.

[0020] The simulation test method provided by the embodiment of the present disclosure is adopted to obtain the task to be simulated of the quantum chip, determine the first computing resource information required for the task to be simulated of the quantum chip, obtain the second computing resource information of the simulation device, divide the task to be simulated of the quantum chip based on the first computing resource information and the second computing resource information, obtain at least one corresponding subtask to be simulated, the computing resources required for the subtask to be simulated are less than or equal to the computing resources of the simulation device, and simulate the subtask to be simulated based on the simulation device to obtain the simulation processing result. For quantum chips, the tasks to be simulated can be divided in combination with the computing resource conditions of the tasks to be simulated of the quantum chip and the simulation device, and the allocation of simulation computing resources can be dynamically optimized under limited hardware resource conditions, thereby improving the simulation efficiency, reducing the workload of R&D personnel, and reducing the R&D time of quantum chips.

[0021] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The above and other objects, features and advantages of the exemplary embodiments of the present disclosure will become readily understood by reading the detailed description below with reference to the accompanying drawings. In the accompanying drawings, several embodiments of the present disclosure are shown in an exemplary and non-limiting manner, in which: In the drawings, the same or corresponding reference numerals represent the same or corresponding parts.

[0023] Figure 1 A schematic diagram of an implementation flow of a simulation test method provided by an embodiment of the present disclosure is shown; Figure 2 Another implementation flow diagram of the simulation test method provided by the embodiment of the present disclosure is shown; Figure 3 Another implementation flow diagram of the simulation test method provided by the embodiment of the present disclosure is shown; Figure 4 A schematic diagram of the structure of a simulation test system provided by an embodiment of the present disclosure is shown; Figure 5 A schematic diagram of the structure of a simulation test device provided by an embodiment of the present disclosure is shown; Figure 6 A schematic diagram of the composition structure of a simulation device according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0024] In order to make the purpose, features, and advantages of the present disclosure more obvious and easy to understand, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present disclosure.

[0025] Since the efficiency of electromagnetic simulation testing of quantum chips is currently low, in order to improve the testing efficiency, this application provides a simulation testing method, device, system and simulation equipment. The electronic equipment provided in this application can be a computer, a cloud platform and an Internet of Things platform.

[0026] The technical solution of the embodiment of the present disclosure will be described below in conjunction with the drawings in the embodiment of the present disclosure.

[0027] Figure 1A schematic diagram of an implementation flow of the simulation test method provided by the embodiment of the present disclosure is shown. Figure 1 As shown, the method includes: S101, obtaining the quantum chip task to be simulated.

[0028] In the disclosed embodiment, the quantum chip simulation task may be a task for evaluating parameters such as chip circuit structure, chip device function, and chip system performance of quantum chips such as superconducting quantum chips, ion trap quantum chips, topological quantum chips, or optical quantum chips. The quantum chip simulation task may include tasks for simulation testing of quantum chip models in the research and development stage, and may also include tasks for simulation testing of quantum chips that are put into production and / or applications.

[0029] S102, determining first computing resource information required for the task to be simulated by the quantum chip.

[0030] In the disclosed embodiment, the quantum chip task to be simulated may include quantum circuit structure information and device configuration information in the quantum chip, etc. The hardware resource information and software resource information required by each device when the quantum chip is running can be obtained through the quantum circuit structure and device configuration as the first computing resource information.

[0031] The first computing resource information may include information such as the type of hardware resources, the number of hardware resources, and software resources required to process the quantum chip task to be simulated. For example, the first computing resource information of the quantum chip task A to be simulated may include information such as the CPU architecture, memory size, memory type, number of hard disks, network latency, and operating system type required to process the quantum chip task A to be simulated.

[0032] S103: Acquire second computing resource information of the simulation device.

[0033] In the disclosed embodiments, the resource usage status of the simulation device can be obtained through the resource management tool in the simulation device, and information such as the type of hardware resources and the number of hardware resources currently available for the simulation device can be obtained based on the resource usage status as the second computing resource information. For example, for a simulation device whose operating system is a Windows operating system, the task manager or resource monitor can be used to retrieve information such as the CPU, used memory, available memory, available disk, and network connection status in the simulation device as the second computing resource information. For a simulation device whose operating system is a Linux system, the command line tool can be used to monitor and obtain information such as the CPU, used memory, and available memory of the simulation device as the second computing resource information. For example, the simulation device can extract the estimated memory requirement information of the simulation data from the simulation project file as the second computing resource information of the simulation device through the memory evaluation command function of the simulation software running in the simulation device.

[0034] In the disclosed embodiment, the simulation device may also record resource usage information each time a quantum chip simulation test task is executed. The simulation device may evaluate the amount of hardware resources, the type of hardware resources, and software information required to execute the quantum chip simulation test task as the second computing resource information by calling the historical resource usage information related to the quantum chip simulation test task.

[0035] S104: Divide the quantum chip task to be simulated based on the first computing resource information and the second computing resource information to obtain at least one corresponding subtask to be simulated.

[0036] The computing resources required for the subtask to be simulated are less than or equal to the computing resources of the simulation device. In the embodiment of the present disclosure, the number of tasks to be divided can be determined by the first computing resource information and the second computing resource information, so as to divide the quantum chip task to be simulated into one or more subtasks to be simulated. For example, the modulus of the quantum chip task to be simulated and the available computing resources of the simulation device can be calculated, and the modulus value obtained can be used as the number of tasks to be divided.

[0037] The computing resources required by each subtask to be simulated may be less than the available computing resources of the simulation device. For example, when the available memory in the simulation device is 500MB and the available CPU is 8 cores, the divided subtask to be simulated needs to use a CPU of less than or equal to 8 cores and a memory of less than or equal to 500MB.

[0038] S105: Perform simulation processing on the subtask to be simulated based on the simulation device to obtain a simulation processing result.

[0039] In the present disclosure, the simulation device can sort the tasks according to the urgency of the subtasks to be simulated, and perform simulation processing on each subtask to be simulated in sequence according to the sorting result.

[0040] In a possible implementation manner, the simulating the subtask to be simulated based on the simulation device may include steps A1-A3: Step A1, obtaining information on the functional requirements of the target user for the quantum chip.

[0041] The functional requirement degree information can represent the user's requirement degree or requirement priority for each performance of the quantum chip. For example, the performance of the quantum chip can include scalability, fidelity of quantum gates, fidelity of quantum bits, and coherence time.

[0042] Step A2: sorting the subtasks to be simulated according to the functional requirement degree information.

[0043] In the disclosed embodiment, the user can set the functional requirement degree information for each performance of the quantum chip. If the user wants to expand the application scope of the quantum chip so that the quantum chip can support quantum computing requirements in multiple fields, the functional requirement degree of scalability in the performance of the quantum chip can be set to the highest. Based on this, the simulation device can give priority to simulating the subtasks to be simulated that are related to the scalability in the performance of the quantum chip.

[0044] The simulation device can sort the subtasks to be simulated in descending order according to the functional requirements of the performance of the quantum chip involved in each subtask to be simulated, so that the simulation device can give priority to processing the subtasks to be simulated that the user is more concerned about.

[0045] Step A3: Based on the simulation device, simulation processing is performed on each of the subtasks to be simulated according to the sorting result.

[0046] The simulation test method provided by the embodiment of the present disclosure is adopted to obtain the task to be simulated of the quantum chip, determine the first computing resource information required for the task to be simulated of the quantum chip, obtain the second computing resource information of the simulation device, divide the task to be simulated of the quantum chip based on the first computing resource information and the second computing resource information, obtain at least one corresponding subtask to be simulated, the computing resources required for the subtask to be simulated are less than or equal to the computing resources of the simulation device, and simulate the subtask to be simulated based on the simulation device to obtain the simulation processing result. For quantum chips, the tasks to be simulated can be divided in combination with the computing resource conditions of the tasks to be simulated of the quantum chip and the simulation device, and the allocation of simulation computing resources can be dynamically optimized under limited hardware resource conditions, thereby improving the simulation efficiency, reducing the workload of R&D personnel, and reducing the R&D time of quantum chips.

[0047] In a possible implementation manner, the step of obtaining the quantum chip task to be simulated may include steps B1 to B2: Step B1, obtain the quantum chip simulation layout file.

[0048] In the present disclosure, the quantum chip simulation layout can be used to design and verify the quantum chip. The quantum chip simulation layout can include: quantum circuits, quantum bits, quantum gates, quantum circuit connection lines and other devices of the quantum chip, as well as device performance evaluation index information such as the fidelity of each quantum gate, the coherence time of the quantum bit and the depth of the quantum circuit.

[0049] In the disclosed embodiment, the quantum chip simulation layout can be subjected to Boolean operation reverse conversion processing, and the file after reverse conversion processing is used as the quantum chip simulation layout file. The simulation device can perform simulation processing on the reverse converted quantum chip simulation layout.

[0050] Step B2, based on the simulation data template corresponding to each device of the quantum chip, configure simulation configuration data for each device included in the quantum chip simulation layout file to obtain the quantum chip task to be simulated.

[0051] In the disclosed embodiment, the simulation device may store simulation data templates corresponding to various types of devices of the quantum chip. For example, the capacitance simulation data template and the resonant cavity simulation data template of the quantum chip. The simulation data template corresponding to the device may include a simulation configuration template for simulating the device of the quantum chip. For example, the capacitance simulation data template may include parameters such as the capacitor shell metal, capacitor name, thickness, specified conductivity, anisotropy, dielectric, loss and conductivity. The simulation device may display the template information of each simulation configuration template to the user, and the user may input the specific configuration of the device. For example, the user may input information such as the number of capacitors, capacitor model, capacitor position, resonant cavity position and control line model of the quantum chip through the configuration template.

[0052] In the disclosed embodiment, simulation data templates corresponding to various types of devices may also be stored in servers such as cloud platforms and Internet of Things platforms, and simulation devices may obtain the simulation data templates through the servers.

[0053] In the disclosed embodiment, the device configuration template of the quantum chip can also be used as part of the quantum chip simulation layout. The simulation device can automatically configure the device parameters through the quantum chip simulation layout.

[0054] In one possible implementation, Figure 2 Another implementation flow diagram of the simulation test method provided by the embodiment of the present disclosure is shown. Figure 2 As shown, the division of the quantum chip task to be simulated based on the first computing resource information and the second computing resource information to obtain at least one corresponding subtask to be simulated includes: S201, determining the computing resources required for each quantum device of the quantum chip according to the first computing resource information.

[0055] In the embodiment of the present disclosure, the first computing resource information may include the hardware resource information and software resource information required by each quantum device when the quantum chip is running. The simulation device can obtain the CPU, memory size, memory type, number of hard disks, and running software required by each quantum device of the quantum chip when running by querying the first computing resource information. The memory size and / or number of hard disks required by each quantum device can be used as the computing resources required by the device.

[0056] S202, for each quantum device, if the computing resources required by the quantum device are less than or equal to the available computing resources of the simulation device, determine the task corresponding to the quantum device in the quantum chip task to be simulated as a subtask to be simulated, and the second computing resource information includes the available computing resource information of the simulation device.

[0057] S203: If the computing resources required by the quantum device are greater than the available computing resources of the simulation device, the task corresponding to the quantum device in the task to be simulated of the quantum chip is divided into a plurality of subtasks to be simulated.

[0058] In the disclosed embodiments, the available computing resources of the simulation device may include resources such as the available CPU, available memory, and available disk of the simulation device. For example, for each quantum device, if the size of the computing resources required when the quantum device is running is less than or equal to the size of the available computing resources of the simulation device, which indicates that the simulation device can withstand the simulation operation of the quantum device, then the simulation task corresponding to the quantum device can be used as a subtask to be simulated. If the size of the computing resources required when the quantum device is running is greater than the size of the available computing resources of the simulation device, which indicates that the simulation device can withstand the simulation operation of the quantum device, then the simulation task of the quantum device needs to be further divided into multiple subtasks to be simulated that can be processed by the simulation device. Dividing the tasks to be simulated of the quantum chip according to the type of quantum device and the required computing resources can not only improve the simulation efficiency but also obtain more accurate performance test data of the quantum device.

[0059] In one possible implementation, Figure 3 FIG. 2 shows another implementation flow diagram of the simulation test method provided by the embodiment of the present disclosure. Figure 3 As shown, the simulation method comprises: S301, monitoring the simulation processing process of the subtask to be simulated to obtain simulation status data.

[0060] When executing simulation tasks, the simulation device may encounter abnormal situations such as memory overflow, calculation error, abnormal termination, or long-term non-response. In the disclosed embodiment, the abnormalities of the simulation device can be identified, warned, and adjusted by monitoring the simulation status data.

[0061] In the disclosed embodiment, simulation status monitoring software may be deployed in the simulation device. When the subtask to be simulated starts to execute the simulation task, the simulation status monitoring software may be started to capture the status of the simulation device through the simulation status monitoring software.

[0062] In the disclosed embodiments, the simulation status monitoring software can also be deployed on a cloud platform or an Internet of Things platform. For example, the task monitoring function, automated processing, remote monitoring interface and other functional modules of the simulation status monitoring software can be encapsulated into an application programming interface (API) that can be called across platforms, and the API-driven application can be distributed and deployed on the cloud platform. The cloud platform can also rearrange the API according to the business logic to generate new API services. The simulation status monitoring software is deployed on the cloud platform, and the API interface is installed on the simulation device and other terminal devices. The user can call the simulation status monitoring software from the cloud platform through the API interface of the simulation device to monitor the simulation process. The user can also call the simulation status monitoring software from the cloud platform through the API interface of other devices to remotely monitor the simulation process and improve the simulation efficiency.

[0063] The simulation status monitoring software is deployed on the cloud platform through API encapsulation, which not only improves the efficiency and accuracy of simulation monitoring, but also enables the simulation equipment to remotely cooperate with other devices through the cloud platform and assign simulation tasks to other devices with computing resources to achieve fast simulation, further improving the simulation efficiency.

[0064] S302: If the simulation status data indicates that the simulation process is abnormal, simulation abnormality alarm information is generated.

[0065] Abnormal conditions in the simulation process may include memory overflow, calculation error, abnormal termination or long-term non-response, etc. Simulation status data may include key events in the simulation process, status information of the simulation equipment, device status information of the quantum chip, etc.

[0066] The simulation device can determine whether there is an abnormality in the simulation process by comparing and analyzing the simulation state data and the log file of the simulation device. If there is an abnormality, a simulation abnormality alarm information can be generated. The simulation abnormality alarm information may include voice information and / or text information for prompting the simulation abnormality. The abnormality alarm information may also include information such as the device and / or abnormal location of the quantum chip that generated the abnormality.

[0067] S303, displaying the simulation abnormality alarm information.

[0068] In the disclosed embodiment, the simulation abnormality alarm information can be visualized and displayed on the simulated display screen through the remote monitoring interface function of the simulation status monitoring software. Alternatively, the simulation abnormality alarm information can be displayed on the display screen of the remote management device.

[0069] In a possible implementation, the simulation method may further include steps C1-C2: Step C1, if the simulation status data indicates an anomaly in the simulation process, locate the abnormal device and the cause of the anomaly based on the simulation status data.

[0070] In the embodiments of the present disclosure, the simulation status data may include the time when the simulation anomaly occurs, the quantum devices involved in the simulation anomaly, the hardware information of the simulation device, etc. The simulation device can determine the abnormal device and the cause of the anomaly in the quantum chip by comparing the simulation status data with the log file of the simulation device and the simulation configuration information of the quantum chip, etc.

[0071] Step C2, based on the cause of the anomaly, adjust the simulation configuration data corresponding to the abnormal device of the quantum device.

[0072] In the embodiments of the present disclosure, the simulation device can adjust the simulation configuration data of the quantum device through the automated processing module of the simulation status monitoring software according to the abnormal device and the cause of the anomaly. For example, if the capacitance of the quantum chip shows an anomaly during the simulation and the cause of the anomaly may be the geometric size of the capacitance, the simulation device reconfigures the geometric size of the capacitance of the quantum chip according to the cause of the anomaly and generates a configuration adjustment report.

[0073] In the embodiments of the present disclosure, the simulation device can automatically adjust the configuration information that causes the simulation to be abnormal, ensuring the stability and reliability of the simulation process, reducing the time for manual handling of anomalies, and improving the simulation efficiency.

[0074] In the embodiments of the present disclosure, the user can also access the simulation process of the simulation device through the remote monitoring interface to obtain the simulation progress and simulation result data, etc. For example, by setting the remote control parameters of the simulation device, for example, the remote control interface may include a web (Web, World Wide Web) interface, a mobile application, or a desktop application, etc., enabling the user to access the simulation device through the remote monitoring interface. The user can perform control operations such as starting, stopping, and pausing the simulation process by accessing the simulation device, thereby better managing and controlling the simulation process.

[0075] In the embodiments of the present disclosure, the simulation process can also be visually processed through the remote monitoring interface, and the simulation results, simulation progress, and the number of simulation anomalies, etc. are displayed to the user so that the user can more accurately understand and control the simulation process.

[0076] In the disclosed embodiments, for quantum chips, the tasks to be simulated can be divided in combination with the computing resources of the quantum chip to be simulated and the simulation equipment, and the simulation computing resource allocation can be dynamically optimized under limited hardware resource conditions, thereby improving the simulation efficiency, reducing the workload of R&D personnel, and reducing the quantum chip R&D time. In addition, the simulation process can be monitored in real time, and the simulation equipment can also adjust the simulation configuration according to the monitored abnormal data, automatically handle abnormal situations, further improve the simulation efficiency, and free up the working time of R&D personnel.

[0077] In the embodiment of the present disclosure, the simulation device may include multiple devices, and the dividing the quantum chip task to be simulated based on the first computing resource information and the second computing resource information to obtain at least one corresponding sub-task to be simulated may include: dividing the quantum chip task to be simulated into multiple simulation task groups according to the first computing resource information and the second computing resource information of each simulation device, each simulation device corresponds to a simulation task group, and each simulation task group includes at least one sub-task to be simulated.

[0078] In the present disclosure, the cloud platform can obtain the size of available computing resources of each simulation device it serves, and calculate the proportion of the available computing resources of each simulation device in the total available computing resources of all simulation devices as the available resource proportion corresponding to each simulation device.

[0079] According to the proportion of available resources corresponding to the simulation device, the tasks to be simulated of the quantum chip are divided into multiple simulation task groups whose number is equal to the number of simulation devices. The simulation task groups and the simulation devices can correspond one to one, and the ratio of the size of computing resources required by each simulation task group to the total size of computing resources required by the tasks to be simulated of the quantum chip can be equal to the simulation device corresponding to the simulation task group. Then, for each simulation device, the size of available resources of the simulation device can be compared with the size of computing resources required by the simulation task group corresponding to the simulation device. If the size of available resources of the simulation device is greater than or equal to the size of computing resources required by the simulation task group corresponding to the simulation device, the simulation task group corresponding to the simulation device does not need to be further divided. Otherwise, the simulation task group corresponding to the simulation device needs to be further divided to obtain multiple subtasks to be simulated, so that the size of computing resources required by each subtask to be simulated is less than or equal to the simulation task group corresponding to the simulation device.

[0080] Figure 4 A schematic diagram of the structure of the simulation test system provided by the embodiment of the present disclosure is shown. Figure 4 As shown, the simulation test system includes a server 401 and multiple simulation devices 402 .

[0081] The server 401 is used to obtain the quantum chip task to be simulated, determine the first computing resource information required for the quantum chip task to be simulated, obtain the second computing resource information of each simulation device, divide the quantum chip task to be simulated into multiple simulation task groups according to the first computing resource information and the second computing resource information of each simulation device, each simulation device corresponds to a simulation task group, and send each simulation task group to the corresponding simulation device, each simulation task group includes at least one subtask to be simulated, and the computing resources required for the subtask to be simulated included in each simulation task group are less than or equal to the computing resources of the corresponding simulation device; Each of the simulation devices 402 is used to receive the simulation task group sent by the server, and perform simulation processing on each subtask to be simulated included in the simulation task group to obtain a simulation processing result.

[0082] In the disclosed embodiment, each simulation device 402 can also be used to monitor the simulation processing process for the subtask to be simulated and obtain simulation status data; if the simulation status data indicates that there is an abnormality in the simulation process, generate simulation abnormality alarm information; and display the simulation abnormality alarm information.

[0083] In the embodiment of the present disclosure, each of the simulation devices 402 can also be used to locate abnormal devices and abnormal causes based on the simulation status data if the simulation status data indicates that there is an abnormality in the simulation process; and adjust the simulation configuration data corresponding to the abnormal device of the quantum device based on the abnormal cause.

[0084] In the disclosed embodiment, the server 401 can be used to obtain a quantum chip simulation layout file; based on the simulation data template corresponding to each device of the quantum chip, the simulation configuration data is configured for each device included in the quantum chip simulation layout file to obtain a quantum chip task to be simulated.

[0085] In the embodiment of the present disclosure, the server 401 can be used to determine the computing resources required for each quantum device of the quantum chip according to the first computing resource information; for each quantum device, if the computing resources required by the quantum device are less than or equal to the available computing resources of the simulation device, the task corresponding to the quantum device in the task to be simulated of the quantum chip is determined as a subtask to be simulated, and the second computing resource information includes the available computing resource information of the simulation device; if the computing resources required by the quantum device are greater than the available computing resources of the simulation device, the task corresponding to the quantum device in the task to be simulated of the quantum chip is divided into multiple subtasks to be simulated.

[0086] In the disclosed embodiment, each of the simulation devices 402 can also be used to obtain the target user's functional requirement level information for the quantum chip; sort each of the subtasks to be simulated according to the functional requirement level information; and simulate each of the subtasks to be simulated according to the sorting result based on the simulation device.

[0087] In the disclosed embodiment, the user can monitor the simulation status of each simulation device through the remote monitoring tool deployed on the server and the API interface of the remote monitoring tool in each simulation device.

[0088] In the disclosed embodiment, the server can re-acquire the available computing resource information of each simulation device at preset periods, and re-divide the quantum chip simulation tasks that have not yet been simulated based on the re-acquired available computing resource information of each device, and reasonably allocate them to each simulation device for simulation. The preset period can be set according to actual application requirements, such as 20 minutes or 30 minutes. For example, other processing tasks that consume computing resources on simulation device A are suspended, so simulation device A has more idle computing resources. After the server re-acquires the available computing resource information of simulation device A, it can reallocate the simulation tasks that have not yet been executed and are allocated to other simulation devices to simulation device A. By dynamically allocating simulation tasks by the server, computing resources can be more fully utilized, further improving simulation efficiency.

[0089] The simulation test system provided by the embodiment of the present disclosure is used to obtain the task to be simulated of the quantum chip, determine the first computing resource information required for the task to be simulated of the quantum chip, obtain the second computing resource information of the simulation device, divide the task to be simulated of the quantum chip based on the first computing resource information and the second computing resource information, obtain at least one corresponding subtask to be simulated, the computing resources required for the subtask to be simulated are less than or equal to the computing resources of the simulation device, and perform simulation processing on the subtask to be simulated based on the simulation device to obtain the simulation processing result. For quantum chips, the tasks to be simulated can be divided in combination with the computing resource conditions of the tasks to be simulated of the quantum chip and the simulation device, and the allocation of simulation computing resources can be dynamically optimized under limited hardware resource conditions, thereby improving simulation efficiency, reducing the workload of R&D personnel, and reducing the time for quantum chip R&D.

[0090] Based on the same inventive concept, according to the simulation test method provided by the above embodiment of the present disclosure, correspondingly, another embodiment of the present disclosure further provides a simulation test device, whose structural schematic diagram is shown in FIG. Figure 5 As shown, specifically including: A task acquisition module 501 is used to acquire a task to be simulated for a quantum chip; The resource information acquisition module 502 is used to determine the first computing resource information required for the task to be simulated by the quantum chip; and to obtain the second computing resource information of the simulation device; A task division module 503 is used to divide the quantum chip task to be simulated based on the first computing resource information and the second computing resource information to obtain at least one corresponding subtask to be simulated, wherein the computing resources required by the subtask to be simulated are less than or equal to the computing resources of the simulation device; The simulation processing module 504 is used to perform simulation processing on the subtask to be simulated based on the simulation device to obtain a simulation processing result.

[0091] The simulation test device provided by the embodiment of the present disclosure is used to obtain the task to be simulated of the quantum chip, determine the first computing resource information required for the task to be simulated of the quantum chip, obtain the second computing resource information of the simulation device, divide the task to be simulated of the quantum chip based on the first computing resource information and the second computing resource information, obtain at least one corresponding subtask to be simulated, the computing resources required for the subtask to be simulated are less than or equal to the computing resources of the simulation device, and perform simulation processing on the subtask to be simulated based on the simulation device to obtain the simulation processing result. For quantum chips, the tasks to be simulated can be divided in combination with the computing resource conditions of the tasks to be simulated of the quantum chip and the simulation device, and the allocation of simulation computing resources can be dynamically optimized under limited hardware resource conditions, thereby improving simulation efficiency, reducing the workload of R&D personnel, and reducing the time for quantum chip R&D.

[0092] In one possible implementation, multiple simulation devices are included, and the task division module 503 is specifically used to divide the quantum chip tasks to be simulated into multiple simulation task groups according to the first computing resource information and the second computing resource information of each simulation device, each of the simulation devices corresponds to a simulation task group, and each of the simulation task groups includes at least one subtask to be simulated.

[0093] In one possible implementation mode, the device also includes a status monitoring module (not shown in the figure), which is used to monitor the simulation processing process for the subtask to be simulated and obtain simulation status data; if the simulation status data indicates that there is an abnormality in the simulation process, a simulation abnormality alarm information is generated; and the simulation abnormality alarm information is displayed.

[0094] In one possible implementation, the simulation processing module 504 is further used to locate the abnormal device and the cause of the abnormality based on the simulation status data if the simulation status data indicates that there is an abnormality in the simulation process; and adjust the simulation configuration data corresponding to the abnormal device of the quantum device based on the cause of the abnormality.

[0095] In one possible implementation, the task acquisition module is specifically used to obtain a quantum chip simulation layout file; based on the simulation data template corresponding to each device of the quantum chip, the simulation configuration data is configured for each device included in the quantum chip simulation layout file to obtain the quantum chip task to be simulated.

[0096] In one possible implementation mode, the task division module 503 is specifically used to determine the computing resources required for each quantum device of the quantum chip according to the first computing resource information; for each quantum device, if the computing resources required by the quantum device are less than or equal to the available computing resources of the simulation device, the task corresponding to the quantum device in the task to be simulated of the quantum chip is determined as a subtask to be simulated, and the second computing resource information includes the available computing resource information of the simulation device; if the computing resources required by the quantum device are greater than the available computing resources of the simulation device, the task corresponding to the quantum device in the task to be simulated of the quantum chip is divided into multiple subtasks to be simulated.

[0097] In one possible implementation, the simulation processing module 504 is specifically used to obtain the target user's functional requirement level information for the quantum chip; sort each of the subtasks to be simulated according to the functional requirement level information; and simulate each of the subtasks to be simulated according to the sorting result based on the simulation device.

[0098] In the disclosed embodiment, the simulation process can be monitored in real time, and the simulation device can also adjust the simulation configuration according to the monitored abnormal data and automatically handle abnormal situations, thereby further improving the simulation efficiency and freeing up the working time of R&D personnel.

[0099] According to an embodiment of the present disclosure, the present disclosure also provides an electronic device and a readable storage medium.

[0100] Figure 6 A schematic block diagram of an example simulation electronic device 600 that can be used to implement an embodiment of the present disclosure is shown. The simulation device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workbenches, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The simulation device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present disclosure described and / or required herein.

[0101] like Figure 6As shown, the electronic device 600 includes a computing unit 601, which can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 602 or a computer program loaded from a storage unit 608 into a random access memory (RAM) 603. In the RAM 603, various programs and data required for the operation of the electronic device 600 can also be stored. The computing unit 601, the ROM 602, and the RAM 603 are connected to each other via a bus 604. An input / output (I / O) interface 605 is also connected to the bus 604.

[0102] Multiple components in the electronic device 600 are connected to the I / O interface 605, including: an input unit 606, such as a keyboard, a mouse, etc.; an output unit 607, such as various types of displays, speakers, etc.; a storage unit 608, such as a disk, an optical disk, etc.; and a communication unit 609, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 609 allows the electronic device 600 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0103] The computing unit 601 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the computing unit 601 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, digital signal processors (DSPs), and any appropriate processors, controllers, microcontrollers, etc. The computing unit 601 performs the various methods and processes described above, such as the simulation test method. For example, in some embodiments, the simulation test method may be implemented as a computer software program, which is tangibly contained in a machine-readable medium, such as a storage unit 608. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 600 via the ROM 602 and / or the communication unit 609. When the computer program is loaded into the RAM 603 and executed by the computing unit 601, one or more steps of the simulation test method described above may be performed. Alternatively, in other embodiments, the computing unit 601 may be configured to perform the simulation test method in any other appropriate manner (e.g., by means of firmware).

[0104] Various embodiments of the technology described above herein may be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), integrated systems on chips (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. The program code for implementing the method of the present disclosure may be written in any combination of one or more programming languages. In the context of the present disclosure, a machine-readable medium may be a tangible medium. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. A computer system may include a client and a server. The client and the server are generally remote from each other and typically interact through a communication network. The server may be a cloud server, a server of a distributed system, or a server incorporating a blockchain. In addition, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. In the description of the present disclosure, “plurality” means two or more than two, unless otherwise clearly and specifically defined.

[0105] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art who is familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A simulation test method, characterized in that: The method comprises: Get the quantum chip tasks to be simulated; Determining first computing resource information required for the task to be simulated on the quantum chip; Acquire second computing resource information of the simulation device; Divide the quantum chip task to be simulated based on the first computing resource information and the second computing resource information to obtain at least one corresponding subtask to be simulated, wherein the computing resources required by the subtask to be simulated are less than or equal to the computing resources of the simulation device; The simulation device performs simulation processing on the subtask to be simulated to obtain a simulation processing result.

2. The method according to claim 1, characterized in that Comprising a plurality of simulation devices, said dividing the quantum chip task to be simulated based on the first computing resource information and the second computing resource information to obtain at least one corresponding subtask to be simulated, comprising: According to the first computing resource information and the second computing resource information of each simulation device, the tasks to be simulated of the quantum chip are divided into a plurality of simulation task groups, each simulation device corresponds to a simulation task group, and each simulation task group includes at least one subtask to be simulated.

3. The method according to claim 1, characterized in that The method further comprises: Monitoring the simulation process of the subtask to be simulated to obtain simulation status data; If the simulation status data indicates that there is an abnormality in the simulation process, generating simulation abnormality alarm information; The simulation abnormality alarm information is displayed.

4. The method according to claim 3, characterized in that The method further comprises: If the simulation status data indicates that there is an abnormality in the simulation process, locate the abnormal device and the cause of the abnormality based on the simulation status data; Based on the abnormal cause, the simulation configuration data corresponding to the abnormal device of the quantum device is adjusted.

5. The method according to claim 1, characterized in that The step of obtaining a quantum chip task to be simulated includes: Get the quantum chip simulation layout file; Based on the simulation data templates corresponding to the various devices of the quantum chip, the simulation configuration data is configured for each device included in the quantum chip simulation layout file to obtain the quantum chip task to be simulated.

6. The method according to claim 1, characterized in that The dividing the quantum chip task to be simulated based on the first computing resource information and the second computing resource information to obtain at least one corresponding subtask to be simulated includes: Determining the computing resources required for each quantum device of the quantum chip according to the first computing resource information; For each quantum device, if the computing resources required by the quantum device are less than or equal to the available computing resources of the simulation device, the task corresponding to the quantum device in the task to be simulated of the quantum chip is determined as a subtask to be simulated, and the second computing resource information includes the available computing resource information of the simulation device; If the computing resources required by the quantum device are greater than the available computing resources of the simulation device, the task corresponding to the quantum device in the task to be simulated of the quantum chip is divided into a plurality of subtasks to be simulated.

7. The method according to claim 1, characterized in that The simulating process of the subtask to be simulated based on the simulation device includes: Obtain information on the functional requirements of quantum chips from target users; Sorting each of the subtasks to be simulated according to the functional requirement degree information; Based on the simulation device, simulation processing is performed on each of the subtasks to be simulated according to the sorting result.

8. A simulation test device, characterized in that: The device comprises: Task acquisition module, used to obtain the tasks to be simulated for quantum chips; A resource information acquisition module, used to determine the first computing resource information required for the task to be simulated by the quantum chip; and to acquire the second computing resource information of the simulation device; A task division module, used to divide the quantum chip task to be simulated based on the first computing resource information and the second computing resource information to obtain at least one corresponding subtask to be simulated, wherein the computing resources required by the subtask to be simulated are less than or equal to the computing resources of the simulation device; The simulation processing module is used to perform simulation processing on the subtask to be simulated based on the simulation device to obtain a simulation processing result.

9. The device according to claim 8, characterized in that It includes multiple simulation devices, and the task division module is specifically used to divide the quantum chip task to be simulated into multiple simulation task groups according to the first computing resource information and the second computing resource information of each simulation device, each simulation device corresponds to a simulation task group, and each simulation task group includes at least one subtask to be simulated.

10. The device according to claim 8, characterized in that The device also includes a state monitoring module, which is used to monitor the simulation processing process for the subtask to be simulated and obtain simulation state data; if the simulation state data indicates that the simulation process is abnormal, a simulation abnormality alarm information is generated; The simulation abnormality alarm information is displayed.

11. The device according to claim 10, characterized in that The simulation processing module is further used to locate the abnormal device and the cause of the abnormality based on the simulation status data if the simulation status data indicates that there is an abnormality in the simulation process; and adjust the simulation configuration data corresponding to the abnormal device of the quantum device based on the cause of the abnormality.

12. The device according to claim 9, characterized in that The task acquisition module is specifically used to obtain a quantum chip simulation layout file; based on the simulation data template corresponding to each device of the quantum chip, the simulation configuration data is configured for each device included in the quantum chip simulation layout file to obtain the quantum chip task to be simulated.

13. The device according to claim 9, characterized in that The task division module is specifically used to determine the computing resources required for each quantum device of the quantum chip according to the first computing resource information; for each quantum device, if the computing resources required by the quantum device are less than or equal to the available computing resources of the simulation device, determine the task corresponding to the quantum device in the task to be simulated of the quantum chip as a subtask to be simulated, and the second computing resource information includes the available computing resource information of the simulation device; if the computing resources required by the quantum device are greater than the available computing resources of the simulation device, divide the task corresponding to the quantum device in the task to be simulated of the quantum chip into multiple subtasks to be simulated.

14. The device according to claim 8, characterized in that The simulation processing module is specifically used to obtain the target user's functional requirement level information for the quantum chip; sort the subtasks to be simulated according to the functional requirement level information; and simulate the subtasks to be simulated according to the sorting results based on the simulation device.

15. A simulation test system, characterized in that: Includes server and multiple simulation devices; The server is used to obtain a quantum chip task to be simulated, determine the first computing resource information required for the quantum chip task to be simulated, obtain the second computing resource information of each of the simulation devices, divide the quantum chip task to be simulated into a plurality of simulation task groups according to the first computing resource information and the second computing resource information of each of the simulation devices, each of the simulation devices corresponds to a simulation task group, and send each simulation task group to the corresponding simulation device, each of the simulation task groups includes at least one subtask to be simulated, and the computing resources required for the subtask to be simulated included in each of the simulation task groups are less than or equal to the computing resources of the corresponding simulation device; Each of the simulation devices is used to receive the simulation task group sent by the server, and perform simulation processing on each subtask to be simulated included in the simulation task group to obtain a simulation processing result.

16. A simulation device, characterized in that: include: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the method according to any one of claims 1 to 7 when executing the computer program.

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