Solid-state power controller and control method, power distribution system and flight equipment

Abstract

The invention discloses a solid-state power controller, a control method, a power distribution system and flight equipment. The solid-state power controller comprises a power semiconductor device, a current sensor and a hardware latch circuit control unit which are connected with one another, the power semiconductor device and the current sensor are arranged in a loop of the power supply; the current sensor is used for collecting current data in a loop of the power supply and transmitting the current data to the hardware latch circuit control unit; and the hardware latch circuit control unit is used for receiving the current data and controlling the power semiconductor device to be turned on or turned off according to the current data. Based on the scheme of the invention, the hardware latch circuit control unit is utilized to realize control of the power semiconductor device, intervention of a microcontroller is not needed, and the speed of controlling on or off of the power semiconductor device is effectively improved.

Description

Technical Field

[0001] The present application relates to the field of electrical protection technology, and in particular to a solid-state power controller and control method, a power distribution system, and flight equipment. Background Art

[0002] Electric aircraft have become a key research direction in the transportation industry. If a short circuit occurs in the power distribution system of an electric aircraft, the entire power supply voltage will drop rapidly. The instantaneous current will be very large, and all the electricity will be concentrated in the short circuit location, causing the entire aircraft power supply system to lose power instantly, resulting in a safety accident.

[0003] From the short-circuit test of the power distribution system of existing electric aircraft, when a short-circuit fault occurs, it takes only 50 microseconds for the rated voltage to drop to half of the rated voltage. If we want to avoid the situation where the entire system loses all power instantly due to such a short circuit, it is necessary to quickly shut down the power semiconductor devices and stop supplying power to the faulty components when some components powered by the power distribution system fail to achieve fault isolation.

[0004] In the existing technology, a solid-state power controller (SSPC) is often used to quickly shut down a short-circuited power semiconductor device to stop supplying power to the faulty component to achieve fault isolation. However, the existing solid-state power controller generally controls the power semiconductor device to turn on or off based on the software computing power of the microcontroller unit (MCU). The microcontroller needs to spend a certain amount of time to process and judge the signal. Therefore, the current solid-state power controller quickly controls the power semiconductor device to turn on or off. The time response speed is generally a few hundred microseconds, which cannot meet the response speed of the main power distribution system of the electric aircraft to the opening or closing of the power semiconductor device. Summary of the invention

[0005] The main purpose of this application is to provide a solid-state power controller and control method, a power distribution system, and flight equipment, aiming to improve the problem that the current solid-state power controller is difficult to quickly control the power semiconductor device to turn on or off.

[0006] To achieve the above-mentioned object, the present application provides a solid-state power controller, which includes a power semiconductor device, a current sensor, and a hardware latch circuit control unit connected to each other;

[0007] The power semiconductor device and the current sensor are arranged in a power supply loop;

[0008] The current sensor is used to collect current data in the loop of the power supply and transmit the current data to the hardware latch circuit control unit;

[0009] The hardware latch circuit control unit is used to receive the current data and control the power semiconductor device to turn on or off according to the current data, so that the circuit of the power supply enters a circuit state or a circuit-breaking state.

[0010] Optionally, the power semiconductor device includes a first insulated gate bipolar transistor and a second insulated gate bipolar transistor, the current sensor includes a first current sensor and a second current sensor, the hardware latch circuit control unit includes a first hardware latch circuit control unit and a second hardware latch circuit control unit, and the power supply includes a first power supply and a second power supply;

[0011] The emitter of the first insulated gate bipolar transistor is connected to the emitter of the second insulated gate bipolar transistor;

[0012] The negative electrode of the first power supply is connected to the negative electrode of the second power supply;

[0013] The first current sensor is respectively connected to the collector of the first insulated gate bipolar transistor, the positive electrode of the first power supply, and the first hardware latch circuit control unit, and is used to collect first current data in the loop of the first power supply and transmit the first current data to the first hardware latch circuit control unit;

[0014] The first hardware latch circuit control unit is used to receive the first current data and control the first insulated gate bipolar transistor to turn on or off according to the first current data, so that the loop of the first power supply enters a circuit state or a circuit-breaking state;

[0015] The second current sensor is respectively connected to the collector of the second insulated gate bipolar transistor, the positive electrode of the second power supply, and the second hardware latch circuit control unit, and is used to collect second current data in the loop of the second power supply and transmit the second current data to the second hardware latch circuit control unit;

[0016] The second hardware latch circuit control unit is used to receive the second current data and control the second insulated gate bipolar transistor to turn on or off according to the second current data, so that the loop of the second power supply enters a circuit state or an open circuit state.

[0017] Optionally, the solid-state power controller further comprises a first energy absorbing element and a second energy absorbing element;

[0018] One end of the first energy absorbing element is connected to the collector of the first insulated gate bipolar transistor, and the other end is connected to the emitter of the first insulated gate bipolar transistor, for absorbing line inductance energy;

[0019] One end of the second energy absorbing element is connected to the collector of the second insulated gate bipolar transistor, and the other end is connected to the emitter of the second insulated gate bipolar transistor, for absorbing line inductance energy.

[0020] Optionally, the first hardware latch circuit control unit includes a first hardware latch circuit and a first gate drive circuit, and the second hardware latch circuit control unit includes a second hardware latch circuit and a second gate drive circuit;

[0021] The first gate drive circuit is connected to the gate of the first insulated gate bipolar transistor;

[0022] The first hardware latch circuit is connected to the first current sensor and the first gate drive circuit respectively, and is used to receive the first current data, compare the first current data with a preset first current threshold to obtain a first comparison result, and control the first insulated gate bipolar transistor to turn on or off according to the first comparison result;

[0023] The second gate drive circuit is connected to the gate of the first insulated gate bipolar transistor;

[0024] The second hardware latch circuit is connected to the second current sensor and the second gate drive circuit respectively, and is used to receive the second current data, compare the second current data with a preset second current threshold to obtain a second comparison result, and control the second insulated gate bipolar transistor to turn on or off according to the second comparison result.

[0025] Optionally, the solid-state power controller further comprises a microcontroller;

[0026] The microcontroller is connected to the first hardware latch circuit, the first gate drive circuit, the second hardware latch circuit, and the second gate drive circuit, respectively, and is used to receive the first current data sent by the first hardware latch circuit, and control the first insulated gate bipolar transistor to be turned on or off through the first gate drive circuit according to the first current data, and receive the second current data sent by the second hardware latch circuit, and control the second insulated gate bipolar transistor to be turned on or off through the second gate drive circuit according to the second current data.

[0027] Optionally, the solid-state power controller further includes a first resistor, a second resistor, a third resistor, and a fourth resistor;

[0028] One end of the first resistor is connected to the emitter of the first insulated gate bipolar transistor, and the other end is connected to one end of the second resistor respectively;

[0029] The other end of the second resistor is connected to the collector of the first insulated gate bipolar transistor;

[0030] One end of the third resistor is connected to the emitter of the second insulated gate bipolar transistor, and the other end is respectively connected to one end of the fourth resistor;

[0031] The other end of the fourth resistor is connected to the collector of the second insulated gate bipolar transistor;

[0032] The microcontroller is connected to the series line between the first resistor and the second resistor and the series line between the third resistor and the fourth resistor, respectively, for monitoring the conduction state of the first insulated gate bipolar transistor and the second insulated gate bipolar transistor.

[0033] The embodiment of the present application further provides a control method of a solid-state power controller, the control method of the solid-state power controller is applied to the above-mentioned solid-state power controller, the method comprising:

[0034] The current sensor collects current data in the loop of the power supply and transmits the current data to the hardware latch circuit control unit;

[0035] The hardware latch circuit control unit compares the current data with a preset current threshold to obtain a comparison result;

[0036] The hardware latch circuit control unit controls the power semiconductor device to be turned on or off according to the comparison result, so that the circuit of the power supply enters a circuit-connected state or a circuit-disconnected state.

[0037] Optionally, the step of controlling the power semiconductor device to be turned on or off according to the comparison result by the hardware latch circuit control unit includes:

[0038] If the comparison result indicates that the current data exceeds the preset current threshold and the power semiconductor device is in an on state, the power semiconductor device is controlled to be turned off by the hardware latch circuit control unit;

[0039] If the comparison result indicates that the current data does not exceed the preset current threshold and the power semiconductor device is in the off state, the power semiconductor device is controlled to be turned on through the hardware latch circuit control unit.

[0040] An embodiment of the present application further provides a power distribution system, which includes the solid-state power controller described in any one of the above items.

[0041] An embodiment of the present application further provides a flying device, which includes the above-mentioned power distribution system.

[0042] The solid-state power controller and control method, power distribution system, and flight equipment proposed in the embodiments of the present application, the solid-state power controller includes a power semiconductor device, a current sensor, and a hardware latch circuit control unit that are connected to each other; the power semiconductor device and the current sensor are arranged in the loop of the power supply; the current sensor is used to collect current data in the loop of the power supply, and transmit the current data to the hardware latch circuit control unit; the hardware latch circuit control unit is used to receive the current data, and control the power semiconductor device to be turned on or off according to the current data, so that the loop of the power supply enters a circuit state or an open circuit state. Based on the scheme of the present application, the current sensor transmits the collected current data to the hardware latch circuit control unit, and the hardware latch circuit control unit combines the current data to realize the control of the power semiconductor device, without the intervention of the microcontroller, which effectively improves the speed of controlling the power semiconductor device to be turned on or off. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 A schematic diagram of an embodiment of a solid-state power controller of the present application;

[0044] Figure 2 A schematic diagram of an embodiment of a redundant design of a solid-state power controller of the present application;

[0045] Figure 3 A schematic diagram of an embodiment of a solid-state power controller with an energy absorbing element of the present application;

[0046] Figure 4 A schematic diagram of a detailed embodiment of a hardware latch circuit control unit of a solid-state power controller of the present application;

[0047] Figure 5 A schematic diagram of an embodiment of a solid-state power controller with a microprocessor according to the present application;

[0048] Figure 6 A schematic diagram of an embodiment of monitoring the state of an insulated gate bipolar transistor of a solid-state power controller of the present application;

[0049] Figure 7 A schematic diagram of a comprehensive embodiment of a solid-state power controller of the present application;

[0050] Figure 8 A schematic diagram of a comprehensive embodiment of a solid-state power controller connected to a load of the present application;

[0051] Fig. 9This is a flow chart of a first exemplary embodiment of a control method for a solid-state power controller of the present application;

[0052] Fig.10 This is a flow chart of a second exemplary embodiment of a control method for a solid-state power controller of the present application.

[0053] Description of Figure Numbers:

[0054]

[0055]

[0056] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0057] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0058] It should be noted that all directional indications in the embodiments of the present application (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0059] In addition, the descriptions of "first", "second", etc. in this application are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in this field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by this application.

[0060] The present application proposes a solid-state power controller 0001. Figure 1In one embodiment of the present invention, the solid-state power controller 0001 includes a power semiconductor device 100, a current sensor 200, and a hardware latch circuit control unit 300 that are interconnected; the power semiconductor device 100 and the current sensor 200 are arranged in the loop of the power supply 400; the current sensor 200 is used to collect current data in the loop of the power supply 400 and transmit the current data to the hardware latch circuit control unit 300; the hardware latch circuit control unit 300 is used to receive the current data and control the power semiconductor device 100 to be turned on or off according to the current data, so that the loop of the power supply 400 enters a circuit state or a circuit-breaking state.

[0061] Specifically, the flying equipment may be various devices and tools that can fly in the air, which are equipped with a variety of important components that require power to operate (such as various components of the power system of a flying car). These components are powered by the power distribution system of the flying equipment. When some components powered by the power distribution system fail, if the fault is not isolated in time for the components that sent the fault, it is likely to cause a large-scale failure of the function of the flying equipment. There are two conventional ways to achieve the above-mentioned fault isolation: (1) Use conventional fuses or protective tubes for overcurrent protection and fault isolation. Fuses or protective tubes use the thermal effect of current. When the current is too large and lasts for a certain period of time, sufficient heat is generated to fuse the protection system. Its response time is usually in the millisecond level, and it cannot be restored after melting. (2) Set up a solid-state power controller in the power distribution system. The solid-state power controller generally includes a current sensor, a microprocessor, and a power semiconductor device. The current sensor is used to collect current data and transmit it to the microprocessor. Based on the software computing power of the microprocessor, the power semiconductor device is controlled to be turned on or off, thereby achieving fault isolation. However, it takes a certain amount of time for the microcontroller to process and judge the current data, so it is difficult to quickly control the power semiconductor device to turn on or off in this way.

[0062] To this end, this embodiment proposes a solid-state power controller 0001 that can quickly turn on or off a power semiconductor device 100. The solid-state power controller 0001 includes a power semiconductor device 100, a current sensor 200, and a hardware latch circuit control unit 300 that are connected to each other, that is, the power semiconductor device 100 is connected to the current sensor 200, the current sensor 200 is connected to the hardware latch circuit control unit 300, and the power semiconductor device 100 is connected to the hardware latch circuit control unit 300.

[0063] The power semiconductor device 100 and the current sensor 200 are arranged in the loop of the power supply 400, so the current sensor 200 can collect the current data in the loop of the power supply 400 and transmit the current data to the hardware latch circuit control unit 300. The hardware latch circuit control unit 300 receives the current data from the current sensor 200 accordingly, and the hardware latch circuit control unit 300 is provided with a circuit supporting current value comparison. During the comparison process, if the current value reflected by the current data exceeds the preset threshold, the hardware latch circuit control unit 300 will control the power semiconductor device 100 to turn off accordingly; if the current value reflected by the current data does not exceed the preset threshold, the hardware latch circuit control unit 300 will control the power semiconductor device 100 to turn on accordingly. Since the power semiconductor device 100 is arranged in the circuit of the power supply 400, if the power semiconductor device 100 is in the on state and current is allowed to pass through the power semiconductor device 100, then the circuit of the power supply 400 will accordingly enter the on state, and the power supply 400 will normally supply power to the corresponding components; if the power semiconductor device 100 is in the off state and current is not allowed to pass through the power semiconductor device 100, then the circuit of the power supply 400 will accordingly enter the off state, and the power supply 400 will stop supplying power to the corresponding components.

[0064] The hardware latch circuit control unit 300 needs to use current data in digital form. In one case, the current sensor 200 is an analog current sensor 200, and the analog current sensor 200 provides current data in analog form to the hardware latch circuit control unit 300. Then the hardware latch circuit control unit 300 can support the current sampling function based on the hardware circuit, sample the current data in analog form to obtain current data in digital form, and control the power semiconductor device 100 to turn on or off according to the current data in digital form. In one case, the current sensor 200 is a digital current sensor 200, and the digital current sensor 200 provides current data in digital form to the hardware latch circuit control unit 300. Then the hardware latch circuit control unit 300 can directly control the power semiconductor device 100 to turn on or off according to the current data in digital form.

[0065] The power semiconductor device 100 involved in this embodiment may be: an insulated gate bipolar transistor (IGBT), a metal oxide semiconductor field effect transistor (MOSFET), a gate turn-off thyristor (GTO), a thyristor (SCR), a silicon carbide metal oxide semiconductor field effect transistor (SiCMOSFET), etc. The current sensor 200 may be: a Hall current sensor 200, a shunt current sensor 200, a resistor current sensor 200, etc. This embodiment does not limit the types of the power semiconductor device 100 and the current sensor 200.

[0066] Optionally, the solid-state power controller 0001 may be a unidirectional solid-state power controller 0001 or a bidirectional solid-state power controller 0001. The bidirectional solid-state power controller 0001 needs to be implemented based on a redundant design.

[0067] In this embodiment, the solid-state power controller 0001 includes a power semiconductor device 100, a current sensor 200, and a hardware latch circuit control unit 300 that are interconnected; the power semiconductor device 100 and the current sensor 200 are arranged in the loop of the power supply 400; the current sensor 200 is used to collect the current data in the loop of the power supply 400, and transmit the current data to the hardware latch circuit control unit 300; the hardware latch circuit control unit 300 is used to receive the current data, and control the power semiconductor device 100 to be turned on or off according to the current data, so that the loop of the power supply 400 enters a circuit state or a circuit-breaking state. Based on the scheme of the present application, the current sensor 200 transmits the collected current data to the hardware latch circuit control unit 300, and the hardware latch circuit control unit 300 combines the current data to realize the control of the power semiconductor device 100, without the intervention of the microcontroller, and effectively improves the speed of controlling the power semiconductor device 100 to be turned on or off.

[0068] Reference Figure 2In one embodiment of the present invention, the power semiconductor device 100 includes a first insulated gate bipolar transistor 110 and a second insulated gate bipolar transistor 120, the current sensor 200 includes a first current sensor 210 and a second current sensor 220, the hardware latch circuit control unit 300 includes a first hardware latch circuit control unit 310 and a second hardware latch circuit control unit 320, and the power supply 400 includes a first power supply 410 and a second power supply 420; the emitter of the first insulated gate bipolar transistor 110 is connected to the emitter of the second insulated gate bipolar transistor 120; the negative electrode of the first power supply 410 is connected to the negative electrode of the second power supply 420; the first current sensor 210 is respectively connected to the collector of the first insulated gate bipolar transistor 110, the positive electrode of the first power supply 410, and the first hardware latch circuit control unit 310, for collecting the first current data in the loop of the first power supply 410, And the first current data is transmitted to the first hardware latch circuit control unit 310; the first hardware latch circuit control unit 310 is used to receive the first current data, and control the first insulated gate bipolar transistor 110 to turn on or off according to the first current data, so that the loop of the first power supply 410 enters a connection state or an open circuit state; the second current sensor 220 is respectively connected to the collector of the second insulated gate bipolar transistor 120, the positive electrode of the second power supply 420, and the second hardware latch circuit control unit 320, and is used to collect the second current data in the loop of the second power supply 420, and transmit the second current data to the second hardware latch circuit control unit 320; the second hardware latch circuit control unit 320 is used to receive the second current data, and control the second insulated gate bipolar transistor 120 to turn on or off according to the second current data, so that the loop of the second power supply 420 enters a connection state or an open circuit state.

[0069] Specifically, the solid-state power controller 0001 of this embodiment adopts a redundant design, wherein the power supply 400, the power semiconductor device 100, the current sensor 200, and the hardware latch circuit control unit 300 all appear in pairs and are redundant to each other.

[0070] The power semiconductor device 100 includes a first insulated gate bipolar transistor 110 and a second insulated gate bipolar transistor 120, and the first insulated gate bipolar transistor 110 and the second insulated gate bipolar transistor 120 are redundant with each other. The insulated gate bipolar transistor combines the characteristics of a bipolar junction transistor (BJT) and a field effect transistor (FET), and has high voltage and high current handling capabilities. Structurally, the first insulated gate bipolar transistor 110 includes a collector, an emitter, a gate, and a built-in first anti-parallel diode, the anode of the first anti-parallel diode is connected to the emitter of the first insulated gate bipolar transistor 110, and the cathode is connected to the collector of the first insulated gate bipolar transistor 110, and the first anti-parallel diode can prevent reverse current or reverse voltage from damaging the first insulated gate bipolar transistor 110. Similarly, the second insulated gate bipolar transistor 120 includes a collector, an emitter, a gate, and a built-in second anti-parallel diode, the anode of the second anti-parallel diode is connected to the emitter of the first insulated gate bipolar transistor 110, and the cathode is connected to the collector of the second insulated gate bipolar transistor 120. The second anti-parallel diode can prevent reverse current or reverse voltage from damaging the second insulated gate bipolar transistor 120. It is worth noting that the connection between the first insulated gate bipolar transistor 110 and the second insulated gate bipolar transistor 120 can be regarded as a common emitter series connection.

[0071] The power supply 400 includes a first power supply 410 and a second power supply 420 which are mutually redundant; the current sensor 200 includes a first current sensor 210 and a second current sensor 220 which are mutually redundant; and the hardware latch circuit control unit 300 includes a first hardware latch circuit control unit 310 and a second hardware latch circuit control unit 320 which are mutually redundant. When the first current sensor 210 collects abnormal first current data, the abnormal first current data is transmitted to the first hardware latch circuit control unit 310, and the first hardware latch circuit control unit 310 sends a low level signal to the gate of the first insulated gate bipolar transistor 110 according to the abnormal first current data, so as to control the first insulated gate bipolar transistor 110 to turn off. At this time, the first power supply 410 and the second power supply 420 are isolated from each other. Similarly, the second insulated gate bipolar transistor 120 can also be controlled to turn off in a similar manner to isolate the first power supply 410 and the second power supply 420 from each other.

[0072] In this embodiment, the solid-state power controller 0001 adopts a redundant design, which can ensure normal power supply by combining the first power supply 410 and the second power supply 420. At the same time, the insulated gate bipolar transistor is used as the preferred power semiconductor device 100, which can achieve rapid fault isolation and improve the response speed and performance of the solid-state power controller 0001.

[0073] Reference Figure 3 In one embodiment of the present invention, the solid-state power controller 0001 further includes a first energy absorbing element 001 and a second energy absorbing element 002; one end of the first energy absorbing element 001 is connected to the collector of the first insulated gate bipolar transistor 110, and the other end is connected to the emitter of the first insulated gate bipolar transistor 110, for absorbing line inductance energy; one end of the second energy absorbing element 002 is connected to the collector of the second insulated gate bipolar transistor 120, and the other end is connected to the emitter of the second insulated gate bipolar transistor 120, for absorbing line inductance energy.

[0074] Specifically, the first energy absorbing element 001 and the second energy absorbing element 002 involved in this embodiment are preferably made of MOV (metal oxide resistor) or TVS (transient voltage suppressor).

[0075] An MOV is a resistive device, usually made of metal oxide material, whose resistance value is high under normal operating voltage, but its resistance decreases rapidly under overvoltage conditions. When an overvoltage appears in a circuit, the MOV becomes conductive, absorbing and dissipating the overvoltage to the ground to protect other electronic components from the voltage surge.

[0076] TVS is also a device used to suppress overvoltage. They are usually silicon diodes with fast response time. The main function of TVS is to quickly conduct when a voltage surge occurs in the circuit and disperse the overvoltage to the ground to prevent the overvoltage from damaging other electronic components.

[0077] The current and voltage of the first insulated gate bipolar transistor 110 and the second insulated gate bipolar transistor 120 may experience rapid changes and peak values, especially during the process of turning on or off. Such voltage surges and peak voltages may have destructive effects on the first insulated gate bipolar transistor 110, the second insulated gate bipolar transistor 120, and the surrounding circuits. Therefore, in order to protect the first insulated gate bipolar transistor 110, the second insulated gate bipolar transistor 120, and the surrounding circuits from these voltage problems, one end of the first energy absorbing element 001 may be connected to the collector of the first insulated gate bipolar transistor 110, and the other end may be connected to the emitter of the first insulated gate bipolar transistor 110; one end of the second energy absorbing element 002 may be connected to the collector of the second insulated gate bipolar transistor 120, and the other end may be connected to the emitter of the second insulated gate bipolar transistor 120. In this way, the first energy absorbing element 001 can absorb the energy of the line inductance near the first insulated gate bipolar transistor 110 , and the second energy absorbing element 002 can absorb the energy of the line inductance near the second insulated gate bipolar transistor 120 , thereby protecting the first insulated gate bipolar transistor 110 and the second insulated gate bipolar transistor 120 .

[0078] In this embodiment, a first energy absorbing element 001 and a second energy absorbing element 002 are provided to protect the first insulated gate bipolar transistor 110 and the second insulated gate bipolar transistor 120 respectively, which can reduce the negative impact of voltage surges and peak voltages on the insulated gate bipolar transistors and improve the reliability of the solid-state power controller 0001.

[0079] Reference Figure 4 In one embodiment of the present invention, the first hardware latch circuit control unit 310 includes a first hardware latch circuit 311 and a first gate drive circuit 312, and the second hardware latch circuit control unit 320 includes a second hardware latch circuit 321 and a second gate drive circuit 322; the first gate drive circuit 312 is connected to the gate of the first insulated gate bipolar transistor 110; the first hardware latch circuit 311 is respectively connected to the first current sensor 210 and the first gate drive circuit 312, and is used to receive the first current data, and store the first current data and the preset first current data. The second current data is compared with the preset second current threshold to obtain a first comparison result, and the first insulated gate bipolar transistor 110 is controlled to be turned on or off according to the first comparison result; the second gate drive circuit 322 is connected to the gate of the first insulated gate bipolar transistor 110; the second hardware latch circuit 321 is respectively connected to the second current sensor 220 and the second gate drive circuit 322, for receiving the second current data, comparing the second current data with the preset second current threshold to obtain a second comparison result, and controlling the second insulated gate bipolar transistor 120 to be turned on or off according to the second comparison result.

[0080] Specifically, the function of the first hardware latch circuit control unit 310 is implemented based on the first hardware latch circuit 311 and the first gate drive circuit 312. The first current data collected by the first current sensor 210 is transmitted to the first hardware latch circuit 311, received by the first hardware latch circuit 311, and the current value reflected by the first current data is compared with the preset first current threshold. If the comparison result shows that the current value reflected by the first current data exceeds the preset first current threshold, the first hardware latch circuit 311 will send a shutdown signal to the first gate drive circuit 312, and the first gate drive circuit 312 will send a low-level signal to the gate of the first insulated gate bipolar transistor 110 according to the shutdown signal to control the first insulated gate bipolar transistor 110 to be turned off; if the comparison result shows that the current value reflected by the first current data does not exceed the preset first current threshold, the first hardware latch circuit 311 will send an on signal to the first gate drive circuit 312, and the first gate drive circuit 312 will send a high-level signal to the gate of the first insulated gate bipolar transistor 110 according to the on signal to control the first insulated gate bipolar transistor 110 to be turned on.

[0081] Similarly, the function of the second hardware latch circuit control unit 320 is implemented based on the second hardware latch circuit 321 and the second gate drive circuit 322, and the functional implementation method of the first hardware latch circuit control unit 310 is referred to, which will not be described here one by one.

[0082] It can be understood that if the first current sensor 210 is an analog current sensor 200, and transmits the first current data in analog form to the first hardware latch circuit 311, then the first hardware latch circuit 311 can support the current sampling function based on the hardware circuit, sample the first current data in analog form to obtain the first current data in digital form, and control the first gate drive circuit 312 to send a shutdown signal or an open signal according to the first current data in digital form; if the first current sensor 210 is a digital current sensor 200, and transmits the first current data in digital form to the first hardware latch circuit 311, then the first hardware latch circuit 311 can directly control the first gate drive circuit 312 to send a shutdown signal or an open signal according to the first current data in digital form. Similarly, when the second current sensor 220 is an analog current sensor 200, the second hardware latch circuit 321 can support the current sampling function based on the hardware circuit; when the second current sensor 220 is a digital current sensor 200, the second hardware latch circuit 321 can directly use the second current data in digital form.

[0083] In this embodiment, a hardware latch circuit and a gate drive circuit are combined to achieve precise control of the insulated gate bipolar transistor, and the insulated gate bipolar transistor can be quickly turned on or off without the intervention of the microprocessor 500, thereby effectively improving the response speed and reliability of the solid-state power controller 0001.

[0084] Reference Figure 5 In one embodiment of the present invention, the solid-state power controller 0001 also includes a microcontroller; the microcontroller is respectively connected to the first hardware latch circuit 311, the first gate drive circuit 312, the second hardware latch circuit 321, and the second gate drive circuit 322, and is used to receive the first current data sent by the first hardware latch circuit 311, and control the first insulated gate bipolar transistor 110 to be turned on or off through the first gate drive circuit 312 according to the first current data, and receive the second current data sent by the second hardware latch circuit 321, and control the second insulated gate bipolar transistor 120 to be turned on or off through the second gate drive circuit 322 according to the second current data.

[0085] Specifically, the preset first current threshold corresponding to the first hardware latch circuit 311 and the preset second current threshold corresponding to the second hardware latch circuit 321 are both maximum current thresholds. If the current data exceeds the preset first current threshold or the preset second current threshold, it is considered that a fault has occurred, and the corresponding first insulated gate bipolar transistor 110 or the first insulated gate bipolar transistor 110 needs to be turned off. However, in some cases, the first current value reflected by the first current data is close to but does not exceed the preset first current threshold, and the second current value reflected by the second current data is close to but does not exceed the preset second current threshold. In this case, the microcontroller can be combined to implement anti-delay protection.

[0086] More specifically, the microcontroller presets an anti-delay protection strategy, and monitors the changes of the first current value and the second current value respectively according to the received first current data and the second current data. When the first current value or the second current value meets the threshold condition in the anti-delay protection strategy, the microcontroller triggers the corresponding shutdown countdown. When the shutdown countdown ends, the microcontroller sends a shutdown signal to the first gate drive circuit 312 or the second gate drive circuit 322 to control the first insulated gate bipolar transistor 110 or the second insulated gate bipolar transistor 120 to shut down.

[0087] For example, in the anti-delay protection strategy, a first threshold condition (based on current threshold A), a second threshold condition (based on current threshold B), and a third threshold condition (based on current threshold C) are set for the first current data, wherein the preset first current threshold>current threshold A>current threshold B>current threshold C. When the microcontroller monitors that the first current value is greater than current threshold C but less than current threshold B according to the first current data, the shutdown countdown T3 can be triggered; when the microcontroller monitors that the first current value is greater than current threshold B but less than current threshold A according to the first current data, the shutdown countdown T2 can be triggered; when the microcontroller monitors that the first current value is greater than current threshold A but less than the preset first current threshold according to the first current data, the shutdown countdown T1 can be triggered. Among them, shutdown countdown T1<shutdown countdown T2<shutdown countdown T3. Similarly, in the anti-delay protection strategy, corresponding threshold conditions and shutdown countdown triggering mechanisms can also be set for the second current data. In fact, the length of the shutdown countdown is inversely proportional to the magnitude of the current value.

[0088] Optionally, the microcontroller involved in this embodiment can also be replaced by a device with data processing capabilities such as FPGA (programmable gate array), single-chip microcomputer, DSP (digital signal processor), etc.

[0089] In this embodiment, the control flexibility of the solid-state power controller 0001 can be improved by combining with the microprocessor 500, and the microprocessor 500 can execute an anti-delay protection strategy when the current value does not reach the maximum threshold, thereby enhancing the fault isolation function of the solid-state power controller 0001.

[0090] Reference Figure 6 In one embodiment of the present invention, the solid-state power controller 0001 further includes a first resistor 003, a second resistor 004, a third resistor 005, and a fourth resistor 006; one end of the first resistor 003 is connected to the emitter of the first insulated gate bipolar transistor 110, and the other end is respectively connected to one end of the second resistor 004; the other end of the second resistor 004 is connected to the collector of the first insulated gate bipolar transistor 110; one end of the third resistor 005 is connected to the emitter of the second insulated gate bipolar transistor 120, and the other end is respectively connected to one end of the fourth resistor 006; the other end of the fourth resistor 006 is connected to the collector of the second insulated gate bipolar transistor 120; the microcontroller is respectively connected to the series line between the first resistor 003 and the second resistor 004, and the series line between the third resistor 005 and the fourth resistor 006, for monitoring the conduction state of the first insulated gate bipolar transistor 110 and the second insulated gate bipolar transistor 120.

[0091] Specifically, in order to realize the state monitoring of the first insulated gate bipolar transistor 110 and the second insulated gate bipolar transistor 120, the present embodiment adopts the first resistor 003 and the second resistor 004 to be connected in parallel at both ends of the first insulated gate bipolar transistor 110, and adopts the third resistor 005 and the fourth resistor 006 to be connected in parallel at both ends of the second insulated gate bipolar transistor 120. In addition, a cable is led out from the series line between the first resistor 003 and the second resistor 004 to be connected to the microcontroller, and a cable is led out from the series line between the third resistor 005 and the fourth resistor 006 to be connected to the microcontroller. In this way, the microcontroller can collect corresponding monitoring data from between the first resistor 003 and the second resistor 004, and between the third resistor 005 and the fourth resistor 006, and monitor the conduction state (including opening and closing) of the first insulated gate bipolar transistor 110 and the second insulated gate bipolar transistor 120.

[0092] In this embodiment, in combination with the first resistor 003, the second resistor 004, the third resistor 005, the fourth resistor 006 and the microprocessor 500, the conduction state of the first insulated gate bipolar transistor 110 and the second insulated gate bipolar transistor 120 can be controlled, thereby improving the controllability of the solid-state power controller 0001.

[0093] Reference Figure 7 In one embodiment of the present invention, the solid-state power controller 0001 includes a first insulated gate bipolar transistor 110, a second insulated gate bipolar transistor 120, a first current sensor 210, a second current sensor 220, a first energy absorption element 001, a second energy absorption element 002, a first hardware latch circuit 311, a first gate drive circuit 312, a second hardware latch circuit 321, a second gate drive circuit 322, a microcontroller, a first resistor 003, a second resistor 004, a third resistor 005, and a fourth resistor 006. The connection relationship between the various components in the solid-state power controller 0001, the first power supply 410, and the second power supply 420 and their respective functions refer to the above embodiments and are not repeated here. The loop of the first power supply 410 or the loop of the second power supply 420 can also be connected to at least one load (one load corresponds to one electrical component or system).

[0094] Due to the redundant design of the solid-state power controller 0001, the first insulated gate bipolar transistor 110 and the second insulated gate bipolar transistor 120 can be controlled to be turned on or off, which can ensure power supply on the one hand and achieve fault isolation on the other hand.

[0095] In this embodiment, the hardware settings of the above embodiments are integrated to propose a solid-state power controller 0001 with better comprehensive capabilities, thereby improving the controllability and reliability of the solid-state power controller 0001.

[0096] Reference Figure 8 In one embodiment of the present invention, the solid-state power controller 0001 includes a first insulated gate bipolar transistor 110, a second insulated gate bipolar transistor 120, a first current sensor 210, a second current sensor 220, a first energy absorption element 001, a second energy absorption element 002, a first hardware latch circuit 311, a first gate drive circuit 312, a second hardware latch circuit 321, a second gate drive circuit 322, a microcontroller, a first resistor 003, a second resistor 004, a third resistor 005, and a fourth resistor 006. The connection relationship between the various components in the solid-state power controller 0001, the first power supply 410, and the second power supply 420 and their respective functions refer to the above embodiments and are not repeated here.

[0097] In addition, the first load 610 is connected to the circuit of the first power source 410, and the second load 610 is connected to the circuit of the second power source 410. The first load 610 and the second load 610 each correspond to an electrical component, for example, the first load 610 may be the left motor of the flight device, and the second load 610 may be the right motor of the flight device.

[0098] When a fault occurs in the circuit of the first power supply 410 (e.g., a short circuit), the second insulated gate bipolar transistor 120 can be controlled to be turned off, so that the first power supply 410 and the second power supply 420 are isolated from each other, and the normal power supply of the second load 620 is not affected. After the first power supply 410 is cut off and isolated from the entire power distribution system, the second insulated gate bipolar transistor 120 is controlled to be turned on again, so that the first load 610 is included in the circuit of the second power supply 420, and the second power supply 420 resumes the power supply to the first load 610.

[0099] Similarly, when a fault occurs in the circuit of the second power supply 420 (e.g., a short circuit), the first insulated gate bipolar transistor 110 can be controlled to be turned off, so that the first power supply 410 and the second power supply 420 are isolated from each other, without affecting the normal power supply of the first load 610. After the second power supply 420 is cut off and isolated from the entire power distribution system, the first insulated gate bipolar transistor 110 is controlled to be turned on again, so that the second load 620 is included in the circuit of the first power supply 410, and the first power supply 410 resumes the power supply to the second load 620.

[0100] The process of switching power supply between the first power supply 410 and the second power supply 410 can be regarded as a reconstruction process, that is, the solid-state power controller 0001 supports the reconstruction function, which can ensure stable power supply to the first load 610 and the second load 620. The solid-state power controller 0001 involved in this embodiment also has the characteristics of fast response. The first insulated gate bipolar transistor 110 and the second insulated gate bipolar transistor 120 can be turned off within 50us after the fault occurs, and the fault is quickly isolated, so as not to affect the power supply voltage of the whole machine, thereby ensuring the safety of the flight equipment. Correspondingly, when the fault is eliminated, the first insulated gate bipolar transistor 110 and the second insulated gate bipolar transistor 120 can also be reopened within milliseconds to reconstruct the power of the whole machine.

[0101] In some cases, the first load 610 and the second load 620 may be capacitive loads. During the reconstruction process, especially when the first insulated gate bipolar transistor 110 or the second insulated gate bipolar transistor 120 is switched from off to on, the capacitive loads may be charged and generate a large current.

[0102] To this end, the problem of charging the above-mentioned capacitive load can be addressed by combining the microcontroller and the overall topology of the solid-state power controller 0001. Specifically, there is parasitic inductance in the circuit of the solid-state power controller 0001. Under the influence of the parasitic inductance, the microprocessor 500 controls the first insulated gate bipolar transistor 110 and the second insulated gate bipolar transistor 120 to quickly turn on or off based on the PWM (pulse width modulation) wave, which can realize the function of chopping current limiting, thereby pre-charging the capacitive load, greatly reducing the current impact caused by reconstruction, and without increasing any hardware cost.

[0103] In this embodiment, the solid-state power controller 0001 can support the reconstruction function, and implement the chopping current limiting function based on the microprocessor 500 without increasing any hardware cost, which greatly reduces the current impact caused by the reconstruction and ensures the stable power supply to the first load 610 and the second load 620. At the same time, the implementation process of the reconstruction function and the chopping current limiting function mentioned in this embodiment can also be combined with the embodiment of the control method of the solid-state power controller of the present application.

[0104] Reference Fig. 9 The first embodiment of the control method of the solid-state power controller of the present application provides a flow chart. The control method of the solid-state power controller is applied to the solid-state power controller 0001 mentioned above. The method includes:

[0105] Step S10: collecting current data in the loop of the power supply through the current sensor, and transmitting the current data to the hardware latch circuit control unit.

[0106] Step S20: comparing the current data with a preset current threshold value through the hardware latch circuit control unit to obtain a comparison result.

[0107] Step S30, controlling the power semiconductor device to be turned on or off according to the comparison result through the hardware latch circuit control unit, so that the power supply circuit enters a circuit state or a circuit-breaking state.

[0108] Specifically, firstly, the current data in the loop of the power supply is collected by the current sensor, and the current data may be current data in analog form or current data in digital form. Then, the current sensor transmits the current data to the hardware latch circuit control unit.

[0109] Correspondingly, the current data is received by the hardware latch circuit control unit. If the received current data is current data in analog form, the hardware latch circuit control unit will sample the current data in analog form to obtain current data in digital form, and further compare the current value reflected by the current data in digital form with the preset current threshold value to obtain a comparison result. If the received current data is current data in digital form, the hardware latch circuit control unit will directly compare the current value reflected by the current data in digital form with the preset current threshold value to obtain a comparison result. According to the comparison result, it can be known whether the circuit of the power supply fails, and then the power semiconductor device is controlled to be turned on or off according to the comparison result by the hardware latch circuit control unit, so that the circuit of the power supply enters a circuit state or a circuit-breaking state.

[0110] In this embodiment, the power semiconductor device can be controlled by using a hardware latch circuit control unit without the intervention of a microcontroller, thereby effectively improving the speed of controlling the power semiconductor device to be turned on or off.

[0111] Further, refer to Fig.10 The second embodiment of the control method of the solid-state power controller of the present application provides a flow chart based on the above Fig. 9 In the embodiment shown, the step S30 of "controlling the power semiconductor device to be turned on or off according to the comparison result by the hardware latch circuit control unit" is further refined to include:

[0112] Step S301: If the comparison result indicates that the current data exceeds the preset current threshold and the power semiconductor device is in an on state, the power semiconductor device is controlled to be turned off by the hardware latch circuit control unit.

[0113] Step S302: If the comparison result indicates that the current data does not exceed the preset current threshold and the power semiconductor device is in the off state, the power semiconductor device is controlled to be turned on through the hardware latch circuit control unit.

[0114] Specifically, if the comparison result shows that the current value reflected by the current data exceeds the preset current threshold value, and the power semiconductor device is in the on state, then it is necessary to send a corresponding signal to the power semiconductor device through the hardware latch circuit control unit to control the power semiconductor device to shut down, so that the power supply circuit enters the open circuit state, thereby achieving fault isolation. If the comparison result shows that the current value reflected by the current data does not exceed the preset current threshold value, and the power semiconductor device is in the off state, then it is necessary to send a corresponding signal to the power semiconductor device through the hardware latch circuit control unit to control the power semiconductor device to open, so that the power supply circuit enters the open circuit state, thereby achieving reconstruction.

[0115] In this embodiment, a threshold value judgment method is adopted to realize control over the power semiconductor device, which can quickly complete fault isolation and improve the controllability and reliability of the solid-state power controller.

[0116] The present application also proposes a power distribution system, which includes a solid-state power controller. The specific structure of the solid-state power controller refers to the above-mentioned embodiment. Since the power distribution system adopts all the technical solutions of all the above-mentioned embodiments, it also has all the beneficial effects brought by the technical solutions of the above-mentioned embodiments, which will not be repeated here one by one.

[0117] The present application also proposes a flying device, which includes a power distribution system. The specific structure of the power distribution system refers to the above embodiment. Since the flying device adopts all the technical solutions of all the above embodiments, it also has all the beneficial effects brought by the technical solutions of the above embodiments, which will not be described one by one here. Among them, the flying device can be various devices and tools that can fly in the air. The types and uses of these devices are different. For example, the flying device can be a flying car, an airplane, a helicopter, a glider, a drone, a rocket, etc.

[0118] It should be noted that the technical solutions of the various embodiments of the present application can be combined with each other, but it must be based on the fact that they can be implemented by technical personnel in this field. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of protection required by this application.

[0119] The above description is only a preferred embodiment of the present application, and does not limit the patent scope of the present application. Any equivalent structural transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A solid-state power controller, characterized in that: The solid-state power controller includes a power semiconductor device, a current sensor, and a hardware latch circuit control unit connected to each other; The power semiconductor device and the current sensor are arranged in a power supply loop; The current sensor is used to collect current data in the loop of the power supply and transmit the current data to the hardware latch circuit control unit; The hardware latch circuit control unit is used to receive the current data and control the power semiconductor device to turn on or off according to the current data, so that the circuit of the power supply enters a circuit state or a circuit-breaking state.

2. The control method of the solid-state power controller according to claim 1, characterized in that: The power semiconductor device includes a first insulated gate bipolar transistor and a second insulated gate bipolar transistor, the current sensor includes a first current sensor and a second current sensor, the hardware latch circuit control unit includes a first hardware latch circuit control unit and a second hardware latch circuit control unit, and the power supply includes a first power supply and a second power supply; The emitter of the first insulated gate bipolar transistor is connected to the emitter of the second insulated gate bipolar transistor; The negative electrode of the first power supply is connected to the negative electrode of the second power supply; The first current sensor is respectively connected to the collector of the first insulated gate bipolar transistor, the positive electrode of the first power supply, and the first hardware latch circuit control unit, and is used to collect first current data in the loop of the first power supply and transmit the first current data to the first hardware latch circuit control unit; The first hardware latch circuit control unit is used to receive the first current data and control the first insulated gate bipolar transistor to turn on or off according to the first current data, so that the loop of the first power supply enters a circuit state or a circuit-breaking state; The second current sensor is respectively connected to the collector of the second insulated gate bipolar transistor, the positive electrode of the second power supply, and the second hardware latch circuit control unit, and is used to collect second current data in the loop of the second power supply and transmit the second current data to the second hardware latch circuit control unit; The second hardware latch circuit control unit is used to receive the second current data and control the second insulated gate bipolar transistor to turn on or off according to the second current data, so that the loop of the second power supply enters a circuit state or an open circuit state.

3. The solid-state power controller according to claim 2, characterized in that: The solid-state power controller also includes a first energy absorbing element and a second energy absorbing element; One end of the first energy absorbing element is connected to the collector of the first insulated gate bipolar transistor, and the other end is connected to the emitter of the first insulated gate bipolar transistor, for absorbing line inductance energy; One end of the second energy absorbing element is connected to the collector of the second insulated gate bipolar transistor, and the other end is connected to the emitter of the second insulated gate bipolar transistor, for absorbing line inductance energy.

4. The solid-state power controller according to claim 2, characterized in that: The first hardware latch circuit control unit includes a first hardware latch circuit and a first gate drive circuit, and the second hardware latch circuit control unit includes a second hardware latch circuit and a second gate drive circuit; The first gate drive circuit is connected to the gate of the first insulated gate bipolar transistor; The first hardware latch circuit is connected to the first current sensor and the first gate drive circuit respectively, and is used to receive the first current data, compare the first current data with a preset first current threshold to obtain a first comparison result, and control the first insulated gate bipolar transistor to turn on or off according to the first comparison result; The second gate drive circuit is connected to the gate of the first insulated gate bipolar transistor; The second hardware latch circuit is connected to the second current sensor and the second gate drive circuit respectively, and is used to receive the second current data, compare the second current data with a preset second current threshold to obtain a second comparison result, and control the second insulated gate bipolar transistor to turn on or off according to the second comparison result.

5. The solid-state power controller according to claim 4, characterized in that: The solid-state power controller also includes a microcontroller; The microcontroller is connected to the first hardware latch circuit, the first gate drive circuit, the second hardware latch circuit, and the second gate drive circuit, respectively, and is used to receive the first current data sent by the first hardware latch circuit, and control the first insulated gate bipolar transistor to be turned on or off through the first gate drive circuit according to the first current data, and receive the second current data sent by the second hardware latch circuit, and control the second insulated gate bipolar transistor to be turned on or off through the second gate drive circuit according to the second current data.

6. The control method of the solid-state power controller according to claim 5, characterized in that: The solid-state power controller further includes a first resistor, a second resistor, a third resistor, and a fourth resistor; One end of the first resistor is connected to the emitter of the first insulated gate bipolar transistor, and the other end is respectively connected to one end of the second resistor; The other end of the second resistor is connected to the collector of the first insulated gate bipolar transistor; One end of the third resistor is connected to the emitter of the second insulated gate bipolar transistor, and the other end is connected to one end of the fourth resistor respectively; The other end of the fourth resistor is connected to the collector of the second insulated gate bipolar transistor; The microcontroller is connected to the series line between the first resistor and the second resistor and the series line between the third resistor and the fourth resistor, respectively, for monitoring the conduction state of the first insulated gate bipolar transistor and the second insulated gate bipolar transistor.

7. A control method for a solid-state power controller, characterized in that: The control method of the solid-state power controller is applied to the solid-state power controller according to any one of claims 1 to 6, and the method comprises: The current sensor collects current data in the loop of the power supply and transmits the current data to the hardware latch circuit control unit; The hardware latch circuit control unit compares the current data with a preset current threshold to obtain a comparison result; The hardware latch circuit control unit controls the power semiconductor device to be turned on or off according to the comparison result, so that the circuit of the power supply enters a circuit-connected state or a circuit-disconnected state.

8. The control method of the solid-state power controller according to claim 7, characterized in that: The step of controlling the power semiconductor device to be turned on or off according to the comparison result by the hardware latch circuit control unit comprises: If the comparison result indicates that the current data exceeds the preset current threshold and the power semiconductor device is in an on state, the power semiconductor device is controlled to be turned off by the hardware latch circuit control unit; If the comparison result indicates that the current data does not exceed the preset current threshold and the power semiconductor device is in the off state, the power semiconductor device is controlled to be turned on through the hardware latch circuit control unit.

9. A power distribution system, characterized in that: The power distribution system comprises the solid-state power controller as described in any one of claims 1-6.

10. A flying device, characterized in that: The flying device comprises the power distribution system of claim 9.

Images