Cascade clock synchronization method and device, terminal equipment and storage medium
By adopting the cascading clock synchronization method in the EtherCAT network, it responds to static and dynamically compensated clock synchronization broadcast commands, records the local clock time of receiving clock synchronization messages, and performs clock correction based on valid time information, solving the problem of poor clock synchronization accuracy of EtherCAT, achieving higher time synchronization accuracy and network performance.
Patent Information
- Application Number
- CN202510049649.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-13
- Publication Date
- 2025-04-25
AI Technical Summary
When the EtherCAT clock synchronization method calculates the link delay and time initial offset between the slave station and the reference clock, it is assumed that the line delay is uniform and the data processing delay of each slave station is consistent with the data forwarding delay. If it is inconsistent, it will lead to inaccurate calculation of the link delay and time initial offset, which will affect the accuracy of clock synchronization, and thus affect the performance and reliability of the entire EtherCAT network.
A cascading clock synchronization method is proposed. By responding to a clock synchronization broadcast command with static compensation and dynamic compensation, the current slave station records the local clock time of receiving the clock synchronization message, and determines the initial time offset and time drift based on the valid time information to perform clock correction. This method does not rely on slave data processing and forwarding delay calculation, and improves the accuracy of time synchronization.
Through this cascading clock synchronization method, the accuracy of time synchronization can be improved without relying on slave data processing and forwarding delay, thereby enhancing the performance and reliability of the EtherCAT network.
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Figure CN119892284A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of network communication technology, and in particular to a cascade clock synchronization method, apparatus, terminal equipment and storage medium. Background Art
[0002] As a real-time industrial fieldbus technology with high-speed communication, low latency and high synchronization, EtherCAT has been widely used in precision control applications such as servo control.
[0003] The network topology diagram of EtherCAT clock synchronization is as follows: Figure 1 As shown, slave i calculates the transmission delay and initial time offset of the slave i according to the uplink message and downlink message records of slave i (slave clock i) and slave 1 (i.e., reference clock) at each moment and saves them to the local slave; the slave uses the initial time offset Toffset(i) with the reference clock to correct its own local clock to achieve static time compensation; and calculates the dynamic drift in combination with the locally saved transmission delay and initial time offset, and all slaves periodically and continuously dynamically compensate the local clock according to the dynamic drift.
[0004] In the above-mentioned EtherCAT clock synchronization method, when calculating the link delay and initial time offset between the slave station and the reference clock slave station, a prerequisite must be met: the line delay is uniform, and the data processing delay of each slave station is consistent with the data forwarding delay. If they are inconsistent, the above-mentioned synchronization method will lead to inaccurate calculation of the link delay and initial time offset, thereby affecting the accuracy of clock synchronization; this accuracy error may cause the system clock to be out of sync, thereby affecting the performance and reliability of the entire EtherCAT network, resulting in delays or inconsistencies in control instructions, and thus affecting real-time performance and system stability. Summary of the invention
[0005] In view of this, the embodiments of the present application provide a cascaded clock synchronization method, apparatus, terminal device and storage medium, which can effectively solve the problem of poor clock synchronization accuracy, etc.
[0006] In a first aspect, an embodiment of the present application provides a cascade clock synchronization method, including:
[0007] In response to the statically compensated clock synchronization broadcast command, the current slave station records the first local clock time of receiving the first clock synchronization message;
[0008] The current slave station determines an initial time offset between the current slave station and the previous slave station according to the first local clock time and the valid time information in the first clock synchronization message, and corrects its own clock according to the initial time offset;
[0009] In response to the dynamically compensated clock synchronization broadcast command, the current slave station records the second local clock time of receiving the second clock synchronization message;
[0010] The current slave station determines the time drift between the current slave station and the previous slave station according to the second local clock time and the valid time information in the second clock synchronization message, and corrects the current slave station's own clock according to the time drift.
[0011] In some embodiments, the effective time information includes transmission delay and forwarding time;
[0012] If the current slave station sends the first clock synchronization message or the second clock synchronization message, the effective time information includes the transmission delay from the current slave station to the next slave station and the forwarding time when the current slave station forwards the first clock synchronization message or the second clock synchronization message;
[0013] If the current slave station receives the first clock synchronization message or the second clock synchronization message, the valid time information includes the transmission delay from the previous slave station to the current slave station and the forwarding time when the previous slave station forwards the first clock synchronization message or the second clock synchronization message.
[0014] In some embodiments, the current slave station determines the initial time offset between the current slave station and the previous slave station according to the first local clock time and the valid time information in the first clock synchronization message, including:
[0015] Obtaining a first transmission delay and a first forwarding time according to the effective time information of the first clock synchronization message;
[0016] Determine a first receiving time of a next slave station according to the first transmission delay and the first forwarding time;
[0017] The initial time offset is obtained according to the first receiving time of the next slave station and the first local clock time.
[0018] In some embodiments, the current slave station calculates the time drift between the current slave station and the previous slave station according to the second local clock time and the valid time information in the second clock synchronization message, including:
[0019] Obtaining a second transmission delay and a second forwarding time according to the effective time information of the second clock synchronization message;
[0020] Determine a second receiving time of the next slave station according to the second transmission delay and the second forwarding time;
[0021] The time drift is obtained according to the second receiving time of the next slave station and the second local clock time.
[0022] In some embodiments, the cascade clock synchronization method further includes:
[0023] The current slave station receives the first clock synchronization message forwarded by the previous slave station;
[0024] updating the valid time information of the first clock synchronization message according to the first transmission delay pre-recorded by the current slave station and the first forwarding time at which the current slave station forwards the first clock synchronization message;
[0025] The updated first clock synchronization message is forwarded to the next slave station according to the first forwarding time.
[0026] In some embodiments, determining the first transmission delay pre-recorded by the current slave station includes:
[0027] When the current slave station establishes a connection with the next slave station, a preset frame message is sent to the next slave station; the preset frame message includes a reference sending time of the current slave station;
[0028] Recording the reference receiving time when the preset frame message is received from the next slave station;
[0029] The first transmission delay from the current slave station to the next slave station is obtained according to the reference receiving time and the reference sending time, and the first transmission delay is recorded.
[0030] In some embodiments, the first clock synchronization message and the second clock synchronization message have the same structure; the first clock synchronization message includes a data unit header and the valid time information; the data type of the data unit header includes a static compensation clock synchronization message type and a dynamic compensation clock synchronization message type.
[0031] In a second aspect, an embodiment of the present application provides a cascade clock synchronization device, including a static response module, a static correction module, a dynamic response module and a dynamic correction module;
[0032] The static response module is used to respond to the clock synchronization broadcast command of static compensation, and the current slave station records the first local clock time of receiving the first clock synchronization message;
[0033] The static correction module is used for the current slave station to determine the initial time offset between the current slave station and the previous slave station according to the first local clock time and the valid time information in the first clock synchronization message, and to correct the current slave station's own clock according to the initial time offset;
[0034] The dynamic response module is used to respond to the clock synchronization broadcast command of dynamic compensation, and the current slave station records the second local clock time of receiving the second clock synchronization message;
[0035] The dynamic correction module is used for the current slave station to determine the time drift between the current slave station and the previous slave station according to the second local clock time and the valid time information in the second clock synchronization message, and to correct the current slave station's own clock according to the time drift.
[0036] In a third aspect, an embodiment of the present application provides a terminal device, comprising a processor and a memory, wherein the memory stores a computer program, and the processor is used to execute the computer program to implement the above-mentioned cascade clock synchronization method.
[0037] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium storing a computer program, which, when executed on a processor, implements the above-mentioned cascade clock synchronization method.
[0038] The embodiments of the present application have the following beneficial effects:
[0039] The present application proposes a cascade clock synchronization method, in response to a statically compensated clock synchronization broadcast command, the current slave station records the first local clock moment of receiving the first clock synchronization message first; then determines the initial time offset between the current slave station and the previous slave station based on the first local clock moment and the valid time information in the first clock synchronization message, and corrects the current slave station's own clock based on the initial time offset; then responds to a dynamically compensated clock synchronization broadcast command, the current slave station records the second local clock moment of receiving the second clock synchronization message; the current slave station determines the time drift between the current slave station and the previous slave station based on the second local clock moment and the valid time information in the second clock synchronization message, and corrects the current slave station's own clock based on the time drift. In the clock synchronization process, the accuracy of time synchronization can be further improved by calculating the link delay that does not depend on the slave station data processing and forwarding delay. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0041] Figure 1 A schematic diagram of an EtherCAT network topology in the prior art is shown;
[0042] Figure 2A schematic diagram showing the principle of internal data transmission of an EtherCAT slave station according to an embodiment of the present application is shown;
[0043] Figure 3 A flow chart of a cascade clock synchronization method according to an embodiment of the present application is shown;
[0044] Figure 4 A schematic diagram of the EtherCAT network topology structure in an embodiment of the present application is shown;
[0045] Figure 5 A schematic diagram of a process for determining an initial time offset in an embodiment of the present application is shown;
[0046] Figure 6 A schematic diagram of a process for determining a first transmission delay in an embodiment of the present application is shown;
[0047] Figure 7 A schematic diagram of the structure of a preset frame message in an embodiment of the present application is shown;
[0048] Figure 8 A schematic diagram of a process of static compensation in an embodiment of the present application is shown;
[0049] Fig. 9 A schematic diagram of a process for determining time drift in an embodiment of the present application is shown;
[0050] Fig.10 A schematic diagram of a process of dynamic compensation in an embodiment of the present application is shown;
[0051] Fig.11 A schematic diagram of the structure of a clock synchronization message in an embodiment of the present application is shown;
[0052] Fig.12 A structural schematic diagram of a cascade clock synchronization device according to an embodiment of the present application is shown.
[0053] Description of main component symbols:
[0054] 10-static response module; 20-static correction module; 30-dynamic response module; 40-dynamic correction module. DETAILED DESCRIPTION
[0055] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.
[0056] The components of the embodiments of the present application generally described and shown in the drawings herein may be arranged and designed in various configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application.
[0057] Hereinafter, the terms "including", "having" and their cognates that can be used in various embodiments of the present application are intended only to indicate specific features, numbers, steps, operations, elements, components or a combination of the foregoing items, and should not be understood as first excluding the existence of one or more other features, numbers, steps, operations, elements, components or a combination of the foregoing items or increasing the possibility of one or more features, numbers, steps, operations, elements, components or a combination of the foregoing items. In addition, the terms "first", "second", "third" and the like are only used to distinguish descriptions and cannot be understood as indicating or implying relative importance.
[0058] Unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meanings as those generally understood by those skilled in the art to which the various embodiments of the present application belong. The terms (such as those defined in generally used dictionaries) will be interpreted as having the same meanings as the contextual meanings in the relevant technical field and will not be interpreted as having idealized meanings or overly formal meanings unless clearly defined in the various embodiments of the present application.
[0059] In conjunction with the accompanying drawings, some embodiments of the present application are described in detail below. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.
[0060] At present, based on the EtherCAT clock synchronization method with uniform line delay and consistent data processing delay and data forwarding delay of each slave station, the transmission delay T of each slave station i is delay (i) and the initial time offset T offset The calculations of (i) are:
[0061] T delay (i)=((T up (r)-T dn (r))-(T up (i)-T dn (i))) / 2
[0062] T offset (i)=((T up (i)-T up (r))+(T dn (i)-Tdn (r))) / 2
[0063] But according to Figure 2 The internal data transmission principle of the EtherCAT slave shown in the figure is that in the downlink process, the EtherCAT message enters the slave device from port 0, and is then passed to the data frame processing unit in the slave device for processing. After the data frame processing unit completes the processing of the EtherCAT message, it is passed from port 1 to the next-level slave; in the uplink process, after the EtherCAT message enters the slave device from port 1, it is directly forwarded to port 0 and then passed to the upper-level slave. It can be seen that the transmission of the downlink message needs to pass through the data frame processing unit, while the uplink message does not pass through the data frame processing unit, resulting in the data processing delay and data forwarding delay of each slave station to be inconsistent, which will cause the transmission delay of the link and the calculation of the initial time offset to be inaccurate, affecting the accuracy of clock synchronization. In order to solve the above technical problems, this application proposes a cascade clock synchronization technology to improve the accuracy of clock synchronization.
[0064] Clock synchronization usually includes two key parts: static compensation and dynamic compensation, which correspond to the clock initial offset and drift respectively. In an EtherCAT network segment, the EtherCAT master and each slave have their own independent clock source. The initial deviation between the independent clock sources is called the initial offset (denoted as T offset In addition, due to the imperfection of the crystal oscillator, it will cause errors that vary over time, namely dynamic drift (denoted as Δ t At the same time, the transmission delay (denoted as T delay ).
[0065] The cascade clock synchronization method is described below in conjunction with some specific embodiments.
[0066] Figure 3 A flow chart of a cascade clock synchronization method according to an embodiment of the present application is shown. Exemplarily, the cascade clock synchronization method includes the following steps:
[0067] S100, in response to a statically compensated clock synchronization broadcast command, the current slave station records a first local clock time of receiving a first clock synchronization message.
[0068] The EtherCAT cascade clock synchronization network topology in this embodiment is as follows: Figure 4 The master station cascades slave station 1, slave station 2... slave station i and slave station i+1 in sequence, that is, the downstream port port2 of each slave station is connected to the upstream port of the next slave station through a network cable.
[0069] In some embodiments, the master station first issues a statically compensated clock synchronization broadcast command, and each slave station responds to the clock synchronization broadcast command, that is, corrects the current slave station's own clock according to the received first clock synchronization message, thereby completing the clock synchronization of the current slave station with the previous slave station. When each slave station receives the first clock synchronization message, it immediately records the first local clock time of receiving the first clock synchronization message.
[0070] S200, the current slave station calculates an initial time offset between the current slave station and the previous slave station according to the first local clock time and the valid time information in the first clock synchronization message, and corrects its own clock according to the initial time offset.
[0071] In some embodiments, the effective time information in each synchronization message includes the transmission delay and the forwarding time. For example, the effective time information in the first synchronization message includes the first transmission delay and the first forwarding time; if the current slave station sends the first clock synchronization message, the effective time information includes the first transmission delay from the current slave station to the next slave station and the first forwarding time when the current slave station forwards the first clock synchronization message; if the current slave station receives the first clock synchronization message, the effective time information includes the first transmission delay from the previous slave station to the current slave station and the first forwarding time of the previous slave station.
[0072] In this embodiment, if Figure 5 As shown, the process of the current slave station determining the initial time offset between the current slave station and the previous slave station according to the first local clock time and the valid time information in the first clock synchronization message includes:
[0073] S210, obtaining a first transmission delay and a first forwarding time according to the effective time information of the first clock synchronization message;
[0074] S220, determining a first receiving time of a next slave station according to the first transmission delay and the first forwarding time;
[0075] S230: Obtain an initial time offset according to a first receiving time and a first local clock time of the next slave station.
[0076] Exemplarily, the slave station i+1 uses the first transmission delay T in the first clock synchronization message delay(i,i+1) and the first forwarding time T (i，Port2) and the first local clock time T (i+1,Port1) Calculate the initial time offset T between slave station i+1 and slave station i offset(i+1,i) ; The specific calculation method is as follows:
[0077] (T (i+1,Port1) -T offset(i+1,i) )=T (i，Port2) +T delay(i,i+1) , 1≤i <n
[0078] T offset(i+1,i) =T (i+1,Port1) -T (i，Port2) -T delay(i,i+1) , 1≤i <n
[0079] Each slave repeats the above calculation of the initial time offset and correction of its own clock to complete the clock synchronization of each slave with the previous slave until all slaves complete the static compensation.
[0080] In some embodiments, the current slave station receives a first clock synchronization message forwarded by the previous slave station, and the current slave station updates the effective time information of the first clock synchronization message according to the first transmission delay pre-recorded by the current slave station and the first forwarding time when the current slave station forwards the first clock synchronization message; and forwards the updated first clock synchronization message to the next slave station according to the first forwarding time; wherein, the updating of the first clock synchronization message is to add the first transmission delay pre-recorded by the current slave station to the effective time information of the first clock synchronization message; and add the first forwarding time when the current slave station forwards the first clock synchronization message to the effective time information of the first clock synchronization message.
[0081] like Figure 6 As shown, the process of determining the first transmission delay currently pre-recorded by the slave station includes:
[0082] S240, when the current slave station establishes a connection with the next slave station, the current slave station sends a preset frame message; the preset frame message includes a reference sending time of the current slave station.
[0083] In this embodiment, if Figure 4 As shown in FIG. 1 , when the downstream port Port2 of slave station i establishes a connection with the upstream port Port1 of the next-level slave station i+1 through a network cable, the downstream port Port2 of slave station i actively sends a preset frame message (the short frame size is 30 bytes, which is less than 64 bytes). The preset frame message includes the third sending time T of the slave station i sending the preset frame message. 1 (i,i+1) .
[0084] like Figure 7 As shown, the preset frame message includes an Ethernet frame header, a timestamp field and an Ethernet frame tail; the corresponding descriptions of different fields in the preset frame message are shown in Table 1, and the reference sending time is located in the timestamp field TimeStamp.
[0085] Table 1
[0086]
[0087] S250, the next slave station receives the preset frame message, and automatically transmits the preset frame message back to the current slave station.
[0088] In this embodiment, when the uplink port Port1 of the next slave station i+1 receives the preset frame message, it automatically loops back (implements the loopback function for short frames through hardware) to slave station i. Therefore, each EtherCAT slave station must support the physical hardware loopback function for the preset frame message.
[0089] S260, the current slave station records the reference receiving time of the preset frame message transmitted back.
[0090] In this embodiment, when the downlink port Port2 of the slave station i receives the looped back preset frame message, the receiving time T of receiving the preset frame message is recorded. 2 (i,i+1) .
[0091] S270, the current slave station obtains a first transmission delay from the current slave station to the next slave station according to the reference receiving time and the reference sending time, and records the first transmission delay to the current slave station.
[0092] In this embodiment, if the line delay is uniform, the first transmission delay of the unidirectional link from station i to station i+1 is:
[0093] T delay(i,i+1)＝ (T 2 (i,i+1) -T 1 (i,i+1) ) / 2, 1≤i<n
[0094] Therefore, each slave i measures and records the transmission delay T from its own Port 2 to the next slave i+1's Port 1 delay(i,i+1) .
[0095] In order to better understand the static compensation process, the whole process of static compensation between each slave station and the reference clock is introduced as an example. Usually, the independent clock corresponding to the first slave station that receives the first clock synchronization message and enters the data processing unit DPU is selected as the reference clock, that is, Figure 4 Slave 1 in Figure 8 As shown in the figure, the static compensation process of clock synchronization includes:
[0096] S11, the master station sends a statically compensated clock synchronization broadcast command.
[0097] S12, the current slave station updates the received first clock synchronization message forwarded by the previous slave station, and forwards the updated first clock synchronization message to the next slave station according to the forwarding time.
[0098] For example, after receiving the first clock synchronization message from station i, station i will set the first transmission delay T of the pre-recorded downlink port port2 to the uplink port port1 of the next station i+1 delay(i,i+1)Add it to the valid time information of the first clock synchronization message; meanwhile, when the slave station i forwards the clock synchronization message to the next slave station i + 1, it will record and add the first forwarding moment T (i,Port2) to the valid time field of the first clock synchronization message. The processing of the valid time information realizes the update of the first clock synchronization message, and the slave station i forwards the updated first clock synchronization message to the next slave station i + 1 according to the first forwarding moment.
[0099] S13. The next slave station receives the first clock synchronization message forwarded by the current slave station and records the first local clock moment.
[0100] For example, when the first bit SOF of the preamble of the Ethernet frame of the message is received at the Port1 network interface of the slave station i + 1, the first local clock moment T will be recorded (i+1,Port1) . Where 1 ≤ i < n.
[0101] S14. The next slave station calculates the initial time offset according to the first local clock moment and the time information in the valid time field.
[0102] The slave station i + 1 calculates the initial time offset T between the slave station i + 1 and the slave station i through the first transmission delay T delay(i,i+1) , the first forwarding moment T (i，Port2) and the first local clock moment T recorded locally (i+1,Port1) . Where 1 ≤ i < n. The specific calculation method is as follows: offset(i+1,i)
[0103] (T (i+1,Port1) - T offset(i+1,i) ) = T (i，Port2) + T delay(i,i+1) , 1 ≤ i < n
[0104] T offset(i+1,i) = T (i+1,Port1) - T (i，Port2) - T delay(i,i+1) , 1 ≤ i < n
[0105] S15. The next slave station corrects its own clock according to the initial time offset, thereby completing the clock synchronization between the next slave station and the current slave station.
[0106] Each slave station repeats the above calculation of the initial time offset and corrects its own clock to complete the clock synchronization between each slave station and the previous slave station. Due to the cascade setting, Figure 4 after the slave station 2 synchronizes with the reference clock slave station 1, and after the synchronization is completed, the slave station 3 synchronizes with the slave station 2, and so on, the slave station i + 1 synchronizes with the slave station i until there is no subsequent slave station. Among them, the process of correcting the own clock of the current slave station according to the initial time offset is a prior art and will not be elaborated in this embodiment.
[0107] After each slave station completes the static compensation of the clock, due to the inherent imperfection of the crystal oscillator of each slave station, cumulative errors will occur over time. In order to maintain accurate clock synchronization, periodic dynamic compensation must be implemented for all slave stations. Figure 3 As shown, the cascade clock synchronization method also includes the following steps:
[0108] S300, in response to the dynamically compensated clock synchronization broadcast command, the current slave station records the second local clock time of receiving the second clock synchronization message.
[0109] In some embodiments, the master station first issues a clock synchronization broadcast command for dynamic compensation, and each slave station responds to the clock synchronization broadcast command, that is, corrects the current slave station's own clock according to the received second clock synchronization message, thereby completing the clock synchronization of the current slave station with the previous slave station. When each slave station receives the second clock synchronization message, it immediately records the second local clock time of receiving the second clock synchronization message.
[0110] S400, the current slave station determines the time drift between the current slave station and the previous slave station according to the second local clock time and the valid time information in the second clock synchronization message, and corrects its own clock according to the time drift.
[0111] In some embodiments, the effective time information in each synchronization message includes the transmission delay and the forwarding time. For example, the effective time information in the second synchronization message includes the second transmission delay and the second forwarding time; if the current slave station sends the second clock synchronization message, the effective time information includes the second transmission delay from the current slave station to the next slave station and the second forwarding time when the current slave station forwards the second clock synchronization message; if the current slave station receives the second clock synchronization message, the effective time information includes the second transmission delay from the previous slave station to the current slave station and the second forwarding time of the previous slave station.
[0112] In this embodiment, if Fig. 9 As shown, the current slave station calculates the time drift between the current slave station and the previous slave station according to the second local clock time and the valid time information in the second clock synchronization message, including:
[0113] S410, obtaining a second transmission delay and a second forwarding time according to the effective time information of the second clock synchronization message;
[0114] S420, determining a second receiving time of the next slave station according to the second transmission delay and the second forwarding time;
[0115] S430: Obtain a time drift according to a second receiving time and a second local clock time of the next slave station.
[0116] The slave i+1 transmits the delay T in the second clock synchronization message.delay(i,i+1) 、Forwarding time T (i，Port2) and the second local clock time T recorded locally (i+1,Port1) Calculate the time drift T between slave station i + 1 and slave station i offset(i+1,i) . Where 1 ≤ i < n. The specific calculation method is as follows:
[0117] Δt (i+1,i) = t (i+1,Port1) - t (i，Port2) - T delay(i,i+1) , 1 ≤ i < n
[0118] Each slave station repeats the above calculation of time drift and corrects its own clock to complete the clock synchronization between each slave station and the previous slave station until all slave stations complete dynamic compensation.
[0119] In some embodiments, the current slave station receives the second clock synchronization message forwarded by the previous slave station. The current slave station updates the valid time information of the second clock synchronization message according to the second transmission delay pre-recorded by the current slave station and the first forwarding time when the current slave station forwards the second clock synchronization message; and forwards the updated second clock synchronization message to the next slave station according to the second forwarding time; wherein, the update process of the second clock synchronization message is similar to the update process of the first clock synchronization message; and the determination process of the second transmission delay pre-recorded by the current slave station is the same as the determination process of the first transmission delay.
[0120] For better understanding of the dynamic compensation process, the dynamic compensation process is introduced exemplarily, as Fig.10 shown, the dynamic compensation process of clock synchronization includes:
[0121] S21, the master station periodically issues a clock synchronization broadcast command for dynamic compensation.
[0122] S22, the current slave station updates the second clock synchronization message received from the previous slave station and forwards the updated second clock synchronization message to the next slave station according to the forwarding time.
[0123] For example, after receiving the second clock synchronization message, slave station i adds the second transmission delay T from the downstream port port2 of slave station i to the upstream port port1 of the next slave station i + 1 delay(i,i+1) to the valid time information of the second clock synchronization message; at the same time, when slave station i forwards the clock synchronization message to the next slave station i + 1, it records and adds this second forwarding time T (i,Port2) to the valid time information of the second clock synchronization message; thus realizing the update of the second clock synchronization message, and slave station i forwards the updated second clock synchronization message to the next slave station i + 1 according to the second forwarding time.
[0124] S23, The next slave station receives the second clock synchronization message forwarded by the current slave station and records the second local clock time.
[0125] For example, when the first bit SOF of the message Ethernet frame preamble is received at the Port1 network interface of slave station i+1, the second local clock time T will be recorded. (i+1,Port1) ; where 1 ≤ i < n.
[0126] S24, The next slave station calculates the time drift according to the second local clock time and the time information in the valid time field.
[0127] Slave station i+1 calculates the time drift T between slave station i+1 and slave station i through the second transmission delay T delay(i,i+1) , the second forwarding time T (i，Port2) and the second local clock time T recorded locally (i+1,Port1) . Where 1 ≤ i < n. The specific calculation method is as follows: offset(i+1,i) .
[0128] Δt (i+1,i) = t (i+1,Port1) - t (i，Port2) - T delay(i,i+1) , 1 ≤ i < n
[0129] S25, The next slave station corrects its own clock according to the time drift, thereby completing the clock synchronization between the next slave station and the current slave station.
[0130] If Δt (i+1,i) is positive, it means that the clock of slave station i+1 runs faster than that of slave station i and needs to be slowed down. Otherwise, it needs to be speeded up. Among them, the process of correcting the own clock of the current slave station according to the initial time offset is a prior art and will not be elaborated in this embodiment.
[0131] Each slave station repeats the above calculation of time drift and correction of its own clock to complete the dynamic clock compensation between each slave station and the previous slave station.
[0132] In this embodiment, the structures of the first clock synchronization message corresponding to dynamic compensation and the second clock synchronization message of static compensation are the same, and the difference lies in the content of the clock synchronization message.
[0133] This embodiment uses the reserved value of the data type Type of the PDU header of the EtherCAT protocol to construct the clock synchronization message type of the EtherCAT network. The fields included in the traditional PDU header are shown in Table 2. After expanding the reserved value of the data type Type of the PDU header, the data type Type of the PDU header includes protocol type, network parameter type, mailbox type, static compensation clock synchronization message type, and dynamic compensation clock synchronization message type.
[0134] Table 2
[0135]
[0136] Table 3
[0137]
[0138] After the data type Type of the extended PDU header is used, the structure of the EtherCAT clock synchronization message is as follows: Fig.11 As shown in Figure 4, the clock synchronization message includes an Ethernet frame header, an Ethernet frame tail, and a payload field; the payload field includes a data unit header, namely, a PDU header, and effective time information; wherein the data type Type of the PDU header includes a protocol type, a network parameter type, a mailbox type, a static compensation clock synchronization message type, and a dynamic compensation clock synchronization message type; the effective time information includes a transmission delay and a forwarding time. The physical meaning of each field in the clock synchronization message structure is shown in Table 4.
[0139] Table 4
[0140]
[0141] The cascade clock synchronization method of this embodiment realizes accurate calculation of the link delay between the two by each slave station actively sending a preset frame message to the next-level slave station after power-on, and then the master station realizes the cascade clock synchronization of the slave stations by sending a clock synchronization message. Compared with the common clock synchronization scheme of EtherCAT at present, the transmission delay T is 0.0001 in the process of calculating the initial offset and drift of the time between slave station i and slave station i+1. delay The calculation of (i,i+1) does not involve the data processing delay and data forwarding delay of the slave station. Therefore, the accuracy of time synchronization can be further improved by calculating the link delay that does not depend on the data processing and forwarding delay of the slave station.
[0142] Fig.12 A schematic diagram of the structure of a cascade clock synchronization device according to an embodiment of the present application is shown. Exemplarily, the cascade clock synchronization device includes a static response module 10 , a static correction module 20 , a dynamic response module 30 and a dynamic correction module 40 .
[0143] The static response module 10 is used to respond to the clock synchronization broadcast command of static compensation, and the current slave station records the first local clock moment of receiving the first clock synchronization message; the static correction module 20 is used for the current slave station to determine the initial time offset between the current slave station and the previous slave station according to the first local clock moment and the valid time information in the first clock synchronization message, and correct the current slave station's own clock according to the initial time offset; the dynamic response module 30 is used to respond to the clock synchronization broadcast command of dynamic compensation, and the current slave station records the second local clock moment of receiving the second clock synchronization message; the dynamic correction module 40 is used for the current slave station to determine the time drift between the current slave station and the previous slave station according to the second local clock moment and the valid time information in the second clock synchronization message, and correct the current slave station's own clock according to the time drift.
[0144] It can be understood that the device of this embodiment corresponds to the cascade clock synchronization method of the above embodiment, and the options in the above embodiment are also applicable to this embodiment, so they will not be described repeatedly here.
[0145] The present application also provides a terminal device, which may be, for example, various devices supporting the EtherCAT communication protocol, such as servo drives, sensors, actuators, encoders, etc. Exemplarily, the terminal device includes a processor and a memory, wherein the memory stores a computer program, and the processor runs the computer program, so that the terminal device executes the functions of each module in the above-mentioned cascade clock synchronization method or the above-mentioned cascade clock synchronization device.
[0146] Among them, the processor can be an integrated circuit chip with signal processing capabilities. The processor can be a general-purpose processor, including a central processing unit (CPU), a graphics processing unit (GPU) and a network processor (NP), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or at least one of other programmable logic devices, discrete gates or transistor logic devices, and discrete hardware components. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc., which can implement or execute the disclosed methods, steps and logic block diagrams in the embodiments of the present application.
[0147] The memory may be, but is not limited to, a random access memory (RAM), a read only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), etc. The memory is used to store a computer program, and the processor may execute the computer program accordingly after receiving an execution instruction.
[0148] The present application also provides a computer-readable storage medium for storing the computer program used in the above-mentioned terminal device. For example, the computer-readable storage medium may include, but is not limited to, various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.
[0149] In several embodiments provided in the present application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely schematic. For example, the flowcharts and structure diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of the present application. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of a code, and the module, a program segment or a part of a code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in an alternative implementation, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the structure diagram and / or the flow diagram, and the combination of boxes in the structure diagram and / or the flow diagram, can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of dedicated hardware and computer instructions.
[0150] In addition, the functional modules or units in the various embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.
[0151] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a smart phone, a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the various embodiments of the present application.
[0152] The above description is only a specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application.
Claims
1. A cascade clock synchronization method, characterized in that: include: In response to the statically compensated clock synchronization broadcast command, the current slave station records the first local clock time of receiving the first clock synchronization message; The current slave station determines an initial time offset between the current slave station and the previous slave station according to the first local clock time and the valid time information in the first clock synchronization message, and corrects its own clock according to the initial time offset; In response to the dynamically compensated clock synchronization broadcast command, the current slave station records the second local clock time of receiving the second clock synchronization message; The current slave station determines the time drift between the current slave station and the previous slave station according to the second local clock time and the valid time information in the second clock synchronization message, and corrects the current slave station's own clock according to the time drift.
2. The cascade clock synchronization method according to claim 1, characterized in that: The effective time information includes transmission delay and forwarding time; If the current slave station sends the first clock synchronization message or the second clock synchronization message, the effective time information includes the transmission delay from the current slave station to the next slave station and the forwarding time when the current slave station forwards the first clock synchronization message or the second clock synchronization message; If the current slave station receives the first clock synchronization message or the second clock synchronization message, the valid time information includes the transmission delay from the previous slave station to the current slave station and the forwarding time when the previous slave station forwards the first clock synchronization message or the second clock synchronization message.
3. The cascade clock synchronization method according to claim 2, characterized in that: The current slave station determines an initial time offset between the current slave station and the previous slave station according to the first local clock time and the valid time information in the first clock synchronization message, including: Obtaining a first transmission delay and a first forwarding time according to the effective time information of the first clock synchronization message; Determine a first receiving time of a next slave station according to the first transmission delay and the first forwarding time; The initial time offset is obtained according to the first receiving time of the next slave station and the first local clock time.
4. The cascade clock synchronization method according to claim 2, characterized in that: The current slave station calculates the time drift between the current slave station and the previous slave station according to the second local clock time and the valid time information in the second clock synchronization message, including: Obtaining a second transmission delay and a second forwarding time according to the effective time information of the second clock synchronization message; Determine a second receiving time of the next slave station according to the second transmission delay and the second forwarding time; The time drift is obtained according to the second receiving time of the next slave station and the second local clock time.
5. The cascade clock synchronization method according to claim 1, characterized in that: The method further comprises: The current slave station receives the first clock synchronization message forwarded by the previous slave station; updating the valid time information of the first clock synchronization message according to the first transmission delay pre-recorded by the current slave station and the first forwarding time at which the current slave station forwards the first clock synchronization message; The updated first clock synchronization message is forwarded to the next slave station according to the first forwarding time.
6. The cascade clock synchronization method according to claim 5, characterized in that: Determining the first transmission delay pre-recorded by the current slave station includes: When the current slave station establishes a connection with the next slave station, a preset frame message is sent to the next slave station; the preset frame message includes a reference sending time of the current slave station; Recording the reference receiving time when the preset frame message is received from the next slave station; The first transmission delay from the current slave station to the next slave station is obtained according to the reference receiving time and the reference sending time, and the first transmission delay is recorded.
7. The cascade clock synchronization method according to claim 1, characterized in that: The structures of the first clock synchronization message and the second clock synchronization message are the same; the first clock synchronization message includes a data unit header and the valid time information; the data type of the data unit header includes a static compensation clock synchronization message type and a dynamic compensation clock synchronization message type.
8. A cascade clock synchronization device, characterized in that: It includes a static response module, a static correction module, a dynamic response module and a dynamic correction module; The static response module is used to respond to the clock synchronization broadcast command of static compensation, and the current slave station records the first local clock time of receiving the first clock synchronization message; The static correction module is used for the current slave station to determine the initial time offset between the current slave station and the previous slave station according to the first local clock time and the valid time information in the first clock synchronization message, and to correct the current slave station's own clock according to the initial time offset; The dynamic response module is used to respond to the clock synchronization broadcast command of dynamic compensation, and the current slave station records the second local clock time of receiving the second clock synchronization message; The dynamic correction module is used for the current slave station to determine the time drift between the current slave station and the previous slave station according to the second local clock time and the valid time information in the second clock synchronization message, and to correct the current slave station's own clock according to the time drift.
9. A terminal device, characterized in that: The terminal device comprises a processor and a memory, wherein the memory stores a computer program, and the processor is configured to execute the computer program to implement the cascade clock synchronization method according to any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that: The device stores a computer program, which, when executed on a processor, implements the cascade clock synchronization method according to any one of claims 1 to 7.