Processing method for communication with PLC and instrument

Abstract

The invention relates to the technical field of industrial monitoring communication, and particularly discloses a processing method for communication with a PLC and an instrument. The method comprises the following steps: S1, establishing an equipment model library; s2, generating an equipment channel address table according to the equipment model library; s3, creating a real-time control working condition data variable based on the equipment channel address table, and establishing communication connection between the real-time control working condition data variable and a monitoring sensor of the controlled PLC or instrument; s4, dynamically generating a data acquisition instruction sequence according to the device channel address table; s5, executing the data acquisition instruction sequence, and analyzing and storing the acquired data to a real-time control working condition data variable; s6, monitoring the variable change of the real-time control working condition data, and generating a data writing instruction when the variable is changed; and S7, executing a data writing instruction, and writing the new variable value into the corresponding PLC or instrument. Different PLCs and instruments generate unified real-time control working condition data variables in the system through corresponding templates, and equipment data of different PLCs and instruments can be monitored.

Description

Technical Field

[0001] The invention relates to the technical field of industrial monitoring communication, in particular to a processing method for communicating with a PLC and an instrument. Background Art

[0002] With the rapid development of science and technology and the continuous upgrading of industrial structure, industrial automation system has become an important pillar of modern industrial production. It can not only improve production efficiency and reduce production costs, but also ensure product quality and production safety.

[0003] In the future, how will industrial automation systems help companies achieve intelligent manufacturing and create an efficient, intelligent and green production environment? In the process of industrial automation development, industrial equipment monitoring systems and devices are indispensable to build a bridge of communication between people and equipment. People pre-build monitoring systems through configuration software, download the monitoring systems to the monitoring devices, and realize data collection and equipment control.

[0004] With the development of automation, many large-scale equipment production lines now involve a large number of PLCs and instrumentation equipment. If multiple devices are monitored separately, interaction between the devices is difficult and there may be data collection delays, which makes it difficult to monitor and control the industrial control system in real time. Summary of the invention

[0005] The processing method proposed by the present invention is used to overcome the difficulty of real-time monitoring and control of the communication between the PLC and the instrument (including the single-chip microcomputer) of the industrial control system.

[0006] In order to solve the above technical problems, a technical solution adopted by the present invention is: a processing method for communicating with a PLC and an instrument, which comprises the following steps:

[0007] S1, establish a device model library, which contains the communication protocols, register mapping and data type information of different types of PLCs and instruments;

[0008] S2, generating a device channel address table according to the device model library, including device identification, register address, data type, and sampling period;

[0009] S3, creating a real-time control condition data variable based on the device channel address table, and establishing a communication connection between the real-time control condition data variable and a monitoring sensor of a controlled PLC or instrument;

[0010] S4, dynamically generating a data acquisition instruction sequence according to the device channel address table;

[0011] S5, executing the data acquisition instruction sequence, and analyzing and storing the acquired data into the real-time control working condition data variable;

[0012] S6, monitoring the change of the real-time control working condition data variable, and generating a data writing instruction when the variable value of the real-time control working condition data variable changes;

[0013] S7, execute the data write instruction to write the new variable value into the corresponding PLC or instrument.

[0014] Preferably, the process of establishing the device model library in step S1 includes:

[0015] S11, parsing the device communication protocol document and extracting the register address mapping relationship;

[0016] S12, establishing a correspondence between register addresses and data types;

[0017] S13, generating a device model description file, including the protocol information of the current device, the address mapping of the current device and the data type.

[0018] Preferably, the process of generating the device channel address table in step S2 includes:

[0019] S21, parsing the device model description file generated in step S13, and extracting address mapping information;

[0020] S22, generating an initial channel address entry according to the collection point configured by the user;

[0021] S23, assigning a unique identifier to each channel address;

[0022] S24, setting the sampling period and data type attributes of the channel address;

[0023] S25, build a channel address priority queue and sort it according to data importance and change frequency;

[0024] S26, performing channel address grouping optimization to improve acquisition efficiency.

[0025] Preferably, the process of dynamically generating the data acquisition instruction sequence in step S4 includes:

[0026] S41, generating a communication connection and initialization instruction according to the device protocol information;

[0027] S42, generating an optimized read register instruction sequence based on the channel address priority queue constructed in step S25;

[0028] S43, implementing an instruction merging algorithm to merge the read operations of consecutive addresses into a batch read instruction;

[0029] S44, generate data validity check instructions, including CRC check instructions and range check instructions.

[0030] Preferably, the process of executing the data acquisition instruction sequence in step S5 includes:

[0031] S51, establish a communication connection with the device and execute an initialization sequence;

[0032] S52, sending a read register instruction and receiving response data according to the optimized read register instruction sequence generated in step S42;

[0033] S53, implements a parallel processing mechanism to process data collection tasks of multiple devices simultaneously.

[0034] Preferably, the step S53 further includes a signal delay compensation step when processing the data collection task of multiple devices:

[0035] SY1, measures and records the delay time of each communication link;

[0036] SY2, synchronizes the clocks of each node in the system;

[0037] SY3, uses the Kalman filter algorithm to calculate the estimated delay time of each signal;

[0038] SY4, construct a delay compensation matrix D, D = I + A * B, where I is the identity matrix, A is the signal path correlation matrix, and B is the measured delay time vector;

[0039] SY5, dynamically adjusts the data buffer size according to the network load;

[0040] SY6, linear interpolation was used to fill in missing data points due to delay;

[0041] SY7, calculate and record the end-to-end delay time from data acquisition to final processing.

[0042] Preferably, dynamically adjusting the data buffer size according to the network load in step SY5 includes:

[0043] SY51, real-time monitoring of PLC and instrument communication network load, including communication cycle time, data packet integrity and response time;

[0044] SY52, sets the network load threshold, including normal load, medium load and high load;

[0045] SY53 dynamically adjusts the data buffer size according to the current load level: when the load is normal, the standard buffer size is maintained; when the load is medium, the buffer size is increased; when the load is high, the buffer size is further increased to ensure data integrity;

[0046] SY54, regularly evaluate the adjustment effect and optimize the buffer size strategy.

[0047] Preferably, the step SY6 of using linear interpolation to supplement missing data points includes:

[0048] SY61, detects missing data in real-time control condition data variables;

[0049] SY62, determine the valid data points before and after the missing data point;

[0050] SY63, use the linear interpolation formula to calculate the estimated value of the missing point: y = y1 + (x-x1) * (y2-y1) / (x2-x1); where (x1, y1) and (x2, y2) are valid data points before and after the missing point, and x is the timestamp of the missing point;

[0051] SY64, inserts the calculated estimated value into the real-time control condition data variable and marks it as interpolated data;

[0052] SY65, record interpolation operations, including interpolation time, reason and method used.

[0053] Preferably, the step SY7 of calculating and recording the end-to-end delay time from data collection to final processing includes:

[0054] SY71, add timestamp T1 when data acquisition instruction is sent;

[0055] SY72, add intermediate timestamps Ti at key nodes of data reception, parsing and storage, i=2,3,...,n-1;

[0056] SY73, adds a final timestamp Tn when the data is finally written into the real-time control condition data variable;

[0057] SY74, calculate the total delay time: TotalDelay = Tn-T1;

[0058] SY75, calculate the delay time of each stage: StageDelayi=Ti-Ti-1;

[0059] SY76, stores the delay data in the system database, including the total delay time and the delay time of each stage;

[0060] SY77, optimizes the data acquisition instruction sequence according to the total delay time and the delay time of each stage.

[0061] Preferably, in step SY77, optimizing the data acquisition instruction sequence according to the total delay time and the delay time of each stage includes:

[0062] SY771, Analyze delay data: Calculate the mean and standard deviation of the total delay time, identify the contribution of each stage of delay time, and determine the bottleneck stage of delay time;

[0063] SY772, Set optimization goals: Determine the acceptable total delay time threshold and set delay time goals for each stage;

[0064] SY773, optimize instruction sequencing: adjust the instruction execution order according to the delay time of each stage; execute instructions with high delay risk in advance to allow more time for potential retries;

[0065] SY774, instruction merging optimization: Analyze the delay caused by the read operation of consecutive addresses; adjust the size of batch read instructions to balance data throughput and latency; reduce the merging range for data points with low latency requirements;

[0066] SY775, sampling period adjustment: re-evaluate the sampling period in the device channel address table based on the delay data; increase the sampling frequency for delay-sensitive data points; reduce the sampling frequency for delay-insensitive data points;

[0067] SY776, Parallel Processing Optimization: Analyze the latency differences between multiple devices; adjust the parallel processing strategy to prioritize data collection tasks for high-latency devices; balance the allocation of processing resources between devices;

[0068] SY777, based on the above optimization strategy, regenerates the data acquisition instruction sequence.

[0069] The present invention has the following beneficial effects:

[0070] The present invention generates unified real-time control condition data variables for different PLCs, instruments and other equipment in a system through corresponding templates, which is beneficial for monitoring different PLCs, instrument equipment data in one system and reducing the complexity of monitoring module development.

[0071] The present invention enables the interaction between different devices to be transferred through the system device of the present application, and each PLC and instrument equipment is decoupled, making data exchange more convenient.

[0072] The present invention pre-creates real-time control condition data variables, so that users do not need to modify the interface configuration when replacing different PLCs and instruments. They only need to bind the information in the channel address tables of different PLCs and instruments to the preset real-time control condition data variables, thereby reducing the configuration workload. BRIEF DESCRIPTION OF THE DRAWINGS

[0073] Figure 1 The figure is a flow chart of an embodiment of the present invention. DETAILED DESCRIPTION

[0074] The detailed description and technical contents of the present invention are described as follows with reference to the accompanying drawings. However, the accompanying drawings are only provided for reference and description and are not intended to limit the present invention.

[0075] like Figure 1 As shown, a processing method for communicating with a PLC and an instrument according to an embodiment of the present invention includes the following steps:

[0076] S1, establish a device model library, which contains the communication protocols, register mapping and data type information of different types of PLCs and instruments;

[0077] S2, generating a device channel address table according to the device model library, including device identification, register address, data type, and sampling period;

[0078] S3, creating a real-time control condition data variable based on the device channel address table, and establishing a communication connection between the real-time control condition data variable and a monitoring sensor of a controlled PLC or instrument;

[0079] S4, dynamically generating a data acquisition instruction sequence according to the device channel address table;

[0080] S5, executing the data acquisition instruction sequence, and analyzing and storing the acquired data into the real-time control working condition data variable;

[0081] S6, monitoring the change of the real-time control working condition data variable, and generating a data writing instruction when the variable value of the real-time control working condition data variable changes;

[0082] S7, execute the data write instruction to write the new variable value into the corresponding PLC or instrument.

[0083] A highly efficient PLC and instrument communication system has been implemented. The adaptability and versatility of the system have been improved through the device model library and dynamically generated instruction sequences. Real-time data acquisition and writing have been achieved, ensuring the real-time and accuracy of the control system. A complete data flow from device models to real-time data variables has been established, improving the maintainability of the system.

[0084] As an implementable method, the process of establishing the device model library in step S1 includes:

[0085] S11, parsing the device communication protocol document and extracting the register address mapping relationship;

[0086] S12, establishing a correspondence between register addresses and data types;

[0087] S13, generating a device model description file, including the protocol information of the current device, the address mapping of the current device and the data type.

[0088] A standardized device model description file was established to improve the interoperability between different devices.

[0089] In a specific case, there is a PLC device model "PLC-A", whose communication protocol document includes the following information:

[0090] Register address mapping relationship:

[0091] Register 1: Address 0x0001, Type: Integer,

[0092] Register 2: Address 0x0002, Type: Floating point,

[0093] Register 3: Address 0x0003, Type: Boolean.

[0094] In step S11, the device communication protocol document is parsed to extract the above register address mapping relationship.

[0095] In step S12, the correspondence between register address and data type is established as follows:

[0096] Address 0x0001->Integer,

[0097] Address 0x0002 -> floating point type,

[0098] Address 0x0003 -> Boolean.

[0099] In step S13, a device model description file is generated, which contains the following contents:

[0100] {"Device model":"PLC-A","Communication protocol":"Modbus","Address mapping":{"0x0001":"Integer","0x0002":"Floating point","0x0003":"Boolean"}}; This description file provides standardized information for subsequent data channel generation.

[0101] As an implementable method, the process of generating the device channel address table in step S2 includes:

[0102] S21, parsing the device model description file generated in step S13, and extracting address mapping information;

[0103] S22, generating an initial channel address entry according to the collection point configured by the user;

[0104] S23, assigning a unique identifier to each channel address;

[0105] S24, setting the sampling period and data type attributes of the channel address;

[0106] S25, build a channel address priority queue and sort it according to data importance and change frequency;

[0107] S26, performing channel address grouping optimization to improve acquisition efficiency.

[0108] The automatic generation of device channel address tables is realized, which improves configuration efficiency. The accuracy and flexibility of data management are improved through unique identifiers and attribute settings. The introduction of channel address priority queues realizes differentiated processing of data collection. The efficiency of data collection is improved through address grouping optimization.

[0109] In a specific case, in step S21, the device model description file generated in step S13 is parsed, address mapping information is extracted, and the following content is obtained:

[0110] Address 0x0001,

[0111] Address 0x0002,

[0112] Address 0x0003.

[0113] In step S22, according to the acquisition points configured by the user, assuming that the user selects acquisition register 1 and register 2, an initial channel address entry is generated:

[0114] Channel 1: 0x0001,

[0115] Channel 2: 0x0002.

[0116] In step S23, a unique identifier is assigned to each channel address:

[0117] Channel 1 -> ID_001,

[0118] Channel 2 -> ID_002.

[0119] In step S24, the sampling period and data type attributes of the channel address are set:

[0120] Channel 1: Sampling period 5 seconds, data type integer,

[0121] Channel 2: Sampling period is 10 seconds, data type is floating point.

[0122] In step S25, a channel address priority queue is constructed. Assuming that register 1 (integer) is of high priority and register 2 (floating point) is of low priority, the result is:

[0123] Priority queue: ID_001, ID_002.

[0124] In step S26, channel address grouping optimization is performed to group channel 1 and channel 2 to improve acquisition efficiency and form the final optimization result:

[0125] Group 1: ID_001 (integer),

[0126] Group 2: ID_002 (floating point type).

[0127] As an implementable method, the process of dynamically generating a data acquisition instruction sequence in step S4 includes:

[0128] S41, generating a communication connection and initialization instruction according to the device protocol information;

[0129] S42, generating an optimized read register instruction sequence based on the channel address priority queue constructed in step S25;

[0130] S43, implementing an instruction merging algorithm to merge the read operations of consecutive addresses into a batch read instruction;

[0131] S44, generate data validity check instructions, including CRC check instructions and range check instructions.

[0132] In a specific case, in step S41, a communication connection and initialization instruction is generated according to the device protocol information:

[0133] Initialization instruction: INIT PLC-A.

[0134] In step S42, based on the channel address priority queue constructed in step S25, an optimized read register instruction sequence is generated:

[0135] Read register instruction sequence:

[0136] Read ID_001 (address 0x0001),

[0137] Read ID_002 (address 0x0002).

[0138] In step S43, an instruction merging algorithm is implemented to merge the read operations of consecutive addresses into a batch read instruction:

[0139] Merged instruction: READ 0x0001,0x0002.

[0140] In step S44, a data validity check instruction is generated, including a CRC check instruction and a range check instruction:

[0141] Data Validation Directives:

[0142] CRC check instruction: CHECK CRC,

[0143] Range check command: CHECK RANGE 0-100 (integer), 0.0-100.0 (floating point).

[0144] As an implementable method, the process of executing the data acquisition instruction sequence in step S5 includes:

[0145] S51, establish a communication connection with the device and execute an initialization sequence;

[0146] S52, sending a read register instruction and receiving response data according to the optimized read register instruction sequence generated in step S42;

[0147] S53, implements a parallel processing mechanism to process data collection tasks of multiple devices simultaneously.

[0148] The complete data acquisition execution process is realized, ensuring the reliability of data acquisition. Through the parallel processing mechanism, the system's ability to process multi-device data is improved, increasing the system's throughput. The optimized instruction sequence execution improves the efficiency and real-time performance of data acquisition.

[0149] In a specific case, in step S51, a communication connection with the device is established and an initialization sequence is executed:

[0150] Execute the initialization sequence: EXEC INIT PLC-A.

[0151] In step S52, according to the optimized read register instruction sequence generated in step S42, a read register instruction is sent and response data is received:

[0152] Send command: SEND READ 0x0001,0x0002;

[0153] Receive response data:

[0154] ID_001->25 (integer),

[0155] ID_002->75.5 (float type).

[0156] In step S53, a parallel processing mechanism is implemented to simultaneously process data collection tasks of multiple devices:

[0157] Start parallel threads to collect data from multiple PLC devices, for example:

[0158] ID_001 and ID_002 of device A;

[0159] ID_003 and ID_004 of device B;

[0160] Through parallel processing, the efficiency of data collection is improved to ensure the maximization of system processing capacity.

[0161] As an implementable method, in step S53, when processing the data collection task of multiple devices, the signal delay problem is taken into consideration, so a signal delay compensation step is also included. This step is performed during the data collection and processing process, and specifically includes the following steps:

[0162] SY1, measures and records the delay time of each communication link;

[0163] SY2, synchronizes the clocks of each node in the system;

[0164] SY3, uses the Kalman filter algorithm to calculate the estimated delay time of each signal;

[0165] SY4, construct a delay compensation matrix D, D = I + A * B, where I is the identity matrix, A is the signal path correlation matrix, and B is the measured delay time vector;

[0166] SY5, dynamically adjusts the data buffer size according to the network load;

[0167] SY6, linear interpolation was used to fill in missing data points due to delay;

[0168] SY7, calculate and record the end-to-end delay time from data acquisition to final processing.

[0169] As an implementable method, the step of dynamically adjusting the data buffer size according to the network load in the above step SY5 specifically includes:

[0170] SY51, real-time monitoring of PLC and instrument communication network load, including communication cycle time, data packet integrity and response time;

[0171] SY52, sets the network load threshold, including normal load, medium load and high load;

[0172] SY53 dynamically adjusts the data buffer size according to the current load level: maintains the standard buffer size under normal load; increases the buffer size appropriately under medium load; and significantly increases the buffer size to ensure data integrity under high load;

[0173] SY54, regularly evaluate the adjustment effect and optimize the buffer size strategy.

[0174] As an implementable method, the step of using linear interpolation to supplement missing data points in the above step SY6 specifically includes:

[0175] SY61, detects missing data in real-time control condition data variables;

[0176] SY62, determine the valid data points before and after the missing data point;

[0177] SY63, use the linear interpolation formula to calculate the estimated value of the missing point: y = y1 + (x-x1) * (y2-y1) / (x2-x1); where (x1, y1) and (x2, y2) are valid data points before and after the missing point, and x is the timestamp of the missing point;

[0178] SY64, inserts the calculated estimated value into the real-time control condition data variable and marks it as interpolated data;

[0179] SY65, record interpolation operations, including interpolation time, reason and method used.

[0180] As an implementable method, the step of calculating and recording the end-to-end delay time from data collection to final processing in the above step SY7 specifically includes:

[0181] SY71, add timestamp T1 when data acquisition instruction is sent;

[0182] SY72, add intermediate timestamps Ti (i=2,3,...,n-1) at key nodes of data reception, parsing and storage;

[0183] SY73, adds a final timestamp Tn when the data is finally written into the real-time control condition data variable;

[0184] SY74, calculate the total delay time: TotalDelay = Tn-T1;

[0185] SY75, calculate the delay time of each stage: StageDelayi=Ti-Ti-1(i=2,3,...,n);

[0186] SY76, stores the delay data in the system database, including the total delay time and the delay time of each stage;

[0187] SY77, optimizes the data acquisition instruction sequence according to the total delay time and the delay time of each stage.

[0188] The above specific implementation method takes into account the influence of delay and optimizes the data acquisition instruction sequence according to the total delay time and the delay time of each stage.

[0189] In a specific case, an industrial automation system has three PLC devices (PLC-A, PLC-B, PLC-C) communicating through a network. During the data acquisition process, considering the signal delay problem, the following steps are implemented.

[0190] Step SY1: Measure and record the delay time of each communication link:

[0191] Assume that the measurement results are as follows: the delay from PLC-A to the data processing system is 35ms; the delay from PLC-B to the data processing system is 40ms; the delay from PLC-C to the data processing system is 30ms.

[0192] Step SY2: Synchronize the clocks of each node in the system:

[0193] Use the Network Time Protocol (NTP) to synchronize the clocks of all PLCs and data processing systems to the same standard time, ensuring consistent timestamps.

[0194] Step SY3: Calculate the estimated delay time of each signal using the Kalman filter algorithm:

[0195] Through Kalman filtering, the estimated delay time is finally obtained:

[0196] PLC-A: 34ms, PLC-B: 42ms, PLC-C: 29ms.

[0197] Step SY4: Construct the delay compensation matrix D:

[0198] Assume that the signal path correlation matrix A is: A = [[1,0.5,0.3], [0.5,1,0.4], [0.3,0.4,1]], the delay time vector B is: B = [35,40,30], the unit matrix I is 3x3: I = [[1,0,0], [0,1,0], [0,0,1]], the calculated delay compensation matrix D is: D = I + A * B. After calculation, the specific value of D is: D = [[36.5,20.5,13.0], [20.5,41.0,16.0], [13.0,16.0,31.0]].

[0199] Step SY5: Dynamically adjust the data buffer size according to the network load: In real-time monitoring, assume that the communication cycle time is 20ms, the packet integrity is 98%, and the response time is 25ms.

[0200] The set network load thresholds are: normal load: <= 30ms, medium load: 30ms-50ms, high load: >50ms. The current load is medium, so the data buffer size is dynamically adjusted, for example, the buffer size is increased from 1000 bytes to 1500 bytes.

[0201] Step SY6: Use linear interpolation to fill in missing data points:

[0202] Assume that data loss is found at a certain time point during the data collection process, and the valid data points before and after are: valid data before: T1 = 10s, value 20, valid data after: T2 = 12s, value 30. Use the linear interpolation formula to calculate the estimated value of the missing point T = 11s: y = 20 + (11-10) * (30-20) / (12-10) = 25, insert the estimated value 25 into the real-time control condition data variable, and mark it as interpolated data.

[0203] Step SY7: Calculate and record the end-to-end delay time from data acquisition to final processing:

[0204] Add timestamp T1=10:00:00.000 when sending data acquisition instruction;

[0205] Add intermediate timestamps at key nodes of data reception, parsing, and storage: T2 = 10:00:00.035 (receive data), T3 = 10:00:00.040 (parse data), T4 = 10:00:00.045 (store data);

[0206] When the data is finally written into the real-time control condition data variable, a final timestamp Tn=10:00:00.050 is added;

[0207] Calculate the total delay time: TotalDelay = Tn-T1 = 50ms-0ms = 50ms;

[0208] Calculate the delay time of each stage:

[0209] StageDelay2=T2-T1=35ms-0ms=35ms;

[0210] StageDelay3=T3-T2=40ms-35ms=5ms;

[0211] StageDelay4=T4-T3=45ms-40ms=5ms.

[0212] As an implementable method, the step of optimizing the data acquisition instruction sequence according to the total delay time and the delay time of each stage in the above step SY77 specifically includes:

[0213] SY771, Analyze delay data: Calculate the mean and standard deviation of the total delay time, identify the contribution of each stage of delay time, and determine the main bottleneck stage of delay time;

[0214] SY772, Set optimization goals: Determine the acceptable total delay time threshold and set delay time goals for each stage;

[0215] SY773, optimize instruction sequencing: adjust the instruction execution order according to the delay time of each stage; execute instructions with high delay risk in advance to allow more time for potential retries;

[0216] SY774, instruction merging optimization: Analyze the delay caused by the read operation of consecutive addresses; adjust the size of batch read instructions to balance data throughput and latency; consider reducing the merging range for data points with low latency requirements;

[0217] SY775, sampling period adjustment: re-evaluate the sampling period in the device channel address table based on the delay data; consider increasing the sampling frequency for delay-sensitive data points; consider appropriately reducing the sampling frequency for delay-insensitive data points;

[0218] SY776, Parallel Processing Optimization: Analyze the latency differences between multiple devices; adjust the parallel processing strategy to prioritize data collection tasks for high-latency devices; balance the allocation of processing resources between devices;

[0219] SY777, based on the above optimization strategy, regenerates the data acquisition instruction sequence.

[0220] As an implementable method, the execution steps of SY771-SY774 are as follows:

[0221] SZ1, define the following matrix to support instruction optimization calculations:

[0222] The instruction matrix A[i, j] represents the execution time of instruction i in stage j;

[0223] Delay matrix D[i, j]: represents the delay time of instruction i in stage j;

[0224] Priority matrix P[i]: represents the priority of instruction i. The higher the value, the higher the priority.

[0225] Retry risk matrix R[i]: represents the probability that instruction i needs to be retried, and its value range is between [0, 1].

[0226] SZ2, total delay time calculation: The total delay time T is calculated by the following formula: Where n is the total number of instructions and m is the total number of stages;

[0227] SZ3, calculation of delay contribution of each stage: The delay contribution C of each stage is calculated as follows: Where C[j] represents the contribution of stage j to the total delay time T;

[0228] SZ4, optimize instruction sorting: define a sorting score S to optimize instruction sorting:

[0229]

[0230] Among them, w1, w2, w3, w4 are weight coefficients; the instructions are sorted in descending order according to the value of S to obtain the optimized instruction sequence.

[0231] SZ5, instruction merging optimization: define the similarity matrix M of adjacent instructions:

[0232] M[i,j]=similarity(instruction[i], instruction[j]);

[0233] Among them, the similarity function can calculate the similarity of two instructions in the following way:

[0234] Address proximity: Calculate the address difference of the instruction in memory. The smaller the difference, the higher the similarity.

[0235] Operation type similarity: determine whether two instructions have the same operation type (such as read, write, etc.);

[0236] A clustering algorithm (such as K-means) is used to cluster the similarity matrix M to obtain a group of instructions that can be merged. The merged instructions can reduce latency and improve execution efficiency.

[0237] Consider a specific case where four instructions are executed in three stages.

[0238] 1. Suppose we define the following matrix:

[0239] Instruction matrix A:

[0240] Delay matrix D:

[0241] Priority matrix P:

[0242] Retry risk matrix R:

[0243] 2. Calculation of total delay time:

[0244] Using the formula above: T = 1 + 2 + 1 + 0 + 1 + 2 + 2 + 0 + 1 + 1 + 1 + 1 = 12;

[0245] 3. Calculation of delayed contribution at each stage:

[0246]

[0247]

[0248] 4. Optimize instruction sorting: set weights w1=1, w2=2, w3=1, w4=1, and calculate S[i];

[0249] For instruction 0:

[0250] S[0]=1*(1+2+1)+2*3+1*0.1-1*(5+3+2)=1*4+6+0.1-10=0.1;

[0251] For instruction 1:

[0252] S[1]=1*(0+1+2)+2*1+1*0.2-1*(4+1+3)=3+2+0.2-8=-2.8;

[0253] For instruction 2:

[0254] S[2]=1*(2+0+1)+2*4+1*0.05-1*(2+5+1)=3+8+0.05-8=3.05;

[0255] For instruction 3:

[0256] S[3]=1*(1+1+1)+2*2+1*0.15-1*(3+2+4)=3+4+0.15-9=-1.85;

[0257] Arrange the instructions in descending order according to the value of S, and the optimized order is: instruction 2, instruction 0, instruction 3, instruction 1.

[0258] 5. Instruction merging optimization:

[0259] Construct the similarity matrix M, assuming that the similarity calculation results are as follows:

[0260]

[0261] Use the K-means clustering algorithm to analyze M and obtain instruction groups that can be merged. For example, instructions 0 and 1 with high similarity are merged to reduce the total delay.

[0262] Through the above complete solution, the total delay time of instructions, the delay contribution of each stage can be effectively calculated, the instruction sorting can be optimized, and the similarity matrix can be used to merge instructions. This systematic approach can significantly improve the efficiency of instruction execution, reduce latency, and ensure the efficient operation of the system.

[0263] By taking into account latency, priority, retry risk, and execution time, a more comprehensive instruction ranking score is obtained. Matrix operation efficiency: Using numpy's matrix operations improves the computational efficiency of large-scale instruction sets. Using the K-means algorithm to automatically identify instruction groups that can be merged is highly adaptable.

[0264] The above embodiments are only preferred embodiments for fully illustrating the present invention, and the protection scope of the present invention is not limited thereto. Any equivalent substitution or change made by a person skilled in the art based on the present invention is within the protection scope of the present invention.

Claims

1. A processing method for communicating with PLC and instrument, characterized in that, It includes the following steps: S1, establish a device model library, which contains the communication protocols, register mapping and data type information of different types of PLCs and instruments; S2, generating a device channel address table according to the device model library, including device identification, register address, data type, and sampling period; S3, creating a real-time control condition data variable based on the device channel address table, and establishing a communication connection between the real-time control condition data variable and a monitoring sensor of a controlled PLC or instrument; S4, dynamically generating a data acquisition instruction sequence according to the device channel address table; S5, executing the data acquisition instruction sequence, and analyzing and storing the acquired data into the real-time control working condition data variable; S6, monitoring the change of the real-time control working condition data variable, and generating a data writing instruction when the variable value of the real-time control working condition data variable changes; S7, execute the data write instruction to write the new variable value into the corresponding PLC or instrument.

2. A processing method for communicating with a PLC and an instrument as claimed in claim 1, characterized in that: The process of establishing the device model library in step S1 includes: S11, parsing the device communication protocol document and extracting the register address mapping relationship; S12, establishing a correspondence between register addresses and data types; S13, generating a device model description file, including the protocol information of the current device, the address mapping of the current device and the data type.

3. A processing method for communicating with a PLC and an instrument as claimed in claim 2, characterized in that: The process of generating the device channel address table in step S2 includes: S21, parsing the device model description file generated in step S13, and extracting address mapping information; S22, generating an initial channel address entry according to the collection point configured by the user; S23, assigning a unique identifier to each channel address; S24, setting the sampling period and data type attributes of the channel address; S25, build a channel address priority queue and sort it according to data importance and change frequency; S26, performing channel address grouping optimization to improve acquisition efficiency.

4. A processing method for communicating with a PLC and an instrument as claimed in claim 3, characterized in that: The process of dynamically generating the data acquisition instruction sequence in step S4 includes: S41, generating communication connection and initialization instructions according to device protocol information; S42, generating an optimized read register instruction sequence based on the channel address priority queue constructed in step S25; S43, implementing an instruction merging algorithm to merge the read operations of consecutive addresses into a batch read instruction; S44, generate data validity check instructions, including CRC check instructions and range check instructions.

5. A processing method for communicating with a PLC and an instrument as claimed in claim 4, characterized in that: The process of executing the data acquisition instruction sequence in step S5 includes: S51, establish a communication connection with the device and execute an initialization sequence; S52, sending a read register instruction and receiving response data according to the optimized read register instruction sequence generated in step S42; S53, implements a parallel processing mechanism to process data collection tasks of multiple devices simultaneously.

6. A processing method for communicating with a PLC and an instrument as claimed in claim 5, characterized in that: The step S53 also includes a signal delay compensation step when processing the data acquisition task of multiple devices: SY1, measures and records the delay time of each communication link; SY2, synchronizes the clocks of each node in the system; SY3, uses the Kalman filter algorithm to calculate the estimated delay time of each signal; SY4, construct a delay compensation matrix D, D = I + A * B, where I is the identity matrix, A is the signal path correlation matrix, and B is the measured delay time vector; SY5, dynamically adjusts the data buffer size according to the network load; SY6, linear interpolation was used to fill in missing data points due to delay; SY7, calculate and record the end-to-end delay time from data acquisition to final processing.

7. A processing method for communicating with a PLC and an instrument as claimed in claim 6, characterized in that: The step SY5 of dynamically adjusting the data buffer size according to the network load includes: SY51, real-time monitoring of PLC and instrument communication network load, including communication cycle time, data packet integrity and response time; SY52, sets the network load threshold, including normal load, medium load and high load; SY53 dynamically adjusts the data buffer size according to the current load level: when the load is normal, the standard buffer size is maintained; when the load is medium, the buffer size is increased; when the load is high, the buffer size is further increased to ensure data integrity; SY54, regularly evaluate the adjustment effect and optimize the buffer size strategy.

8. A processing method for communicating with a PLC and an instrument as claimed in claim 6, characterized in that: In step SY6, using linear interpolation to supplement missing data points includes: SY61, detects missing data in real-time control condition data variables; SY62, determine the valid data points before and after the missing data point; SY63, use the linear interpolation formula to calculate the estimated value of the missing point: y = y1 + (x-x1) * (y2-y1) / (x2-x1); where (x1, y1) and (x2, y2) are valid data points before and after the missing point, and x is the timestamp of the missing point; SY64, inserts the calculated estimated value into the real-time control condition data variable and marks it as interpolated data; SY65, record interpolation operations, including interpolation time, reason and method used.

9. A processing method for communicating with a PLC and an instrument as claimed in claim 6, characterized in that: The step SY7 in which the end-to-end delay time from data collection to final processing is calculated and recorded includes: SY71, add timestamp T1 when data acquisition instruction is sent; SY72, add intermediate timestamps Ti at key nodes of data reception, parsing and storage, i=2,3,...,n-1; SY73, adds a final timestamp Tn when the data is finally written into the real-time control condition data variable; SY74, calculate the total delay time: TotalDelay = Tn-T1; SY75, calculate the delay time of each stage: StageDelayi=Ti-Ti-1; SY76, stores the delay data in the system database, including the total delay time and the delay time of each stage; SY77, optimizes the data acquisition instruction sequence according to the total delay time and the delay time of each stage.

10. A processing method for communicating with a PLC and an instrument as claimed in claim 9, characterized in that: In step SY77, optimizing the data acquisition instruction sequence according to the total delay time and the delay time of each stage includes: SY771, Analyze delay data: Calculate the mean and standard deviation of the total delay time, identify the contribution of each stage of delay time, and determine the bottleneck stage of delay time; SY772, Set optimization goals: Determine the acceptable total delay time threshold and set delay time goals for each stage; SY773, optimize instruction sequencing: adjust the instruction execution order according to the delay time of each stage; execute instructions with high delay risk in advance; SY774, instruction merging optimization: Analyze the delay caused by the read operation of consecutive addresses; adjust the size of batch read instructions to balance data throughput and latency; reduce the merging range for data points with low latency requirements; SY775, sampling period adjustment: re-evaluate the sampling period in the device channel address table based on the delay data; increase the sampling frequency for delay-sensitive data points; reduce the sampling frequency for delay-insensitive data points; SY776, Parallel Processing Optimization: Analyze the latency differences between multiple devices; adjust the parallel processing strategy to prioritize data collection tasks for high-latency devices; balance the allocation of processing resources between devices; SY777, based on the above optimization strategy, regenerates the data acquisition instruction sequence.

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