Solar cell and preparation method thereof, grid line slurry and photovoltaic module

Abstract

The invention relates to a solar cell and a preparation method thereof, grid line slurry and a photovoltaic module. The solar cell comprises a silicon wafer, a first intrinsic amorphous silicon layer, a first doped amorphous silicon layer, a first TCO layer and a first grid line layer are sequentially stacked on the front face of the silicon wafer, a second intrinsic amorphous silicon layer, a second doped amorphous silicon layer, a second TCO layer and a second grid line layer are sequentially stacked on the back face of the silicon wafer, the first TCO layer comprises a first area and a second area, and the second TCO layer comprises a second area and a third area. The first grid line layer is arranged in the first area, the second area is provided with a first hydrophobic layer, and the first hydrophobic layer at least wraps the peripheral edge of the first grid line layer; and / or, the second TCO layer comprises a third area and a fourth area, the second grid line layer is arranged in the third area, the fourth area is provided with a second hydrophobic layer, and the second hydrophobic layer at least wraps the peripheral edge of the second grid line layer. The solar cell has the advantages of excellent water, acid and sodium resistance, high photoelectric conversion efficiency, simple manufacturing method and low production cost.

Description

Technical Field

[0001] The invention relates to the field of photovoltaic technology, in particular to a solar cell and a preparation method thereof, a grid line paste and a photovoltaic module. Background Art

[0002] At present, solar cells are not resistant to corrosion by substances such as water, acid, and sodium. Traditional technologies achieve the purpose of improving battery stability by coating a layer of hydrophobic material or dense water-isolating material on the surface of the battery. However, these methods not only increase the process steps during coating and increase the equipment cost, but the prepared film layer will also adhere to the grid line while adhering to the surface of the battery. These substances are insulating, which will increase the resistance of the grid line and the welding strip when the battery is prepared into a component, thereby reducing the power generation capacity of the battery component. Summary of the invention

[0003] Based on this, it is necessary to provide a solar cell and its preparation method, grid line paste and photovoltaic module to address the above problems. The solar cell has excellent water, acid and sodium resistance and high photoelectric conversion efficiency, and the production method is simple and the production cost is low.

[0004] A solar cell, the solar cell comprising a silicon wafer, wherein a first intrinsic amorphous silicon layer, a first doped amorphous silicon layer, a first TCO layer and a first gate line layer are stacked in sequence on the front side of the silicon wafer, and a second intrinsic amorphous silicon layer, a second doped amorphous silicon layer, a second TCO layer and a second gate line layer are stacked in sequence on the back side of the silicon wafer, the first TCO layer comprising a first region and a second region, the first gate line layer is arranged in the first region, the second region is provided with a first hydrophobic layer, and the first hydrophobic layer at least wraps around edges of the first gate line layer; and / or the second TCO layer comprises a third region and a fourth region, the second gate line layer is arranged in the third region, the fourth region is provided with a second hydrophobic layer, and the second hydrophobic layer at least wraps around edges of the second gate line layer.

[0005] In one embodiment, the second hydrophobic layer covers the fourth area;

[0006] And / or, the first hydrophobic layer covers the second area.

[0007] In one embodiment, the number of auxiliary gate lines in the second gate line layer is greater than the number of auxiliary gate lines in the first gate line layer.

[0008] In one embodiment, the number of auxiliary gate lines in the second gate line layer is greater than or equal to 150;

[0009] And / or, the width of the secondary gate lines in the second gate line layer is less than or equal to 30 μm.

[0010] In one embodiment, the first TCO layer includes at least N TCO sub-layers, N≥2, wherein the grain sizes of adjacent TCO sub-layers are different and the grain boundaries are staggered.

[0011] In one embodiment, the mass fractions of oxygen elements in adjacent TCO sub-layers are different;

[0012] And / or, the thicknesses of adjacent TCO sub-layers are different.

[0013] In one of the embodiments, the mass fraction of oxygen in the TCO sublayer increases layer by layer from the first doped amorphous silicon layer to the first gate line layer;

[0014] Alternatively, in a direction from the first doped amorphous silicon layer to the first gate line layer, the mass fraction of oxygen in the TCO sublayer decreases layer by layer;

[0015] Alternatively, when N≥3, in the direction from the first doped amorphous silicon layer to the first gate line layer, the mass fractions of oxygen in the first TCO sublayer and the Nth TCO sublayer are both smaller than the mass fractions of oxygen in the second TCO sublayer to the N-1th TCO sublayer.

[0016] In one of the embodiments, the thickness of the TCO sublayer increases layer by layer from the first doped amorphous silicon layer to the first gate line layer;

[0017] Alternatively, in a direction from the first doped amorphous silicon layer to the first gate line layer, the thickness of the TCO sublayer decreases layer by layer;

[0018] Alternatively, when N≥3, in the direction from the first doped amorphous silicon layer to the first gate line layer, the thickness of the first TCO sublayer and the Nth TCO sublayer are both smaller than the thickness of the second TCO sublayer to the N-1th TCO sublayer.

[0019] In one embodiment, the first TCO layer includes a first TCO sublayer and a second TCO sublayer, the mass fraction of oxygen in the first TCO sublayer is 1%-4%, and the mass fraction of oxygen in the second TCO sublayer is 2%-6%;

[0020] And / or, the first TCO layer includes a first TCO sublayer and a second TCO sublayer, the first TCO sublayer has a thickness of 5 nm-20 nm, and the second TCO sublayer has a thickness of 50 nm-70 nm.

[0021] The solar cell of the present invention arranges a first hydrophobic layer in the second area of ​​the first TCO layer, and / or arranges a second hydrophobic layer in the fourth area of ​​the second TCO layer. The first hydrophobic layer and / or the second hydrophobic layer can effectively improve the water, acid and sodium resistance of the solar cell. Moreover, the first hydrophobic layer extends from the first grid line layer to the surrounding areas of the first grid line layer, and the second hydrophobic layer extends from the second grid line layer to the surrounding areas of the second grid line layer. The square resistance of the first TCO layer and the second TCO layer and the resistance of the first grid line layer and the second grid line layer are basically not increased, so that the electrode can collect carriers more efficiently and improve the photoelectric conversion efficiency of the solar cell.

[0022] A gate line slurry comprises conductive metal powder and additives, wherein the additives comprise hydrophobic small molecules and a diluent.

[0023] In one embodiment, the diluent satisfies at least one of the following conditions:

[0024] (1) The viscosity of the diluent is 1mPa.s-30Pa.s;

[0025] (2) The mass fraction of the diluent in the gate line slurry is 1%-5%;

[0026] (3) The boiling point of the diluent is greater than 120°C, and the volatilization rate at room temperature is less than or equal to 0.1 kg / h.

[0027] In one embodiment, the diluent is selected from at least one of diethylene glycol butyl ether acetate, ethylene glycol ethyl ether acetate, ethylene glycol butyl ether, diethylene glycol methyl ether, glycerol diacetate, dimethyl oxalate, isopentyl butyrate, ethylene glycol diacetate, dimethyl fumarate or dimethyl phosphate.

[0028] In one embodiment, the hydrophobic small molecule satisfies at least one of the following conditions:

[0029] (1) The mass fraction of the hydrophobic small molecules in the gate line slurry is 3%-5%;

[0030] (2) The hydrophobic small molecule is selected from at least one of epoxy resins, polyurethanes, alkanes or oils with a degree of polymerization less than 5.

[0031] In the grid line slurry of the present invention, additives including hydrophobic small molecules and diluents are provided, and the diluent has very low tension and good fluidity, so that in the process of preparing the grid line layer of the solar cell, the hydrophobic small molecules are brought out and spread on the surface of the TCO layer under the flow of the diluent, so that a hydrophobic layer is formed in the non-grid line area of ​​the surface of the TCO layer, so that the prepared solar cell has excellent water, acid and sodium resistance and high photoelectric conversion efficiency. Moreover, compared with traditional technologies, the present invention does not need to additionally provide a hydrophobic layer on the surface of the battery, which simplifies the process, reduces the number of equipment used, and reduces the production cost. At the same time, it can also effectively avoid the problem of increased resistance of the grid line and the welding strip after the component is manufactured due to the hydrophobic layer attached to the grid line surface.

[0032] A method for preparing the solar cell as described above comprises the following steps:

[0033] The silicon wafer is textured, and then a first intrinsic amorphous silicon layer, a first doped amorphous silicon layer and a first TCO layer are sequentially formed on the front side of the silicon wafer;

[0034] forming a second intrinsic amorphous silicon layer, a second doped amorphous silicon layer and a second TCO layer in sequence on the back side of the silicon wafer;

[0035] A first gridline paste is placed on the surface of the first TCO layer, and a second gridline paste is placed on the surface of the second TCO layer, and a first gridline layer, a second gridline layer, a first hydrophobic layer and / or a second hydrophobic layer are formed through sintering to obtain a solar cell, wherein the first gridline paste is the gridline paste described above, and / or the second gridline paste is the gridline paste described above.

[0036] In one of the embodiments, the preparation method of the first TCO layer includes: sequentially forming at least N TCO sublayers on the surface of the first doped amorphous silicon layer, N≥2, and controlling the grain sizes of adjacent TCO sublayers to be different and the grain boundaries to be staggered, so as to obtain the first TCO layer.

[0037] The method for preparing a solar cell of the present invention, since the additives in the first grid line slurry and the second grid line slurry both include hydrophobic small molecules and a diluent, therefore in the process of forming the first grid line layer and the second grid line layer, a first hydrophobic layer can be formed in the non-grid line region of the first TCO layer, and / or a second hydrophobic layer can be formed in the non-grid line region of the second TCO layer. Compared with the traditional technology, the present invention does not need to additionally set a hydrophobic layer on the surface of the battery, which simplifies the process, reduces the number of equipment used, and reduces the production cost. At the same time, it can also effectively avoid the problem of increased resistance of the grid line and the welding belt after the assembly is made due to the hydrophobic layer attached to the grid line surface. Therefore, the solar cell prepared by the present invention has excellent water, acid and sodium resistance and high photoelectric conversion efficiency, and the manufacturing method is simple and the production cost is low.

[0038] A photovoltaic assembly comprises the solar cell as described above. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0040] Figure 1 A schematic structural diagram of a solar cell according to an embodiment of the present invention;

[0041] Figure 2 This is a schematic structural diagram of a first TCO layer according to an embodiment of the present invention;

[0042] Figure 3 for Figure 2 A local schematic diagram of the grain boundary misalignment formed by the first TCO sublayer and the second TCO sublayer, wherein, in the figure, C represents the through-grain boundary of the first TCO sublayer, and D represents the through-grain boundary of the second TCO sublayer;

[0043] Figure 4 This is an electron microscope image of a single TCO sublayer in the solar cell of the present invention, wherein in the image, A represents a through grain boundary;

[0044] Figure 5 A process diagram for preparing a solar cell according to one embodiment of the present invention;

[0045] Figure 6 This is an electron microscope image of the solar cell prepared in Example 1 of the present invention after stability testing.

[0046] Figure numerals: 1, silicon wafer; 2, first intrinsic amorphous silicon layer; 3, first doped amorphous silicon layer; 4, first TCO layer; 5, first gate line layer; 6, second intrinsic amorphous silicon layer; 7, second doped amorphous silicon layer; 8, second TCO layer; 9, second gate line layer; 10, first hydrophobic layer; 11, second hydrophobic layer; 41, first TCO sublayer; 42, second TCO sublayer. DETAILED DESCRIPTION

[0047] For ease of understanding of the present invention, the present invention will be described in more detail below. However, it should be understood that the present invention can be implemented in many different forms and is not limited to the embodiments or examples described herein. On the contrary, the purpose of providing these embodiments or examples is to make the understanding of the disclosure of the present invention more thorough and comprehensive.

[0048] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific implementation or embodiment, and are not intended to limit the present invention. The optional scope of the term "and / or" used herein includes any one of two or more related listed items, and also includes any and all combinations of related listed items, and the combinations include any two related listed items, any more related listed items, or all related listed items.

[0049] like Figure 1 As shown, a solar cell provided in one embodiment of the present invention includes a silicon wafer 1, wherein a first intrinsic amorphous silicon layer 2, a first doped amorphous silicon layer 3, a first TCO layer 4 and a first gate line layer 5 are sequentially stacked on the front side of the silicon wafer 1, and a second intrinsic amorphous silicon layer 6, a second doped amorphous silicon layer 7, a second TCO layer 8 and a second gate line layer 9 are sequentially stacked on the back side of the silicon wafer 1.

[0050] Among them, the first TCO layer 4 includes a first area and a second area, the first gate line layer 5 is arranged in the first area, and the second area is provided with a first hydrophobic layer 10, and the first hydrophobic layer 10 at least wraps the four edges of the first gate line layer 5; and / or, the second TCO layer 8 includes a third area and a fourth area, the second gate line layer 9 is arranged in the third area, and the fourth area is provided with a second hydrophobic layer 11, and the second hydrophobic layer 11 at least wraps the four edges of the second gate line layer 9.

[0051] It should be noted that, in the present invention, the first region refers to the gate line region on the surface of the first TCO layer 4, and the second region refers to the region of the first TCO layer 4 away from the surface of the first doped amorphous silicon layer 3 and not covered by the first gate line layer 5, that is, the non-first gate line region. Similarly, the third region refers to the gate line region on the surface of the second TCO layer 8, and the fourth region refers to the region of the second TCO layer 8 away from the surface of the second doped amorphous silicon layer 7 and not covered by the second gate line layer 9, that is, the non-second gate line region.

[0052] It can be understood that in the present invention, by setting the first hydrophobic layer 10 in the second area on the surface of the first TCO layer 4, and / or setting the second hydrophobic layer 11 in the fourth area on the surface of the second TCO layer 8, the first hydrophobic layer 10 and the second hydrophobic layer 11 can effectively improve the water, acid and sodium resistance of the solar cell, and the first hydrophobic layer 10 extends from the first grid line layer 5 to the surrounding of the first grid line layer 5, and the second hydrophobic layer 11 extends from the second grid line layer 9 to the surrounding of the second grid line layer 9, so that the surface of the first grid line layer 5 basically does not contain the first hydrophobic layer 10, and the surface of the second grid line layer 9 basically does not contain the second hydrophobic layer 11. Therefore, the above-mentioned first hydrophobic layer 10 and the second hydrophobic layer 11 will basically not increase the square resistance of the first TCO layer 4 and the second TCO layer 8 and the resistance of the first grid line layer 5 and the second grid line layer 9, so that the electrode can collect carriers more efficiently, thereby improving the photoelectric conversion efficiency of the solar cell.

[0053] It should be noted that, in the present invention, the first hydrophobic layer 10 may cover part of the second area, or may completely cover the second area, preferably the first hydrophobic layer 10 completely covers the second area. It can be understood that, in the present invention, the first hydrophobic layer covers the second area, which actually means that the first hydrophobic layer 10 completely covers the second area.

[0054] Similarly, the second hydrophobic layer 11 may cover part of the fourth area, or may completely cover the fourth area, preferably the second hydrophobic layer 11 completely covers the fourth area, and it can be understood that the second hydrophobic layer 11 covering the fourth area actually means that the second hydrophobic layer 11 completely covers the fourth area. In this way, a continuous and dense hydrophobic barrier film can be better formed on the surface of the second TCO layer 8, and the water, acid and sodium resistance of the solar cell can be better improved.

[0055] In the present invention, the number of auxiliary grid lines in the second grid line layer 9 is greater than the number of auxiliary grid lines in the first grid line layer 5. Such a configuration is beneficial to improving the carrier collection of the second grid line layer 9 and improving the electrical performance of the solar cell.

[0056] In the present invention, both the first gate line layer 5 on the front side of the silicon wafer 1 and the second gate line layer 9 on the back side of the silicon wafer 1 include main gate lines and auxiliary gate lines, and the main gate lines are arranged perpendicular to the auxiliary gate lines.

[0057] Considering that the second hydrophobic layer 11 extends from the second grid line layer 9 to the surroundings thereof, if the spacing between adjacent grid lines is too wide, it will affect the coverage effect of the second hydrophobic layer 11 in the non-grid line area. For this reason, in the present invention, the number of the secondary grid lines is greater than or equal to 150. It can be understood that by controlling the number of secondary grid lines in the second grid line layer 9, the spacing between the secondary grid lines can be effectively reduced, and the second hydrophobic layer 11 can be better guaranteed to completely cover the non-grid line area, which is conducive to further improving the carrier collection of the electrode, thereby improving the electrical performance of the solar cell.

[0058] At the same time, considering that the increase in the number of secondary grid lines will increase the cost to a certain extent, in the present invention, the width of the secondary grid lines will be correspondingly thinned as the number of secondary grid lines increases, ensuring the consistency of the wet weight during the silk screen printing process, thereby not causing the cost to rise. Furthermore, in the present invention, when the number of the secondary grid lines is greater than or equal to 150, the width of the secondary grid lines is less than or equal to 30 μm.

[0059] In one embodiment, the thickness of the second intrinsic amorphous silicon layer 6 is 2nm-10nm; the thickness of the second doped amorphous silicon layer 7 is 5nm-30nm; the thickness of the second TCO layer 8 is 20nm-90nm; and the thickness of the second gate line layer 9 is 5μm-20μm.

[0060] Combination Figure 2-Figure 4 As shown, the first TCO layer 4 includes N TCO sub-layers, and N ≥ 2, and each TCO sub-layer has the following Figure 4 The through-grain boundaries shown in the figure cause substances such as water vapor, acid and sodium to enter the doped amorphous silicon layer through the through-grain boundaries, thereby affecting the structure and performance of the solar cell. For this reason, the grain sizes of adjacent TCO sublayers of the present invention are different and the grain boundaries are staggered, so that the first TCO layer 4 forms a multi-layer grain boundary dislocation structure, which effectively prevents water, acid and sodium from entering the first doped amorphous silicon layer 3 through the through-grain boundaries of the first TCO layer 4, effectively improving the water, acid and sodium resistance of the front side of the solar cell, enabling the electrode to efficiently collect carriers, and further improving the photoelectric conversion efficiency of the solar cell.

[0061] In the present invention, the specific structure of the first TCO layer 4 can be adjusted by adjusting the number N of TCO sublayers as required. For example, the first TCO layer 4 can be two stacked TCO sublayers, three stacked TCO sublayers, or four stacked TCO sublayers.

[0062] Specifically, combined Figure 2-Figure 3 As shown, the first TCO layer 4 includes two stacked TCO sub-layers, namely a first TCO sub-layer 41 and a second TCO sub-layer 42 , and the first TCO sub-layer 41 and the second TCO sub-layer 42 have different grain sizes and their grain boundaries are staggered.

[0063] In the present invention, the mass fractions of oxygen in adjacent TCO sublayers may be the same or different, and are preferably different. In this way, carrier collection and light transmittance can be regulated by regulating the oxygen content in different TCO sublayers.

[0064] Specifically, when the mass fractions of oxygen elements in adjacent TCO sub-layers are different, the magnitude relationship of the mass fractions of oxygen elements in different TCO sub-layers can be divided into the following three cases:

[0065] The first case: from the first doped amorphous silicon layer 3 to the first gate line layer 5, the mass fraction of oxygen in the TCO sublayer increases layer by layer. Such a setting is conducive to improving carrier collection and light transmittance. It can be understood that compared with other TCO sublayers, the mass fraction of oxygen in the TCO sublayer directly in contact with the first doped amorphous silicon layer 3 is the lowest. For example, when the first TCO layer 4 is a single TCO sublayer, the mass fraction of oxygen in the first TCO layer 4 is 3%. Then, after stratification, that is, when the first TCO layer 4 includes at least N TCO sublayers, the mass fraction of oxygen in the TCO sublayer directly in contact with the first doped amorphous silicon layer 3 can be adjusted from 3% to 1%, which is helpful for carrier collection; and the mass fraction of oxygen in the remaining TCO sublayers can be appropriately increased, for example, from 3% oxygen to 3.5%, etc., to improve light transmittance.

[0066] In one embodiment, when the first TCO layer 4 includes two stacked TCO sublayers, the mass fraction of oxygen in the first TCO sublayer 41 is 0.5%-2.5%, preferably 1%, and the mass fraction of oxygen in the second TCO sublayer 42 is 3%-6%, preferably 3.5%.

[0067] The second situation: from the first doped amorphous silicon layer 3 to the first gate line layer 5, the mass fraction of oxygen in the TCO sublayer decreases layer by layer; such a setting is conducive to adjusting the work function of the first TCO layer 4 to better match the work function of the first doped amorphous silicon layer 3, thereby improving the fill factor and improving the performance of the solar cell.

[0068] The third case: when N≥3, from the first doped amorphous silicon layer 3 to the first gate line layer 5, the mass fraction of oxygen in the first TCO sublayer and the Nth TCO sublayer is less than the mass fraction of oxygen in the second TCO sublayer to the N-1th TCO sublayer. In this way, the contact resistance between the first TCO layer 4 and the first doped amorphous silicon layer 3 and the contact resistance between the first TCO layer 4 and the first gate line layer 5 can be reduced to improve the fill factor, while the oxygen content of the intermediate TCO sublayer is increased to not reduce the amount of light entering; the total amount of light entering is ensured to remain unchanged, and the performance of the solar cell is further improved.

[0069] For example, when the first TCO layer 4 includes three TCO sublayers, that is, the first TCO sublayer, the second TCO sublayer and the third TCO sublayer are sequentially stacked on the surface of the first doped amorphous silicon layer 3, the mass fraction of oxygen in the first TCO sublayer and the third TCO sublayer is less than the mass fraction of oxygen in the second TCO sublayer; for another example, when the first TCO layer 4 includes four TCO sublayers, that is, the first TCO sublayer, the second TCO sublayer, the third TCO sublayer and the fourth TCO sublayer are sequentially stacked on the surface of the first doped amorphous silicon layer 3, the mass fraction of oxygen in the first TCO sublayer and the fourth TCO sublayer is less than the mass fraction of oxygen in the second TCO sublayer and the third TCO sublayer, and the mass fraction of oxygen in the second TCO sublayer and the third TCO sublayer can be the same or different, for example, the mass fraction of oxygen in the second TCO sublayer is less than the mass fraction of oxygen in the third TCO sublayer, or the mass fraction of oxygen in the second TCO sublayer is greater than the mass fraction of oxygen in the third TCO sublayer.

[0070] Similarly, when the thicknesses of adjacent TCO sub-layers are different, the thickness relationship of different TCO sub-layers can also be divided into the following three cases:

[0071] The first case: from the first doped amorphous silicon layer 3 to the first gate line layer 5, the thickness of the TCO sublayer increases layer by layer; it can be understood that when the mass fraction of oxygen in the TCO sublayer directly in contact with the first doped amorphous silicon layer 3 decreases, the thickness of the corresponding TCO sublayer will also be appropriately thinned to avoid affecting the generation of carriers due to reduced light transmittance. For example, when the first TCO layer 4 includes two TCO sublayers, the thickness of the first TCO sublayer 41 is less than the thickness of the second TCO sublayer 42. Further, the thickness of the first TCO sublayer 41 is 5nm-20nm, and the thickness of the second TCO sublayer 42 is 50nm-70nm.

[0072] The second situation: from the first doped amorphous silicon layer 3 to the first gate line layer 5 , the thickness of the TCO sublayer decreases layer by layer.

[0073] The third case: when N≥3, from the first doped amorphous silicon layer 3 to the first gate line layer 5, the thickness of the first TCO sublayer and the Nth TCO sublayer are both smaller than the thickness of the second TCO sublayer to the N-1th TCO sublayer.

[0074] It should be noted that in the present invention, as long as the grain sizes of adjacent TCO sublayers are different and the grain boundaries are staggered, the materials of adjacent TCO sublayers are not particularly limited, that is, the materials of adjacent TCO sublayers may be the same or different.

[0075] In one embodiment, the TCO sublayer is selected from an indium tin oxide layer, an aluminum zinc oxide layer, an aluminum-doped zinc oxide layer, a tungsten-doped indium oxide layer, or a graphene layer.

[0076] In one embodiment, the thickness of the first intrinsic amorphous silicon layer 2 is 2nm-10nm; the thickness of the first doped amorphous silicon layer 3 is 5nm-30nm; the thickness of the first TCO layer 4 is 20nm-90nm; and the thickness of the first gate line layer 5 is 5μm-20μm.

[0077] Meanwhile, the present invention also provides a gate line slurry, which comprises conductive metal powder and additives, wherein the additives comprise hydrophobic small molecules and a diluent.

[0078] Specifically, when the grid line slurry of the present invention is used to prepare solar cells, since the additives in the grid line slurry include hydrophobic small molecules and diluents, and the diluents have very low tension and good fluidity, the hydrophobic small molecules can be brought out and spread on the surface of the TCO layer under the flow of the diluent during the formation of the grid line layer, so that a hydrophobic layer is formed in the non-grid line area of ​​the TCO layer surface, thereby making the prepared solar cell have excellent water, acid and sodium resistance and high photoelectric conversion efficiency. Moreover, compared with traditional technologies, the present invention does not need to set an additional hydrophobic layer on the surface of the battery, which simplifies the process, reduces the number of equipment used, and reduces production costs. At the same time, it can also effectively avoid the problem of increased resistance of the grid line and the soldering tape after the component is manufactured due to the hydrophobic layer attached to the grid line surface.

[0079] It is understandable that the grid line paste in the present invention can be used as both the front paste and the back paste of the solar cell.

[0080] Optionally, the mass fraction of the diluent in the gate line slurry is 1%-5%; such a setting can better regulate the viscosity of the slurry, improve the formation effect of the gate line layer, and at the same time help the hydrophobic small molecules in the slurry to be brought out and spread on the surface of the TCO layer to form a uniform and dense hydrophobic layer.

[0081] Optionally, the viscosity of the diluent is 1 mPa.s-30 Pa.s. This configuration is conducive to improving the smooth fluidity of the diluent, so that it can better carry out the hydrophobic small molecules to form the hydrophobic layer 10.

[0082] Optionally, the boiling point of the diluent is greater than 120° C., and the volatilization rate at room temperature is less than or equal to 0.1 kg / h. This arrangement can further ensure that the morphology of the gate line layer is effectively regulated while better bringing out the hydrophobic small molecules in the slurry and spreading the TCO layer to form a hydrophobic layer.

[0083] Furthermore, the diluent is selected from at least one of diethylene glycol butyl ether acetate, ethylene glycol ethyl ether acetate, ethylene glycol butyl ether, diethylene glycol methyl ether, glycerol diacetate, dimethyl oxalate, isopentyl butyrate, ethylene glycol diacetate, dimethyl fumarate or dimethyl phosphate.

[0084] It should be noted that the diluent in the present invention can also be selected from aromatic hydrocarbons, such as toluene, ethylbenzene and other organic solvents, which can drive hydrophobic small molecules to the surface of the TCO layer.

[0085] Optionally, the mass fraction of the hydrophobic small molecules in the gate line slurry is 3%-5%. Such an arrangement is conducive to being carried out under the flow of the diluent and spreading on the surface of the TCO layer to form a dense and uniform hydrophobic layer.

[0086] Furthermore, the hydrophobic small molecules are selected from at least one of epoxy resins, polyurethanes, alkanes or greases with a degree of polymerization less than 5, wherein the greases include oils and fats.

[0087] In one embodiment, the mass fraction of the conductive metal powder in the gate line paste is 85%-92%.

[0088] In one embodiment, the conductive metal powder may be silver powder or aluminum powder, etc. When the gate line paste is used as the back surface paste, silver powder is preferred.

[0089] In one embodiment, the additive may further include a thixotropic agent or the like.

[0090] In addition, if Figure 5 As shown, the present invention also provides a method for preparing a solar cell, comprising the following steps:

[0091] S1 , texturing a silicon wafer 1 , and then sequentially forming a first intrinsic amorphous silicon layer 2 , a first doped amorphous silicon layer 3 and a first TCO layer 4 on the front side of the silicon wafer 1 .

[0092] In step S1, the silicon wafer 1 is textured to obtain a silicon wafer 1 with a pyramid light-trapping structure formed on both sides, wherein the texture making process mainly utilizes the anisotropic corrosion characteristics of silicon in low-concentration alkaline solution. Si and the alkaline solution undergo a series of chemical reactions to form a pyramid texture surface on the surface of the silicon wafer 1. For example, the silicon wafer 1 is placed in a KOH or NaOH solution with a concentration of 0.3%-5% and a temperature of 55°C-95°C to react for 3min-20min; the surface of the silicon wafer 1 is cleaned using an RCA cleaning process.

[0093] In one embodiment, a first intrinsic amorphous silicon layer 2 and a first doped amorphous silicon layer 3 are sequentially deposited on the front surface of the silicon wafer 1 by using a chemical vapor deposition (CVD) method.

[0094] Optionally, the preparation method of the first TCO layer 4 includes: sequentially forming at least N TCO sublayers on the surface of the first doped amorphous silicon layer 3, N≥2, and controlling the grain sizes of adjacent TCO sublayers to be different and the grain boundaries to be staggered, so as to obtain the first TCO layer. It can be understood that the first TCO layer 4 is a multi-layer grain boundary dislocation structure.

[0095] Specifically, the preparation method of the first TCO layer 4 can be prepared by referring to the following steps:

[0096] At least N TCO sublayers are sequentially deposited on the surface of the first doped amorphous silicon layer 3 by physical vapor deposition (PVD), where N≥2, and the grain sizes of adjacent TCO sublayers are controlled to be different and grain boundary dislocation is formed. Specifically, when the first TCO layer 4 includes a first TCO sublayer 41 and a second TCO sublayer 42, the first TCO sublayer 41 is deposited on the surface of the first doped amorphous silicon layer 3 by physical vapor deposition (PVD), and after solidification, the second TCO sublayer 42 is continuously deposited by physical vapor deposition (PVD), and solidified.

[0097] In another embodiment, different materials can be selected as target materials for deposition to form TCO sublayers, and the materials of adjacent TCO sublayers are controlled to be different, and the different crystallinity of different materials is used to generate grain boundary dislocation. For example, when a first TCO sublayer 41 and a second TCO sublayer 42 are sequentially deposited on the surface of the first doped amorphous silicon layer 3 by physical vapor deposition (PVD), the material of the first TCO sublayer 41 is indium tin oxide (ITO), and the material of the second TCO sublayer 42 is aluminum zinc oxide (AZO).

[0098] Therefore, in the present invention, the first TCO layer having a multi-layer grain boundary staggered structure can be prepared by using different materials or by multiple depositions, and the preparation method is simple.

[0099] S2 , forming a second intrinsic amorphous silicon layer 6 , a second doped amorphous silicon layer 7 and a second TCO layer 8 in sequence on the back side of the silicon wafer 1 .

[0100] In one embodiment, a second intrinsic amorphous silicon layer 6 and a second doped amorphous silicon layer 7 are sequentially deposited on the back side of the silicon wafer 1 by chemical vapor deposition (CVD); a second TCO layer 8 is deposited on the surface of the second doped amorphous silicon layer 7 by physical vapor deposition (PVD). It can be understood that in the process of forming the second TCO layer 8, the physical vapor deposition (PVD) process is performed only once.

[0101] It should be noted that, in the present invention, there is no particular limitation on the materials of the first intrinsic amorphous silicon layer 2 , the first doped amorphous silicon layer 3 , the first TCO layer 4 , the second intrinsic amorphous silicon layer 6 , the second doped amorphous silicon layer 7 and the second TCO layer 8 , and no detailed description is given here.

[0102] S3, placing a first grid line paste on the surface of the first TCO layer 4, placing a second grid line paste on the surface of the second TCO layer 8, and sintering to form a first grid line layer 5, a second grid line layer 9, a first hydrophobic layer 10 and / or a second hydrophobic layer 11 to obtain a solar cell, wherein the first grid line paste is the grid line paste described above, and / or the second grid line paste is the grid line paste described above. It can be understood that the additives in the first grid line slurry and / or the second grid line slurry include hydrophobic small molecules and diluents. The diluent has very low tension and good fluidity, so that in the process of forming the first grid line layer 5 and / or the second grid line layer 9, the hydrophobic small molecules are brought out under the flow of the diluent and spread on the surface of the first TCO layer 4 to form a first hydrophobic layer 10, so that the second area of ​​the first TCO layer 4 forms the first hydrophobic layer 10, and / or, a second hydrophobic layer 11 is formed on the surface of the second TCO layer 8, so that the fourth area of ​​the surface of the second TCO layer 8 forms the second hydrophobic layer 11. The first hydrophobic layer 10 and the second hydrophobic layer 11 can effectively improve the water, acid and sodium resistance of solar cells. Compared with traditional technologies, the present invention does not need to set an additional hydrophobic layer on the surface of the battery, which simplifies the process, reduces the number of equipment used, and reduces production costs. At the same time, it can also effectively avoid the problem of increased resistance of the grid lines and welding strips after the components are made due to the hydrophobic layer attached to the grid line surface.

[0103] Specifically, the first grid line paste is printed on the surface of the first TCO layer 4 and the second grid line paste is printed on the surface of the second TCO layer 8 by screen printing process, and then sintered to form the first grid line layer 5, the second grid line layer 9 and the hydrophobic layer 10. In this way, the printing accuracy is better and the efficiency is higher; wherein the sintering temperature is 150℃-200℃.

[0104] In addition, the present invention further provides a photovoltaic module, which includes the solar cell as described in any one of the above items.

[0105] Hereinafter, solar cells and preparation methods thereof, grid line slurries and photovoltaic modules will be further described by the following specific examples. However, it will be appreciated by those skilled in the art that the following examples are only used to illustrate the present invention and should not be considered as limiting the scope of the present invention. In the embodiments, if specific conditions are not specified, the conditions are carried out according to normal conditions or manufacturer recommendations. If the manufacturer is not specified for the reagents or instruments used, they are all conventional products that can be obtained commercially.

[0106] Example 1

[0107] The silicon wafer is placed in a 3% concentration, 60°C KOH solution to react for 10 minutes, and a pyramid light-trapping structure is formed on the surface of the silicon wafer through the anisotropic etching mechanism of alkali on silicon; then the surface of the silicon wafer is cleaned using an RCA cleaning process to obtain a velvety silicon wafer with a pyramid light-trapping structure formed on both sides.

[0108] The chemical vapor deposition (CVD) method is used to passivate and dope both sides of the silicon wafer after texturing, so that the front side of the silicon wafer is sequentially deposited to form a first intrinsic amorphous silicon layer with a thickness of 5nm and a first doped amorphous silicon layer with a thickness of 15nm, and the back side of the silicon wafer is sequentially deposited to form a second intrinsic amorphous silicon layer with a thickness of 5nm and a second doped amorphous silicon layer with a thickness of 12nm.

[0109] A first indium tin oxide sublayer and a second indium tin oxide sublayer are sequentially deposited on the surface of the first doped amorphous silicon layer by a physical vapor deposition (PVD) method, wherein the grain sizes of the first indium tin oxide sublayer and the second indium tin oxide sublayer are different and the grain boundaries are dislocated, the mass fraction of oxygen in the first indium tin oxide sublayer is 2%, the mass fraction of oxygen in the second indium tin oxide sublayer is 4%, the thickness of the first indium tin oxide sublayer is 20 nm, and the thickness of the second indium tin oxide sublayer is 60 nm.

[0110] A second indium tin oxide layer with a thickness of 80 nm is deposited on the surface of the second doped amorphous silicon layer by using a physical vapor deposition (PVD) method.

[0111] A first grid line paste is screen-printed on the surface of the first indium tin oxide layer by a screen printing process, and a second grid line paste is screen-printed on the surface of the second indium tin oxide layer, and then sintered at 200° C. to form a first grid line layer with a thickness of 10 μm, a second grid line layer with a thickness of 10 nm, and a second hydrophobic layer with a thickness of 0.8 nm, to obtain a solar cell, wherein the first grid line paste is an ordinary pure silver paste, the silver paste includes silver powder, and the mass fraction of the silver powder in the silver paste is 92%, the number of auxiliary grid lines in the first grid line layer is 50, and the width of the auxiliary grid line is 3 0μm, the second grid line paste includes silver powder, epoxy resin with a polymerization degree of 4 and diethylene glycol butyl ether acetate (viscosity of 3.5mPa.s, boiling point of 240°C, and volatilization rate of 0.03kg / h), the mass fraction of silver powder in the second grid line paste is 90%, the mass fraction of the epoxy resin with a polymerization degree of 4 in the second grid line paste is 3%, the mass fraction of diethylene glycol butyl ether acetate in the second grid line paste is 3%, the number of secondary grid lines in the second grid line layer is 180, and the width of the secondary grid line is 25μm.

[0112] Example 2

[0113] Compared with Example 1, Example 2 differs only in that, in the second grid line paste, polyurethane is used instead of the epoxy resin containing a degree of polymerization of 4, ethylene glycol butyl ether (viscosity of 1.34 mPa.s, boiling point of 171°C, volatilization rate of 0.012 kg / h) replaces diethylene glycol butyl ether acetate, the mass fraction of silver powder in the second grid line paste is 90%, the mass fraction of the polyurethane in the second grid line paste is 3%, the mass fraction of the ethylene glycol butyl ether in the second grid line paste is 2%, the number of secondary grid lines in the second grid line layer is 150, the width of the secondary grid line is 30 μm, and other conditions are the same, thereby obtaining a solar cell.

[0114] Example 3

[0115] Compared with Example 1, Example 3 differs only in that, in the second grid line paste, heptane is used to replace the epoxy resin containing a degree of polymerization of 4, dimethyl oxalate (viscosity of 1.39 mPa.s, boiling point of 163.5°C, volatilization rate of 0.013 kg / h) replaces diethylene glycol butyl ether acetate, the mass fraction of silver powder in the second grid line paste is 90%, the mass fraction of heptane in the second grid line paste is 3%, the mass fraction of dimethyl oxalate in the second grid line paste is 3%, the number of secondary grid lines in the second grid line layer is 200, the width of the secondary grid line is 22.5 μm, and other conditions are the same, thereby obtaining a solar cell.

[0116] Example 4

[0117] The only difference between Example 4 and Example 1 is that the mass fraction of oxygen in the first indium tin oxide sublayer is 4%, the mass fraction of oxygen in the second indium tin oxide sublayer is 2%, the thickness of the first indium tin oxide sublayer is 60 nm, the thickness of the second indium tin oxide sublayer is 20 nm, and the other conditions are the same to obtain a solar cell.

[0118] Example 5

[0119] The only difference between Example 5 and Example 1 is that the mass fraction of oxygen in the first indium tin oxide sublayer and the mass fraction of oxygen in the second indium tin oxide sublayer are both 3%, the thickness of the first indium tin oxide sublayer and the thickness of the second indium tin oxide sublayer are both 40 nm, and the other conditions are the same, thereby obtaining a solar cell.

[0120] Example 6

[0121] Compared with Example 1, Example 6 differs only in that a first indium tin oxide sublayer, a second indium tin oxide sublayer and a third indium tin oxide sublayer are sequentially deposited on the surface of the first doped amorphous silicon layer by a physical vapor deposition (PVD) method, the first indium tin oxide sublayer and the second indium tin oxide sublayer have different grain sizes and grain boundaries are dislocated, the second indium tin oxide sublayer and the third indium tin oxide sublayer have different grain sizes and grain boundaries are dislocated, wherein the mass fraction of oxygen in the first indium tin oxide sublayer is 1%, the mass fraction of oxygen in the second indium tin oxide sublayer is 5%, the mass fraction of oxygen in the third indium tin oxide sublayer is 3%, the thickness of the first indium tin oxide sublayer is 10 nm, the thickness of the second indium tin oxide sublayer is 40 nm, the thickness of the third indium tin oxide sublayer is 30 nm, and the other conditions are the same to obtain a solar cell.

[0122] Example 7

[0123] Compared with Example 1, Example 7 differs only in that, in the step of sequentially depositing a first indium tin oxide sub-layer and a second indium tin oxide sub-layer on the surface of the first doped amorphous silicon layer by physical vapor deposition (PVD), a physical vapor deposition (PVD) method is used to deposit an indium tin oxide layer on the surface of the first doped amorphous silicon layer, and then a physical vapor deposition (PVD) method is continued to be used to deposit an aluminum zinc oxide layer on the surface of the indium tin oxide layer, wherein the mass fraction of oxygen element in the indium tin oxide layer is 3%, the mass fraction of oxygen element in the aluminum zinc oxide layer is 3%, the thickness of the indium tin oxide layer is 40 nm, the thickness of the aluminum zinc oxide layer is 40 nm, and the other conditions are the same, thereby obtaining a solar cell.

[0124] Example 8

[0125] The only difference between Example 8 and Example 1 is that the number of auxiliary grid lines in the second grid line layer is 130, the width of the auxiliary grid lines is 34.6 μm, and the other conditions are the same to obtain a solar cell.

[0126] Example 9

[0127] Compared with Example 1, Example 9 differs only in that the first grid line paste includes silver powder, epoxy resin with a polymerization degree of 4 and diethylene glycol butyl ether acetate (viscosity of 3.5 mPa.s, boiling point of 240°C, volatilization rate of 0.03 kg / h), the mass fraction of silver powder in the second grid line paste is 90%, the mass fraction of the epoxy resin with a polymerization degree of 4 in the first grid line paste is 3%, the mass fraction of diethylene glycol butyl ether acetate in the first grid line paste is 3%, the number of secondary grid lines in the first grid line layer is 50, the width of the secondary grid line is 30 μm, and other conditions are the same, thereby obtaining a solar cell, wherein the thickness of the first hydrophobic layer is 1 nm.

[0128] Example 10

[0129] The only difference between Example 10 and Example 1 is that only one indium tin oxide layer is deposited on the surface of the first doped amorphous silicon layer by physical vapor deposition (PVD), wherein the mass fraction of oxygen element in the indium tin oxide layer is 3%, the thickness of the indium tin oxide layer is 80 nm, and other conditions are the same, thereby obtaining a solar cell.

[0130] Embodiment 11

[0131] The only difference between Example 11 and Example 1 is that the grain sizes of the first indium tin oxide sub-layer and the second indium tin oxide sub-layer are the same and there is no grain boundary dislocation. The other conditions are the same to obtain a solar cell.

[0132] Comparative Example 1

[0133] The only difference between Comparative Example 1 and Example 1 is that the second grid line paste does not contain hydrophobic small molecules, that is, the second grid line paste does not contain epoxy resin with a polymerization degree of 4, and other conditions are the same to obtain a solar cell.

[0134] Comparative Example 2

[0135] The only difference between Comparative Example 2 and Example 1 is that the second grid line slurry does not contain a diluent, that is, the second grid line slurry does not contain diethylene glycol butyl ether acetate, and other conditions are the same to obtain a solar cell.

[0136] Comparative Example 3

[0137] Comparative Example 3 is compared with Example 1, except that a first grid line paste is screen-printed on the surface of the first indium tin oxide layer, and a second grid line paste is screen-printed on the surface of the second indium tin oxide layer by a screen printing process, and then sintered at 200°C to form a first grid line layer with a thickness of 10 μm and a second grid line layer with a thickness of 10 nm, to obtain a prefabricated solar cell, wherein the first grid line paste and the first grid line paste are both ordinary pure silver pastes, that is, the first grid line paste and the second grid line paste both include silver powder, and the mass fraction of the silver powder in the silver paste is 90%, the number of secondary grid lines in the first grid line layer is 50, and the width of the secondary grid line is 30 μm, the number of secondary grid lines in the second grid line layer is 180, and the width of the secondary grid line is 25 μm; finally, a hydrophobic solution is applied to both sides of the prefabricated solar cell, and a hydrophobic isolation layer is formed by heat treatment to obtain a solar cell with a hydrophobic isolation layer on both sides, wherein the hydrophobic solution is obtained by mixing polyurethane and ethanol, and the mass fraction of polyurethane in the hydrophobic solution is 40%.

[0138] The solar cells prepared in Examples 1-11 and Comparative Examples 1-3 were respectively subjected to performance tests, and the test results are shown in Table 1, wherein the test method is as follows: first, 100 samples were made for each Example and each Comparative Example, and then the short-circuit current, open-circuit voltage, resistance, fill factor (FF), and photoelectric conversion efficiency of the solar cells of the above-mentioned respective samples were tested using a Zhongsen IV testing machine, and the average value was finally taken; at the same time, a HAST box was used to conduct a high-temperature, high-pressure, and high-humidity accelerated aging test, and a mixed solution of acetic acid and sodium chloride with a mass fraction of 10% was used to evaluate the acid resistance stability of each solar cell; after the HAST and acetic acid and sodium chloride experiments, an IV test was conducted to compare the difference in photoelectric conversion efficiency before and after, and the average value was finally taken.

[0139] Table 1

[0140]

[0141]

[0142] It can be seen from Table 1 that, compared with Example 1 and Examples 10-11, the present invention, by arranging the first TCO layer to include at least N TCO sublayers, N≥2, the grain sizes of adjacent TCO sublayers are different and the grain boundaries are staggered, so that the first TCO layer can form a multi-layer grain boundary dislocation structure, effectively preventing water, acid and sodium from penetrating through the grain boundaries of the TCO layer into the first doped amorphous silicon layer, effectively improving the water, acid and sodium resistance of the front side of the solar cell, and at the same time, more efficiently collecting carriers, thereby improving the photoelectric conversion efficiency of the solar cell.

[0143] Compared to Example 1 and Comparative Examples 1-2, the present invention provides a second grid line slurry containing hydrophobic small molecules and a diluent. In the process of forming the second grid line layer by screen printing, the hydrophobic small molecules form the hydrophobic layer on the surface of the second TCO layer under the action of the diluent. The hydrophobic layer can effectively improve the water, acid and sodium resistance of the solar cell, thereby improving the photoelectric conversion efficiency of the solar cell. Compared to Example 1 and Comparative Example 3, the hydrophobic layer formed in the present invention does not substantially increase the square resistance of the second TCO layer and the resistance of the second grid line layer, so that the electrode can collect carriers more efficiently, thereby improving the photoelectric conversion efficiency of the solar cell.

[0144] At the same time, compared with Example 1 and Examples 4-7, the carrier collection and transmittance can be better changed by adjusting the oxygen content and thickness in different TCO sublayers; compared with Example 1 and Example 8, it can be seen that by controlling the number of auxiliary grid lines in the second grid line layer, the carrier collection can be effectively improved, and the photoelectric conversion efficiency of the solar cell can be further improved.

[0145] In addition, the solar cell prepared in Example 1 was subjected to a limit stability test. Figure 6 It can be seen that due to the formation of the hydrophobic layer near the second gate line layer, the second TCO layer near the second gate line is not affected, while the second TCO layer farther away from the second gate line falls off. Therefore, the hydrophobic layer of the present invention can effectively improve the water, acid and sodium resistance of the second TCO layer.

[0146] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0147] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A solar cell, comprising a silicon wafer, wherein a first intrinsic amorphous silicon layer, a first doped amorphous silicon layer, a first TCO layer and a first gate line layer are sequentially stacked on the front side of the silicon wafer, and a second intrinsic amorphous silicon layer, a second doped amorphous silicon layer, a second TCO layer and a second gate line layer are sequentially stacked on the back side of the silicon wafer, characterized in that: The first TCO layer includes a first area and a second area, the first gate line layer is arranged in the first area, the second area is provided with a first hydrophobic layer, and the first hydrophobic layer at least wraps around the edges of the first gate line layer; and / or, the second TCO layer includes a third area and a fourth area, the second gate line layer is arranged in the third area, the fourth area is provided with a second hydrophobic layer, and the second hydrophobic layer at least wraps around the edges of the second gate line layer.

2. The solar cell according to claim 1, characterized in that The second hydrophobic layer covers the fourth area; And / or, the first hydrophobic layer covers the second area.

3. The solar cell according to claim 1, characterized in that The number of auxiliary gate lines in the second gate line layer is greater than the number of auxiliary gate lines in the first gate line layer.

4. The solar cell according to claim 3, characterized in that: The number of auxiliary gate lines in the second gate line layer is greater than or equal to 150; And / or, the width of the secondary gate lines in the second gate line layer is less than or equal to 30 μm.

5. The solar cell according to any one of claims 1 to 4, characterized in that: The first TCO layer includes at least N TCO sub-layers, where N≥2, wherein the grain sizes of adjacent TCO sub-layers are different and the grain boundaries are staggered.

6. The solar cell according to claim 5, characterized in that: The mass fractions of oxygen elements in adjacent TCO sublayers are different; And / or, the thicknesses of adjacent TCO sub-layers are different.

7. The solar cell according to claim 6, characterized in that: In a direction from the first doped amorphous silicon layer to the first gate line layer, the mass fraction of oxygen element in the TCO sublayer increases layer by layer; Alternatively, in a direction from the first doped amorphous silicon layer to the first gate line layer, the mass fraction of oxygen in the TCO sublayer decreases layer by layer; Alternatively, when N≥3, in the direction from the first doped amorphous silicon layer to the first gate line layer, the mass fractions of oxygen in the first TCO sublayer and the Nth TCO sublayer are both smaller than the mass fractions of oxygen in the second TCO sublayer to the N-1th TCO sublayer.

8. The solar cell according to claim 7, characterized in that: In a direction from the first doped amorphous silicon layer to the first gate line layer, the thickness of the TCO sublayer increases layer by layer; Alternatively, in a direction from the first doped amorphous silicon layer to the first gate line layer, the thickness of the TCO sublayer decreases layer by layer; Alternatively, when N≥3, in the direction from the first doped amorphous silicon layer to the first gate line layer, the thickness of the first TCO sublayer and the Nth TCO sublayer are both smaller than the thickness of the second TCO sublayer to the N-1th TCO sublayer.

9. The solar cell according to claim 6, characterized in that: The first TCO layer includes a first TCO sublayer and a second TCO sublayer, the mass fraction of oxygen in the first TCO sublayer is 1%-4%, and the mass fraction of oxygen in the second TCO sublayer is 2%-6%; And / or, the first TCO layer includes a first TCO sublayer and a second TCO sublayer, the first TCO sublayer has a thickness of 5 nm-20 nm, and the second TCO sublayer has a thickness of 50 nm-70 nm.

10. A gate line paste, characterized in that: The gate line paste includes conductive metal powder and additives, and the additives include hydrophobic small molecules and diluents.

11. The gate line paste according to claim 10, characterized in that: The diluent satisfies at least one of the following conditions: (1) The viscosity of the diluent is 1mPa.s-30Pa.s; (2) The mass fraction of the diluent in the gate line slurry is 1%-5%; (3) The boiling point of the diluent is greater than 120°C, and the volatilization rate at room temperature is less than or equal to 0.1 kg / h.

12. The gate line paste according to claim 11, characterized in that: The diluent is selected from at least one of diethylene glycol butyl ether acetate, ethylene glycol ethyl ether acetate, ethylene glycol butyl ether, diethylene glycol methyl ether, glycerol diacetate, dimethyl oxalate, isopentyl butyrate, ethylene glycol diacetate, dimethyl fumarate or dimethyl phosphate.

13. The gate line paste according to claim 10, characterized in that: The hydrophobic small molecule satisfies at least one of the following conditions: (1) The mass fraction of the hydrophobic small molecules in the gate line slurry is 3%-5%; (2) The hydrophobic small molecule is selected from at least one of epoxy resins, polyurethanes, alkanes or oils with a degree of polymerization less than 5.

14. A method for preparing a solar cell according to any one of claims 1 to 9, characterized in that: The following steps are involved: The silicon wafer is textured, and then a first intrinsic amorphous silicon layer, a first doped amorphous silicon layer and a first TCO layer are sequentially formed on the front side of the silicon wafer; forming a second intrinsic amorphous silicon layer, a second doped amorphous silicon layer and a second TCO layer in sequence on the back side of the silicon wafer; A first gridline paste is placed on the surface of the first TCO layer, and a second gridline paste is placed on the surface of the second TCO layer, and a first gridline layer, a second gridline layer, a first hydrophobic layer and / or a second hydrophobic layer are formed through sintering to obtain a solar cell, wherein the first gridline paste is the gridline paste described in any one of claims 10 to 13, and / or the second gridline paste is the gridline paste described in any one of claims 10 to 13.

15. The method for preparing a solar cell according to claim 14, characterized in that: The preparation method of the first TCO layer includes: sequentially forming at least N TCO sublayers on the surface of the first doped amorphous silicon layer, N≥2, and controlling the grain sizes of adjacent TCO sublayers to be different and the grain boundaries to be staggered, so as to obtain the first TCO layer.

16. A photovoltaic module, characterized in that: The photovoltaic module comprises the solar cell according to any one of claims 1 to 9.

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