Display device and method for manufacturing display device

Abstract

The invention relates to a display device and a method for manufacturing the same. The display device includes: a base layer; the insulating layer is arranged on the base body layer; a pixel defining film disposed on the insulating layer and having a pixel opening; a light emitting element disposed on the insulating layer; and an inorganic layer disposed on the insulating layer and including an edge disposed inward of an edge of the pixel defining film. The light-emitting element includes: a first electrode; a second electrode; a light emitting layer including quantum dots and disposed between the first electrode and the second electrode; a hole transport region; and an electron transport region including a metal oxide, spaced apart from the hole transport region, and disposed between the first electrode and the second electrode.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefits of Korean Patent Application No. 10-2023-0142268 filed on October 23, 2023 in the Korean Intellectual Property Office (KIPO), the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure herein relates to a display device including a quantum dot light emitting element and a method for manufacturing the display device. Background Art

[0004] A light-emitting element has the property of converting electrical energy into light energy. Among light-emitting elements, a quantum dot light-emitting element including quantum dots in a light-emitting layer has high color purity and high luminous efficiency and can display a variety of colors. In a light-emitting element, holes move to the light-emitting layer via a hole transport region, and electrons move to the light-emitting layer via an electron transport region. Research is being conducted on efficient injection and transport of electrons to improve light efficiency in quantum dot light-emitting elements. Summary of the invention

[0005] The present disclosure provides a display device exhibiting excellent display efficiency.

[0006] The present disclosure also provides a method for manufacturing a display device (or a method of manufacturing a display device), which exhibits excellent manufacturing efficiency.

[0007] According to an embodiment of the present disclosure, a display device may include: a substrate layer; an insulating layer disposed on the substrate layer; a pixel defining film disposed on the insulating layer and having a pixel opening; a light-emitting element disposed on the insulating layer; and an inorganic layer disposed on the insulating layer and including an edge disposed inwardly of an edge of the pixel defining film and overlapping the pixel defining film in a plan view. The light-emitting element may include: a first electrode exposed through the pixel opening; a second electrode disposed on the first electrode; a light-emitting layer including quantum dots and disposed between the first electrode and the second electrode; a hole transport region disposed between the first electrode and the second electrode; and an electron transport region including a metal oxide, the electron transport region being spaced apart from the hole transport region, the light-emitting layer being interposed between the electron transport region and the hole transport region, and the electron transport region being disposed between the first electrode and the second electrode.

[0008] In an embodiment, the inorganic layer may include at least one of amorphous silicon, silicon nitride, silicon oxide, and silicon oxynitride.

[0009] In an embodiment, the inorganic layer may be in contact with the electron transport region in a direction perpendicular to a thickness direction of the display device.

[0010] In an embodiment, the inorganic layer may not overlap the pixel opening in a plan view.

[0011] In an embodiment, the inorganic layer may cover an edge of the first electrode.

[0012] In embodiments, the inorganic layer may be in contact with the insulating layer.

[0013] In an embodiment, the inorganic opening may be defined in the inorganic layer, and in a plan view, the inorganic opening may overlap with the pixel opening.

[0014] In an embodiment, the first electrode may be spaced apart from the pixel defining film, with the inorganic layer interposed between the first electrode and the pixel defining film.

[0015] In an embodiment, the pixel defining film may be spaced apart from the insulating layer, with the inorganic layer interposed between the pixel defining film and the insulating layer.

[0016] In an embodiment, the insulating layer may include: a first region overlapping the pixel defining film in a plan view and having a first thickness; and a second region overlapping the pixel opening in a plan view and having a second thickness less than the first thickness.

[0017] In an embodiment, the inorganic layer may completely overlap the first region in a plan view.

[0018] In an embodiment, the metal oxide may include SnO, SnO 2 、CuGaO 2 , Ga 2 O 3 , Cu 2 O、SrCu 2 O 2 、SrTiO 3 、CuAlO 2 、 2 O 5 、NiO、BaSnO 3 、MoO 3 and TiO 2 At least one of and a compound represented by the following formula M-1.

[0019] [Formula M-1]

[0020] Zn q Me (1-q) O

[0021] In an embodiment, in Formula M-1, q can be a rational number between 0 and 0.5, and Me can be Li, Be, Na, Mg, Al, K, Ca, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Ga, Ge, Rb, Sr, Zr, Nb, Mo, Ru, Pd, Ag, In, Sn(II), Sn(IV), Sb or Ba.

[0022] According to an embodiment of the present disclosure, a method for manufacturing a display device may include: preparing a base layer; forming an insulating layer on the base layer; forming a first electrode on the insulating layer; forming a preliminary inorganic layer on the first electrode; forming a preliminary pixel defining film on the preliminary inorganic layer by using a first halftone mask; forming an inorganic layer and a pixel defining film having a pixel opening by removing a first portion of the preliminary inorganic layer and a second portion of the preliminary pixel defining film overlapping with the first portion in a plan view; forming a functional layer on the first electrode exposed by the pixel opening; and forming a second electrode on the functional layer. The formation of the functional layer may include: forming a light-emitting layer by providing a first composition including quantum dots; forming a hole transport region; and forming an electron transport region by providing a second composition including a metal oxide. One of the formation of the hole transport region and the formation of the electron transport region may be performed before the formation of the light-emitting layer, and the other of the formation of the hole transport region and the formation of the electron transport region may be performed after the formation of the light-emitting layer.

[0023] In an embodiment, in the forming of the inorganic layer and the forming of the pixel defining film, an edge of the inorganic layer may be disposed inwardly of an edge of the pixel defining film.

[0024] In embodiments, the first portion of the preliminary inorganic layer and the second portion of the preliminary pixel defining film may be removed by an ashing process.

[0025] In an embodiment, by using a second half tone mask, the insulating layer may be formed to include a first region having a first thickness and a second region having a second thickness less than the first thickness.

[0026] In an embodiment, in a plan view, each of the first portion of the preliminary inorganic layer and the second portion of the preliminary pixel defining film may overlap the second region of the insulating layer.

[0027] In an embodiment, the inorganic layer may include at least one of amorphous silicon, silicon nitride, silicon oxide, and silicon oxynitride.

[0028] In an embodiment, each of the first composition and the second composition may be provided by an inkjet printing method or a dispensing method.

[0029] In an embodiment, the method of manufacturing a display device may further include performing plasma treatment by supplying a fluorine-containing gas to the pixel defining film before forming the light emitting layer, the hole transport region, and the electron transport region. The fluorine-containing gas may include CF 4 , C 3 F 6 , C 4 F 8 , SF 6 , CHF 3 , C 5 F 8 , CH 2 F 2 , C 2 HF 5 , CH 3 F and NF 3 At least one of . BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated into and constitute a part of this specification. The accompanying drawings illustrate embodiments of the present disclosure and together with the specification, are used to explain the principles of the present disclosure. In the accompanying drawings:

[0031] Figure 1 is a perspective view showing a display device according to an embodiment of the present disclosure;

[0032] Figure 2 is shown corresponding to Figure 1 A schematic cross-sectional view of a portion along the center line II';

[0033] Figure 3 is a plan view showing a display device according to an embodiment of the present disclosure;

[0034] Figure 4 is shown corresponding to Figure 3 A schematic cross-sectional view of a portion along the center line II-II';

[0035] Figure 5A yes Figure 4 An enlarged schematic cross-sectional view of the middle area AA';

[0036] Figure 5B is shown as Figure 4 A schematic cross-sectional view of a region AA′-1 of another embodiment of a region AA′;

[0037] Figure 6 yes Figure 4 An enlarged schematic cross-sectional view of the middle region BB';

[0038] Figure 7 is a schematic cross-sectional view showing a display device according to another embodiment of the present disclosure;

[0039] Figure 8 is a flowchart illustrating a method of manufacturing a display device according to an embodiment of the present disclosure;

[0040] Fig. 9A is a flowchart illustrating a method of manufacturing a display device according to an embodiment of the present disclosure;

[0041] Fig. 9B is a flowchart illustrating a method of manufacturing a display device according to an embodiment of the present disclosure;

[0042] Fig.10 Schematically illustrating steps of manufacturing a display device according to an embodiment of the present disclosure;

[0043] Fig.11 Schematically illustrating steps of manufacturing a display device according to an embodiment of the present disclosure;

[0044] Fig.12 Schematically illustrating steps of manufacturing a display device according to an embodiment of the present disclosure;

[0045] Fig.13 Schematically illustrating steps of manufacturing a display device according to an embodiment of the present disclosure;

[0046] Fig.14 Schematically illustrating steps of manufacturing a display device according to an embodiment of the present disclosure;

[0047] Fig.15 Schematically illustrating steps of manufacturing a display device according to an embodiment of the present disclosure;

[0048] Fig.16 Schematically illustrating steps of manufacturing a display device according to an embodiment of the present disclosure;

[0049] Fig.17 schematically illustrating steps of manufacturing a display device according to an embodiment of the present disclosure; and

[0050] Fig.18 The steps of manufacturing a display device according to an embodiment of the present disclosure are schematically shown. DETAILED DESCRIPTION

[0051] In the present disclosure, various modifications may be made, various forms may be used, and specific embodiments will be shown in the drawings and described in detail herein. However, this is not intended to limit the present disclosure to the specific forms disclosed, and it will be understood that all changes, equivalents or substitutes falling within the spirit and technical scope of the present disclosure shall be included.

[0052] When an element (such as a layer) is referred to as being "on" another element or layer, "connected to" or "coupled to" another element or layer, the element may be directly on, directly connected to or directly coupled to the other element or layer, or there may be intervening elements or layers. However, when an element or layer is referred to as being "directly on" another element or layer, "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. For this purpose, the term "connected" may refer to a physical connection, an electrical connection, and / or a fluid connection with or without intervening elements. In addition, when an element is referred to as being "in contact with" or "contacting" another element, etc., the element may be "in electrical contact with" or "in physical contact with" the other element; or "indirect contact with" or "direct contact with" the other element.

[0053] The same reference numerals always refer to the same elements. In addition, in the accompanying drawings, the thickness, proportion and size of the elements are exaggerated for the effective description of the technical content. As used herein, the term "and / or" includes any and all combinations that can define the relevant configurations.

[0054] It will be understood that although the terms "first" and "second" etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the scope of the present disclosure, a first element may be referred to as a second element. Similarly, a second element may also be referred to as a first element. Unless otherwise specified, terms in the singular include plural forms.

[0055] For descriptive purposes, spatially relative terms such as "under," "below," "below," "below," "above," "upper," "on," "higher," and "side" (e.g., as in "sidewall") may be used herein and thereby describe the relationship of one element to another element(s) as shown in the accompanying drawings. In addition to the orientations depicted in the accompanying drawings, the spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture. For example, if the device in the accompanying drawings is flipped, an element described as "under" or "below" other elements or features would subsequently be oriented "above" the other elements or features. Thus, the example term "under" can encompass both above and below orientations. Furthermore, the device may be oriented in other ways (e.g., rotated 90 degrees or at other orientations), and therefore, the spatially relative terms used herein are interpreted accordingly.

[0056] The terms used herein are for the purpose of describing specific embodiments and are not intended to be limiting. As used herein, unless the context clearly indicates otherwise, the singular forms "one / one", "a kind of" and "the" are also intended to include the plural forms. In addition, when used in this specification, the terms "comprises, comprising" and / or "includes, including" illustrate the presence of stated features, integers, steps, operations, elements, components and / or groups thereof, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.

[0057] As used herein, "about" or "approximately" includes the stated value and means within an acceptable range of deviation of the particular value determined by one of ordinary skill in the art, taking into account the measurement in question and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the stated value.

[0058] In the specification and claims, for the purpose of its meaning and interpretation, the phrase "at least one of..." is intended to include the meaning of "at least one selected from the group of...". For example, "at least one of A and B" may be understood to mean "A, B, or A and B". In the specification and claims, the term "and / or" is intended to include any combination of the terms "and" and "or" for the purpose of its meaning and interpretation. For example, "A and / or B" may be understood to mean "A, B, or A and B". The terms "and" and "or" may be used in a conjunction or disjunction sense and may be understood to be equivalent to "and / or".

[0059] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will be further understood that, unless explicitly defined as such herein, terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and will not be interpreted in an idealized or overly formalized sense.

[0060] Hereinafter, a display device according to an embodiment of the present disclosure will be described with reference to the accompanying drawings. Figure 1 is a perspective view showing a display device DD according to an embodiment of the present disclosure.

[0061] Reference Figure 1, the display device DD according to an embodiment of the present disclosure can be activated according to an electrical signal. For example, the display device DD can be a large device such as a television, a monitor, or an external billboard. The display device DD can be a small or medium-sized device such as a personal computer (e.g., a notebook computer, a tablet computer), a personal digital terminal, a car navigation unit, a game console, a smart phone, or a camera. However, the present disclosure is not limited thereto, and the display device DD can be applied to other types of display devices without departing from the concept of the present disclosure.

[0062] The display device DD may display an image (or video image) through a display surface DD-IS. The display surface DD-IS may be parallel to a plane defined by the first direction axis DR1 and the second direction axis DR2. The display surface DD-IS may include a display area DA and a non-display area NDA.

[0063] The pixel PX may be disposed in the display area DA and may not be disposed in the non-display area NDA. The non-display area NDA may be defined along the edge of the display surface DD-IS. In a plan view, the non-display area NDA may surround the display area DA. However, the present disclosure is not limited thereto, and the non-display area NDA may be omitted, or the non-display area NDA may be disposed only on one side of the display area DA.

[0064] although Figure 1 The display device DD is shown to have a flat display surface DD-IS, but the present disclosure is not limited thereto. The display device DD may include a curved display surface or a three-dimensional display surface. The three-dimensional display surface may include a plurality of display areas facing different directions from each other.

[0065] Figure 1 The following drawings illustrate the first direction axis DR1 to the third direction axis DR3, and the first direction axis DR1, the second direction axis DR2, and the third direction axis DR3 described herein are relative concepts and can therefore be converted into other directions. The directions represented by the first direction axis DR1, the second direction axis DR2, and the third direction axis DR3 can be described as the first direction DR1, the second direction DR2, and the third direction DR3, and the same reference numerals can be used for these directions. In this specification, the first direction axis DR1 and the second direction axis DR2 can be perpendicular to each other, and the third direction axis DR3 can be a direction orthogonal to the plane defined by the first direction axis DR1 and the second direction axis DR2.

[0066] In this specification, a plane refers to a plane defined by the first direction axis DR1 and the second direction axis DR2, and a cross section refers to a plane perpendicular to the plane defined by the first direction axis DR1 and the second direction axis DR2 and parallel to the third direction axis DR3. The thickness direction of the display device DD may be parallel to the third direction DR3, which is a direction orthogonal to the plane defined by the first direction DR1 and the second direction DR2. In this document, the third direction DR3 may also be referred to as the thickness direction DR3.

[0067] In the present specification, the upper (or front) surface and the lower (or rear) surface of the components constituting the display device DD may be defined based on the third direction DR3. For example, among the two surfaces of a component facing each other based on the third direction DR3, the surface adjacent to the display surface DD-IS may be defined as the front surface (or upper surface), and the surface spaced apart from the display surface DD-IS may be defined as the rear surface (or lower surface), and the front surface (or upper surface) is between the rear surface (or lower surface) and the display surface DD-IS. In the present specification, the upper portion and the lower portion (or side) may be defined based on the third direction DR3, and the upper portion (or upper side) may be defined in the direction toward the display surface DD-IS and the lower portion (or lower side) may be defined in the direction away from the display surface DD-IS.

[0068] In this specification, the expression “a component is “directly disposed / formed” on another component” means that a third component is not disposed therebetween. The expression “a component is “directly disposed / formed” on another component” means that a component is in contact with another component.

[0069] Figure 2 is shown corresponding to Figure 1 Schematic cross-sectional view of a portion along the center line II'. Figure 2 may be a schematic cross-sectional view of a display device DD according to an embodiment of the present disclosure.

[0070] The display device DD may include a display panel DP and an optical layer PP disposed on the display panel DP. The display panel DP may include a base layer BS, a circuit layer DP-CL disposed on the base layer BS, a display element layer DP-EL disposed on the circuit layer DP-CL, and an encapsulation layer TFE disposed on the display element layer DP-EL.

[0071] The display panel DP may be configured to generate an image. The display panel DP may be a light-emitting display panel. For example, the display panel DP may be a quantum dot light-emitting display panel including quantum dot light-emitting elements.

[0072] The base layer BS may be a member that provides a base surface on which the circuit layer DP-CL is disposed. The base layer BS may be a rigid base or a flexible base that can be bent, folded, or curled. The base layer BS may be a glass base, a metal base, a polymer base, or the like. However, the present disclosure is not limited thereto, and the base layer BS may be an inorganic base layer, an organic base layer, or a composite material base layer.

[0073] The circuit layer DP-CL may be disposed on the base layer BS. The circuit layer DP-CL may include an insulating layer, a semiconductor pattern, a conductive pattern, and a signal line. The insulating layer, the semiconductor layer, and the conductive layer may be formed on the base layer BS by coating or deposition, etc., and the insulating layer, the semiconductor layer, and the conductive layer may be selectively patterned by a plurality of photolithography processes. Thus, the semiconductor pattern, the conductive pattern, and the signal line included in the circuit layer DP-CL may be formed.

[0074] The display element layer DP-EL may be disposed on the circuit layer DP-CL. The display element layer DP-EL may include a pixel definition layer PDL (see FIG. Figure 4 ) and the first light emitting element ED-1, the second light emitting element ED-2 and the third light emitting element ED-3 (see Figure 4 ). For example, the display element layer DP-EL may include an organic light-emitting material, an inorganic light-emitting material, an organic-inorganic light-emitting material, a quantum dot, a quantum rod, a micro light-emitting diode (LED), or a nano-LED. In an embodiment of the present disclosure, the display element layer DP-EL may include a quantum dot.

[0075] The encapsulation layer TFE may protect the display element layer DP-EL from moisture, oxygen, and foreign matter (such as dust particles). The encapsulation layer TFE may include at least one inorganic film. The encapsulation layer TFE may include a structure in which an inorganic film, an organic film, and an inorganic film are sequentially stacked.

[0076] The optical layer PP may be disposed on the display panel DP and control light reflected from the display panel DP due to external light. The optical layer PP may include, for example, a polarizing layer or a color filter layer. Unlike what is shown in the drawings, the optical layer PP may be omitted.

[0077] Figure 3 is a plan view showing a display device DD according to an embodiment of the present disclosure. Figure 4 is shown corresponding to Figure 3 Schematic cross-sectional view of the portion along the center line II-II'. Figure 3 It may be a display area DA (see Figure 1 )’s floor plan. Figure 4 : may be a schematic cross-sectional view illustrating a display device DD according to an embodiment of the present disclosure.

[0078] Reference Figure 3 and Figure 4 , the display device DD may include a peripheral area NPXA and light-emitting areas PXA-B, PXA-G, and PXA-R. The light-emitting areas PXA-B, PXA-G, and PXA-R may be areas from which light generated by the light-emitting elements ED-1, ED-2, and ED-3 is emitted. The areas of the light-emitting areas PXA-B, PXA-G, and PXA-R may be different from each other, and the area may mean an area in a plan view.

[0079] The light emitting regions PXA-B, PXA-G, and PXA-R may be divided into a plurality of groups according to the colors of light generated from the light emitting elements ED-1, ED-2, and ED-3. Figure 3 and Figure 4 Schematically illustrating three light emitting regions PXA-B, PXA-G, and PXA-R emitting blue, green, and red light according to an embodiment. For example, a display device DD according to an embodiment of the present disclosure may include a blue light emitting region PXA-B, a green light emitting region PXA-G, and a red light emitting region PXA-R separated from each other.

[0080] The display panel DP may include a plurality of light emitting elements ED-1, ED-2, and ED-3 that emit light in different wavelength ranges. The light emitting elements ED-1, ED-2, and ED-3 may emit light of different colors. For example, the display panel DP may include a first light emitting element ED-1 that emits blue light, a second light emitting element ED-2 that emits green light, and a third light emitting element ED-3 that emits red light. However, the present disclosure is not limited thereto, and the first light emitting element ED-1, the second light emitting element ED-2, and the third light emitting element ED-3 may emit light in the same wavelength range, or at least one of the first light emitting element ED-1, the second light emitting element ED-2, and the third light emitting element ED-3 may emit light in a wavelength range different from the wavelength range of light emitted by the other light emitting elements.

[0081] exist Figure 3 and Figure 4 In the display device DD according to the embodiment of the present disclosure shown in FIG, according to the light emitting layers EML (see FIG. Figure 5ADepending on the color of light emitted by the first light emitting element ED-1 (e.g., blue light emitting area PXA-B, PXA-G, and PXA-R), the light emitting areas PXA-B, PXA-G, and PXA-R may have different areas. The blue light emitting area PXA-B of the first light emitting element ED-1 emitting blue light may have the largest area, and the green light emitting area PXA-G of the second light emitting element ED-2 emitting green light may have the smallest area. However, the present disclosure is not limited thereto, and the light emitting areas PXA-B, PXA-G, and PXA-R may emit light of colors other than blue light, green light, and red light. In another embodiment, the light emitting areas PXA-B, PXA-G, and PXA-R may have the same area, or may have different areas. Figure 3 The area ratios shown in are provided.

[0082] Each of the light emitting regions PXA-B, PXA-G, and PXA-R may be divided by a pixel defining film PDL. The peripheral region NPXA may be a region between adjacent light emitting regions PXA-B, PXA-G, and PXA-R and may correspond to the pixel defining film PDL. Each of the light emitting regions PXA-B, PXA-G, and PXA-R may correspond to a pixel PX (see Figure 1 ).

[0083] The pixel defining film PDL may define the light emitting regions PXA-B, PXA-G, and PXA-R. The light emitting regions PXA-B, PXA-G, and PXA-R and the peripheral region NPXA may be distinguished by the pixel defining film PDL.

[0084] The blue light emitting regions PXA-B and the red light emitting regions PXA-R may be alternately arranged on the first direction axis DR1 to form a first group PXG1. The green light emitting regions PXA-G may be arranged on the first direction axis DR1 to form a second group PXG2. The first group PXG1 may be disposed to be spaced apart from the second group PXG2 on the second direction axis DR2. Each of the first group PXG1 and the second group PXG2 may be provided in plurality. The first group PXG1 and the second group PXG2 may be alternately arranged on the second direction axis DR2.

[0085] The red light emitting region PXA-R may be spaced apart from the green light emitting region PXA-G on the fourth direction axis DR4. The blue light emitting region PXA-B may be spaced apart from the green light emitting region PXA-G on the fifth direction axis DR5. The fourth direction axis DR4 may be a direction between the first direction axis DR1 and the second direction axis DR2. The fifth direction axis DR5 may intersect with the fourth direction axis DR4 and be inclined relative to the second direction axis DR2.

[0086] The arrangement of the light emitting regions PXA-B, PXA-G, and PXA-R is not limited to Figure 3For example, among the light emitting regions PXA-B, PXA-G, and PXA-R, the blue light emitting regions PXA-B, the green light emitting regions PXA-G, and the red light emitting regions PXA-R may be sequentially and alternately arranged on the first direction axis DR1. The shapes of the light emitting regions PXA-B, PXA-G, and PXA-R in a plan view are not limited to the shapes shown and may have shapes different from the shapes shown.

[0087] exist Figure 4 In the embodiment, the base layer BS may include a single layer structure or a multi-layer structure. For example, the base layer BS may include a first synthetic resin layer, an intermediate layer having a multi-layer or single-layer structure, and a second synthetic resin layer stacked sequentially. The intermediate layer may also be referred to as a base barrier layer. The intermediate layer may include, but is not particularly limited to, silicon oxide (SiO x ) layer and an amorphous silicon (a-Si) layer disposed on the silicon oxide layer. For example, the intermediate layer may include at least one of a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, and an amorphous silicon layer.

[0088] Each of the first synthetic resin layer and the second synthetic resin layer may include a polyimide-based resin. Each of the first synthetic resin layer and the second synthetic resin layer may include at least one of an acrylate-based resin, a methacrylate-based resin, a polyisoprene-based resin, a vinyl resin, an epoxy-based resin, a polyurethane-based resin, a cellulose-based resin, a siloxane-based resin, a polyamide-based resin, and a perylene-based resin. In this specification, a "~~"-based resin means a functional group including "~~".

[0089] The circuit layer DP-CL may include: a lower buffer layer BF disposed on the base layer BS; a first insulating layer 10 to a sixth insulating layer 60 disposed on the lower buffer layer BF; and a plurality of transistors TR. However, the stacking structure of the circuit layer DP-CL is not limited to Figure 4 and according to the pixel PX (see Figure 1 ) configuration and the process of the circuit layer DP-CL, the stacking structure of the circuit layer DP-CL can be partially changed.

[0090] The lower buffer layer BF may improve the bonding strength between the base layer BS and the semiconductor pattern or the conductive pattern disposed on the lower buffer layer BF. The transistor TR may be disposed on the lower buffer layer BF. The transistor TR may be formed from a semiconductor pattern. The semiconductor pattern of the transistor TR may include polycrystalline silicon, amorphous silicon, or metal oxide, and may be applied without limitation and the present disclosure is not limited to one embodiment, as long as the material has semiconductor characteristics.

[0091] The transistor TR may include an active region AT, a source ST, a drain DT, and a gate GT. The active region AT, the source ST, and the drain DT may be disposed on the lower buffer layer BF. The active region AT, the source ST, and the drain DT may be divided according to the doping concentration or conductivity of the semiconductor pattern. The region of the semiconductor pattern doped with a dopant or in which the metal oxide is reduced may have a high conductivity and may be substantially used as a source electrode and a drain electrode of the transistor TR. The region with high conductivity in the semiconductor pattern may correspond to the source ST and the drain DT of the transistor TR. The region of the semiconductor pattern that is not doped or doped at a low concentration or has low conductivity due to the unreduced metal oxide may correspond to the active region AT (or channel) of the transistor TR.

[0092] The first insulating layer 10 may cover the semiconductor pattern of the transistor TR and be disposed on the lower buffer layer BF. The gate GT of the transistor TR may be disposed on the first insulating layer 10. In a plan view, the gate GT may overlap the active area AT of the transistor TR. The gate GT may be used as a mask in a process of doping the semiconductor pattern of the transistor TR.

[0093] The second insulating layer 20 may be disposed on the gate electrode GT. The third insulating layer 30 may be disposed on the second insulating layer 20. The fourth insulating layer 40 may be disposed on the third insulating layer 30. The fifth insulating layer 50 may be disposed on the fourth insulating layer 40. The sixth insulating layer 60 may be disposed on the fifth insulating layer 50. Although not shown, the circuit layer DP-CL may further include a connection electrode and a contact hole for electrically connecting the transistor TR and the light emitting elements ED-1, ED-2, and ED-3 to each other.

[0094] Each of the first to sixth insulating layers 10 to 60 may include an inorganic insulating layer or an organic insulating layer. For example, the inorganic insulating layer may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide. The organic insulating layer may include at least one of acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, polyurethane resin, cellulose resin, siloxane resin, polyamide resin, and perylene resin.

[0095] The fifth insulating layer 50 may be a planarization layer. The fifth insulating layer 50 may be disposed just below the uppermost insulating layer (eg, the sixth insulating layer 60) in the circuit layer DP-CL.

[0096] A lower surface 60_DF of the sixth insulating layer 60 disposed on the fifth insulating layer 50 may be flat. An upper surface 60_UF of the sixth insulating layer 60 spaced apart from the lower surface 60_DF of the sixth insulating layer 60 may not be flat. The sixth insulating layer 60 may be disposed directly below the light emitting elements ED-1, ED-2, and ED-3.

[0097] The sixth insulating layer 60 may include a first region 60-A1 and a second region 60-A2 having different thicknesses. The first region 60-A1 and the second region 60-A2 may be integral with each other. The first thickness TN1 of the first region 60-A1 may be greater than the second thickness TN2 of the second region 60-A2. In a plan view, the first region 60-A1 may overlap with the pixel definition film PDL. In a plan view, the first region 60-A1 may overlap with the peripheral region NPXA. In a plan view, the second region 60-A2 may overlap with the light-emitting regions PXA-B, PXA-G, and PXA-R. In a plan view, the second region 60-A2 may overlap with the functional layers FL-1, FL-2, and FL-3 of the first light-emitting element ED-1, the second light-emitting element ED-2, and the third light-emitting element ED-3, which will be described later. In this specification, the expression that one component overlaps with another component is not limited to the case where the two components have the same area and shape as each other, and also includes the case where the two components have different areas and / or different shapes.

[0098] The inorganic layer PN may be disposed on the sixth insulating layer 60. The inorganic layer PN may be directly disposed on the sixth insulating layer 60 and may be in contact with the sixth insulating layer 60. In a plan view, the inorganic layer PN may completely overlap with the first region 60-A1 of the sixth insulating layer 60. In a plan view (for example, in the thickness direction DR3), the area of ​​the inorganic layer PN may be greater than the area of ​​the first region 60-A1 of the sixth insulating layer 60. In a plan view, the inorganic layer PN may overlap with the peripheral region NPXA. In a plan view, the inorganic layer PN may not overlap with the light emitting regions PXA-B, PXA-G, and PXA-R. In a plan view, the inorganic layer PN may not overlap with the pixel opening OH of the pixel defining film PDL. The inorganic layer PN may have an inorganic opening OP. In a plan view, the inorganic opening OP of the inorganic layer PN may overlap with the pixel opening OH of the pixel defining film PDL. The inorganic layer PN may supply protons to the functional layers FL-1, FL-2, and FL-3. In a plan view, the functional layers FL-1, FL-2, and FL-3 may overlap the second area 60-A2 of the sixth insulating layer 60. In a plan view, the functional layers FL-1, FL-2, and FL-3 may not overlap the first area 60-A1 of the sixth insulating layer 60.

[0099] The inorganic layer PN disposed on the sixth insulating layer 60 including the first region 60-A1 and the second region 60-A2 having different thicknesses can more easily provide protons at the sides of the functional layers FL-1, FL-2, and FL-3. Therefore, the light emitting efficiency of the first light emitting element ED-1, the second light emitting element ED-2, and the third light emitting element ED-3 according to the embodiment of the present disclosure can be improved, and the display device DD can have excellent display efficiency. The inorganic layer PN will be described in more detail later.

[0100] The display element layer DP-EL may include an inorganic layer PN, a pixel defining film PDL, and a first light emitting element ED-1, a second light emitting element ED-2, and a third light emitting element ED-3. The pixel defining film PDL may have a pixel opening OH. The pixel defining film PDL may separate the first light emitting element ED-1, the second light emitting element ED-2, and the third light emitting element ED-3.

[0101] The pixel defining film PDL may be formed of a polymer resin. For example, the pixel defining film PDL may include a polyacrylate-based resin or a polyimide-based resin. The pixel defining film PDL may include a light absorbing material or a black pigment or a black dye. The pixel defining film PDL including a black pigment or a black dye may realize a black pixel defining film. During the formation of the pixel defining film PDL, carbon black or the like may be used as a black pigment or a black dye, but the present disclosure is not limited thereto.

[0102] Each of the first light-emitting element ED-1, the second light-emitting element ED-2, and the third light-emitting element ED-3 may include: a first electrode EL1; a second electrode EL2 disposed above the first electrode EL1; and a functional layer FL-1, FL-2, or FL-3 disposed between the first electrode EL1 and the second electrode EL2. Each of the first light-emitting element ED-1, the second light-emitting element ED-2, and the third light-emitting element ED-3 may further include a capping layer CPL.

[0103] At least a portion of the first electrode EL1 may be exposed through the pixel opening OH of the pixel defining film PDL. At least a portion of the first electrode EL1 may be exposed through the inorganic opening OP of the inorganic layer PN. The first electrode EL1 may have electrical conductivity. The first electrode EL1 may be formed of a metal material, a metal alloy, or a conductive compound. The first electrode EL1 may be a cathode or an anode. However, the present disclosure is not limited thereto. The first electrode EL1 may be a pixel electrode. The first electrode EL1 may be a transmissive electrode, a semi-transmissive electrode, or a reflective electrode. The first electrode EL1 may include at least one of Ag, Mg, Cu, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, LiF, Mo, Ti, W, In, Sn, Zn, their compounds, their mixtures, and their oxides.

[0104] In the case where the first electrode EL1 is a transmissive electrode, the first electrode EL1 may be composed of a transparent metal oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium tin zinc oxide (ITZO). In the case where the first electrode EL1 is a semi-transmissive electrode or a reflective electrode, the first electrode EL1 may include Ag, Mg, Cu, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, LiF, Mo, Ti, W, or a compound or mixture thereof (e.g., a mixture of Ag and Mg), or a material having a multilayer structure such as LiF / Ca (a stacked structure of LiF and Ca) or LiF / Al (a stacked structure of LiF and Al). In another embodiment, the first electrode EL1 may have a multilayer structure including a reflective film or a semi-transmissive film formed of the above materials and a transparent conductive film formed of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium tin zinc oxide (ITZO), etc. For example, the first electrode EL1 may have a three-layer structure of ITO / Ag / ITO, but the present disclosure is not limited thereto. The first electrode EL1 may include the above metal material, a combination of two or more metal materials selected from the above metal materials, or an oxide of the above metal material, etc., and the present disclosure is not limited thereto. The thickness of the first electrode EL1 may be about 1000 Å. To about For example, the thickness of the first electrode EL1 may be in the range of about To about within the range.

[0105] The second electrode EL2 may be a common electrode. The second electrode EL2 may be an anode or a cathode, but the present disclosure is not limited thereto. For example, when the first electrode EL1 is an anode, the second electrode EL2 may be a cathode, and when the first electrode EL1 is a cathode, the second electrode EL2 may be an anode. The second electrode EL2 may include at least one of Ag, Mg, Cu, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, LiF, Mo, Ti, W, In, Sn, Zn, compounds thereof, mixtures thereof, and oxides thereof.

[0106] The second electrode EL2 may be a transmissive electrode, a semi-transmissive electrode or a reflective electrode. When the second electrode EL2 is a transmissive electrode, the second electrode EL2 may be composed of a transparent metal oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO) or indium tin zinc oxide (ITZO).

[0107] In the case where the second electrode EL2 is a semi-transmissive electrode or a reflective electrode, the second electrode EL2 may include Ag, Mg, Cu, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, LiF, Mo, Ti, W, or a compound thereof or a mixture thereof (e.g., a mixture of Ag and Mg), or a material having a multilayer structure such as LiF / Ca (a stacked structure of LiF and Ca) or LiF / Al (a stacked structure of LiF and Al). In another embodiment, the second electrode EL2 may have a multilayer structure including a reflective film or a semi-transmissive film formed of the above materials, and a transparent conductive film formed of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium tin zinc oxide (ITZO), etc. For example, the second electrode EL2 may include the above metal materials, a combination of two or more of the above metal materials, or an oxide of the above metal materials, etc.

[0108] Although not shown, the second electrode EL2 may be connected to the auxiliary electrode. In the case where the second electrode EL2 is connected to the auxiliary electrode, the resistance of the second electrode EL2 may be reduced.

[0109] Functional layers FL-1, FL-2, and FL-3 may be disposed between the first electrode EL1 and the second electrode EL2. Functional layers FL-1, FL-2, and FL-3 of the first light-emitting element ED-1, the second light-emitting element ED-2, and the third light-emitting element ED-3 may be disposed in the pixel opening OH so as to be separated from each other. The first light-emitting element ED-1 may include a first functional layer FL-1, the second light-emitting element ED-2 may include a second functional layer FL-2, and the third light-emitting element ED-3 may include a third functional layer FL-3.

[0110] The capping layer CPL may include an inorganic material or an organic material. For example, the capping layer CPL may include an inorganic material such as SiO x N y 、SiN x 、SiO y , alkali metal compounds (such as LiF) and alkaline earth metal compounds (such as MgF 2 )wait.

[0111] For example, the capping layer CPL may include an organic material (such as α-NPD, NPB, TPD, m-MTDATA, Alq 3 , CuPc, TPD15 (N4,N4'-tetrakis(biphenyl-4-yl)biphenyl-4,4'-diamine) and TCTA (4,4',4"-tris(carbazol-9-yl)triphenylamine) etc.), or may include epoxy resin or acrylate (such as methacrylate).

[0112] The encapsulation layer TFE may include at least one inorganic film (hereinafter referred to as an inorganic encapsulation film). The encapsulation layer TFE may include at least one organic film (hereinafter referred to as an organic encapsulation film) and at least one inorganic encapsulation film.

[0113] The inorganic encapsulation film can protect the display element layer DP-EL from moisture / oxygen, and the organic encapsulation film can protect the display element layer DP-EL from foreign matter (such as dust particles). The inorganic encapsulation film may include silicon nitride, silicon oxynitride, silicon oxide, titanium oxide or aluminum oxide, etc., but the present disclosure is not particularly limited thereto. The organic encapsulation film may include an acrylic compound or an epoxy compound, etc. The organic encapsulation film may include a photopolymerizable organic material, but the present disclosure is not particularly limited thereto.

[0114] The optical layer PP may include a base substrate BL and a color filter layer CFL. The base substrate BL may provide a base surface on which the color filter layer CFL is disposed. The base substrate BL may be a glass substrate, a metal substrate, or a plastic substrate. However, the present disclosure is not limited thereto, and the base substrate BL may be an inorganic substrate, an organic substrate, or a composite material substrate.

[0115] The color filter layer CFL may include a first filter CF-B, a second filter CF-G, and a third filter CF-R. The first filter CF-B, the second filter CF-G, and the third filter CF-R may be arranged to correspond to the first light emitting element ED-1, the second light emitting element ED-2, and the third light emitting element ED-3, respectively. For example, the first filter CF-B may be a blue filter, the second filter CF-G may be a green filter, and the third filter CF-R may be a red filter. The first filter CF-B, the second filter CF-G, and the third filter CF-R may be arranged to correspond to the first light emitting area PXA-B, the second light emitting area PXA-G, and the third light emitting area PXA-R, respectively.

[0116] Each of the first filter CF-B, the second filter CF-G, and the third filter CF-R may include a photosensitive polymer resin and a pigment or dye. The first filter CF-B may include a blue pigment or a blue dye, the second filter CF-G may include a green pigment or a green dye, and the third filter CF-R may include a red pigment or a red dye. However, the present disclosure is not limited thereto, and the first filter CF-B may not include a pigment or a dye. The first filter CF-B may include a photosensitive polymer resin and may not include a pigment or a dye. The first filter CF-B may be transparent. The first filter CF-B may be formed of a transparent photosensitive resin.

[0117] The color filter layer CFL may further include a buffer layer BFL. For example, the buffer layer BFL may be a protective layer for protecting the first filter CF-B, the second filter CF-G, and the third filter CF-R. The buffer layer BFL may be an inorganic buffer layer of an inorganic material including at least one of silicon nitride, silicon oxide, and silicon oxynitride. The buffer layer BFL may be composed of a single layer or a plurality of layers.

[0118] The second filter CF-G and the third filter CF-R may be yellow filters. The second filter CF-G and the third filter CF-R may not be separated from each other and may be provided as an integral unit.

[0119] Although not shown, the color filter layer CFL may further include a light blocking portion (not shown). The light blocking portion may be a black matrix. The light blocking portion may include an organic light blocking material or an inorganic light blocking material containing a black pigment or a black dye. The light blocking portion may prevent light leakage and define boundaries between adjacent filters CF-B, CF-G, and CF-R.

[0120] Figure 5A yes Figure 4 An enlarged schematic cross-sectional view of the area AA'. Figure 5B is shown as Figure 4 A schematic cross-sectional view of a region AA'-1 of another embodiment of a region AA'. Figure 5A and Figure 5B The description of the first light emitting element ED-1 is equally applicable to Figure 4 The second light-emitting element ED-2 and the third light-emitting element ED-3 are shown in FIG.

[0121] Reference Figure 5A and Figure 5B , the first functional layer FL-1 may include an electron transport region ETR, an emission layer EML, and a hole transport region HTR. The electron transport region ETR may be spaced apart from the hole transport region HTR, and the emission layer EML is interposed between the electron transport region ETR and the hole transport region HTR. The first light-emitting element ED-1, the second light-emitting element ED-2, and the third light-emitting element ED-3 (see Figure 4 ) can be disposed in a pixel opening OH defined in the pixel definition film PDL (see Figure 4 ) so as to be separated from each other. The first light emitting element ED-1, the second light emitting element ED-2 and the third light emitting element ED-3 (see Figure 4 ) may be disposed in a pixel opening OH defined in the pixel definition film PDL (see Figure 4 ) so as to be separated from each other. The first light emitting element ED-1, the second light emitting element ED-2 and the third light emitting element ED-3 (see Figure 4) can be disposed in a pixel opening OH defined in the pixel definition film PDL (see Figure 4 ) to separate them from each other.

[0122] Figure 5A and Figure 5B The electron transport region ETR and the hole transport region HTR are different from each other in arrangement. Figure 5A It is schematically shown that the electron transport region ETR, the light emitting layer EML and the hole transport region HTR are sequentially stacked on the first electrode EL1. Figure 5B It is schematically shown that a hole transport region HTR, a light emitting layer EML, and an electron transport region ETR are sequentially stacked on the first electrode EL1.

[0123] The hole transport region HTR may have a single layer made of a single material, a single layer made of different materials, or a multilayer structure having multiple layers made of different materials. The thickness of the hole transport region HTR may be, for example, about 1000 Å. To about For example, the thickness of the hole transport region HTR may be in the range of about To about For example, the thickness of the hole transport region HTR may be in the range of about To about within the range.

[0124] The hole transport region HTR may include a hole injection layer HIL and a hole transport layer HTL. Although not shown, the hole transport region HTR may further include an electron blocking layer (not shown). The hole injection layer HIL may be spaced apart from the light emitting layer EML, and the hole transport layer HTL is interposed between the hole injection layer HIL and the light emitting layer EML. Figure 5A It is schematically shown that the hole transport layer HTL is disposed on the light emitting layer EML, and the hole injection layer HIL is disposed on the hole transport layer HTL. Figure 5B It is schematically shown that the hole injection layer HIL is disposed on the first electrode EL1 and the hole transport layer HTL is disposed on the hole injection layer HIL.

[0125] The hole transport region HTR may include a hole injection material and / or a hole transport material. For example, the hole transport region HTR may include a phthalocyanine compound such as copper phthalocyanine, DNTPD (N1, N1'-([1, 1'-biphenyl]-4, 4'-diyl) bis(N1-phenyl-N4, N4-di-m-tolylbenzene-1, 4-diamine)), m-MTDATA (4, 4', 4"-[tri(3-methylphenyl)phenylamino]triphenylamine), TDATA (4, 4', 4"-tri(N, N-diphenylamino)triphenylamine), 2-TNATA (4, 4', 4"-tri[N(2-naphthyl)-N-phenylamino]-triphenylamine), PEDOT / PSS (poly(3, 4-ethylenediamine)). ethylenedioxythiophene) / poly(4-styrene sulfonate)), PANI / DBSA (polyaniline / dodecylbenzenesulfonic acid), PANI / CSA (polyaniline / camphorsulfonic acid), PANI / PSS (polyaniline / poly(4-styrene sulfonate)), NPB (N,N'-di(naphthalene-1-yl)-N,N'-diphenylbenzidine), triphenylamine-containing polyether ketone (TPAPEK), 4-isopropyl-4'-methyldiphenyliodonium [tetrakis(pentafluorophenyl)borate], HATCN (dipyrazino[2,3-f:2',3'-h]quinoxaline-2,3,6,7,10,11-hexanitrile), etc.

[0126] The hole transport region HTR may include carbazole derivatives (such as N-phenylcarbazole and polyvinylcarbazole), fluorene derivatives, TPD (N,N'-bis(3-methylphenyl)-N,N'-diphenyl-[1,1'-biphenyl]-4,4'-diamine), triphenylamine derivatives (such as TCTA (4,4',4"-tri(N-carbazolyl)triphenylamine), NPB (N,N'-di(naphthalene-1-yl)-N,N'-diphenyl-benzidine), TAPC (4,4'-cyclohexylidene) bis[N,N-bis(4-methylphenyl)aniline]), HMTPD (4,4'-bis[N,N'-(3-methylphenyl)amino]-3,3'-dimethylbiphenyl), CzSi (9-(4-tert-butylphenyl)-3,6-bis(triphenylsilyl)-9H-carbazole), CCP (9-phenyl-9H-3,9'-biscarbazole), mCP (1,3-bis(N-carbazolyl)benzene) or mDCP (1,3-bis(1,8-dimethyl-9H-carbazol-9-yl)benzene), etc.).

[0127] The light emitting layer EML may include quantum dots QD-C. The quantum dots QD-C may be provided in plurality and stacked to form a layer. Figure 5A and Figure 5BIt is schematically shown that the quantum dots QD-C having a circular cross-section as an embodiment are arranged to roughly form two layers, but the present disclosure is not limited thereto. For example, the arrangement of the quantum dots QD-C may vary depending on the thickness of the light-emitting layer EML, the shape of the quantum dots QD-C included in the light-emitting layer EML, and the average diameter of the quantum dots QD-C. For example, in the light-emitting layer EML, the quantum dots QD-C may be aligned to be adjacent to each other to form a layer, or may be aligned to form multiple layers (such as two or three layers).

[0128] The quantum dot QD-C may be a crystal of a semiconductor compound. The quantum dot QD-C may emit light of a luminescence wavelength according to the size of the crystal. The diameter of the quantum dot QD-C may be, for example, in the range of about 1 nm to about 10 nm.

[0129] Quantum dot QD-C can be synthesized by wet chemical process, metal organic chemical vapor deposition (MOCVD) process, molecular beam epitaxy (MBE) process or similar process. The wet chemical process is a method of growing quantum dot QD-C particle crystals after mixing an organic solvent and a precursor material. During crystal growth, the organic solvent can naturally act as a dispersant to coordinate on the surface of the quantum dot QD-C crystal and can control the growth of the crystal. Therefore, the wet chemical process is easier to perform than vapor deposition methods (such as metal organic chemical vapor deposition (MOCVD) process or molecular beam epitaxy (MBE) process) and the growth of quantum dot QD-C particles can be controlled by a low-cost process.

[0130] The quantum dot QD-C may include a II-VI semiconductor compound, an I-II-VI semiconductor compound, a II-IV-VI compound, an I-II-IV-VI semiconductor compound, a III-V semiconductor compound, a III-VI semiconductor compound, an I-III-VI semiconductor compound, an IV-VI semiconductor compound, a II-IV-V semiconductor compound, a IV element or compound, or a combination thereof. In this specification, the term "group" refers to a group in the IUPAC periodic table.

[0131] Examples of II-VI semiconductor compounds may include binary compounds such as CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnO, HgS, HgSe, HgTe, MgSe, and MgS; ternary compounds such as CdSeS, CdSeTe, CdSTe, ZnSeS, ZnSeTe, ZnSTe, HgSeS, HgSeTe, HgSTe, CdZnS, CdZnSe, CdZnTe, CdHgS, CdHgSe, CdHgTe, HgZnS, HgZnSe, HgZnTe, MgZnSe, and MgZnS; quaternary compounds such as CdZnSeS, CdZnSeTe, CdZnSTe, CdHgSeS, CdHgSeTe, CdHgSTe, HgZnSeS, HgZnSeTe, and HgZnSTe, or combinations thereof.

[0132] The II-VI semiconductor compound may also include a Group I metal element and / or a Group IV element. The I-II-VI compound may include CuSnS or CuZnS, and the II-IV-VI compound may include ZnSnS, etc. The I-II-IV-VI compound may include a quaternary compound such as Cu 2 ZnSnS 2 , Cu 2 ZnSnS 4 , Cu 2 ZnSnSe 4 、Ag 2 ZnSnS 2 ), or a mixture thereof.

[0133] Examples of III-V semiconductor compounds may include binary compounds such as GaN, GaP, GaAs, GaSb, AlN, AlP, AlAs, AlSb, InN, InP, InAs, and InSb; ternary compounds such as GaNP, GaNAs, GaNSb, GaPAs, GaPSb, AlNP, AlNAs, AlNSb, AlPAs, AlPSb, InGaP, InNP, InAlP, InNAs, InNSb, InPAs, and InPSb; quaternary compounds such as GaAlNP, GaAlNAs, GaAlNSb, GaAlPAs, GaAlPSb, GaInNP, GaInNAs, GaInNSb, GaInPAs, GaInPSb, InAlNP, InAlNAs, InAlNSb, InAlPAs, and InAlPSb; or combinations thereof. III-V semiconductor compounds may also include Group II elements. Examples of the Group III-V semiconductor compound also including the Group II element may include InZnP, InGaZnP, InAlZnP, and the like.

[0134] Examples of III-VI semiconductor compounds may include binary compounds such as GaS, Ga 2 S 3 ,GaSe,Ga 2 Se 3 、GaTe、InS、InSe、In 2 Se 3 and InTe; ternary compounds such as InGaS 3 and InGaSe 3 ; or a combination thereof.

[0135] Examples of Group I-III-VI semiconductor compounds may include: ternary compounds such as AgInS, AgInS 2 、AgInSe 2 、AgGaS、AgGaS 2 、AgGaSe 2 、CuInS、CuInS 2 、CuInSe 2 、CuGaS 2 、CuGaSe 2 、CuGaO 2 、AgGaO 2 and AgAlO 2 ; quaternary compounds such as AgInGaS 2 and AgInGaSe 2 ; or a combination thereof.

[0136] Examples of IV-VI semiconductor compounds may include: binary compounds such as SnS, SnSe, SnTe, PbS, PbSe and PbTe; ternary compounds such as SnSeS, SnSeTe, SnSTe, PbSeS, PbSeTe, PbSTe, SnPbS, SnPbSe and SnPbTe; quaternary compounds such as SnPbSSe, SnPbSTe and SnPbSTe; or combinations thereof.

[0137] Examples of II-IV-V semiconductor compounds may be ternary compounds such as ZnSnP, ZnSnP 2 、ZnSnAs 2 、ZnGeP 2 、ZnGeAs 2 、CdSnP 2 、CdGeP 2 ), or a mixture thereof.

[0138] The Group IV elements or compounds may include simple substances (such as Si and Ge); binary compounds (such as SiC and SiGe); or combinations thereof.

[0139] Each element included in the multi-element compound (such as a binary compound, a ternary compound, and a quaternary compound) may be present in the particle in a uniform or non-uniform concentration. For example, the above chemical formula may indicate the type of element included in the compound, and the ratio of the elements in the compound may be different from each other. For example, AgInGaS 2 Can be AgIn x Ga 1-x S 2 (x is a real number between 0 and 1).

[0140] The quantum dot QD-C may have a single layer structure (in which the concentration of each element included in the corresponding quantum dot QD-C is uniform) or a core-shell structure. For example, the material included in the core and the material included in the shell may be different from each other.

[0141] The shell of the quantum dot QD-C can be used as a protective layer for maintaining semiconductor properties by preventing chemical modification of the core and / or as a charging layer for imparting electrophoretic properties to the quantum dot. The shell can have a single layer or multiple layers. The core-shell structure can have a concentration gradient in which the concentration of the element present in the shell decreases toward the core.

[0142] The shell of the quantum dot QD-C may include a metal or non-metal oxide, a semiconductor compound, or a combination thereof. Examples of metal or non-metal oxides may include: binary compounds such as SiO 2 、Al 2 O 3 、TiO2 、ZnO、MnO、Mn 2 O 3 , Mn 3 O 4 , CuO, FeO, Fe 2 O 3 , Fe 3 O 4 , CoO, Co 3 O 4 and NiO; ternary compounds such as MgAl 2 O 4 、CoFe 2 O 4 、NiFe 2 O 4 and CoMn 2 O 4 ; or a combination thereof. As described in the present specification, examples of semiconductor compounds may include: III-VI semiconductor compounds; II-VI semiconductor compounds; III-V semiconductor compounds; III-VI semiconductor compounds; I-III-VI semiconductor compounds; IV-VI semiconductor compounds; or a combination thereof. For example, the semiconductor compound may include CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnSeS, ZnTeS, GaAs, GaP, GaS, GaSe, AgGaS, AgGaS 2 , GaSb, HgS, HgSe, HgTe, InAs, InP, InGaP, InSb, AlAs, AlP, AlSb, or a combination thereof.

[0143] Each element included in the multi-element compound (such as a binary compound and a ternary compound) may be present in the particle at a uniform or non-uniform concentration. For example, the above chemical formula may indicate the type of element included in the compound, and the ratio of the element in the compound may be different from each other.

[0144] The quantum dot QD-C may have a half-width (FWHM) of a light-emitting wavelength spectrum less than or equal to about 45 nm. For example, the half-width (FWHM) of the light-emitting wavelength spectrum of the quantum dot QD-C may be less than or equal to about 40 nm. For example, the half-width (FWHM) of the light-emitting wavelength spectrum of the quantum dot QD-C may be less than or equal to about 30 nm or less. Within those ranges, color purity or color reproducibility may be improved. Since the light emitted by the quantum dot QD-C is emitted in all directions, a wide viewing angle may be improved. The shape of the quantum dot QD-C may be spherical nanoparticles, pyramidal nanoparticles, multi-arm nanoparticles, cubic nanoparticles, nanotubes, nanowires, nanofibers, or nanoplates.

[0145] Since the energy band gap can be controlled by adjusting the size of the quantum dot QD-C or the ratio of elements in the compound constituting the quantum dot QD-C, light of various wavelengths can be obtained from the light-emitting layer EML including the quantum dot QD-C. Therefore, by using the quantum dot QD-C described above (using quantum dots of different sizes or different element ratios in the quantum dot compound), light-emitting elements ED-1, ED-2, and ED-3 configured to emit light of various wavelengths can be realized (see Figure 4 ). For example, the size of the quantum dot QD-C or the ratio of elements in the compound constituting the quantum dot QD-C can be selected to emit red light, green light and / or blue light. The quantum dot QD-C can be configured to emit white light by combining light of various colors.

[0146] The quantum dot QD-C of the first light-emitting element ED-1 can emit blue light. Figure 4 ) can emit green light. The third light emitting element ED-3 (see Figure 4 )'s quantum dots QD-C can emit red light.

[0147] The diameters of the quantum dots QD-C in the first light-emitting element ED-1, the second light-emitting element ED-2, and the third light-emitting element ED-3 may be different from each other. For example, the quantum dots QD-C of the first light-emitting element ED-1 emitting light in a relatively short wavelength range may have a diameter smaller than that of the second light-emitting element ED-2 emitting light in a relatively long wavelength range (see Figure 4 ) of the quantum dot QD-C and the third light-emitting element ED-3 (see Figure 4 The average diameter of the average diameter of the quantum dots QD-C of ). The average diameter may be the arithmetic mean of the particle diameters of the plurality of quantum dots. The particle diameter of the quantum dots may be the average of the widths of the quantum dot particles in the cross section.

[0148] The electron transport region ETR may include an electron injection layer EIL and an electron transport layer ETL. Although not shown, the electron transport region ETR may further include a hole blocking layer (not shown). Unlike the structure shown, the electron injection layer EIL may be omitted. The electron injection layer EIL may be spaced apart from the light emitting layer EML, and the electron transport layer ETL is interposed between the electron injection layer EIL and the light emitting layer EML. Figure 5A It is schematically shown that the electron injection layer EIL is disposed on the first electrode EL1 and the electron transport layer ETL is disposed on the electron injection layer EIL. Figure 5B It is schematically shown that the electron transport layer ETL is disposed on the light emitting layer EML and the electron injection layer EIL is disposed on the electron transport layer ETL.

[0149] The electron transport region ETR may include metal nanoparticles NP. At least one of the electron injection layer EIL and the electron transport layer ETL may include metal nanoparticles NP. For example, the electron transport layer ETL may include metal nanoparticles NP.

[0150] The metal nanoparticles NP may include metal oxides. For example, the metal nanoparticles NP may include SnO, SnO 2 、CuGaO 2 , Ga 2 O 3 , Cu 2 O、SrCu 2 O 2 、SrTiO 3 、CuAlO 2 、 2 O 5 、NiO、BaSnO 3 、MoO 3 and TiO 2 At least one of and / or a compound represented by the following Formula M-1. For example, the electron transport region ETR may include ZnO and / or ZnMgO.

[0151] [Formula M-1]

[0152] Zn q Me (1-q) O

[0153] In the above formula M-1, q can be a rational number between 0 and 0.5. Me can be Li, Be, Na, Mg, Al, K, Ca, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Ga, Ge, Rb, Sr, Zr, Nb, Mo, Ru, Pd, Ag, In, Sn(II), Sn(IV), Sb or Ba.

[0154] The electron transport region ETR may also include an electron injection material and / or an electron transport material. For example, the electron transport region ETR may include an anthracene-based compound. In another embodiment, the electron transport region ETR may include, for example, Alq 3(tris(8-hydroxyquinoline)aluminum), 1,3,5-tris[(3-pyridyl)-phenyl-3-yl]benzene, 2,4,6-tris(3'-(pyridin-3-yl)biphenyl-3-yl)-1,3,5-triazine, 2-(4-(N-phenylbenzimidazol-1-yl)phenyl)-9,10-dinaphthothracene, TPBi(1,3,5-tris(1-phenyl-1H-benzo[d]imidazol-2-yl)benzene), BCP(2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline), Bphen( 4,7-diphenyl-1,10-phenanthroline), TAZ (3-(4-biphenyl)-4-phenyl-5-tert-butylphenyl-1,2,4-triazole), NTAZ (4-(naphthalen-1-yl)-3,5-diphenyl-4H-1,2,4-triazole), tBu-PBD (2-(4-biphenyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole), BAlq (bis(2-methyl-8-quinolinol-N1,O8)-(1,1'-biphenyl-4-hydroxypropyl)aluminum), Bebq 2 (beryllium bis(benzoquinoline-10-carboxylate)), ADN (9,10-di(naphthalene-2-yl)anthracene), BmPyPhB (1,3-bis[3,5-di(pyridin-3-yl)phenyl]benzene), and mixtures thereof. In another embodiment, the electron transport region ETR may include BCP (2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline), TSPO1 (diphenyl(4-(triphenylsilyl)phenyl)phosphine oxide), Bphen (4,7-diphenyl-1,10-phenanthroline), and the like.

[0155] Figure 6 yes Figure 4 An enlarged schematic cross-sectional view of the region BB' in FIG. Figure 6 , the second edge N_EG of the inorganic layer PN may be disposed inside the first edge D_EG of the pixel defining film PDL. In a plan view, the second edge N_EG of the inorganic layer PN may overlap the pixel defining film PDL. The second edge N_EG of the inorganic layer PN may define an inorganic opening OP (see Figure 4 ). The first edge D_EG of the pixel definition film PDL may define a pixel opening OH (see Figure 4 ). The pixel defining film PDL may include an undercut portion UDT.

[0156] In the method for manufacturing a display device according to an embodiment of the present disclosure to be described later, the inorganic layer PN may be formed from a preliminary inorganic layer P-PN (see Fig.14 ) is formed, and the pixel definition film PDL can be formed from the preliminary pixel definition film P-PDL (see Fig.14 ) is formed. This can be done by removing the preliminary inorganic layer P-PN (see Fig.14 ) first part N-P1 (see Fig.14 ) to form an inorganic layer PN. The preliminary pixel definition film P-PDL (see Fig.14 ) Part 2 D-P2 (see Fig.14 ) to form a pixel definition film PDL. Fig.14 ) first part N-P1 (see Fig.14 ) and the preliminary pixel definition film P-PDL (see Fig.14 ) Part 2 D-P2 (see Fig.14 ) can be removed in the same process operation. Therefore, the second edge N_EG of the inorganic layer PN can be formed to be disposed inwardly than the first edge D_EG of the pixel defining film PDL, and the pixel defining film PDL can be formed to include an undercut portion UDT. Fig.14 ) first part N-P1 (see Fig.14 ) and the preliminary pixel definition film P-PDL (see Fig.14 ) Part 2 D-P2 (see Fig.14 ) are removed in the same process operation, so the method of manufacturing a display device according to an embodiment of the present disclosure, which will be described later, can have excellent manufacturing efficiency.

[0157] The inorganic layer PN may include at least one of amorphous silicon, silicon nitride, silicon oxide, and silicon oxynitride. Amorphous silicon, silicon nitride, silicon oxide, and silicon oxynitride may include a large number of protons. Therefore, the inorganic layer PN may supply protons to the electron transport region ETR. As described above, the electron transport region ETR may include metal nanoparticles NP composed of metal oxide (see Figure 5A and Figure 5B ).

[0158] Metal nanoparticles composed of metal oxide may include defects on the surface. Since electrons are trapped in the defects on the surface, the electrons may not be supplied to the light-emitting layer, and therefore, degradation of the light-emitting element, etc. may occur. During positive aging performed to eliminate defects on the surface of the metal nanoparticles, components of the display device (for example, light-emitting elements) may be unevenly manufactured and protons may be unevenly supplied, resulting in differences. In contrast, in an embodiment of the present disclosure, the inorganic layer PN can eliminate defects in the metal nanoparticles NP by supplying protons to the electron transport region ETR. Therefore, electrons can be easily supplied from the electron transport region ETR to the light-emitting layer EML, and therefore, the light-emitting elements ED-1, ED-2, and ED-3 (see Figure 4 ) can have excellent efficiency. By including the inorganic layer PN, the display device DD according to the embodiment of the present disclosure (see Figure 4 ) can have excellent display efficiency.

[0159] Reference Figure 6 , the inorganic layer PN may contact the electron transport region ETR in a direction perpendicular to the thickness direction DR3. The inorganic layer PN may include an inclined portion N-CP inclined with respect to the thickness direction DR3. The inclined portion N-CP of the inorganic layer PN may be a portion disposed on the first electrode EL1. The inclined portion N-CP of the inorganic layer PN may contact the electron transport region ETR. The inorganic layer PN including the inclined portion N-CP in contact with the electron transport region ETR may supply protons to the electron transport region ETR. Therefore, the display device DD according to an embodiment of the present disclosure (see Figure 4 ) can have excellent display efficiency.

[0160] The inorganic layer PN may cover the third edge L1_EG of the first electrode EL1. The third edge L1_EG of the first electrode EL1 may be disposed in the sixth insulating layer 60 having a relatively large first thickness TN1 (see FIG. 1 ). Figure 4 ). The third edge L1_EG of the first electrode EL1 may be inclined with respect to the thickness direction DR3.

[0161] In the thickness direction DR3, the first electrode EL1 may be spaced apart from the pixel defining film PDL, and the inorganic layer PN is interposed between the first electrode EL1 and the pixel defining film PDL. In another direction perpendicular to the thickness direction DR3, the first electrode EL1 may be spaced apart from the pixel defining film PDL, and the inorganic layer PN is interposed between the first electrode EL1 and the pixel defining film PDL. Since the inorganic layer PN may be provided to cover the third edge L1_EG of the first electrode EL1, the first electrode EL1 and the pixel defining film PDL may be spaced apart from each other.

[0162] The pixel defining film PDL may be spaced apart from the sixth insulating layer 60, and the inorganic layer PN is interposed between the pixel defining film PDL and the sixth insulating layer 60. The inorganic layer PN may be directly disposed on the sixth insulating layer 60, which is the uppermost insulating layer of the circuit layer DP-CL, and the pixel defining film PDL may be spaced apart from the uppermost insulating layer of the circuit layer DP-CL (e.g., the sixth insulating layer 60).

[0163] On the upper surface FL_UF of the third functional layer FL-3, the edge area FL-EA may be set higher than the central area FL-CA. The edge area FL-EA of the third functional layer FL-3 may contact the pixel definition film PDL. Due to the surface tension between the third functional layer FL-3 and the pixel definition film PDL, the edge area FL-EA in the third functional layer FL-3 may be set higher than the central area FL-CA. Figure 6 is described as an example, but the same description can be applied to Figure 4The edge regions of the first functional layer FL-1 and the second functional layer FL-2 are shown in FIG.

[0164] Figure 7 is a schematic cross-sectional view showing a display device DD-a according to another embodiment of the present disclosure. Figure 4 Compared with the display device DD shown in Figure 7 The display device DD-a shown in FIG. 1 is different in that the sixth insulating layer 60-a is used. Figure 7 In the description of Figures 1 to 6 The content described is repeated, and the differences will be described.

[0165] Reference Figure 7 , the lower surface 60 - a_DF of the sixth insulating layer 60 - a may be flat. The upper surface 60 - a_UF of the sixth insulating layer 60 - a may be flat.

[0166] The inorganic layer PN may be disposed to cover the third edge L1_EG (see FIG. 1 ) of the first electrode EL1 that is inclined with respect to the thickness direction DR3. Figure 6 ). The inorganic layer PN may contact the first functional layer FL-1, the second functional layer FL-2, and the third functional layer FL-3 in a direction perpendicular to the thickness direction DR3. For example, the inorganic layer PN may contact the electron transport region ETR in a direction perpendicular to the thickness direction DR3 (see Figure 6 ).

[0167] The display device according to the embodiment of the present disclosure may be manufactured by the method of manufacturing the display device according to the embodiment of the present disclosure. Figure 8 , Fig. 9A , Fig. 9B is a flowchart illustrating a method of manufacturing a display device according to an embodiment of the present disclosure. Figures 10 to 18 The steps of manufacturing a display device according to an embodiment of the present disclosure are schematically shown. Figures 8 to 18 In the description of Figures 1 to 7 The content described is repeated, and the differences will be described.

[0168] Reference Figure 8 , the method for manufacturing a display device according to an embodiment of the present disclosure may include preparing a base layer (S100), forming an insulating layer (S200), forming a first electrode (S300), forming a preliminary inorganic layer (S400), forming a preliminary pixel defining film (S500), forming an inorganic layer and a pixel defining film (S600), forming a functional layer (S700), and forming a second electrode (S800). Fig. 9A and Fig. 9B, the formation of the functional layer (S700) may include forming an electron transport region (S710, S735), forming a light emitting layer (S720), and forming a hole transport region (S730, S715). One of the formation of the electron transport region (S710, S735) and the formation of the hole transport region (S730, S715) may be performed before the formation of the light emitting layer (S720), and the other of them may be performed after the formation of the light emitting layer (S720). Fig. 9A , the formation of the electron transport region (S710) may be performed before the formation of the light emitting layer (S720), and the formation of the hole transport region (S730) may be performed after the formation of the light emitting layer (S720). Fig. 9B , the formation of the hole transport region (S715) may be performed before the formation of the light emitting layer (S720), and the formation of the electron transport region (S735) may be performed after the formation of the light emitting layer (S720).

[0169] Fig.10 and Fig.11 The step of forming the sixth insulating layer 60 from the preliminary sixth insulating layer P-60 is schematically shown. Fig.10 , a preliminary sixth insulating layer P-60 may be formed on the base layer BS. For example, a lower layer B-50 may be formed on the base layer BS, and a preliminary sixth insulating layer P-60 may be formed on the lower layer B-50. The lower layer B-50 may correspond to Figure 4 Components other than the sixth insulating layer 60 (ie, the transistor TR, the lower buffer layer BF, and the first to fifth insulating layers 10 to 50 ) among the components of the circuit layer DP-CL shown in FIG.

[0170] The preliminary sixth insulating layer P-60 may include an organic material. However, the present disclosure is not limited thereto, and the preliminary sixth insulating layer P-60 may include an inorganic material.

[0171] On the preliminary sixth insulating layer P-60, a first photosensitive film pattern PT1 may be formed and a first mask MSK may be provided. The first region 60-A1 (see FIG. 1 ) having different thicknesses may be included. Fig.11 ) and the second area 60-A2 (see Fig.11 ) of the sixth insulating layer 60 (see Fig.11 ) can be formed from the preliminary sixth insulating layer P-60. The first region 60-A1 (see Fig.11 ) of the first thickness TN1 (see Fig.11 ) may be larger than the second area 60-A2 (see Fig.11 ) of the second thickness TN2 (see Fig.11). The first mask MSK may include a first mask region R-1 and a second mask region R-2 having different transmittances for the irradiated light. The first mask MSK may be a halftone mask. Thus, a first region 60-A1 having different thicknesses may be formed (see Fig.11 ) and the second area 60-A2 (see Fig.11 ) of the sixth insulating layer 60 (see Fig.11 ). Unlike what is shown, in the case where no half-tone mask is provided on the preliminary sixth insulating layer P-60, a Figure 7 The sixth insulating layer 60 - a is shown in FIG.

[0172] Reference Fig.12 , the first electrode EL1 may be formed on the sixth insulating layer 60. The first electrode EL1 may be formed of a metal material, a metal alloy, or a conductive compound.

[0173] Reference Fig.13 , a preliminary inorganic layer P-PN may be formed on the first electrode EL1. The preliminary inorganic layer P-PN may be formed to completely overlap the first region 60-A1 and the second region 60-A2 of the sixth insulating layer 60 in a plan view. For example, the preliminary inorganic layer P-PN may include a silicon-based gas and a nitrogen-based gas. The preliminary inorganic layer P-PN may include at least one of amorphous silicon, silicon nitride, silicon oxide, and silicon oxynitride. The preliminary inorganic layer P-PN may be formed by a plasma enhanced chemical vapor deposition (PECVD) method. The inorganic layer PN formed from the preliminary inorganic layer P-PN may include at least one of amorphous silicon, silicon nitride, silicon oxide, and silicon oxynitride.

[0174] Reference Fig.14 , a preliminary pixel defining film P-PDL may be formed on the preliminary inorganic layer P-PN. In a plan view, the preliminary pixel defining film P-PDL may be formed to completely overlap the first region 60-A1 and the second region 60-A2 of the sixth insulating layer 60. After providing a material for forming the preliminary pixel defining film P-PDL on the preliminary inorganic layer P-PN, a second photosensitive film pattern PT2 may be formed and a second mask MSK-a may be provided. The second mask MSK-a may include a third mask region R-3 and a fourth mask region R-4 having different transmittances. The second mask MSK-a may be a halftone mask. Thus, a preliminary pixel defining film P-PDL including a second portion D-P2 and a third portion D-P3 having different thicknesses may be formed. In a plan view, the second portion D-P2 of the preliminary pixel defining film P-PDL may overlap the second region 60-A2 of the sixth insulating layer 60. In a plan view, the third portion D-P3 of the preliminary pixel defining film P-PDL may overlap the first region 60-A1 of the sixth insulating layer 60.

[0175] In a plan view, the first portion N-P1 of the preliminary inorganic layer P-PN may overlap the second region 60 - A2 of the sixth insulating layer 60 . Fig.15 The inorganic layer PN and the pixel defining film PDL shown in the figure can be formed by removing the first portion N-P1 of the preliminary inorganic layer P-PN and the second portion D-P2 of the preliminary pixel defining film P-PDL. In a plan view, the second portion D-P2 of the preliminary pixel defining film P-PDL can overlap the first portion N-P1 of the preliminary inorganic layer P-PN. The pixel defining film PDL can be formed from the third portion D-P3 of the preliminary pixel defining film P-PDL.

[0176] The first portion N-P1 of the preliminary inorganic layer P-PN and the second portion D-P2 of the preliminary pixel definition film P-PDL can be removed in the same process operation. Figure 6 ) may be formed to be larger than the first edge D_EG of the pixel definition film PDL (see Figure 6 ) is disposed inwardly. The pixel definition film PDL may include an undercut portion UDT (see Figure 6 ).

[0177] The first portion N-P1 of the preliminary inorganic layer P-PN and the second portion D-P2 of the preliminary pixel definition film P-PDL may be removed by an ashing process. After the second portion D-P2 is removed, a pixel opening OH (see FIG. 1 ) may be formed. Fig.15 The first electrode EL1 may be exposed through the pixel opening OH of the pixel defining film PDL.

[0178] Reference Fig.15 and Fig.16 Before providing the composition COP, a plasma treatment may be performed on the pixel definition film PDL. The plasma treatment may be performed by providing a gas PLA to the pixel definition film PDL through a plasma device EV to impart liquid repellency to the pixel definition film PDL. The gas PLA may be a fluorine-containing gas. The fluorine-containing gas may include CF 4 , C 3 F 6 , C 4 F 8 , SF 6 , CHF 3 , C 5 F 8 , CH 2 F 2 , C 2 HF 5 , CH 3 F and NF 3 For example, the fluorine-containing gas may include CF 4 and NF3 At least one of .

[0179] Since the pixel definition film PDL has liquid repellency, the composition COP may be separately provided in the pixel opening OH, and the functional layer FL may be separately formed (see FIG. Fig.17 ). Therefore, if Figure 4 and Figure 7 As shown in FIG. 1 , the first functional layer FL- 1 , the second functional layer FL- 2 , and the third functional layer FL- 3 may be separately formed in the pixel opening OH.

[0180] Reference Fig.16 , the composition COP may be provided on the first electrode EL1. Fig.16 and Fig.17 , at least a portion of the functional layer FL may be formed from the composition COP. The functional layer FL may be formed on the first electrode EL1.

[0181] The functional layer FL may include reference Figure 5A and Figure 5B The electron transport region ETR, the light emitting layer EML and the hole transport region HTR described above. The functional layer FL may correspond to Figure 4 and Figure 7 The first functional layer FL-1, the second functional layer FL-2 and the third functional layer FL-3 shown in FIG.

[0182] The electron transport region ETR and the light emitting layer EML may be formed by providing a composition COP. The first composition COP for forming the light emitting layer EML may include quantum dots QD-C (see Figure 5A and Figure 5B The first composition COP may also include quantum dots QD-C which are easily dispersed therein (see Figure 5A and Figure 5B )'s first solvent.

[0183] The second composition COP for forming the electron transport region ETR may include metal nanoparticles NP (see Figure 5A and Figure 5B The second composition COP for forming the electron transport region ETR may further include metal nanoparticles NP easily dispersed therein (see Figure 5A and Figure 5B Since the method of providing the first composition for forming the light emitting layer EML and the method of providing the second composition for forming the electron transport region ETR are identical to each other, the same reference numerals are used for the first composition and the second composition.

[0184] Each composition COP for forming the light emitting layer EML and the electron transport region ETR may be provided by an inkjet printing or dispensing method. Fig.16 It is schematically shown that the composition COP is provided through the nozzle NZ, but the device for providing the composition COP is not limited thereto.

[0185] Reference Fig.18 , a second electrode EL2 may be formed on the functional layer FL. A capping layer CPL may be formed on the second electrode EL2. For example, the second electrode EL2 may include a metal material, a metal alloy, or a conductive compound. The capping layer CPL may include an organic material or an inorganic material.

[0186] The method for manufacturing a display device according to an embodiment of the present disclosure may include forming an inorganic layer and a pixel defining film by removing a first portion of a preliminary inorganic layer and a second portion of a preliminary pixel defining film. Since the first portion of the preliminary inorganic layer and the second portion of the preliminary pixel defining film are removed in the same process operation, the method for manufacturing a display device according to an embodiment of the present disclosure may have excellent manufacturing efficiency.

[0187] The display device according to the embodiment of the present disclosure can be manufactured by the method for manufacturing the display device according to the embodiment of the present disclosure. The display device according to the embodiment of the present disclosure may include a display element layer disposed on an insulating layer. The display element layer may include an inorganic layer, a pixel defining film, and a light-emitting element. The second edge of the inorganic layer may be disposed inwardly than the first edge of the pixel defining film. The inorganic layer may supply protons to the electron transport region of the light-emitting element. Therefore, the light efficiency of the light-emitting element can be improved, and the display device according to the embodiment of the present disclosure can exhibit excellent display efficiency.

[0188] The display device according to the embodiment of the present disclosure may exhibit excellent display efficiency by including an inorganic layer that supplies protons.

[0189] The method of manufacturing a display device according to an embodiment of the present disclosure may exhibit excellent manufacturing efficiency by forming an inorganic layer and a pixel defining film in the same process operation.

[0190] The above description is an example of the technical features of the present disclosure, and those skilled in the art to which the present disclosure belongs will be able to make various modifications and changes.Therefore, the embodiments of the present disclosure described above may be implemented separately or in combination with each other.

[0191] Therefore, the embodiments disclosed in the present disclosure are not intended to limit the technical spirit of the present disclosure, but to describe the technical spirit of the present disclosure, and the scope of the technical spirit of the present disclosure is not limited by these embodiments. The protection scope of the present disclosure should be interpreted by the attached claims, and it should be interpreted that all technical spirits within the equivalent scope are included in the scope of the present disclosure.

Claims

1. A display device, wherein: The display device comprises: Base layer; An insulating layer, disposed on the base layer; A pixel defining film, disposed on the insulating layer and having a pixel opening; a light emitting element, disposed on the insulating layer; and an inorganic layer disposed on the insulating layer and including an edge disposed inwardly of an edge of the pixel defining film and overlapping with the pixel defining film in a plan view, Wherein, the light emitting element comprises: a first electrode exposed through the pixel opening; A second electrode, disposed on the first electrode; a light-emitting layer including quantum dots and disposed between the first electrode and the second electrode; a hole transport region disposed between the first electrode and the second electrode; and The electron transport region includes a metal oxide, the electron transport region is separated from the hole transport region, the light emitting layer is interposed between the electron transport region and the hole transport region, and the electron transport region is disposed between the first electrode and the second electrode.

2. The display device according to claim 1, wherein: The inorganic layer includes at least one of amorphous silicon, silicon nitride, silicon oxide, and silicon oxynitride.

3. The display device according to claim 1, wherein: The inorganic layer is in contact with the electron transport region in a direction perpendicular to a thickness direction of the display device.

4. The display device according to claim 1, wherein: In a plan view, the inorganic layer does not overlap with the pixel opening.

5. The display device according to claim 1, wherein: The inorganic layer covers an edge of the first electrode.

6. The display device according to claim 1, wherein: defining an inorganic opening in the inorganic layer, and In a plan view, the inorganic opening overlaps with the pixel opening.

7. The display device according to claim 1, wherein: The insulating layer comprises: a first region overlapping the pixel definition film in a plan view and having a first thickness; and A second region overlaps the pixel opening in a plan view and has a second thickness smaller than the first thickness.

8. A method for manufacturing a display device, wherein: The method comprises: preparing a substrate layer; forming an insulating layer on the base layer; forming a first electrode on the insulating layer; forming a preliminary inorganic layer on the first electrode; forming a preliminary pixel defining film on the preliminary inorganic layer by using a first half-tone mask; forming an inorganic layer and a pixel defining film having a pixel opening by removing a first portion of the preliminary inorganic layer and a second portion of the preliminary pixel defining film overlapping the first portion in a plan view; forming a functional layer on the first electrode exposed through the pixel opening; and A second electrode is formed on the functional layer, wherein: The forming of the functional layer comprises: forming a light emitting layer by providing a first composition including quantum dots; forming a hole transport region; and forming an electron transport region by providing a second composition including a metal oxide, one of the forming of the hole transport region and the forming of the electron transport region being performed before the forming of the light emitting layer, and The other of the forming of the hole transport region and the forming of the electron transport region is performed after the forming of the light emitting layer.

9. The method according to claim 8, wherein: In the forming of the inorganic layer and the forming of the pixel defining film, an edge of the inorganic layer is disposed inwardly of an edge of the pixel defining film.

10. The method according to claim 8, wherein: By using a second half tone mask, the insulating layer is formed to include a first region having a first thickness and a second region having a second thickness smaller than the first thickness.

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