Display panel and display device

Abstract

The invention provides a display panel and a display device. The display panel comprises a substrate, a plurality of sub-pixel areas located on one side of the substrate and auxiliary cathode areas located between the sub-pixel areas. Each sub-pixel region comprises an anode layer, a light-emitting layer and a cathode layer which are stacked in the thickness direction of the substrate; the auxiliary cathode region comprises at least one auxiliary cathode, the auxiliary cathode comprises a conductive structure and a first conductive layer located on the side, away from the substrate, of the conductive structure, and the orthographic projection of the first conductive layer on the substrate covers the orthographic projection of the conductive structure on the substrate; wherein the first conducting layer comprises at least one eave structure, the light-emitting layer is broken at the eave structure, the cathode layer is electrically connected with the conducting structure at the broken position, and the maximum length of the orthographic projection of the eave structure on the substrate is smaller than the minimum distance between the orthographic projections of the anode layers in the two adjacent sub-pixel areas on the substrate.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] Organic light emitting diodes (OLED) are increasingly being used in high-performance display panels. OLED display panels mainly include a display drive circuit and a pixel array. The display drive circuit is used to drive the pixel array to emit light, thereby realizing image display. The pixel array may include multiple light emitting devices, and the multiple light emitting devices may include an anode, a cathode, and a light emitting layer located between the anode and the cathode.

[0003] Among them, in order to ensure the transmittance, the cathode layer is generally a thinner transparent cathode, but such a cathode layer has poor conductivity. During the power-on process, the voltage will decrease due to the existence of the cathode layer resistance, resulting in the brightness of the center area of ​​the screen being lower than the brightness of the edge area of ​​the screen, making the brightness of the center area of ​​the screen darker. Summary of the invention

[0004] Based on the background technology, the present disclosure proposes a display panel and a display device.

[0005] In a first aspect of the present disclosure, a display panel is provided, comprising a substrate, a plurality of sub-pixel regions located on one side of the substrate, and an auxiliary cathode region located between the sub-pixel regions;

[0006] The sub-pixel region comprises an anode layer, a light-emitting layer and a cathode layer stacked along the thickness direction of the substrate;

[0007] The auxiliary cathode region comprises at least one auxiliary cathode, wherein the auxiliary cathode comprises a conductive structure and a first conductive layer located on a side of the conductive structure away from the substrate, wherein an orthographic projection of the first conductive layer on the substrate covers an orthographic projection of the conductive structure on the substrate;

[0008] Wherein, the first conductive layer comprises at least one eaves structure, and the orthographic projection of the eaves structure on the substrate is located between the outer contour of the orthographic projection of the first conductive layer on the substrate and the outer contour of the orthographic projection of the conductive structure on the substrate;

[0009] The light-emitting layer is broken at the eaves structure, the cathode layer is electrically connected to the conductive structure at the break, and the maximum length of the orthographic projection of the eaves structure on the substrate is smaller than the minimum distance between the orthographic projections of the anode layers in two adjacent sub-pixel areas on the substrate.

[0010] Exemplarily, the first conductive layer further includes a gap, wherein the gap is located between two adjacent eaves structures, and the first conductive layer is hollowed out at the gap.

[0011] Exemplarily, the orthographic projection of the notch on the substrate is located outside an outer contour of the orthographic projection of the conductive structure on the substrate.

[0012] Exemplarily, the orthographic projection of the notch on the substrate and the orthographic projection of the conductive structure on the substrate have a minimum first vertical distance, and the orthographic projection of the eaves structure on the substrate is away from one side of the conductive structure and has a maximum second vertical distance from the orthographic projection of the conductive structure on the substrate;

[0013] Wherein, the first vertical distance is less than or equal to 0.5 times of the second vertical distance.

[0014] Exemplarily, the orthographic projection of the first conductive layer on the substrate is a polygon, and the maximum lengths of the eaves structures located on both sides of the gap are equal in a target direction, and the target direction is the direction of the side length of the first conductive layer.

[0015] Exemplarily, the orthographic projection of the first conductive layer on the substrate comprises a polygon;

[0016] There is at least one maximum length of the eaves structure in a target direction that is less than or equal to 0.5 times the length of the side where the eaves structure is located, and the target direction is the direction of the side length of the first conductive layer.

[0017] Exemplarily, the orthographic projection of the first conductive layer on the substrate includes a polygon, and at least one notch is provided on a first side of the polygon;

[0018] The side length of the first side is greater than the minimum distance between the orthographic projections of the anode layers in two adjacent sub-pixel regions on the substrate.

[0019] Exemplarily, at least one notch is provided on a second side of the polygon, the second side being a side other than the first side;

[0020] Among them, the gaps on the two sides in opposite directions are symmetrical.

[0021] Exemplarily, the inner angle of the orthographic projection of the notch on the substrate includes at least one of an obtuse angle and a right angle;

[0022] And / or, the orthographic projection of the notch on the substrate includes the intersection of a straight line segment and an arc segment.

[0023] Exemplarily, the auxiliary cathode region further includes:

[0024] A second conductive layer, located on a side of the auxiliary cathode close to the substrate and electrically connected to the conductive structure;

[0025] The second conductive layer includes a plurality of auxiliary cathodes on a side facing away from the substrate, and the orthographic projection of the second conductive layer on the substrate covers the orthographic projections of the plurality of auxiliary cathodes on the substrate, and the orthographic projections of the plurality of auxiliary cathodes on the substrate have no overlap.

[0026] Exemplarily, the orthographic projection of the first conductive layer on the substrate comprises a polygon, and the size of each side of the polygon is smaller than the minimum distance between the orthographic projections of the anode layers in two adjacent sub-pixel regions on the substrate.

[0027] Exemplarily, the orthographic projection of the eaves structure on the substrate coincides with a target area, and the target area is a region between an outer contour of an orthographic projection of the first conductive layer on the substrate and an outer contour of an orthographic projection of the conductive structure on the substrate.

[0028] Exemplarily, the conductive structure includes:

[0029] A first metal layer;

[0030] a second metal layer, located on a side of the first metal layer facing away from the substrate;

[0031] The orthographic projection of the first metal layer on the substrate overlaps with the orthographic projection of the second metal layer on the substrate.

[0032] Exemplarily, the display panel further includes:

[0033] a planar layer located on one side of the substrate, the planar layer comprising a first opening located in the auxiliary cathode region, the orthographic projection of the conductive structure on the substrate being located in the first opening; the anode layer being located on a side of the planar layer away from the substrate;

[0034] A pixel defining layer, located on a side of the anode layer away from the anode layer, comprising a second opening and a third opening;

[0035] Wherein, the orthographic projection of the second opening on the substrate covers the first opening, and the orthographic projection of the cathode layer on the substrate overlaps with the second opening;

[0036] The orthographic projections of the light emitting layer and the anode layer on the substrate cover the third opening and have no overlap with the second opening.

[0037] According to a second aspect of the embodiments of the present disclosure, a display device is provided, comprising a display panel as described in any one of the first aspects.

[0038] The display panel provided in the embodiments of the present disclosure may include a substrate, a plurality of sub-pixel regions located on one side of the substrate, and an auxiliary cathode region located between the sub-pixel regions; the sub-pixel region includes an anode layer, a light-emitting layer, and a cathode layer stacked along the thickness direction of the substrate; the auxiliary cathode region includes at least one auxiliary cathode, the auxiliary cathode includes a conductive structure and a first conductive layer located on the side of the conductive structure away from the substrate, the first conductive layer includes an edge region, the edge region is a region between an outer contour of an orthographic projection of the first conductive layer on the substrate and an outer contour of an orthographic projection of the conductive structure on the substrate; wherein the edge region includes at least one eaves structure, the light-emitting layer is broken at the eaves structure, the cathode layer is electrically connected to the conductive structure at the break, and the long side dimension of the orthographic projection of the eaves structure on the substrate is smaller than the minimum distance between the orthographic projections of the anode layers in two adjacent sub-pixel regions on the substrate.

[0039] On the one hand, since the edge area of ​​the first conductive layer located at the top of the auxiliary cathode includes at least one eaves structure, the light-emitting layer can be broken at the eaves structure when the light-emitting layer is formed. In this way, when the cathode layer is subsequently formed, the cathode layer can be electrically connected to the auxiliary cathode in the broken area of ​​the light-emitting layer, for example, electrically connected to the conductive structure of the auxiliary cathode, thereby improving the resistance distribution of the cathode layer and reducing the voltage drop. The cathode layer is in contact with the conductive structure through the broken part, which can also improve the display brightness, improve the display uniformity and other characteristics.

[0040] On the other hand, since the long side dimension of the orthographic projection of the eaves structure on the substrate is smaller than the minimum distance between the orthographic projections of the anode layers in two adjacent sub-pixel areas on the substrate, it is possible to avoid the problem of the eaves structure overlapping the anodes in adjacent sub-pixel areas after detaching from the first conductive layer, resulting in color crosstalk between adjacent sub-pixels when displaying the picture, thereby further improving the display quality.

[0041] The above description is only an overview of the technical solution of the present disclosure. In order to more clearly understand the technical means of the present disclosure, it can be implemented according to the contents of the specification. In order to make the above and other purposes, features and advantages of the present disclosure more obvious and easy to understand, the specific implementation methods of the present disclosure are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or related technologies, the following is a brief introduction to the drawings required for use in the embodiments or related technical descriptions. Obviously, the drawings described below are some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. It should be noted that the proportions in the drawings are only for illustration and do not represent the actual proportions.

[0043] Figure 1 A schematic cross-sectional structure diagram of a display panel in an embodiment is shown;

[0044] Figure 2A A schematic plan view of a display area of ​​a display panel in an embodiment of the present disclosure is shown;

[0045] Figure 2B A schematic diagram showing an orthographic projection of an auxiliary cathode and an anode on a substrate is exemplarily shown;

[0046] Figure 2C Shows Figure 2B An enlarged schematic diagram of a KA region;

[0047] Figure 2D Shows Figure 2B An enlarged schematic diagram of another KA region;

[0048] Figure 3 A cross-sectional schematic diagram of an array substrate in a display panel is shown;

[0049] Figure 4 Shows Figure 2B A schematic diagram of a partial area of ​​the middle substrate;

[0050] Figure 5 , Figure 6 and Figure 7 Schematic diagrams of the planes of three auxiliary cathodes are shown respectively;

[0051] Figure 8 Shows Figure 2B An enlarged schematic diagram of another KA region;

[0052] Fig. 9 A schematic plan view of the auxiliary cathode region is shown;

[0053] Fig.10 A schematic cross-sectional view of an auxiliary cathode is shown;

[0054] Fig.11 A schematic plan view of yet another auxiliary cathode is shown;

[0055] Fig.12 A schematic diagram showing the plane of the notch in the auxiliary cathode;

[0056] Figure 13-Figure 17 The schematic cross-sectional structures of the display panel during the formation process are shown respectively. DETAILED DESCRIPTION

[0057] In order to make the above-mentioned purposes, features and advantages of the present disclosure more obvious and understandable, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0058] In this specification, "electrically connected" and "coupled" include the situation where the components are connected together through an element having some electrical function. There is no particular limitation on the "element having some electrical function" as long as it can transmit and receive electrical signals between the connected components. Examples of "element having some electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements having various functions.

[0059] In this specification, "parallel" means a state where the angle formed by two straight lines is greater than -10° and less than 10°, and therefore, also includes a state where the angle is greater than -5° and less than 5°. In addition, "perpendicular" means a state where the angle formed by two straight lines is greater than 80° and less than 100°, and therefore, also includes a state where the angle is greater than 85° and less than 95°.

[0060] Unless the context requires otherwise, throughout the specification and claims, the term "comprising" is to be construed in an open, inclusive sense, ie, meaning "including, but not limited to."

[0061] The "same layer" in the embodiments of the present application refers to the relationship between multiple film layers formed by the same material after the same step (e.g., a one-step patterning process). The "same layer" here does not always mean that the thickness of multiple film layers is the same or the height of multiple film layers in the cross-sectional view is the same. The polygons in this specification are not strictly defined, and can be approximate triangles, parallelograms, trapezoids, pentagons or hexagons, etc., and there may be some small deformations caused by tolerances.

[0062] In the embodiment of the present application, since the source and drain of the transistor are symmetrical, the source and drain can be interchanged. In the embodiment of the present application, one of the source and drain of the transistor can also be called the first electrode, and the other of the source and drain can be called the second electrode.

[0063] In the related art, in order to improve the conductivity of the cathode, an auxiliary cathode can be added to the cathode, and the cathode resistance distribution can be improved by the electrical connection between the auxiliary cathode and the cathode. Generally speaking, after adding the auxiliary cathode, in order not to affect the formation of the light-emitting device, the morphology of the auxiliary cathode can be T-shaped or I-shaped. Such a morphology can cause the light-emitting layer to break at the cathode when the light-emitting layer is formed. However, due to the T-shaped or I-shaped morphology of the auxiliary cathode, the top conductive material of the auxiliary cathode is partially suspended, and the suspended part is prone to breakage, so that there will be broken conductive strips on the array substrate (array substrate) of the display panel. These conductive strips are easy to overlap the anodes in two adjacent sub-pixel areas during the purging process of the array substrate, so that the anodes in the two adjacent sub-pixel areas are electrically connected, so that in the later display of the display panel, the colors of the two adjacent sub-pixel areas will be crosstalked, thereby affecting the picture quality of the display panel.

[0064] In view of this, the present disclosure proposes a display panel, in which an eaves structure is arranged on the topmost conductive layer of the auxiliary cathode of the display panel, and the longest side of the eaves structure is smaller than the minimum distance between the anodes in two adjacent sub-pixel areas. In this way, even if the top conductive layer of the auxiliary cathode falls off for some reason in the later stage, since its maximum size is smaller than the minimum distance between the anodes in two adjacent sub-pixel areas, the anodes in the two adjacent sub-pixel areas will not be electrically connected, thereby avoiding the problem of cross-color in the later display, thereby improving the picture quality.

[0065] The display panel according to the embodiment of the present disclosure is exemplarily described below with reference to the accompanying drawings.

[0066] Please refer to Figure 1 As shown, Figure 1 A schematic diagram of the cross-sectional structure of a display panel in an embodiment is shown. Figure 1 As shown, the display panel may include:

[0067] A substrate 11, a plurality of sub-pixel regions K1 located on one side of the substrate 11, and an auxiliary cathode region K2 located between the sub-pixel regions K1;

[0068] The sub-pixel region K1 includes an anode layer 20, a light-emitting layer 21 and a cathode layer 22 stacked along the thickness direction of the substrate 11;

[0069] The auxiliary cathode region K2 includes at least one auxiliary cathode 30, wherein the auxiliary cathode 30 includes a conductive structure 37 and a first conductive layer 36 located on a side of the conductive structure 37 away from the substrate 11, and an orthographic projection of the first conductive layer 36 on the substrate 11 covers an orthographic projection of the conductive structure 37 on the substrate 11;

[0070] Among them, the first conductive layer 36 includes at least one eaves structure 39, the light-emitting layer 21 is broken at the eaves structure 39, the cathode layer 22 is electrically connected to the conductive structure 37 at the break, and the long side dimension of the orthographic projection of the eaves structure 39 on the substrate 11 is smaller than the minimum distance between the orthographic projections of the anode layer 20 in two adjacent sub-pixel areas K1 on the substrate 11.

[0071] The orthographic projection of the eaves structure 39 on the substrate 11 is located between the outer contour of the orthographic projection of the first conductive layer 36 on the substrate 11 and the outer contour of the orthographic projection of the conductive structure 37 on the substrate 11 .

[0072] In this embodiment, the substrate 11 may be a transparent substrate 11, and the display panel may be an OLED display panel, wherein one side of the substrate 11 may include a display area, the display area may include multiple sub-pixel areas K1, and an auxiliary cathode area K2 located between the multiple sub-pixel areas K1.

[0073] Among them, an auxiliary cathode area K2 can be set between every two adjacent sub-pixel areas K1, or an auxiliary cathode area K2 can be set between some adjacent sub-pixel areas K1, and the number of auxiliary cathode areas K2 can be smaller than the number of sub-pixel areas K1; the arrangement density of the auxiliary cathode areas K2 can be smaller than the arrangement density of the sub-pixel areas K1.

[0074] Among them, Figure 2A As shown, Figure 2A shows a schematic plan view of the display area, Figure 2A The arrangement of the auxiliary cathode region K2 and the sub-pixel region K1 in the display region is briefly illustrated. Figure 2A As shown, the orthographic projection of the auxiliary cathode region K2 on the substrate 11 does not overlap with the orthographic projection of the sub-pixel region K1 on the substrate 11, wherein the area of ​​the orthographic projection of the auxiliary cathode region K2 on the substrate 11 may be smaller than the area of ​​the orthographic projection of the sub-pixel region K1 on the substrate 11, and the number of the auxiliary cathode regions K2 may be smaller than the number of the sub-pixel regions K1, as shown in FIG. Figure 2A As shown, the area occupied by the auxiliary cathode region K2 is smaller than the area occupied by the sub-pixel region K1.

[0075] The shape of the auxiliary cathode area K2 may be determined according to the shape of the sub-pixel area K1. For example, the outer contour of the positive projection of the auxiliary cathode area K2 on the substrate 11 may be a polygon, a circle, an ellipse, etc. In the case of a polygon, it may be a regular polygon or an irregular polygon.

[0076] An auxiliary cathode region K2 may be surrounded by sub-pixel regions K1 , and the auxiliary cathode region K2 and the sub-pixel region K1 may be blocked by the pixel defining layer 23 , so that the pixel defining layer 23 may define the sub-pixel region K1 and the auxiliary cathode region K2 .

[0077] The sub-pixel area K1 includes sub-pixels of the display panel, and the sub-pixels include light-emitting devices and pixel driving circuits connected to the light-emitting devices. Figure 1 As shown, the light emitting device may include an anode, a cathode, and a light emitting layer 21 located between the anode and the cathode, which are arranged in the thickness direction of the substrate 11. For example, the light emitting layer 21 is located on the side of the anode facing away from the substrate 11, and the cathode is located on the side of the light emitting layer 21 facing away from the substrate 11. The anode may include a first anode layer 20A and a second anode layer 20B located on the side of the first anode layer 20A facing away from the substrate 11.

[0078] The pixel driving circuit may include a thin film transistor connected to the anode of the light emitting device, and the thin film transistor may be a bottom gate thin film transistor or a top gate thin film transistor, such as Figure 1 As shown, taking a top-gate thin film transistor as an example, it may include a semiconductor layer 12, a source-drain layer located on the side of the semiconductor layer 12 facing away from the substrate 11, and a gate 14 located on the side of the source-drain layer facing away from the substrate 11, wherein a first insulating layer 13 is included between the gate 14 and the semiconductor layer 12, a second insulating layer 15 is included between the source-drain layer (including 16A and 16B) and the gate 14, the source-drain layer (including 16A and 16B) includes a source electrode and a drain electrode, and either the source electrode and the drain electrode is electrically connected to the anode layer 20.

[0079] like Figure 1 As shown, the light-emitting device is located in the sub-pixel area K1. Specifically, the positive projection of the anode layer in the light-emitting device on the substrate 11 can cover the positive projection of the opening area of ​​the pixel defining layer 23 (the third opening K11 in the subsequent embodiments) on the substrate 11, and the positive projection of the cathode layer on the substrate 11 can overlap with the sub-pixel area K1 and the auxiliary cathode area K2.

[0080] Among them, the display colors of the light-emitting devices of each sub-pixel in the above-mentioned display panel are the same; in some embodiments, the above-mentioned display panel simultaneously includes multiple sub-pixels that display different colors, for example, simultaneously including red sub-pixels, green sub-pixels and blue sub-pixels, so that multiple sub-pixels simultaneously include red sub-pixels, green sub-pixels and blue sub-pixels.

[0081] In some embodiments, the light-emitting colors of all light-emitting devices may be the same, for example, all light-emitting devices emit blue light; for another example, all light-emitting devices emit white light; in this case, when used for display, a color conversion layer needs to be set on the light-emitting side of the light-emitting device, for example, a color filter (Color Filter) may be set on the light-emitting side of the light-emitting device, such as a red filter, a green filter and a blue filter; for another example, different color quantum dot layers (QD Film) may be set on the light-emitting side of the light-emitting device, such as a red quantum dot layer, a green quantum dot layer and a white resin layer, the blue light emitted by the light-emitting layer 21 passes through the red quantum dot layer and then emits red light, the blue light emitted by the light-emitting layer 21 passes through the green quantum dot layer and then emits green light, and the blue light emitted by the light-emitting layer 21 passes through the white resin layer and then emits blue light, thereby achieving a colored display.

[0082] like Figure 1 As shown, the auxiliary cathode area K2 may include at least one auxiliary cathode 30, the auxiliary cathode 30 may include a conductive structure 37 and a first conductive layer 36 located on the side of the conductive structure 37 away from the substrate 11, and the orthographic projection of the first conductive layer 36 on the substrate 11 may cover the orthographic projection of the conductive structure 37 on the substrate 11, so that the first conductive layer 36 has a portion that exceeds the boundary of the conductive structure 37.

[0083] In one example, please combine Fig.10 As shown, Fig.10 The schematic cross-sectional structure diagram of the auxiliary cathode 30 is shown. The orthographic projection of the conductive structure 37 and the first conductive layer 36 on the thickness plane of the substrate 11 may be T-shaped or I-shaped. Fig.10 The auxiliary cathode 30 shown in FIG. 1 is an I-beam shape.

[0084] Combination Fig.10 , Figure 2B and Figure 2C As shown, Figure 2B A schematic diagram showing an orthographic projection of the auxiliary cathode 30 and the anode on the substrate 11 is exemplarily shown. Figure 2C Shows Figure 2B A magnified schematic diagram of the middle KA region, such as Figure 2C and Fig. 9 As shown, the first conductive layer 36 in the auxiliary cathode 30 may include an edge region 361 , which is a region between an outer contour of an orthographic projection of the first conductive layer 36 on the substrate 11 and an outer contour of an orthographic projection of the conductive structure 37 on the substrate 11 .

[0085] Among them, the eaves structure 39 included in the first conductive layer can be located in the edge area 361, that is, at least one eaves structure 39 can be included in the edge area 361, and the eaves structure 39 can be understood as the part of the first conductive layer 36 that extends beyond the conductive structure 37 and is suspended in the air. During the process of forming the light-emitting layer 21, the eaves structure 39 can cause the light-emitting layer 21 to break here.

[0086] For example, Figure 1 As shown, when the light-emitting layer 21 is formed, since the eaves structure 39 is suspended, the light-emitting layer 21 will be broken here, so that the light-emitting layer 21 will form a broken area in the auxiliary cathode area K2, and when the cathode layer 22 is subsequently formed, the cathode layer 22 can be electrically connected to the conductive structure 37 of the auxiliary cathode 30, that is, the cathode layer 22 will directly contact the side wall of the auxiliary cathode 30 in the broken area, thereby realizing the electrical connection between the cathode layer 22 and the auxiliary cathode 30.

[0087] In this way, the auxiliary cathode 30 can help improve the resistance distribution of the cathode layer 22, thereby reducing the voltage drop, and the cathode layer 22 is in contact with the conductive structure 37 through the fracture, which can also improve display brightness, display uniformity and other characteristics.

[0088] In order to prevent the eaves structure 39 of the auxiliary cathode 30 from falling off the first conductive layer 36 due to insufficient stress or the like, and overlapping the anode layer 20 of the adjacent sub-pixel area K1 during the purging process, the maximum length of the positive projection of the eaves structure 39 on the substrate 11 in this embodiment can be less than the minimum distance between the anode layers 20 in adjacent sub-pixel areas K1.

[0089] For example, please combine Figure 3 , Figure 4 As shown, Figure 3 shows a cross-sectional schematic diagram of an array substrate in a display panel, Figure 4 Shows Figure 2B The local area of ​​the substrate ( Figure 2B 1 , the array substrate is an intermediate product in the process of forming a display panel, and the array substrate includes each thin film transistor in the pixel driving circuit, and a passivation layer 17 located on the side of the pixel driving circuit away from the substrate 11, and an organic flat layer 19 located on the side of the passivation layer 17 away from the substrate 11, as shown in FIG. Figure 3As shown, when the auxiliary cathode 30 is formed, the anode layer 20 is also formed at the same time. In the subsequent process of forming the pixel defining layer 23, some mechanical vibrations are inevitable. This process may cause the eaves structure 39 to fall off. The thus-fallen eaves structure 39 may overlap the anode layer 20 of the adjacent sub-pixel area K1, making the anodes of the adjacent sub-pixel areas K1 connected. In this way, when the display panel is subsequently manufactured for display, color crosstalk between the adjacent sub-pixel areas K1 will be caused, thereby affecting the picture quality.

[0090] Therefore, if Figure 4 and Figure 2B As shown, the maximum length d1 of the eaves structure 39 in the present embodiment on the orthographic projection of the substrate 11 can be smaller than the minimum distance d2 between the anode layers 20 in adjacent sub-pixel areas K1, so that the length of the eaves structure 39 in the longest direction is smaller than the minimum distance between the anode layers 20 in adjacent sub-pixel areas K1. Therefore, after the eaves structure 39 falls off, its length is not enough to overlap between the anode layers 20 of adjacent sub-pixel areas K1. Therefore, even if there is residual eaves structure 39 that is eventually left on the array substrate, it will not cause the anode layers 20 of adjacent sub-pixel areas K1 to be connected, thereby avoiding color crosstalk between sub-pixels, thereby improving the picture quality during subsequent display.

[0091] The maximum length of the orthographic projection of the eaves structure 39 on the substrate 11 can be understood as the length of the eaves structure 39 at the longest point, for example, Figure 4 As shown, the orthographic projection of the eave structure 39 on the substrate 11 is a rectangle, and the long side dimension may be the dimension of the long side of the rectangle.

[0092] As another example, the orthographic projection of the eaves structure 39 on the substrate 11 is an irregular shape, so the maximum length of the eaves structure 39 can be the straight-line distance between the two farthest points in the orthographic projection of the eaves structure 39 on the substrate 11. Fig.10 As shown, Fig.10 The cross-sectional view of the auxiliary cathode 30 is schematically shown. Fig.10 As shown, the orthographic projection of the first conductive layer 36 on the substrate 11 is a circle, and the orthographic projection of the eaves structure 39 on the substrate 11 is a sector. The long side dimension of the orthographic projection of the eaves structure 39 on the substrate 11 may be the distance between the two farthest points in the sector area.

[0093] The minimum distance between the orthographic projections of the anode layer 20 in two adjacent sub-pixel regions K1 on the substrate 11 may be the minimum vertical distance between the orthographic projections of the anode layer 20 in the adjacent sub-pixel regions K1 on the substrate 11. Figure 2A to Figure 2DAs shown, the anode layer 20 of the sub-pixel can be of irregular shape, which makes the boundary of the anode layer 20 irregular. In this way, the vertical distance between the anode layers 20 of adjacent sub-pixels can be the vertical distance between the edges. In this embodiment, the minimum vertical distance between the edges is taken so that the long side dimension of the eaves structure 39 is smaller than the minimum vertical distance, thereby avoiding the eaves structure 39 from overlapping between adjacent sub-pixels.

[0094] In which, since the anode layer 20 includes a first anode layer 20A and a second anode layer 20B, when the orthographic projection of the first anode layer 20A on the substrate 11 covers the orthographic projection of the second anode layer 20B on the substrate 11, the minimum vertical distance between the orthographic projections of the anode layer 20 in adjacent sub-pixel areas K1 on the substrate 11 may refer to the minimum vertical distance between the orthographic projections of adjacent first anode layers 20A on the substrate 11.

[0095] Among them, two adjacent sub-pixel areas K1 can be every two adjacent sub-pixel areas K1 in the entire display area, rather than specifically referring to two sub-pixel areas K1 adjacent to the auxiliary cathode 30. For example, including N pixel areas, the minimum distance between the positive projections of the first anode layer 20A in every two adjacent sub-pixel areas K1 on the substrate 11 can be calculated, and a total of M minimum distances can be obtained. The small value of the M minimum distances is taken, so that the maximum length of the eaves structure 39 is less than the minimum value of the M minimum distances.

[0096] Wherein, M is greater than N, and N is a positive integer, which is related to the resolution of the display panel.

[0097] In the display panel of this embodiment, since the maximum length of the eaves structure 39 is smaller than the minimum distance between the anode layers 20 of adjacent sub-pixel areas K1, it is possible to avoid the problem of color crosstalk between sub-pixels caused by the eaves structure 39 falling off and overlapping with the anode layer 20 of the adjacent sub-pixel area K1, thereby making the anode layers 20 of the adjacent sub-pixel areas K1 connected.

[0098] In some examples, the orthographic projection of the eaves structure 39 on the substrate may be located between the first conductive layer and the outer contour of the orthographic projection of the conductive structure on the substrate. Specifically, the orthographic projection of the eaves structure 39 on the substrate may fall in the area between the orthographic projection of the first conductive layer on the substrate and the outer contour of the orthographic projection of the conductive structure on the substrate. That is, the partial area between the orthographic projection of the first conductive layer on the substrate and the outer contour of the orthographic projection of the conductive structure on the substrate is the eaves structure 39.

[0099] Alternatively, the orthographic projection of the eaves structure 39 on the substrate may coincide with the area between the orthographic projection of the first conductive layer on the substrate and the outer contour of the orthographic projection of the conductive structure on the substrate, that is, the entire area between the orthographic projection of the first conductive layer on the substrate and the outer contour of the orthographic projection of the conductive structure on the substrate is the eaves structure 39.

[0100] In some embodiments, please combine Figure 4 and Figure 2B-2D As shown, the orthographic projection of the first conductive layer 36 in the auxiliary cathode 30 on the substrate 11 may not overlap with the anode layer 20 of two adjacent sub-pixel regions K1, or the orthographic projection of the first conductive layer 36 on the substrate 11 may overlap with the anode layer 20 of two adjacent sub-pixel regions K1.

[0101] Among them, Figure 2B-2D As shown, regardless of whether the first conductive layer 36 of the auxiliary cathode 30 overlaps with the anode, the maximum length of the orthographic projection of the first conductive layer 36 of the auxiliary cathode 30 on the substrate 11 can be greater than the minimum vertical distance between the anode layers 20 of two adjacent sub-pixel regions K1.

[0102] Alternatively, in some examples, there is no overlap between the first conductive layer 36 of the auxiliary cathode 30 and the anode, but the maximum length of the positive projection of the first conductive layer 36 of the auxiliary cathode 30 on the substrate 11 is smaller than the minimum vertical distance between the anode layers 20 of two adjacent sub-pixel areas K1. In this example, even if the eaves structure 39 of the auxiliary cathode 30 is broken, it will not overlap the anode layers 20 of the two adjacent sub-pixel areas K1.

[0103] In one embodiment, the maximum length of the eaves structure 39 is smaller than the minimum distance between the anode layers 20 of adjacent sub-pixel regions K1. Figure 2D and Figure 5 As shown, Figure 5 Shows Figure 2D A plan schematic diagram of the auxiliary cathode 30 in the figure, wherein at least one notch 38 can be etched at the edge of the first conductive layer 36, and the notch 38 can penetrate the first conductive layer 36 in the thickness direction of the substrate 11. The existence of the notch 38 causes a fracture area to exist in the edge area 361, thereby dividing the edge area 361 into at least two eaves structures 39 through the notch 38, and due to the existence of the notch 38, the eaves structure 39 also falls off from the notch 38 when it falls off, thereby making the maximum length of the fallen eaves structure 39 less than the minimum distance between the anode layers 20 of adjacent sub-pixel areas K1, and will not cause connectivity between the anode layers 20 of adjacent sub-pixel areas K1.

[0104] The position and number of the gaps 38 can be determined according to the maximum length of the edge region 361 and the minimum distance between the anode layers 20 of adjacent sub-pixel regions K1.

[0105] Thus, a gap 38 may be included between the two eave structures.

[0106] Exemplarily, assuming that the maximum length of the edge region 361 is d3 and the minimum distance between the anode layers 20 of adjacent sub-pixel regions K1 is d2, the maximum length d1 of each eave structure 39 obtained should satisfy the following relationship:

[0107] d1≤d3 / n relation (1), where n can be obtained by formula (2):

[0108] n=1+(d3-d2) / d2 Formula (2)

[0109] In this way, the number of eave structures 39 and the positions of the gaps 38 can be obtained according to the above-mentioned equations (1) and (2).

[0110] The notch 38 is provided in the direction of the maximum length of the edge region 361, for example, Figure 5 As shown, it is opened in the long side direction of the edge area 361.

[0111] The notch 38 penetrates the first conductive layer 36 in the thickness direction of the substrate 11 .

[0112] In this embodiment, the auxiliary cathode 30 can be allowed to have a larger size, such as the first conductive layer 36 can be allowed to have a larger size, thereby reducing the difficulty of process manufacturing. At the same time, the edge area 361 can be divided into multiple eaves structures 39 through the opening gap 38, and the maximum length of each eaves structure 39 is made smaller than the minimum distance between the anode layers 20 of adjacent sub-pixel areas K1, thereby solving the problem of the anode layers 20 of adjacent sub-pixel areas K1 being connected due to the fallen eaves structure 39.

[0113] The maximum length of the eaves structure 39 may be the size of the gap in the circumferential direction of the first conductive layer 36. For example, if the first conductive layer 36 is a rectangle, the maximum length of the eaves structure 39 may be the size in the long side direction.

[0114] In some embodiments, the orthographic projection of the notch 38 on the substrate 11 may be located outside the outer contour of the orthographic projection of the conductive structure 37 on the substrate 11. In this case, the partial area between the orthographic projection of the first conductive layer on the substrate and the outer contour of the orthographic projection of the conductive structure on the substrate is the eaves structure 39.

[0115] In this embodiment, Figure 5 and Figure 2DAs shown, the notch 38 is provided in the edge region 361 of the first conductive layer 36, and the notch 38 does not extend into the contact surface between the first conductive layer 36 and the conductive structure 37, that is, the orthographic projection of the notch 38 on the substrate 11 does not overlap with the orthographic projection of the conductive structure 37 on the substrate 11. In this way, when the notch 38 ensures that the maximum length (the dimension in the circumferential direction) of each eave structure 39 is less than the minimum distance between the anode layers 20 of adjacent sub-pixel regions K1, since the notch 38 does not extend into the conductive structure 37, the edge region 361 of the first conductive layer 36 retains a portion of support at the notch 38, thereby reducing the risk of the eave structure 39 breaking from the first conductive layer 36.

[0116] In a further example of this embodiment, there is a minimum first vertical distance between the orthographic projection of the notch 38 on the substrate 11 and the orthographic projection of the conductive structure 37 on the substrate 11, and there is a maximum second vertical distance between the outer contour of the orthographic projection of the eaves structure 39 on the substrate 11 and the outer contour of the orthographic projection of the conductive structure 37 on the substrate 11; wherein the first vertical distance is less than or equal to 0.5 times the second vertical distance.

[0117] Please combine Figure 5 As shown, the first vertical distance w2 can be understood as: the distance between the notch 38 and the conductive structure 37 in the planar direction, which can reflect the depth of the notch 38. The value of the first vertical distance is larger, indicating that the notch 38 is farther away from the conductive structure 37 in the planar direction. The value of the first vertical distance is smaller, indicating that the notch 38 is closer to the conductive structure 37 in the planar direction.

[0118] Among them, the second vertical distance w3 can represent the size of the eaves structure 39 in the outer direction of the conductive structure 37. For example, the size of the part of the eaves structure 39 on the substrate 11 that exceeds the conductive structure 37 on the substrate 11 can also be understood as the width of the eaves structure 39.

[0119] It should be noted that Figure 5Taking the conductive structure 37 and the first conductive layer 36 as an example, in some other embodiments, the orthographic projections of the first conductive layer 36 and the conductive structure 37 on the substrate 11 may be other shapes, for example, the orthographic projection of the first conductive layer 36 on the substrate 11 may be a circle, and the orthographic projection of the conductive structure 37 on the substrate 11 may be a rectangle, or the orthographic projection of the first conductive layer 36 on the substrate 11 may be a rectangle, and the orthographic projection of the conductive structure 37 on the substrate 11 may be a circle, so that the conductive structure 37 is similar to a cylinder; or the orthographic projection of the first conductive layer 36 on the substrate 11 may be a circle, and the orthographic projection of the conductive structure 37 on the substrate 11 may also be a circle. In this case, the first vertical distance w2 can be understood as: the minimum spacing between the notch 38 and the conductive structure 37 in the plane direction; the second vertical distance w3 can represent the maximum width of the eaves structure 39 in the outer direction of the conductive structure 37.

[0120] Among them, the first vertical distance w2 can be less than or equal to 0.5 times the second vertical distance w3, that is, the depth of the notch 38 cannot exceed half the width of the eaves structure 39. As a result, the notch 38 can be farther away from the conductive structure 37, thereby ensuring the firmness of the eaves structure 39 and reducing the risk of breakage of the eaves structure 39.

[0121] Exemplarily, the first vertical distance w2 may be equal to 0.5 times the second vertical distance w3, or the first vertical distance w2 may be 0.4 times w3 or 0.3 times w3.

[0122] In some embodiments, the first vertical distance w2 may be 0.3 times w3 to 0.5 times w3. In this way, on the one hand, the firmness of the eaves structure 39 can be ensured, and on the other hand, when the eaves structure 39 is broken under the action of mechanical force, the maximum length of the eaves structure 39 can be less than the minimum distance between the anode layers 20 of adjacent sub-pixel regions K1.

[0123] Exemplarily, in some embodiments, the dimension w3 of the notch 38 in the direction of the maximum length of the eaves structure 39 may be less than 0.2 times the maximum length of the eaves structure 39. Thus, the dimension w3 of the notch 38 in the direction of the maximum length of the eaves structure 39 may be understood as the width of the notch 38. The width of the notch 38 should not be too wide to prevent the notch 38 from being too large and the light-emitting layer 21 from being easily broken.

[0124] For example, the dimension w3 of the notch 38 in the direction where the maximum length of the eaves structure 39 is located may be 0.2 times, 0.15 times, or 0.1 times the maximum length of the eaves structure 39 .

[0125] In some embodiments, the maximum lengths of the eave structures 39 on both sides of the notch 38 may be equal.

[0126] For example, Figure 5 For example, the orthographic projection of the first conductive layer 36 on the substrate 11 includes a polygon, and on at least one side of the polygon, the maximum lengths of the eaves structures 39 on both sides of the notch 38 on the side are equal.

[0127] The maximum length of the eaves structure 39 refers to the maximum length of the eaves structure in the direction of the side length of the first conductive layer 36 .

[0128] In this way, the notch 38 can be opened at the midpoint of the edge of the polygon, thereby making the maximum lengths of the eaves structures 39 on both sides of the notch 38 equal. In this way, the stress between the eaves structures 39 on both sides of the notch 38 and the middle area between the conductive structure 37 and the first conductive layer 36 can be made consistent, thereby improving the stability of the eaves structure 39 and preventing the eaves structure 39 from breaking.

[0129] The middle area refers to an area where the orthographic projection of the first conductive layer 36 on the substrate 11 overlaps with the orthographic projection of the conductive structure 37 on the substrate 11 .

[0130] The midpoint position refers to the position of the midpoint of the edge.

[0131] A notch 38 may be provided on each side of the polygon, and the notch 38 on each side may be located at the midpoint of the side.

[0132] A notch 38 may be provided on some sides of the polygon, and the notch 38 on some sides may be located at the midpoint of the side.

[0133] One or more notches 38 may be provided on one edge. When multiple notches 38 are provided, the spacing between the multiple notches 38 may be equal, so that the maximum lengths of the eaves structures 39 on both sides of each notch 38 are equal.

[0134] For example, Figure 7 As shown, on two edges in opposite directions, Figure 7 Two notches 38 are provided on the middle and upper sides. The two notches 38 divide the edge area 361 into three eave structures 39. The maximum lengths of the three eave structures 39 may be equal.

[0135] In some embodiments, the orthographic projection of the first conductive layer 36 on the substrate 11 includes a polygon; wherein the orthographic projection of the first conductive layer 36 on the substrate 11 includes a polygon; and the maximum length of the eaves structure 39 on at least one edge is less than or equal to 0.5 times the length of the edge on which the eaves structure 39 is located.

[0136] The maximum length of the eaves structure 39 refers to the maximum length in the side length direction of the first conductive layer.

[0137] In this embodiment, taking the figure of the orthographic projection of the first conductive layer 36 on the substrate 11 as a polygon as an example, each side of the polygon may include a notch 38, or at least one side of the polygon may be provided with a notch 38.

[0138] The notch 38 may be provided at the midpoint of the edge, for example, Figure 2D As shown, in this case, the maximum lengths of the eave structures 39 on both sides of the notch 38 are equal, and the maximum length of the eave structures 39 can be less than 0.5 times the length of the side where the eave structures 39 are located.

[0139] The notch 38 may also be provided at a position other than the midpoint of the edge, for example, Figure 6 As shown, Figure 6 Shows Figure 2D Another schematic plan view of the auxiliary cathode 30 in FIG. Figure 6 As shown, the notch 38 can be opened at a position other than the midpoint of the edge, so that the maximum lengths of the eaves structures 39 on both sides of the notch 38 are not equal. At this time, the maximum length of at least one eaves structure 39 is less than 0.5 times the length of the edge where the eaves structure 39 is located, and the maximum length of the other eaves structure 39 can be slightly greater than 0.5 times the length of the edge where the eaves structure 39 is located.

[0140] In some embodiments, the orthographic projection of the first conductive layer 36 on the substrate 11 includes a polygon, and at least one gap 38 is opened on the first side of the polygon; wherein the side length of the first side is greater than the minimum distance between the orthographic projections of the anode layer 20 in two adjacent sub-pixel areas K1 on the substrate 11.

[0141] In this embodiment, at least one notch 38 may be provided on a first side of the first conductive layer 36 whose side length is greater than the minimum distance between the orthographic projections of the anode layer 20 in two adjacent sub-pixel regions K1 on the substrate 11 .

[0142] For example, Figure 2DAs shown, the orthographic projection of the first conductive layer 36 on the substrate 11 includes a rectangle, wherein the lengths of the long sides and short sides of the rectangle are both greater than the minimum distance between the orthographic projections of the anode layer 20 in two adjacent sub-pixel areas K1 on the substrate 11, and at least one notch 38 is opened on the long sides and short sides of the rectangle. For example, a notch 38 is opened, so that the originally suspended long strip of the first conductive layer 36 is divided into two short metal strips (i.e., eaves structures 39) through the notch 38, and the maximum length of each eaves structure 39 is less than the minimum distance between the orthographic projections of the anode layer 20 in two adjacent sub-pixel areas K1 on the substrate 11.

[0143] Of course, in some other embodiments, a notch 38 may be provided on the second side whose side length is smaller than the minimum distance between the orthographic projections of the anode layer 20 in two adjacent sub-pixel areas K1 on the substrate 11, and the notches 38 on the two sides in relative directions may be symmetrical. Thus, the stress symmetry between the eaves structure 39 and the middle area of ​​the first conductive layer 36 and the conductive structure 37 may be improved, thereby improving the stability of the eaves structure 39 and avoiding breakage of the eaves structure 39.

[0144] Symmetry may refer to the symmetry of the positions of the notches 38 and the symmetry of the shapes of the notches 38 .

[0145] In some embodiments, the shape of the orthographic projection of the notch 38 on the substrate 11 may include a polygon, wherein the inner angle of the polygon may be 90 degrees, or the inner angle of the polygon may be an obtuse angle, such as Fig.12 As shown in (1) and (3) in the figure, when the angle is obtuse, the supporting stress on the eave structure 39 can be increased, thereby preventing the eave structure 39 from breaking.

[0146] The orthographic projection of the notch 38 on the substrate 11 may be formed by connecting a plurality of straight line segments, or may be formed by sequentially connecting straight line segments and arc segments. In this case, the notch may also include a situation where a straight line and an arc segment intersect, such as Fig.12 As shown in (2), no further details will be given here.

[0147] In yet another embodiment in which the maximum length of the above-mentioned eaves structure 39 is smaller than the minimum distance between the anode layers 20 of adjacent sub-pixel areas K1, a plurality of auxiliary cathodes 30 may be arranged in the auxiliary cathode area K2. Thus, a greater number of auxiliary cathodes 30 are arranged in the auxiliary cathode area K2 of the same area, so that the size of each auxiliary cathode 30 is reduced, for example, the size of the positive projection of each auxiliary cathode 30 on the substrate 11 is reduced, thereby reducing the maximum length of the eaves structure 39.

[0148] For example, please combine Figure 8 and Fig. 9 As shown, Figure 8 Shows Figure 2B A magnified schematic diagram of the KA region in FIG. Fig. 9 Shows Figure 8 A schematic plan view of the auxiliary cathode region K2 in FIG. Figure 8 and Fig. 9 As shown, the auxiliary cathode region K2 also includes:

[0149] The second conductive layer 33 is located on a side of the auxiliary cathode 30 close to the substrate 11 and is electrically connected to the conductive structure 37;

[0150] The second conductive layer 33 includes a plurality of auxiliary cathodes 30 on the side facing away from the substrate 11 , and the orthographic projection of the second conductive layer 33 on the substrate 11 covers the orthographic projections of the plurality of auxiliary cathodes 30 on the substrate 11 , and the orthographic projections of the plurality of auxiliary cathodes 30 on the substrate 11 do not overlap.

[0151] A plurality of auxiliary cathodes 30 are disposed on the second conductive layer 33 , and the conductive structure 37 of each auxiliary cathode 30 is electrically connected to the auxiliary cathode 30 , so that the plurality of auxiliary cathodes 30 are electrically connected.

[0152] The orthographic projection of the second conductive layer 33 on the substrate 11 may cover the orthographic projections of the plurality of auxiliary cathodes 30 on the substrate 11 . For example, the orthographic projection of the second conductive layer 33 on the substrate 11 may also cover the opening of the pixel defining layer 23 in the auxiliary cathode region K2 .

[0153] The compositions of the plurality of auxiliary cathodes 30 may be consistent, for example, all of them include a conductive structure 37 and a first conductive layer 36 located on a side of the conductive structure 37 facing away from the substrate 11 .

[0154] The shapes of the orthographic projections of the plurality of auxiliary cathodes 30 on the thickness plane of the substrate 11 may be consistent, for example, all of them may be T-shaped or all of them may be I-shaped.

[0155] Alternatively, the shapes of the orthographic projections of the plurality of auxiliary cathodes 30 on the thickness plane of the substrate 11 may be different. For example, the shapes of the orthographic projections of some auxiliary cathodes 30 on the thickness plane of the substrate 11 are T-shaped, and the shapes of the orthographic projections of some auxiliary cathodes 30 on the thickness plane of the substrate 11 are I-shaped. In the case of the I-shaped orthographic projections, some auxiliary cathodes 30 are Fig.10 In the structure shown in Figure (1), part of the auxiliary cathode 30 is Fig.10 In the structure shown in Figure (2), part of the auxiliary cathode 30 is Fig.10 The structure shown in Figure (3).

[0156] The orthographic projections of the plurality of auxiliary cathodes 30 on the substrate 11 may have the same size, which may refer to the area. For example, the orthographic projections of the first conductive layer 36 in the plurality of auxiliary cathodes 30 on the substrate 11 may have the same size and shape.

[0157] One auxiliary cathode region K2 may include two auxiliary cathodes 30 , three auxiliary cathodes 30 or four auxiliary cathodes 30 .

[0158] Among them, a notch 38 can be set on the first conductive layer 36 of some auxiliary cathodes 30, and a notch 38 may not be set on the first conductive layer 36 of some auxiliary cathodes 30. The specific amount can be determined according to the side length of the side of the first conductive layer 36 of the auxiliary cathode 30. For example, if the side length is greater than the minimum distance between the orthographic projections of the anode layer 20 in two adjacent sub-pixel areas K1 on the substrate 11, a notch 38 can be set; if the side length is less than the minimum distance between the orthographic projections of the anode layer 20 in two adjacent sub-pixel areas K1 on the substrate 11, a notch 38 may not be set.

[0159] In a further example, the orthographic projection of the first conductive layer 36 on the substrate 11 includes a polygon, and the size of each side of the polygon may be smaller than the minimum distance between the orthographic projections of the anode layer 20 in two adjacent sub-pixel regions K1 on the substrate 11 .

[0160] In this example, you can combine Fig. 9 As shown, a plurality of auxiliary cathodes 30 are included, and the orthographic projection of the first conductive layer 36 of the auxiliary cathode 30 on the substrate 11 includes a rectangle, and the length of each side of the rectangle is smaller than the minimum distance between the orthographic projections of the anode layer 20 in two adjacent sub-pixel regions K1 on the substrate 11.

[0161] Since the eaves structure 39 is arranged in the edge area 361, when the size of each side is smaller than the minimum distance between the positive projections of the anode layer 20 in two adjacent sub-pixel areas K1 on the substrate 11, the maximum length of the eaves structure 39 is also smaller than the minimum distance between the anode layer 20 in two adjacent sub-pixel areas K1.

[0162] The sizes of the first conductive layers 36 in the plurality of auxiliary cathodes 30 on the substrate 11 may be consistent or inconsistent, which will not be elaborated herein.

[0163] The edge of the first conductive layer 36 may be provided with a notch 38 or may not be provided with a notch 38 .

[0164] In a further example, the notch 38 may not be set in the edge area 361. Since the size of each edge is smaller than the minimum distance between the orthographic projections of the anode layer 20 in two adjacent sub-pixel areas K1 on the substrate 11, the edge area 361 may directly serve as the eaves structure 39. In this way, the orthographic projection of the formed eaves structure 39 on the substrate 11 coincides with the area between the outer contour of the orthographic projection of the first conductive layer 36 on the substrate 11 and the outer contour of the orthographic projection of the conductive structure 37 on the substrate 11, that is, the entire edge area 361 serves as the eaves structure 39.

[0165] In this way, the maximum length of the eaves structure 39 of each auxiliary cathode 30 is also smaller than the minimum distance between the positive projections of the anode layer 20 in two adjacent sub-pixel areas K1 on the substrate 11, and there is no need to set a notch 38 on the first conductive layer 36 of the auxiliary cathode 30. In this way, the first conductive layer 36 does not need to be etched, which not only saves the process but also improves the stability of the eaves structure 39.

[0166] In some embodiments, for the auxiliary cathode 30, Figure 1 As shown, the conductive structure 37 in the auxiliary cathode 30 may include a first metal layer 34 and a second metal layer 35, wherein the second metal layer 35 is located on the side of the first metal layer 34 facing away from the substrate 11; wherein the orthographic projection of the first metal layer 34 on the substrate 11 overlaps with the orthographic projection of the second metal layer 35 on the substrate 11.

[0167] For example, Fig.10 As shown, the orthographic projection of the first metal layer 34 on the substrate 11 overlaps with the orthographic projection of the second metal layer 35 on the substrate 11, which may include the following situations:

[0168] like Fig.10 As shown in (1), the orthographic projection of the first metal layer 34 on the substrate 11 coincides with the orthographic projection of the second metal layer 35 on the substrate 11;

[0169] like Fig.10 As shown in (2), the orthographic projection of the first metal layer 34 on the substrate 11 falls within the orthographic projection of the second metal layer 35 on the substrate 11;

[0170] like Fig.10 As shown in (3), the orthographic projection of the first metal layer 34 on the substrate 11 covers the orthographic projection of the second metal layer 35 on the substrate 11.

[0171] The thickness of the first metal layer 34 may be greater than the thickness of the second metal layer 35. For example, the thickness of the first metal layer 34 may be 3-6 times the thickness of the second metal layer 35. For example, the thickness of the first metal layer 34 may be 5000 angstroms, and the thickness of the second metal layer 35 may be 1000 angstroms; or, the thickness of the first metal layer 34 may be 5000 angstroms, and the thickness of the second metal layer 35 may be 2000 angstroms; or, the thickness of the first metal layer 34 may be 6000 angstroms, and the thickness of the second metal layer 35 may be 1000 angstroms.

[0172] The thickness of the first anode layer 20A in the anode may be consistent with the thickness of the second metal layer 35 .

[0173] The first anode layer 20A in the anode may be disposed in the same layer as the second metal layer 35 , and the same layer arrangement means that the first anode layer 20A and the second metal layer 35 are formed simultaneously in the same process.

[0174] The material of the first conductive layer 36 may be different from the material of the conductive structure 37 . For example, the first conductive layer 36 may include a light-transmitting conductive material, and the conductive structure 37 may include a metal.

[0175] Among them, when the first conductive layer 36 adopts a light-transmitting conductive material, it can be an indium tin oxide ITO material. When this material is adopted, the first conductive layer 36 can be arranged in the same layer as the second anode layer 20B in the anode layer 20. For example, the second anode layer 20B is also a light-transmitting conductive material to improve the light output level of the light-emitting device.

[0176] The conductive structure 37 is formed of a metal material. For example, the first metal layer 34 and the second metal layer 35 in the conductive structure 37 can both be formed of a metal material or an alloy material containing a metal.

[0177] The materials of the first metal layer 34 and the second metal layer 35 may be the same or different. For example, the first metal layer 34 and the second metal layer 35 may be formed of copper and molybdenum-neodymium alloy.

[0178] In some embodiments, it can be combined with Figure 1 And subsequent Fig.13 and Fig.15 As shown, the display panel may further include:

[0179] The flat layer 19 is located on one side of the substrate 11. The flat layer 19 includes a first opening K21. The orthographic projection of the conductive structure 37 on the substrate 11 is located in the first opening K21. The anode layer 20 is located on the side of the flat layer 19 away from the substrate 11.

[0180] The pixel defining layer 23 is located on the side away from the planar layer 19 and includes a second opening K22 and a third opening K11;

[0181] The orthographic projection of the second opening K22 on the substrate 11 covers the first opening K21, and the orthographic projection of the cathode layer 22 on the substrate 11 overlaps with the second opening K22; the orthographic projections of the light-emitting layer 21 and the anode layer 20 on the substrate 11 cover the third opening K11 and do not overlap with the second opening K22.

[0182] In this embodiment, a first opening K21 may be opened in the planar layer 19 , and a conductive structure 37 may be formed in the first opening K21 . An anode layer 20 may be formed on a side of the first planar layer 19 away from the substrate 11 , including a first anode layer 20A and a second anode layer 20B.

[0183] Among them, a pixel defining layer 23 can be formed on the side of the flat layer 19 facing away from the substrate 11. Specifically, the pixel defining layer 23 can be formed after the anode layer 20 is formed. The pixel defining layer 23 may include a third opening K11 located in the sub-pixel area K1, and a second opening K22 located in the auxiliary cathode area K2, wherein the orthographic projection of the second opening K22 on the substrate 11 covers the first opening K21, and the orthographic projection of the anode layer 20 on the substrate 11 covers the third opening K11.

[0184] After forming the pixel defining layer 23, the light-emitting layer 21 and the cathode layer 22 can be formed. Since the light-emitting layer 21 is broken at the auxiliary cathode 30, the light-emitting layer 21 can have no overlap with the first opening K21, that is, the headband functional layer can be broken on the wall of the second opening K22 and has no overlap with the first opening K21. Next, the cathode layer 22 is formed. In this way, the cathode layer 22 will also be broken at the auxiliary cathode 30, but because of the effect of the light-emitting layer 21 below, the cathode layer 22 can flow to the area of ​​the first opening K21 and directly contact the conductive structure 37 located in the first opening K21, thereby forming an electrical connection between the cathode layer 22 and the conductive structure 37.

[0185] In this way, after the cathode layer 22 is formed, the orthographic projection of the cathode layer 22 on the substrate 11 can cover the third opening K11 and overlap with the first opening K21.

[0186] Therefore, by opening the first opening K21 in the flat layer 19, the thickness of the auxiliary cathode 30 can be increased while keeping the step difference between the auxiliary cathode 30 and the pixel defining layer 23 not too large. The thickness can be understood as the height of the auxiliary cathode 30. As a result, the light-emitting layer 21 can be more easily broken at the auxiliary cathode 30 without increasing the step difference between the auxiliary cathode 30 and the cathode layer 22. As a result, the overall thickness of the display panel can be reduced.

[0187] The step difference refers to the difference between the maximum vertical distance between the surface of the cathode facing away from the substrate 11 and the substrate 11 and the maximum vertical distance between the first conductive layer 36 and the substrate 11 .

[0188] Several exemplary display panels are listed below.

[0189] An exemplary display panel A has a cross-sectional structure as shown in FIG. Figure 1 As shown, the auxiliary cathode 30 in the display panel is as shown in FIG. Figure 2D Specifically including:

[0190] Substrate 11;

[0191] A semiconductor layer 12 located on one side of the substrate 11;

[0192] A first insulating layer 13 located on a side of the semiconductor layer 12 facing away from the substrate 11;

[0193] A gate layer 14 located on a side of the first insulating layer 13 facing away from the substrate 11;

[0194] A second insulating layer 15 located on a side of the gate layer 14 facing away from the substrate 11;

[0195] The source-drain electrode layer (including 16A and 16B) located on the side of the second insulating layer 15 away from the substrate 11 includes a source electrode and a drain electrode, and a first connecting electrode 31 of the auxiliary cathode 30; the source electrode and the drain electrode are in direct contact with the semiconductor layer 12 through vias provided in the second insulating layer 15 and the first insulating layer 13;

[0196] A passivation layer 17 located on the side of the source and drain layers (including 16A and 16B) facing away from the substrate 11;

[0197] A third metal layer located on the side of the passivation layer 17 facing away from the substrate 11, the third metal layer includes a second connection electrode 32 of the auxiliary cathode 30 and a third connection electrode 18 of the thin film transistor; the second connection electrode 32 is electrically connected to the first connection electrode 31 through a via hole provided in the passivation layer 17, and the third connection electrode 18 is connected to the drain electrode 16B through a via hole provided in the passivation layer 17;

[0198] The flat layer 19 located on the side of the third metal layer facing away from the substrate 11, such as Fig.13 As shown, a first opening K21 is opened in the planar layer 19, and the first opening K21 is located in the auxiliary cathode region K2;

[0199] A first anode layer 20A and a second anode layer 20B located on a side of the flat layer 19 facing away from the substrate 11;

[0200] The pixel defining layer 23 located on the side of the second anode layer 20B facing away from the substrate 11 is as shown in FIG. Fig.15As shown, the pixel defining layer 23 includes a second opening K22 and a third opening K11, the second opening K22 is located in the auxiliary cathode region K2, and the orthographic projection of the second opening K22 on the substrate 11 covers the orthographic projection of the first opening K21 on the substrate 11;

[0201] A light emitting layer 21 located on a side of the anode layer 20 facing away from the substrate 11 and a cathode layer 22 located on a side of the light emitting layer 21 facing away from the substrate 11;

[0202] The auxiliary cathode 30 includes a second conductive layer 3333 located on the side of the second connecting electrode 32 away from the substrate 11, a first metal layer 34 located on the side of the second conductive layer 33 away from the substrate 11, a second metal layer 35 located on the side of the first metal layer 34 away from the substrate 11, and a first conductive layer 36 located on the side of the second metal layer 35 away from the substrate 11;

[0203] The orthographic projection of the first conductive layer 36 on the substrate 11 covers the orthographic projections of the first metal layer 34 and the second metal layer 35 on the substrate 11 , and the orthographic projection of the second conductive layer 33 on the substrate 11 covers the orthographic projection of the first conductive layer 36 on the substrate 11 .

[0204] The orthographic projection of the first conductive layer 36 on the substrate 11 is located within the orthographic projection of the second opening K22 on the substrate 11 .

[0205] Among them, the orthographic projections of the light-emitting layer 21 and the cathode layer 22 on the substrate 11 cover the orthographic projection of the third opening K11 on the substrate 11, the orthographic projection of the light-emitting layer 21 on the substrate 11 has no overlap with the first opening K21, and the orthographic projection of the cathode layer 22 on the substrate 11 overlaps with the first opening K21 and is in direct contact with the conductive structure 37 of the auxiliary cathode 30.

[0206] Among them, the positive projection of the first conductive layer 36 on the substrate 11 is a polygon, and a plurality of notches 38 are opened in the edge area 361 of the first conductive layer 36. Each notch 38 is located on each side of the first conductive layer 36, and one notch 38 is opened on one side. The notches 38 divide the edge area 361 on each side into two eaves structures 39. The maximum lengths of the two eaves structures 39 are equal and less than the minimum distance between the anode layers 20 in adjacent sub-pixel areas K1.

[0207] An exemplary display panel B has a cross-sectional structure as shown in FIG. Figure 1 As shown, the auxiliary cathode 30 in the display panel is as shown in FIG. Figure 8 and Fig. 9As shown. Different from the display panel A, the auxiliary cathode region K2 includes a plurality of auxiliary cathodes 30, such as four auxiliary cathodes 30, and the orthographic projection of the first conductive layer 36 of each auxiliary cathode 30 on the substrate 11 is a polygon, and the length of each side of the polygon is less than the minimum distance between the orthographic projections of the anode layer 20 in adjacent sub-pixel regions K1 on the substrate 11.

[0208] The edge region 361 of the first conductive layer 36 serves as an eave structure 39 as a whole.

[0209] Taking the formation of the above display panel A as an example, the specific process may be as follows:

[0210] A substrate 11 is provided, and a semiconductor layer 12 is formed on one side of the substrate 11;

[0211] Forming a first insulating layer 13 on a side of the semiconductor layer 12 facing away from the substrate 11;

[0212] A gate electrode 14 is formed on the side of the first insulating layer 13 facing away from the substrate 11;

[0213] A second insulating layer 15 is formed on the side of the gate 14 layer facing away from the substrate 11;

[0214] A source-drain layer (including 16A and 16B) is formed on the side of the second insulating layer 15 away from the substrate 11, including a source electrode and a drain electrode, and a first connecting electrode 31 of the auxiliary cathode 30; the source electrode and the drain electrode are in direct contact with the semiconductor layer 12 through vias provided in the second insulating layer 15 and the first insulating layer 13;

[0215] A passivation layer 17 is formed on the side of the source and drain layers (including 16A and 16B) facing away from the substrate 11;

[0216] A third metal layer is formed on the side of the passivation layer 17 facing away from the substrate 11, including a second connection electrode 32 of the auxiliary cathode 30 and a third connection electrode 18 of the thin film transistor; the second connection electrode 32 is electrically connected to the first connection electrode 31 through a via hole provided on the passivation layer 17, and the third connection electrode 18 is connected to the drain electrode through a via hole provided on the passivation layer 17;

[0217] A flat layer 19 is formed on the side of the third metal layer facing away from the substrate 11, and a first opening K21 is opened in the flat layer 19. The first opening K21 is located in the auxiliary cathode region K2; Fig.13 As shown;

[0218] A second conductive layer 33 is formed on the side of the planar layer 19 facing away from the substrate 11. Fig.13 As shown;

[0219] A first metal layer 34 is formed on the side of the second conductive layer 33 facing away from the substrate 11; a second metal layer 35 and a first anode layer 20A are formed on the side of the first metal layer 34 facing away from the substrate 11; a first conductive layer 36 and a second anode layer 20B are formed on the side of the second metal layer 35 facing away from the substrate 11; the structure is as follows: Fig.14 As shown;

[0220] like Fig.15 As shown, a pixel defining layer 23 is formed, and the pixel defining layer 23 has a second opening K22 and a third opening K11;

[0221] like Fig.16 As shown, the first conductive layer 36 is then etched to form a plurality of notches 38 on each edge. The etched area can be seen in FIG. Fig.16 The box marked area of ​​the first conductive layer 36;

[0222] Then, if Fig.17 As shown, a light emitting layer 21 and a cathode layer 22 are formed in sequence.

[0223] The present disclosure also provides a display device, which may include Figure 1-Figure 12 The display panel shown in any of the drawings is an OLED display device.

[0224] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0225] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0226] The display panel and the display device provided by the present disclosure are introduced in detail above. The principles and implementation methods of the present disclosure are explained in this article using specific examples. The description of the above embodiments is only used to help understand the method of the present disclosure and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present disclosure, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be understood as a limitation on the present disclosure.

[0227] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. The present disclosure is intended to cover any variations, uses or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The description and examples are to be considered exemplary only, and the true scope and spirit of the present disclosure are indicated by the following claims.

[0228] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

[0229] References herein to "one embodiment," "embodiment," or "one or more embodiments" mean that a particular feature, structure, or characteristic described in conjunction with the embodiment is included in at least one embodiment of the present disclosure. In addition, please note that examples of the term "in one embodiment" do not necessarily all refer to the same embodiment.

[0230] In the description provided herein, a large number of specific details are described. However, it is understood that the embodiments of the present disclosure can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

[0231] In the claims, any reference signs placed between brackets shall not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The present disclosure may be implemented by means of hardware comprising a number of different elements and by means of a suitably programmed computer. In a unit claim enumerating a number of means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third, etc. does not indicate any order. These words may be interpreted as names.

[0232] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them. Although the present disclosure has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present disclosure.

Claims

1. A display panel, characterized in that: It includes a substrate, a plurality of sub-pixel regions located on one side of the substrate, and an auxiliary cathode region located between the sub-pixel regions; The sub-pixel region comprises an anode layer, a light-emitting layer and a cathode layer stacked along the thickness direction of the substrate; The auxiliary cathode region comprises at least one auxiliary cathode, wherein the auxiliary cathode comprises a conductive structure and a first conductive layer located on a side of the conductive structure away from the substrate, wherein an orthographic projection of the first conductive layer on the substrate covers an orthographic projection of the conductive structure on the substrate; Wherein, the first conductive layer comprises at least one eaves structure, and the orthographic projection of the eaves structure on the substrate is located between the outer contour of the orthographic projection of the first conductive layer on the substrate and the outer contour of the orthographic projection of the conductive structure on the substrate; The light-emitting layer is broken at the eaves structure, the cathode layer is electrically connected to the conductive structure at the break, and the maximum length of the orthographic projection of the eaves structure on the substrate is smaller than the minimum distance between the orthographic projections of the anode layers in two adjacent sub-pixel areas on the substrate.

2. The display panel according to claim 1, characterized in that: The first conductive layer further includes a notch, wherein the notch is located between two adjacent eaves structures, and the first conductive layer is hollowed out at the notch.

3. The display panel according to claim 2, characterized in that: The orthographic projection of the notch on the substrate is located outside the outer contour of the orthographic projection of the conductive structure on the substrate.

4. The display panel according to claim 3, characterized in that: The orthographic projection of the notch on the substrate and the orthographic projection of the conductive structure on the substrate have a minimum first vertical distance, and the orthographic projection of the eaves structure on the substrate is away from one side of the conductive structure and has a maximum second vertical distance from the orthographic projection of the conductive structure on the substrate; Wherein, the first vertical distance is less than or equal to 0.5 times of the second vertical distance.

5. The display panel according to claim 3, characterized in that: The orthographic projection of the first conductive layer on the substrate is a polygon, and the maximum lengths of the eaves structures located on both sides of the gap are equal in a target direction, and the target direction is the direction of the side length of the first conductive layer.

6. The display panel according to claim 3, characterized in that: The orthographic projection of the first conductive layer on the substrate comprises a polygon; There is at least one maximum length of the eaves structure in a target direction that is less than or equal to 0.5 times the length of the side where the eaves structure is located, and the target direction is the direction of the side length of the first conductive layer.

7. The display panel according to claim 2, characterized in that: The orthographic projection of the first conductive layer on the substrate includes a polygon, and at least one notch is provided on a first side of the polygon; The side length of the first side is greater than the minimum distance between the orthographic projections of the anode layers in two adjacent sub-pixel regions on the substrate.

8. The display panel according to claim 7, characterized in that: At least one of the gaps is formed on a second side of the polygon, wherein the second side is a side other than the first side; Among them, the gaps on the two sides in opposite directions are symmetrical.

9. The display panel according to claim 2, characterized in that: The inner angle of the orthographic projection of the notch on the substrate includes at least one of an obtuse angle and a right angle; And / or, the orthographic projection of the notch on the substrate includes the intersection of a straight line segment and an arc segment.

10. The display panel according to any one of claims 1 to 9, characterized in that: The auxiliary cathode region further comprises: A second conductive layer, located on a side of the auxiliary cathode close to the substrate and electrically connected to the conductive structure; The second conductive layer includes a plurality of auxiliary cathodes on a side facing away from the substrate, and the orthographic projection of the second conductive layer on the substrate covers the orthographic projections of the plurality of auxiliary cathodes on the substrate, and the orthographic projections of the plurality of auxiliary cathodes on the substrate have no overlap.

11. The display panel according to claim 10, characterized in that: The orthographic projection of the first conductive layer on the substrate comprises a polygon, and the size of each side of the polygon is smaller than the minimum distance between the orthographic projections of the anode layers in two adjacent sub-pixel regions on the substrate.

12. The display panel according to claim 11, characterized in that: The orthographic projection of the eaves structure on the substrate coincides with a target area, and the target area is an area between an outer contour of the orthographic projection of the first conductive layer on the substrate and an outer contour of the orthographic projection of the conductive structure on the substrate.

13. The display panel according to any one of claims 1 to 12, characterized in that: The conductive structure comprises: A first metal layer; a second metal layer, located on a side of the first metal layer facing away from the substrate; The orthographic projection of the first metal layer on the substrate overlaps with the orthographic projection of the second metal layer on the substrate.

14. The display panel according to any one of claims 1 to 12, characterized in that: The display panel further includes: a planar layer located on one side of the substrate, the planar layer comprising a first opening located in the auxiliary cathode region, the orthographic projection of the conductive structure on the substrate being located in the first opening; the anode layer being located on a side of the planar layer away from the substrate; A pixel defining layer, located on a side of the anode layer away from the anode layer, comprising a second opening and a third opening; Wherein, the orthographic projection of the second opening on the substrate covers the first opening, and the orthographic projection of the cathode layer on the substrate overlaps with the second opening; The orthographic projections of the light emitting layer and the anode layer on the substrate cover the third opening and have no overlap with the second opening.

15. A display device, characterized in that: Comprising the display panel described in any one of claims 1-14.

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