Spatially correlated disordered silicon germanium nanowire thermoelectric refrigeration system for electronic devices

Abstract

The application discloses a space correlation disordered silicon germanium nanowire thermoelectric refrigeration system for electronic equipment, and belongs to the technical field of electronic equipment heat dissipation, in particular to a thermoelectric refrigeration system based on space correlation disordered silicon germanium (SiGe) nanowire. The system comprises a hot end 1, a cold end 6 and a thermoelectric conversion module. The thermoelectric material layer 4 is used for responding to direct current provided by the power driving circuit 5, generating a temperature difference between two ends to enhance the refrigeration effect. The thermoelectric material layer 4 is also used for adjusting the temperature difference between two ends of the thermoelectric material layer 4 by adjusting the current value of the direct current provided by the power driving circuit 5, and then adjusting the temperature difference between the hot end 1 and the cold end 6. The space correlation disordered silicon germanium nanowire thermoelectric refrigeration system for electronic equipment is suitable for heat dissipation of electronic equipment.

Description

Technical Field

[0001] This invention relates to the field of heat dissipation technology for electronic devices, and more particularly to a thermoelectric cooling system based on spatially correlated disordered silicon-germanium (SiGe) nanowires. Background Technology

[0002] With the rapid development of modern electronic devices, especially high-performance computing devices, integrated circuits, and microelectronic components, the operating frequency and computing power of these devices are constantly increasing, resulting in a large amount of heat generated during operation. Traditional heat dissipation technologies, such as air cooling and liquid cooling, can reduce device temperature to some extent, but with the increasing integration, the heat dissipation requirements are gradually exceeding the capacity of traditional methods. Therefore, developing efficient thermoelectric cooling technology has become crucial for solving the heat dissipation problem of electronic devices.

[0003] Silicon-germanium (SiGe) alloys have broad application prospects in the thermoelectric field, and their excellent thermoelectric properties and compatibility with existing silicon-based devices have made them a current research hotspot. However, although traditional SiGe alloy nanowires possess certain thermoelectric properties, their relatively high thermal conductivity limits their effectiveness in thermoelectric cooling. Therefore, developing novel materials that can reduce thermal conductivity without sacrificing thermoelectric performance has become a current research focus. Summary of the Invention

[0004] The purpose of this invention is to provide a spatially correlated disordered silicon-germanium nanowire thermoelectric cooling system for electronic devices, in order to solve the problem that traditional heat dissipation technologies have insufficient load-bearing capacity and cannot meet the heat dissipation requirements of electronic devices with increased integration. At the same time, the thermoelectric cooling system uses spatially correlated disordered silicon-germanium nanowires, which effectively reduces thermal conductivity, optimizes thermoelectric performance, improves thermoelectric cooling efficiency, and is compatible with silicon-based materials, and can be widely used in the heat dissipation systems of electronic devices.

[0005] The spatially correlated disordered silicon-germanium nanowire thermoelectric cooling system for electronic devices described in this invention includes a hot end, a cold end, and a thermoelectric conversion module.

[0006] The hot end is connected to the heat-generating chip in the electronic device and is used to absorb the heat generated by the electronic device.

[0007] The cold end is connected to the heat sink to absorb heat from the hot end and dissipate the absorbed heat to the external environment through the heat sink.

[0008] The thermoelectric conversion module is located between the hot end and the cold end to regulate the temperature difference between the hot end and the cold end, thereby realizing heat dissipation and cooling management of electronic equipment.

[0009] The thermoelectric conversion module includes a thermally conductive layer, a thermoelectric material layer, and a power drive circuit; the thermoelectric material layer is composed of spatially correlated disordered silicon-germanium nanowires; in the spatially correlated disordered silicon-germanium nanowires, the distribution of germanium atoms is spatially correlated disordered.

[0010] The thermally conductive layer is disposed between the thermoelectric material layer and the hot end to enhance the transfer of heat from the hot end to the thermoelectric material layer.

[0011] The power drive circuit is used to provide direct current to the thermoelectric material layer;

[0012] The thermoelectric material layer is used to respond to the DC current provided by the power drive circuit, generate a thermoelectric effect to produce a temperature difference between its two ends, and enhance the cooling effect; it is also used to adjust the temperature difference between the two ends of the thermoelectric material layer by adjusting the current value of the DC current provided by the power drive circuit, thereby adjusting the temperature difference between the hot end and the cold end.

[0013] Furthermore, a preferred embodiment is provided in which the contact surface between the hot end and the heating chip is designed as a microstructure to increase the heat conduction area.

[0014] Furthermore, in a preferred embodiment, the material of the thermally conductive layer is a metal thin film or graphene.

[0015] Furthermore, a preferred embodiment is provided in which the diameter of the spatially correlated disordered silicon-germanium nanowires is between 10 nm and 20 nm.

[0016] Furthermore, a preferred embodiment is provided in which the length of the spatially correlated disordered silicon-germanium nanowire is 1 μm.

[0017] Furthermore, in a preferred embodiment, the system further includes a packaging board; the packaging board is disposed between the hot end and the thermoelectric conversion module.

[0018] Furthermore, a preferred embodiment is provided, wherein the power drive circuit includes a power supply, electrodes, and a current regulation device;

[0019] The power source is electrically connected to the thermoelectric material layer through electrodes and is used to provide direct current to the thermoelectric material layer.

[0020] The current regulating device is used to regulate the magnitude of the DC current supplied by the power supply, thereby regulating the temperature difference between the two ends of the thermoelectric material layer 4 through the thermoelectric effect.

[0021] Furthermore, a preferred embodiment is provided in which the germanium atoms are spatially correlated and disordered:

[0022] The spatial coordinates of germanium atoms are related to the distances between adjacent germanium atoms, and this correlation decreases power-lawfully with increasing interatomic distance:

[0023] C(r)~|r| -a

[0024] Where a is the correlation parameter and r is the distance between adjacent germanium atoms.

[0025] Furthermore, a preferred embodiment is provided in which the concentration of germanium atoms in the spatially correlated disordered silicon-germanium nanowires is 10% to 20%.

[0026] Furthermore, a preferred embodiment is provided in which the spatially correlated disordered silicon-germanium nanowires are fabricated using the following preparation process:

[0027] Material selection steps: Select silicon and germanium as nanowire alloy components and adjust their ratio to achieve the desired degree of disorder;

[0028] Lattice matching and mismatch steps: A silicon-germanium alloy thin film is deposited on a substrate by epitaxial growth. The lattice constant of the substrate is different from that of the silicon-germanium alloy to introduce lattice mismatch, thereby generating a spatially correlated disordered structure.

[0029] Heat treatment steps: After the silicon-germanium alloy thin film is grown by epitaxial growth method, annealing is performed to adjust the degree of disorder and correlation.

[0030] Patterning steps: Define nanowire patterns on silicon-germanium alloy thin films using electron beam lithography or nanoimprint lithography.

[0031] Etching process steps: Reactive ion etching technology is used to etch nanowire structures on silicon-germanium alloy thin films according to nanowire patterns, thus completing the fabrication of spatially correlated disordered silicon-germanium nanowires.

[0032] The present invention has the following beneficial effects:

[0033] 1. The spatially correlated disordered silicon-germanium nanowire thermoelectric cooling system for electronic devices described in this invention utilizes spatially correlated disordered silicon-germanium alloy nanowires. Through the design of the disordered structure, the thermal conductivity can be significantly reduced without affecting the electrical conductivity, thereby achieving excellent thermoelectric performance. The thermoelectric cooling system, based on spatially correlated disordered silicon-germanium alloy nanowires, provides an efficient thermal management solution for electronic devices through its low thermal conductivity, high thermoelectric efficiency, and good compatibility with silicon-based materials.

[0034] 2. The spatially correlated disordered silicon-germanium nanowire thermoelectric cooling system for electronic devices described in this invention utilizes spatially correlated disordered silicon-germanium nanowires with significantly low thermal conductivity. The disordered arrangement structure reduces thermal conductivity and improves thermoelectric efficiency, thereby enhancing the thermoelectric cooling effect.

[0035] 3. The spatially correlated disordered silicon-germanium nanowire thermoelectric cooling system for electronic devices described in this invention utilizes spatially correlated disordered silicon-germanium nanowires that can achieve a large temperature difference at a low power, generating a strong thermoelectric effect. This allows the thermoelectric cooling system to achieve a high cooling effect at a low current. By applying this thermoelectric cooling system to high-power electronic devices, the temperature of the devices can be effectively controlled, overheating damage can be avoided, and the reliability and service life of the devices can be improved.

[0036] 4. The spatially correlated disordered silicon-germanium nanowire thermoelectric cooling system for electronic devices described in this invention utilizes spatially correlated disordered silicon-germanium nanowire materials that are compatible with existing silicon-based electronic devices, facilitating integration into existing equipment and reducing the adaptation costs between the material and traditional silicon-based integrated circuits.

[0037] 5. The spatially correlated disordered silicon-germanium nanowire thermoelectric cooling system for electronic devices described in this invention has higher cooling efficiency and reduces the demand for external energy compared with traditional heat dissipation methods, thus exhibiting strong energy-saving and environmental protection advantages.

[0038] The spatially correlated disordered silicon-germanium nanowire thermoelectric cooling system for electronic devices described in this invention is suitable for heat dissipation in electronic devices. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0040] Figure 1 This is a schematic diagram of the structure of a spatially correlated disordered silicon-germanium nanowire thermoelectric refrigeration system for an electronic device, according to one embodiment of the present invention.

[0041] Figure 2 This is a schematic diagram of the silicon and germanium element distribution in spatially correlated disordered silicon-germanium nanowires, as shown in one embodiment of the present invention.

[0042] Figure 3 This is a schematic diagram comparing the spectral cumulative thermal conductivity of spatially correlated disordered silicon-germanium nanowires with that of traditional random disordered silicon-germanium nanowires, as shown in one embodiment of the present invention.

[0043] Reference numerals: 1. Hot end; 2. Encapsulation board; 3. Thermally conductive layer; 4. Thermoelectric material layer; 5. Power drive circuit; 6. Cold end. Detailed Implementation

[0044] To make the technical solutions and advantages of the present invention clearer, the specific embodiments of the present invention will be described in further detail and completely below with reference to the accompanying drawings. The various embodiments described below are only some preferred embodiments of the present invention, and not all of them; the various embodiments described below are intended to explain the present invention and should not be construed as limiting the present invention; reasonable combinations of the technical features defined in the various embodiments of the present invention, as well as all other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort, are all within the scope of protection of the present invention.

[0045] In one embodiment, a spatially correlated disordered silicon-germanium nanowire thermoelectric cooling system for electronic devices is provided, the system comprising a hot end 1, a cold end 6, and a thermoelectric conversion module:

[0046] The hot end 1 is connected to a heat-generating chip (such as a microprocessor or power amplifier) ​​in the electronic device to absorb the heat generated by the electronic device.

[0047] The cold end 6 is connected to the heat sink to absorb the heat from the hot end 1 and dissipate the absorbed heat to the external environment through the heat sink.

[0048] The thermoelectric conversion module is located between the hot end 1 and the cold end 6, and is used to adjust the temperature difference between the hot end 1 and the cold end 6 to realize the heat dissipation and cooling management of electronic equipment.

[0049] The thermoelectric conversion module includes a thermally conductive layer 3, a thermoelectric material layer 4, and a power drive circuit 5; the thermoelectric material layer is composed of spatially correlated disordered silicon-germanium nanowires; in the spatially correlated disordered silicon-germanium nanowires, the distribution of germanium atoms is spatially correlated disordered.

[0050] The thermally conductive layer 3 is disposed between the thermoelectric material layer 4 and the hot end 1 to enhance the transfer of heat from the hot end 1 to the thermoelectric material layer 4.

[0051] The power drive circuit 5 is used to provide DC current to the thermoelectric material layer 4;

[0052] The thermoelectric material layer 4 is used to respond to the DC current provided by the power drive circuit 5, generate a thermoelectric effect to produce a temperature difference between its two ends, and enhance the cooling effect; it is also used to adjust the temperature difference between the two ends of the thermoelectric material layer 4 by adjusting the current value of the DC current provided by the power drive circuit 5, thereby adjusting the temperature difference between the hot end 1 and the cold end 6.

[0053] In this embodiment, efficient heat transfer is ensured by the cold end 6.

[0054] In this embodiment, the cold end 6 is connected to a heat sink, which is typically made of a high thermal conductivity material.

[0055] In this embodiment, the hot end 1 is connected to a heat-generating chip in the electronic device. The heat-generating chip is typically a power-intensive electronic component, such as a microprocessor or a power amplifier.

[0056] In this embodiment, the hot end 1 is made of a material with high thermal conductivity.

[0057] Furthermore, in one embodiment, the material of the hot end 1 is copper or aluminum.

[0058] Furthermore, in one embodiment, the contact surface between the hot end 1 and the heating chip is designed as a microstructure to increase the heat conduction area.

[0059] In this embodiment, the microstructure refers to regular or irregular geometric features designed on the surface of a material at the micrometer or nanometer scale, including microprotrusions, microgrooves, rough surfaces, etc., with sizes typically ranging from 1 micrometer to 100 micrometers. These can usually be achieved using photolithography, chemical etching, or laser processing.

[0060] Furthermore, in one embodiment, the material of the thermally conductive layer 3 is a metal thin film or graphene.

[0061] In this embodiment, the thermally conductive layer 3 is designed with high thermal conductivity to reduce heat loss and ensure that heat energy can be efficiently transferred to the thermoelectric material layer 4. The thermally conductive layer 3 is made of a metal thin film with high thermal conductivity or a novel nanomaterial with high thermal conductivity such as graphene.

[0062] In this embodiment, the spatially correlated disordered silicon-germanium nanowires can significantly reduce thermal conductivity while maintaining high thermoelectric performance, thus enhancing the thermoelectric cooling effect. Furthermore, the spatially correlated disordered silicon-germanium nanowires exhibit good compatibility with silicon-based materials, enabling convenient integration with existing silicon-based electronic devices and solving the heat dissipation problem of high-power devices.

[0063] Spatially correlated disordered structures can effectively suppress heat conduction and improve the thermoelectric conversion efficiency of a system. Specifically, spatially correlated disordered silicon-germanium nanowires achieve lower thermal conductivity by modulating their internal disordered structure.

[0064] The advantage of spatially correlated disordered distribution structures lies in their ability to effectively isolate heat flow, reduce heat loss, and at the same time retain high electron mobility, thereby achieving efficient thermoelectric conversion.

[0065] Furthermore, in one embodiment, the diameter of the spatially correlated disordered silicon-germanium nanowires is between 10 nm and 20 nm, and the specific size is adjusted according to different application requirements.

[0066] Furthermore, in one embodiment, the length of the spatially correlated disordered silicon-germanium nanowire is 1 μm, and the specific size is adjusted according to different application requirements.

[0067] Furthermore, in one embodiment, the surface of the cold end 6 is designed as a heat sink shape to increase its surface area and improve heat dissipation efficiency.

[0068] Furthermore, in one embodiment, the power drive circuit 5 includes a power supply, electrodes, and a current regulation device;

[0069] The power source is electrically connected to the thermoelectric material layer 4 through electrodes and is used to provide direct current to the thermoelectric material layer 4.

[0070] The current regulating device is used to regulate the magnitude of the DC current supplied by the power supply, thereby regulating the temperature difference between the two ends of the thermoelectric material layer 4 through the thermoelectric effect.

[0071] In this embodiment, the power supply is used to stably output appropriate current and voltage to ensure the effective operation of the thermoelectric material layer 4.

[0072] In this embodiment, the temperature difference between the two ends of the thermoelectric material layer 4 is controlled by adjusting the value of the DC current, thereby controlling the cooling effect.

[0073] Furthermore, in one embodiment, the system further includes a packaging plate 2; the packaging plate 2 is disposed between the hot end 1 and the thermoelectric conversion module.

[0074] In this embodiment, the encapsulation plate 2 is a protective component of the system, mainly serving a supporting and fixing function. The encapsulation plate 2 can effectively prevent external contamination from affecting the internal components of the system (such as the thermoelectric conversion module) and provides a good contact surface between the hot end 1 and the thermoelectric material layer 4, ensuring the stability of the system.

[0075] Furthermore, in one embodiment, the encapsulation plate 2 is made of a high-strength material to ensure structural stability.

[0076] Furthermore, in one embodiment, the encapsulation plate 2 is made of a material with low thermal conductivity, such as ceramics or polymers, which helps to reduce the heat accumulation of the system itself.

[0077] In this embodiment, the operating principle of the spatially correlated disordered silicon-germanium nanowire thermoelectric cooling system for electronic devices is based on the thermoelectric effect, as detailed below:

[0078] When current passes through thermoelectric material layer 4, a temperature difference is generated at both ends of thermoelectric material layer 4;

[0079] Hot end 1 is connected to the heat-generating chip, transferring heat from the chip to the thermoelectric material layer 4; while cold end 6 is connected to the heat sink, dissipating heat.

[0080] The unique disordered arrangement structure of spatially correlated disordered silicon-germanium nanowires effectively suppresses the thermal transport of low-frequency phonons, thereby reducing thermal conductivity (significantly lower than that of traditional random disordered silicon-germanium nanowires). At the same time, by adjusting the spatial position of atoms in the nanowires, the thermal conductivity is significantly reduced while the impact on electrical conductivity is minimized, thus improving thermoelectric efficiency. This greatly reduces the efficiency of heat transfer in the system, thereby increasing the temperature difference and improving the cooling effect.

[0081] During operation, by adjusting the magnitude of the (DC) current, the thermoelectric effect of the system can be controlled, and the temperature difference between the hot and cold ends can be adjusted, thereby achieving precise heat dissipation management of electronic equipment.

[0082] Furthermore, in one embodiment, the germanium atoms are spatially correlated and disordered:

[0083] The spatial coordinates of germanium atoms are related to the distances between adjacent germanium atoms, and this correlation decreases power-lawfully with increasing interatomic distance:

[0084] C(r)~|r| -a

[0085] Where a is the correlation parameter and r is the distance between adjacent germanium atoms.

[0086] It should be noted that thermal power equipment plays an important role in managing heat and converting waste heat into electrical energy.

[0087] The efficiency of thermoelectric materials is quantified by the thermoelectric figure of merit:

[0088]

[0089] Where σ is electrical conductivity, S is Seebeck coefficient, T is temperature, and κ is thermal conductivity.

[0090] Improving thermoelectric figure of merit by manipulating electronic properties to alter electrical conductivity is often complex. A simpler and more effective strategy is to reduce lattice thermal conductivity without significantly altering other factors. By alloying silicon with chemically similar elements (such as germanium), the lattice thermal conductivity can be reduced by at least an order of magnitude without significantly changing the electron transport coefficient.

[0091] It should be noted that the silicon-germanium alloy nanowires in current conventional thermoelectric devices often adopt a random and disordered structure, meaning that germanium atoms are randomly and disorderedly distributed within the silicon nanowires. However, in nature, inhomogeneity is often not completely random, and a random and disordered distribution cannot accurately reflect natural phenomena. Furthermore, silicon nanowires with a random and disordered distribution structure still have limitations in reducing thermal conductivity, making it difficult to meet the requirements for efficient thermoelectric conversion.

[0092] It should be noted that in nature, inhomogeneity is often not completely random, but rather correlated over a large distance. That is, the correlation decreases with the distance between atoms (such as the distance between adjacent germanium atoms) in a power law manner, rather than exponentially. The disordered distribution of spatial correlation reflects real natural phenomena.

[0093] In this embodiment, if the correlation parameter a is less than the spatial dimension, the correlation is considered to be long-range.

[0094] In this embodiment, germanium atoms with spatial correlation distribution are introduced into pure silicon nanowires to form spatially correlated disordered silicon-germanium nanowires.

[0095] Furthermore, in one embodiment, the spatially correlated disordered silicon-germanium nanowires are fabricated using the following process:

[0096] Material selection steps: Select silicon (Si) and germanium (Ge) as nanowire alloy components and adjust their ratio to achieve the desired degree of disorder;

[0097] Lattice matching and mismatch steps: A silicon-germanium alloy thin film is deposited on a substrate with a specific lattice constant through epitaxial growth, introducing lattice mismatch on the substrate, thereby generating a spatially correlated disordered structure (i.e., the distribution of germanium atoms is spatially correlated disordered).

[0098] Heat treatment steps: After the silicon-germanium alloy thin film is grown by epitaxial growth method, annealing is performed to adjust the degree of disorder and correlation.

[0099] Patterning steps: Define nanowire patterns on silicon-germanium alloy thin films using electron beam lithography or nanoimprint lithography.

[0100] Etching process steps: Reactive ion etching (RIE) technology is used to etch nanowire structures on silicon-germanium alloy thin films according to nanowire patterns using appropriate gases (such as chlorine or fluorides), thus completing the fabrication of spatially correlated disordered silicon-germanium nanowires.

[0101] It should be noted that regarding the lattice matching and mismatch steps: Ideally, the lattice constants of the epitaxially grown film and the substrate should be perfectly matched to avoid stress and defects caused by lattice mismatch. However, in this step, the goal is not to achieve perfect lattice matching, but rather to introduce a disordered structure through specific mismatches.

[0102] Furthermore, in one embodiment, the introduction of lattice mismatch on the substrate involves selecting a substrate with a different lattice constant than the silicon-germanium alloy (i.e., a substrate with a specific lattice constant) to introduce stress and defects, thereby forming a spatially correlated disordered structure.

[0103] In this embodiment, by selecting a substrate with a different lattice constant than the silicon-germanium alloy (i.e., a substrate with a specific lattice constant), the difference in lattice constants causes stress and defects to be generated between the thin film and the substrate during the growth process. These stresses and defects propagate in the thin film, forming a spatially correlated disordered structure. It is this disordered structure that endows the silicon-germanium nanowires with unique physical and chemical properties.

[0104] Furthermore, in one embodiment, in the heat treatment step, the annealing treatment temperature range is 600°C to 800°C, and the duration is 30 minutes to 2 hours.

[0105] In this embodiment, the heat treatment step helps to adjust the degree of disorder and correlation, thereby optimizing the performance of the nanowires.

[0106] Furthermore, in one embodiment, in the lattice matching and mismatch steps, the substrate material of the specific lattice constant is silicon or sapphire.

[0107] Furthermore, in one embodiment, during the lattice matching and mismatch steps, the substrate with the specific lattice constant needs to be thoroughly cleaned and surface-treated to ensure high-quality epitaxial growth.

[0108] Furthermore, in one embodiment, in the lattice matching and mismatch step, the epitaxial growth method is molecular beam epitaxy (MBE) or chemical vapor deposition (CVD) technology, and epitaxial growth is performed under high vacuum conditions.

[0109] In this embodiment, molecular beam epitaxy (MBE) is a technique that uses precise control of the beam of raw material molecules or atoms to perform epitaxial growth on a substrate surface under ultra-high vacuum conditions. During MBE, source materials such as silicon (Si) and germanium (Ge) (e.g., silane SiH4 and germanane GeH4, or their pyrolysis products) are heated to vaporization, forming molecular or atomic beams. These beams are then guided and deposited onto a cleaned and pretreated substrate after passing through a precise mass flow controller and shutter system.

[0110] The advantages of MBE technology include:

[0111] High precision: It can precisely control the growth rate and the composition of the film.

[0112] Low-temperature growth: This is usually carried out at lower temperatures, which helps to reduce the impact of thermal stress on film quality.

[0113] Good interface control: Thin films with steep interfaces and excellent crystal quality can be grown.

[0114] In this embodiment, chemical vapor deposition (CVD) is a technique for generating solid materials on a substrate surface through a chemical reaction. During the CVD process, gaseous precursors containing silicon (Si) and germanium (Ge) elements (such as silane SiH4 and germanane GeH4) are introduced into the reaction chamber and undergo a chemical reaction on the heated substrate surface to generate a solid silicon-germanium alloy thin film.

[0115] The advantages of CVD technology include:

[0116] High efficiency: It can quickly grow thick films.

[0117] Flexibility: The composition and properties of the thin film can be controlled by adjusting reaction conditions (such as temperature, gas flow rate and reaction time).

[0118] Good coverage: Good film coverage can be achieved even on substrates with complex shapes.

[0119] Furthermore, in one embodiment, the epitaxial growth parameters in the lattice matching and mismatch steps of the epitaxial growth method are as follows:

[0120] The temperature is controlled between 500℃ and 700℃ to optimize crystal quality and disorder.

[0121] The growth rate is adjusted from 0.1 to 1 nanometer per second to precisely control the thickness and composition of the film;

[0122] For cases using chemical vapor deposition (CVD) technology:

[0123] The gas flow rate ratio of silane (SiH4) and germanane (GeH4) is precisely controlled to achieve the desired silicon (Si) and germanium (Ge) ratio.

[0124] In this embodiment, the fabrication of a silicon-germanium alloy thin film (or silicon-germanium alloy material) with a spatially correlated disordered structure is completed through lattice matching and mismatch steps; subsequently, nanowires are prepared through patterning and etching processes.

[0125] Furthermore, in one embodiment, after the spatially correlated disordered silicon-germanium nanowires are fabricated, structural and performance analysis (structural and performance characterization steps) can be performed:

[0126] Microstructure analysis: The morphology and disordered structure of spatially correlated disordered silicon-germanium nanowires were observed using transmission electron microscopy (TEM) and scanning electron microscopy (SEM).

[0127] Compositional analysis: The distribution of silicon (Si) and germanium (Ge) atoms in spatially correlated disordered silicon-germanium nanowires was determined by energy-dispersive X-ray spectroscopy (EDS) or secondary ion mass spectrometry (SIMS).

[0128] Physical property measurement: Conduct electrical and thermal performance tests to evaluate the impact of spatially correlated disordered structures on nanowire properties.

[0129] Furthermore, in one embodiment, to verify the effect of the spatially correlated disordered silicon-germanium nanowires, a comparative experiment is provided to compare the spectral cumulative thermal conductivity of the spatially correlated disordered silicon-germanium nanowires with that of traditional random disordered silicon-germanium nanowires:

[0130] Introducing spatial correlation into silicon-germanium nanowires results in a correlation among phonon scattering centers, leading to a stronger Brillouin zone folding effect and consequently increasing the scattering of low-frequency, long-wavelength phonons. Furthermore, the spatially correlated disordered structure can alter the phonon spectral properties of the material, such as introducing localized modes or suppressing phonon propagation speed. This alteration reduces the thermal transport efficiency of phonons throughout the material.

[0131] Combination Figure 3 It is known that for spatially correlated disordered silicon-germanium nanowires, the cumulative thermal conductivity is lower than that of random disordered nanowires throughout the entire frequency range. In particular, in the low frequency range of 0-2Thz, long-wavelength phonons carrying a large amount of heat are more effectively scattered by the spatially correlated disordered structure, resulting in a significant reduction in thermal conductivity.

[0132] Furthermore, in one embodiment, the concentration of germanium atoms in the spatially correlated disordered silicon-germanium nanowires is 10% to 20%.

[0133] In this embodiment, based on the comparative experiments above, it is evident that when the Ge (germanium atom) concentration is 10%–20%, the spatially correlated disordered structure exhibits the most significant inhibitory effect on thermal transport, with a maximum decrease in thermal conductivity of up to 58%. This result indicates that within this concentration range, the spatially correlated disordered structure, through its unique microstructure, significantly weakens the thermal conduction caused by lattice vibrations, greatly optimizing the thermoelectric properties of the material. The unique microstructure of the spatially correlated disordered silicon-germanium nanowires effectively enhances electron mobility while reducing thermal conductivity, allowing heat to be retained in the thermoelectric material for a longer period, ensuring a more durable and stable thermoelectric effect.

[0134] The above description of several specific embodiments further details the technical solution provided by the present invention in order to highlight the advantages and benefits of the technical solution provided by the present invention. However, the above-described specific embodiments are not intended to limit the present invention. Any reasonable modifications and improvements to the present invention, reasonable combinations of embodiments, and equivalent substitutions based on the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A spatially correlated disordered silicon-germanium nanowire thermoelectric refrigeration system for an electronic device, characterized in that, The system comprises a hot end, a cold end and a thermoelectric conversion module: The hot end is connected with a heat-generating chip in the electronic device, for absorbing heat generated by the electronic device; The cold end is connected with a heat sink, for absorbing heat from the hot end and dissipating the absorbed heat to the external environment through the heat sink; The thermoelectric conversion module is arranged between the hot end and the cold end, for adjusting the temperature difference between the hot end and the cold end, to realize the heat dissipation and refrigeration management of the electronic device; The thermoelectric conversion module comprises a heat-conducting layer, a thermoelectric material layer and a power supply driving circuit; the thermoelectric material layer is composed of spatially correlated disordered silicon germanium nanowires; in the spatially correlated disordered silicon germanium nanowires, the distribution of germanium atoms is spatially correlated and disordered; The heat-conducting layer is arranged between the thermoelectric material layer and the hot end, for enhancing the heat transfer from the hot end to the thermoelectric material layer; The power supply driving circuit is used to provide direct current to the thermoelectric material layer; The thermoelectric material layer is used to respond to the direct current provided by the power supply driving circuit, to generate a temperature difference across its two ends through the thermoelectric effect, thereby enhancing the refrigeration effect; and it is also used to adjust the temperature difference across the two ends of the thermoelectric material layer by adjusting the current value of the direct current provided by the power supply driving circuit, thereby adjusting the temperature difference between the hot end and the cold end.

2. The spatially correlated disordered silicon-germanium nanowire thermoelectric refrigeration system for an electronic device of claim 1, wherein, The contact surface of the hot end with the heat-generating chip is designed as a microstructure to increase the heat conduction area.

3. The spatially correlated disordered silicon-germanium nanowire thermoelectric refrigeration system for electronic devices of claim 1, wherein, The material of the heat-conducting layer is a metal film or graphene.

4. The spatially correlated disordered silicon-germanium nanowire thermoelectric refrigeration system for electronic devices of claim 1, wherein, The diameter of the spatially correlated disordered silicon germanium nanowires is between 10 nm and 20 nm.

5. The spatially correlated disordered silicon-germanium nanowire thermoelectric refrigeration system for an electronic device of claim 4, wherein, The length of the spatially correlated disordered silicon germanium nanowires is 1 μm.

6. The spatially correlated disordered silicon-germanium nanowire thermoelectric refrigeration system for electronic devices of claim 1, wherein, The system further comprises a packaging board arranged between the hot end and the thermoelectric conversion module.

7. The spatially correlated disordered silicon-germanium nanowire thermoelectric refrigeration system for electronic devices of claim 1, wherein, The power supply driving circuit comprises a power supply, electrodes and a current adjusting device; The power supply is electrically connected with the thermoelectric material layer through the electrodes, for providing direct current to the thermoelectric material layer; The current adjusting device is used to adjust the current value of the direct current provided by the power supply, thereby adjusting the temperature difference across the two ends of the thermoelectric material layer through the thermoelectric effect.

8. The spatially correlated disordered silicon-germanium nanowire thermoelectric refrigeration system for electronic devices of claim 1, wherein, The distribution of germanium atoms is spatially correlated and disordered: The spatial coordinates of germanium atoms are related to the distance between adjacent germanium atoms, and the correlation decreases with the distance between germanium atoms according to a power law: C(r)～|r| -a wherein a is a correlation parameter and r is the distance between adjacent germanium atoms.

9. The spatially correlated disordered silicon-germanium nanowire thermoelectric refrigeration system for an electronic device of claim 8, wherein, In the spatially correlated disordered silicon germanium nanowires, the concentration of germanium atoms is 10% to 20%.

10. The spatially correlated disordered silicon-germanium nanowire thermoelectric refrigeration system for an electronic device of claim 9, wherein, The spatially correlated disordered silicon germanium nanowires are made by the following preparation process: Material selection step: selecting silicon and germanium as the alloy components of the nanowires and adjusting their proportions to achieve the desired degree of disorder; Lattice matching and mismatching step: depositing a silicon germanium alloy thin film on a substrate by epitaxial growth, wherein the lattice constant of the substrate is different from that of the silicon germanium alloy, so as to introduce lattice mismatch and generate a spatially correlated disordered structure; Heat treatment step: annealing after the growth of the silicon germanium alloy thin film by epitaxial growth, to adjust the degree of disorder and the correlation; Pattern processing step: defining a nanowire pattern on the silicon germanium alloy thin film using electron beam lithography or nanoimprint technology; Etching process step: using reactive ion etching technology, nanowire structure is etched on silicon germanium alloy film according to nanowire pattern, and the spatial correlation disordered silicon germanium nanowire is completed.

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