Data storage device

By using cache memory and auxiliary memory in data storage devices and writing exchange data only in cache memory, the high cost and low performance of DRAM in data centers is solved, achieving higher performance and cost savings.

CN119895406APending Publication Date: 2025-04-25HUAWEI TECH CO LTD
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Patent Information

Application Number
CN202380066503.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-02-24
Publication Date
2025-04-25

AI Technical Summary

Technical Problem

In data centers, DRAM is used for caching of data storage, but due to the high cost and technical scaling challenges of DRAM, how to improve data storage performance without increasing costs becomes a problem, especially when switching write requests.

Method used

By introducing cache memory and auxiliary memory into the data storage device and identifying the memory location associated with the exchange using the processor, data is only written in the cache memory to avoid triggering slow writing to auxiliary memory.

Benefits of technology

Response time for swap writes is significantly improved, performance in DRAM reduction environments is improved, while allowing for reduced DRAM size in data storage devices, thus saving costs.

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Abstract

In some examples, a data storage device includes a cache memory, an auxiliary memory including at least one memory location associated with a swap, and a processor to: identify the at least one memory location of the auxiliary memory associated with the swap; in response to receiving a write request for writing data, determining whether the write request is a request for writing data into the at least one memory position associated with the swap of the auxiliary memory; in response to determining that the write request is the request for writing data to the at least one memory location of the secondary memory associated with swap, only the data is written to the cache memory.
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Description

Technical Field

[0001] The present invention relates generally to data storage applications and improving performance without increasing the cost of the data storage application. Aspects of the present invention relate to accelerating swap writes. Background Art

[0002] The surge in memory demand for data center applications, coupled with the increasing cost and technical expansion challenges of dynamic random-access memory (DRAM), has made memory a significant infrastructure expense. Typically, in a data center, one or more modules responsible for data storage are connected to one or more computing (processing) modules through a network, which results in significant access latency. System DRAM is used as a cache for data storage, thereby improving system performance.

[0003] To address this problem, non-DRAM memory technologies can be used to build a hierarchical memory subsystem and add larger memory capacity at a lower cost. Specifically, cheaper, slower devices such as solid-state drives (SSDs) can be added to the system and used for caching to reduce access to slower modules responsible for data storage, such as networked storage or hard disk drives (HDDs). However, these technologies have much higher latency than DRAM and can significantly degrade performance when data is inefficiently placed at different levels of the memory hierarchy. By default, these cache devices speed up reads but do not affect the performance of write requests because the data must be written to the slower modules either way.

[0004] Another way to reduce DRAM size and thus save costs is to use memory swapping. Memory swapping (or memory paging) is a memory management scheme by which a computer stores and retrieves data from secondary storage (such as a mechanical hard drive) for use in main memory (such as RAM). Applications use memory to store their code and data. When the operating system cannot allocate memory for an application, the system swaps out some memory to the swap device (secondary storage). If DRAM is used for application memory, the OS needs to perform swapping to compensate for the reduction in DRAM. Swapping mainly generates write requests. Since cache tiering cannot improve the performance of write requests, it cannot effectively speed up swapping. Summary of the invention

[0005] An object of the present invention is to improve performance without increasing the cost of data storage applications.

[0006] These and other objects are achieved by the features of the independent claims.

[0007] Further implementations are apparent from the dependent claims, the description and the drawings.

[0008] A first aspect of the present invention provides a data storage device, comprising a cache memory, an auxiliary memory and a processor, the auxiliary memory comprising at least one memory location associated with swap, the processor being used to: identify at least one memory location of the auxiliary memory associated with swap; in response to receiving a write request for writing data, determine whether the write request is a request for writing data to at least one memory location associated with swap in the auxiliary memory; in response to determining that the write request is a request for writing data to at least one memory location associated with swap in the auxiliary memory, write the data only to the cache memory.

[0009] As a result, the response time of swap writes can be greatly improved because slow writes to secondary memory are not triggered. This enables higher performance in DRAM-reduced environments. The data storage device is able to use swap without negatively impacting the application, allowing the DRAM size in the data storage device to be reduced, thereby saving costs.

[0010] In an implementation of the first aspect, the processor may be configured to: in response to determining that the write request is not a request for writing data to at least one memory location associated with the swap in the auxiliary memory, write the data to the cache memory and the auxiliary memory. Therefore, the data persistence requirement can be met while still accelerating the performance of the swap.

[0011] At least one memory location of the auxiliary memory associated with swapping may include a swap partition. Thus, existing data drives may be used for swapping without requiring additional hardware.

[0012] The processor may also be configured to: read the storage partition table to identify the swap partition and its address, thereby identifying at least one memory location of the auxiliary memory associated with the swap. Thus, the swap partition may be easily identified using readily available methods.

[0013] The device may also include additional cache memory to form a cache layer with the cache memory. Thus, the DRAM size may be reduced, saving costs without negatively impacting application performance.

[0014] The processor may also be configured to create and maintain a list of memory blocks that are part of the identified swap partition. This enables the device to accurately and efficiently determine whether a write request is related to swap.

[0015] A second aspect of the present invention provides a method, comprising: a data storage device including a cache memory identifies at least one memory location of an auxiliary memory associated with swap; in response to the data storage device receiving a write request, determines whether the write request is a request for writing data to at least one memory location of the auxiliary memory associated with swap; in response to determining that the write request is a request for writing data to at least one memory location of the auxiliary memory associated with swap, only writes the data to the cache memory.

[0016] As a result, the response time of swap writes can be greatly improved because slow writes to secondary memory are not triggered. This enables higher performance in DRAM-reduced environments. The method enables the use of swap without negatively impacting applications, allowing for a reduction in DRAM size in data storage devices, thereby saving costs.

[0017] In an implementation of the second aspect, the method may further include the following steps: in response to determining that the write request is not a request for writing data to at least one memory location associated with the swap in the auxiliary memory, writing the data to the cache memory and the auxiliary memory of the data storage device. Therefore, the data persistence requirement can be met while still speeding up the performance of the swap.

[0018] At least one memory location of the auxiliary memory associated with swapping may include a swap partition. Thus, existing data drives may be used for swapping without requiring additional hardware.

[0019] Identifying at least one memory location of the auxiliary memory associated with swap may include: the data storage device reading a storage partition table to thereby identify the swap partition and its address. Thus, the swap partition may be easily identified using readily available methods.

[0020] The method may also include the steps of creating and maintaining a list of memory blocks that are part of the identified swap partition. This allows accurate and efficient determination of whether a write request is related to swap.

[0021] Determining whether the write request is a request to write data to at least one memory location associated with swap in auxiliary memory may include comparing an address associated with the write request to a list of memory blocks that are part of the identified swap partition. Thus, all swap writes may be intercepted.

[0022] The at least one memory location of the auxiliary memory associated with swap may include a swap file, wherein identifying the at least one memory location of the auxiliary memory associated with swap may include: checking the file system to identify the swap file and its address. Thus, swap writes may be accelerated even if the OS uses a swap file instead of a dedicated swap partition.

[0023] A third aspect of the present invention provides a computer-readable storage medium, which includes a computer program code, which can be accessed by a device including a processor to provide instructions and / or data to the device, and the computer program code is used to enable the device through the processor: a data storage device including a cache memory identifies at least one memory location of an auxiliary memory associated with an exchange; in response to the data storage device receiving a write request, determines whether the write request is a request for writing data to at least one memory location associated with an exchange in the auxiliary memory; in response to determining that the write request is a request for writing data to at least one memory location associated with an exchange in the auxiliary memory, only writes the data to the cache memory.

[0024] As a result, the response time of swap writes can be greatly improved because slow writes to secondary memory are not triggered. This enables higher performance in DRAM-reduced environments. The data storage device is able to use swap without negatively impacting the application, allowing the DRAM size in the data storage device to be reduced, thereby saving costs.

[0025] In an implementation of the third aspect, the computer program code may also be used to cause the device, through the processor, to: in response to determining that the write request is not a request for writing data to at least one memory location associated with the swap in the auxiliary memory, write the data to the cache memory and the auxiliary memory. Therefore, the data persistence requirement can be met while still speeding up the performance of the swap.

[0026] These and other aspects of the invention will be apparent from and elucidated with reference to one or more of the embodiments described hereinafter. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to make the present invention more easily understood, embodiments of the present invention will now be described by way of example with reference to the accompanying drawings, in which:

[0028] Figure 1 is a schematic diagram of a data storage device according to an example;

[0029] Figure 2 is a schematic diagram of auxiliary memory according to an example;

[0030] Figure 3 is a flow chart of a method according to an example. DETAILED DESCRIPTION

[0031] The exemplary embodiments are described in detail below to enable those skilled in the art to embody and implement the systems and processes described herein.It is important to understand that the embodiments can be provided in many alternative forms and should not be construed as limited to the examples set forth herein.

[0032] Therefore, although the embodiments can be modified in various ways and take various alternative forms, specific embodiments thereof are shown in the drawings and described in detail below as examples. It is not intended to limit the specific forms disclosed. On the contrary, all modifications, equivalents and alternatives within the scope of the appended claims should be included. The elements of the exemplary embodiments are consistently represented by the same reference numerals throughout the drawings and are described in detail where appropriate.

[0033] The terms used herein to describe the embodiments are not intended to limit the scope. "One", "an" and "said" are singular because they have a single referent, but the use of the singular form in this document should not exclude the presence of more than one referent. In other words, the elements mentioned in the singular can be numbered one or more, unless otherwise clearly stated in the context. It should also be understood that the term "comprising" used herein means that there are stated features, items, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, items, steps, operations, elements, components and / or combinations thereof.

[0034] Unless otherwise defined, all terms (including technical and scientific terms) used herein should be interpreted as customary in the art. It should also be understood that unless explicitly defined herein, terms in common usage should also be interpreted as customary in the relevant art rather than in an idealized or overly formal sense.

[0035] Caching is a technique that temporarily stores copies of data in quickly accessible storage memory. The cache acts as a buffer between random access memory and the central processing unit, increasing the speed at which the processor can use the data. When a user issues a write request to the disk and receives confirmation that the write was successful, the data will exist even if a crash occurs (such as a power outage). This requirement is called persistence. Data storage systems maintain persistence by backing up data, sometimes across different sites. Since the data in the cache is not backed up, write caching does not protect against data corruption.

[0036] When writing to the cache, two different modes can be used. These modes are WriteThrough and WriteBack. With the WriteThrough strategy, data is written to both the cache and the backup storage location simultaneously. After writing to both devices, the user receives an acknowledgment, confirming that the I / O is complete. This mode helps recover data in the event of a power outage or system failure and ensures data consistency because the memory always has a current copy of the data. However, it is also associated with latency because two locations (memory and cache) need to be written each time.

[0037] In WriteBack mode, data is only written to the cache device and marked to be flushed to the remote disk at a later stage. Data is updated in memory only when the cache line is ready to be replaced. Each block in the cache needs to indicate whether the data present in the cache has been modified (dirty) or unmodified (clean). If the data is clean, there is no need to write the data to the memory. This reduces the number of write operations to the memory. However, this mode cannot meet persistence requirements. Although the latency is low, there is a risk that the data will be lost before it is written to the remote disk.

[0038] Swapping is the process of temporarily swapping a process from primary memory to secondary memory. When the operating system cannot allocate memory to an application (due to a limited amount of available RAM), the operating system swaps some memory out to swap memory. Swap memory is a dedicated amount of hard disk that is used when RAM runs out of memory. There are two types of swap memory, swap partitions and swap files. A swap partition is a hard disk partition that is dedicated to swapping. A swap file is a file into which inactive contents of RAM are swapped. Swapping I / O consists of at least as many write requests as read requests, because the same block is written before each read from swap memory.

[0039] In the data center architecture, the modules responsible for data storage (such as hard disks, etc.) are connected to the computing (processing) modules through the network, which results in significant access latency. In order to reduce DRAM (and thus reduce costs), the operating system needs to perform swapping to support the execution of applications that require a lot of memory. Hierarchical caches can also be used to compensate for the reduction in DRAM size. As mentioned above, hierarchical caches can speed up read operations, but not write operations. Since swapping mainly generates write requests, hierarchical caches cannot be used to speed up swapping.

[0040] According to an example, a mechanism is provided to improve the response time of swap writes. More specifically, aspects relate to using swap without severely impacting the performance of applications. The provided mechanism advantageously saves hardware costs for data center applications.

[0041] Figure 1 1 is a schematic diagram of a data storage device according to an example. The data storage device 100 includes a cache memory 102 for caching storage data and an auxiliary memory 104, the auxiliary memory including at least one memory location 106 associated with a swap. The data storage device 100 also includes a processor 108.

[0042] Cache memory 102 may be implemented by dedicating a portion of memory to cache data, or by connecting a separate cache memory device to the memory and processor 108. In addition, multiple levels of cache memory may be maintained in storage device 100. For example, processor 108 may use a first level cache to speed up access to stored data, and a second level cache may be implemented to support the operation of the first level cache.

[0043] For example, the auxiliary memory 104 may include a hard disk storage device, a solid-state disk (SSD) storage device, or any other suitable non-volatile storage device. As described above, the auxiliary memory 104 includes at least one memory location 106 associated with the swap.

[0044] Figure 2 is a schematic diagram of auxiliary memory 104 according to an example. Figure 2 As shown, the auxiliary memory includes at least one memory location 206 associated with swapping (similar to the at least one memory location 106). For example, the memory location 206 can be a non-volatile storage device separate from the data drive, a partition of a non-volatile storage device, or a memory location for storing a swap file. The auxiliary memory can also include at least one memory location 210-n that is not associated with swapping, that is, a memory location that is not associated with using disk space instead of RAM to store data.

[0045] The processor 108 is configured to identify at least one memory location 106 of the auxiliary memory 104 that is associated with the swap. Specifically, the processor 108 is configured to determine at least one memory location 106 associated with the swap and its address in the auxiliary memory 104. As described in more detail below, this enables swap write operations to be intercepted so that they do not trigger slow writes to the auxiliary memory 104.

[0046] As described above, the at least one memory location 106 associated with swap of the auxiliary memory 104 may include a swap partition. In this case, the processor 108 may also be used to read the storage partition table to identify the swap partition and its address in the auxiliary memory 104, thereby identifying the at least one memory location 106 associated with swap. The layout of the storage partition table and the information included therein are known to those skilled in the art, so the description thereof will be omitted. The processor 108 may identify the swap partition and its address by reading the partition type field of the storage partition table.

[0047] The processor 108 may also be configured to create and maintain a list of memory blocks that are part of the identified swap partition (or separate swap drive) to identify one or more addresses of at least one memory location associated with swap.

[0048] In the case where the operating system uses a swap file instead of a swap partition, the processor 108 can be used to analyze the contents of a file system (fs) to identify its structure and files in order to determine in which memory block(s) the swap file is located. In this case, the at least one memory location 106 associated with swapping can include a memory location (i.e., which memory block in the memory block) where the swap file is stored.

[0049] In response to receiving a write request for writing data to the auxiliary memory 104, the processor 108 is configured to determine whether the write request is a request for writing data to at least one memory location 106 associated with a swap. The processor 108 may determine an address of a memory block associated with the write request. In response to receiving a write request for writing data to the auxiliary memory 108, the processor 108 may check whether the address of the memory block associated with the write request is an address of a memory location 106 associated with a swap. The processor 108 may compare the address of the memory block to be written with a list of memory blocks associated with a swap to determine whether the write request is a request for writing data to at least one memory location 106 associated with a swap. Therefore, the processor 108 may determine that the request is associated with a swap write.

[0050] In this way, all writes to at least one memory location 106 of secondary memory 104 associated with swap can be intercepted because each write operation of the data storage device 100 is checked against a list (or the like) of memory locations in which the identification of the swap file is stored.

[0051] In response to determining that the write request is indeed a request for writing data to at least one memory location 106 associated with swap in the auxiliary memory 104, the processor 108 is configured to write the data only to the cache memory 102. That is, the data is not written to at least one memory location 106 associated with swap in the auxiliary memory 104. In other words, in response to determining that the write request is a request for writing swap data, the WriteBack policy is applied. Since writing to the cache memory 102 is faster than writing to the auxiliary memory 104, swap writing can be accelerated by reducing latency.

[0052] In contrast, in response to determining that the write request is not a request to write data to at least one memory location 106 associated with the swap in the secondary memory 104, the processor 108 may also be configured to write data to both the cache memory 102 and the secondary memory 104, such as writing Figure 2At least one memory location associated with the write request in the memory locations 210-n shown in . In other words, the WriteThrough strategy is applied. This method improves the performance of the data storage device in the swap scenario without negatively affecting the system state, that is, ensuring that the persistence requirements of the data are met.

[0053] The data storage device 100 may include additional cache memory in addition to the cache memory 102. The additional cache memory and the cache memory 102 may form a cache layer to compensate for the reduction of DRAM in the device.

[0054] Figure 3 is a flow chart of a method according to an example. In block 301, the method includes: a storage device including a cache memory identifies at least one memory location of an auxiliary memory associated with a swap. The method may include determining at least one memory location associated with a swap and its address in the auxiliary memory. This will enable swap write operations to be intercepted so that they do not trigger slow writes to the auxiliary memory.

[0055] At least one memory location of the auxiliary memory associated with swapping may include a swap partition. In this case, the method may further include the following steps: reading a storage partition table to identify the swap partition and its address in the auxiliary memory, thereby identifying at least one memory location associated with swapping. Specifically, the swap partition and its address may be identified by reading a partition type field of the storage partition table.

[0056] The method may also include the steps of creating and maintaining a list of memory blocks that are part of the identified swap partition (or separate swap drive) to identify one or more addresses of at least one memory location associated with the swap. In the case where the operating system uses a swap file instead of a swap partition, the method may also include the steps of analyzing the contents of a file system (fs) to analyze its structure and files to determine in which memory block(s) the swap file is located.

[0057] In box 302, the method includes: in response to the data storage device receiving a write request, determining whether the write request is a request for writing data to at least one memory location associated with the exchange in the auxiliary memory. This may involve determining the address of the memory block associated with the write request. In response to receiving a write request for writing data to the auxiliary memory, the method may include checking whether the address of the memory block associated with the write request is the address of the memory location associated with the exchange, for example, by comparing the address of the memory block to be written with a list of memory blocks associated with the exchange to determine whether the write request is a request for writing data to at least one memory location associated with the exchange. In other words, in response to the data storage device receiving the write request, the method may include the following steps: determining whether the request involves an exchange write.

[0058] This allows all swap writes to be intercepted, as each write operation is checked against a list (or similar) of memory locations where the identification of the swap files is stored.

[0059] In block 303, the method includes: in response to determining that the write request is a request to write data to at least one memory location associated with the swap in the auxiliary memory, only writing the data to the cache memory. In other words, applying the WriteBack strategy. Since writing to the cache memory is faster than writing to the auxiliary memory, swap writing can be accelerated by reducing latency.

[0060] Alternatively, in response to determining that the write request is not a request to write data to at least one memory location associated with the swap in the auxiliary memory, the method may include writing the data to a cache memory and the auxiliary memory of the data storage device.

[0061] According to one example, machine-readable instructions may be loaded onto a computer or other programmable data processing device so that the computer or other programmable data processing device performs a series of operations to produce a computer-implemented process, whereby the instructions executed on the computer or other programmable device provide operations for implementing the functions specified by the processes in the flowchart and / or the blocks in the block diagram.

[0062] Furthermore, the teachings herein may be implemented in the form of a computer or software product (e.g., a non-transitory machine-readable storage medium), which is stored in a storage medium and includes a plurality of instructions, such as machine-readable instructions, for causing a computer device to implement the method described in the examples of the present invention.

[0063] In some examples, some methods may be performed in a cloud computing or network-based environment. A cloud computing environment may provide various services and applications over the Internet. For example, these cloud-based services (e.g., software as a service, platform as a service, infrastructure as a service, etc.) may be accessed through a web browser or other remote interface of a user device. The various functions described herein may be provided through a remote desktop environment or any other cloud-based computing environment.

[0064] Although various embodiments have been described and / or shown in the context of a fully functional computing system herein, one or more of these exemplary embodiments can be distributed as a program product in various forms, regardless of the specific type of computer-readable storage medium used to actually perform the distribution. The embodiments disclosed herein can also be implemented using software modules that perform certain tasks. These software modules can include scripts, batch processing, or other executable files that can be stored in a computer-readable storage medium or a computing system. In some embodiments, these software modules can configure a computing system to perform one or more of the exemplary embodiments disclosed herein. In addition, one or more of the modules described herein can convert data, physical devices, and / or representations of physical devices from one form to another.

[0065] The above description is provided to enable those skilled in the art to best use the various aspects of the exemplary embodiments disclosed herein. This exemplary description is not intended to ensure exhaustiveness or to limit the invention to the precise form disclosed. Various modifications and variations may be made without departing from the spirit or scope of the invention. The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. In determining the scope of the invention, reference should be made to the appended claims and their equivalents.

Claims

1. A data storage device, characterized in that: include: Cache memory; an auxiliary memory, the auxiliary memory comprising at least one memory location associated with the swap; Processor for: identifying the at least one memory location of the auxiliary memory associated with the swap; In response to receiving a write request for writing data, determining whether the write request is a request for writing data to the at least one memory location associated with the swap in the auxiliary memory; In response to determining that the write request is the request to write data to the at least one memory location of the secondary memory associated with the swap, only the data is written to the cache memory.

2. The data storage device according to claim 1, characterized in that The processor is used to: In response to determining that the write request is not the request to write data to the at least one memory location of the secondary memory associated with the swap, the data is written to the cache memory and the secondary memory.

3. The device according to claim 1 or 2, characterized in that: The at least one memory location of the secondary memory associated with swap comprises a swap partition.

4. The device according to claim 3, characterized in that The processor is used to: A storage partition table is read to identify the swap partition and its address, thereby identifying the at least one memory location of the auxiliary memory associated with swap.

5. The device according to any one of the preceding claims, characterized in that Additional cache memory is also included to form a cache layer with the cache memory.

6. The device according to any one of the preceding claims, characterized in that The processor is used to: Create and maintain a list of memory blocks that are part of the swap partition identified by this identifier.

7. A method, characterized in that include: A data storage device including a cache memory identifies at least one memory location of the auxiliary memory associated with the swap; In response to the data storage device receiving a write request, determining whether the write request is a request to write data to the at least one memory location associated with the swap in the auxiliary memory; In response to determining that the write request is the request to write data to the at least one memory location of the secondary memory associated with the swap, only the data is written to the cache memory.

8. The method according to claim 7, characterized in that The following steps are also included: In response to determining that the write request is not the request to write data to the at least one memory location associated with the swap in the auxiliary memory, the data is written to the cache memory and the auxiliary memory of the data storage device.

9. The method according to claim 7 or 8, characterized in that: The at least one memory location of the secondary memory associated with swap comprises a swap partition.

10. The method according to claim 9, characterized in that Identifying the at least one memory location of the auxiliary memory associated with the swap comprises: the data storage device reading a storage partition table to identify the swap partition and its address.

11. The method according to claim 10, characterized in that The following steps are also included: Create and maintain a list of memory blocks that are part of the swap partition identified by this identifier.

12. The method according to claim 11, characterized in that Determining whether the write request is a request to write data to the at least one memory location associated with swap of the auxiliary memory includes comparing the address associated with the write request to the list of memory blocks that are part of the identified swap partition.

13. The method according to claim 7 or 8, characterized in that: said at least one memory location of said auxiliary memory associated with swapping comprises a swap file, Wherein, identifying the at least one memory location of the auxiliary memory associated with the swap comprises: checking a file system to identify the swap file and its address.

14. A computer-readable storage medium, characterized in that: comprising computer program code accessible by an apparatus comprising a processor to provide instructions and / or data to the apparatus, the computer program code being for causing the apparatus, via the processor, to: A data storage device including a cache memory identifies at least one memory location of the auxiliary memory associated with the swap; In response to the data storage device receiving a write request, determining whether the write request is a request to write data to the at least one memory location associated with the swap in the auxiliary memory; In response to determining that the write request is the request to write data to the at least one memory location of the secondary memory associated with the swap, only the data is written to the cache memory.

15. The computer-readable storage medium according to claim 14, wherein: The computer program code is further configured to cause the apparatus, through the processor, to: In response to determining that the write request is not the request to write data to the at least one memory location associated with the swap in the auxiliary memory, the data is written to the cache memory and the auxiliary memory of the data storage device.